CN117269997A - Baseband signal processing circuit, receiver and baseband signal processing method - Google Patents

Baseband signal processing circuit, receiver and baseband signal processing method Download PDF

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Publication number
CN117269997A
CN117269997A CN202311077615.XA CN202311077615A CN117269997A CN 117269997 A CN117269997 A CN 117269997A CN 202311077615 A CN202311077615 A CN 202311077615A CN 117269997 A CN117269997 A CN 117269997A
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China
Prior art keywords
positioning
reflection
occultation
dsp
baseband
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CN202311077615.XA
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Chinese (zh)
Inventor
蔡跃荣
孙越强
杜起飞
王先毅
白伟华
乔颢
王冬伟
李伟
曹光伟
刘成
李福�
张�浩
程双双
张璐璐
王卓炎
仇通胜
田羽森
夏俊明
柳聪亮
孟祥广
胡鹏
黄飞雄
谭广远
吴汝晗
尹聪
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National Space Science Center of CAS
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National Space Science Center of CAS
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Priority to CN202311077615.XA priority Critical patent/CN117269997A/en
Publication of CN117269997A publication Critical patent/CN117269997A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system
    • G01S19/29Acquisition or tracking or demodulation of signals transmitted by the system carrier including Doppler, related
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system
    • G01S19/30Acquisition or tracking or demodulation of signals transmitted by the system code related
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain

Abstract

The embodiment of the invention provides a baseband signal processing circuit, a receiver and a baseband signal processing method, wherein the baseband signal processing circuit comprises: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module; the original observation information is obtained through the signals collected and processed by the positioning baseband module, the occultation baseband module and the reflection baseband module, and reflection event prediction can be carried out in the reflection baseband module and occultation event prediction can be carried out in the occultation baseband module. Therefore, the satellite-masking baseband signal processing function and the reflection baseband signal processing function can be simultaneously realized in the baseband signal processing circuit, and by using the baseband signal processing circuit, the situation that two receivers are carried on the same satellite can be avoided, and the resources such as power consumption, weight, volume and the like which need to be provided are reduced.

Description

Baseband signal processing circuit, receiver and baseband signal processing method
Technical Field
The present invention relates to the field of baseband signal processing technologies, and in particular, to a baseband signal processing circuit, a receiver, and a baseband signal processing method.
Background
The GNSS (Global Navigation Satellite System ) remote sensing technology is more typically two, namely a occultation detection technology and a sea surface reflection detection technology. The occultation detection technology is to obtain an additional phase delay generated by a GNSS satellite signal passing through neutral atmosphere by using a low-orbit GNSS receiver, and obtain a physical parameter profile such as neutral atmosphere temperature, humidity, pressure and the like and an ionosphere electron density profile through inversion. The sea surface reflection detection technology is to obtain signals of GNSS satellite signals after sea surface reflection by using a low-orbit GNSS receiver, and invert the signals by using the characteristics of the sea surface reflection signals, so that sea surface wind speed, effective wave height and other sea state parameters can be obtained.
GNSS remote sensing has the characteristics of global coverage, all weather, no need of calibration, high vertical resolution and the like, and has important significance in the fields of weather forecast, space climate change research, ocean circulation research and the like.
The existing GNSS remote sensing receiver generally has only a occultation detection function or a sea surface reflection detection function, so that a baseband signal processing circuit of the existing GNSS remote sensing receiver also has only a occultation baseband signal processing function or a sea surface reflection baseband signal processing function. If the functions of satellite occulting detection and sea surface reflection detection are to be realized at the same time, two receivers, namely a transmitting satellite occulting receiver and a sea surface reflection receiver, are required to be mounted on the same satellite, and more resources such as power consumption, weight, volume and the like are required to be provided by the satellite.
Disclosure of Invention
In view of the above problems, it is proposed to provide a baseband signal processing circuit, a receiver and a baseband signal processing method that overcome or at least partially solve the above problems, comprising:
a baseband signal processing circuit, the circuit comprising: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module;
the positioning baseband module is used for collecting the positioning intermediate frequency signals received by the positioning antenna and processed by the positioning radio frequency signal processing module, generating first original observation information, and synchronously transmitting the positioning information generated according to the first original observation information to the occultation baseband module and the reflection baseband module;
The occultation baseband module is used for collecting the occultation intermediate frequency signals received by the occultation antenna and obtained after being processed by the occultation radio frequency signal processing module, forecasting the occultation event according to the received positioning information, and generating second original observation information.
The reflection baseband module is used for collecting the reflection intermediate frequency signals received by the reflection antenna and obtained after being processed by the reflection radio frequency signal processing module, forecasting reflection events according to the received positioning information and generating third original observation information;
optionally, the positioning baseband module includes a first ADS chip, a first ASIC, and a first DSP; the star masking baseband processing module comprises a second ADS chip, a second ASIC and a second DSP; the reflection baseband module comprises a third ADS chip, an FPGA and a third DSP;
the first ADS chip is connected with the positioning radio frequency signal processing module and is used for acquiring positioning intermediate frequency signals obtained after being processed by the positioning antenna and the positioning radio frequency signal processing module and converting the acquired positioning intermediate frequency signals into corresponding first data signals; the second ADS chip is connected with the occultation radio frequency signal processing module and is used for acquiring occultation intermediate frequency signals obtained after being processed by the occultation antenna and the occultation radio frequency signal processing module and converting the acquired occultation intermediate frequency signals into corresponding second data signals; the third ADS chip is used for collecting the reflected intermediate frequency signals obtained after being processed by the reflecting antenna and the reflecting radio frequency signal processing module and converting the collected reflected intermediate frequency signals into corresponding third data signals;
The first ASIC is used for generating first original observation information according to the first data signal; the second ASIC is used for generating second original observation information according to the second data signal; the FPGA is used for generating third original observation information according to the third data signal;
the first DSP is used for determining the positioning information according to the first original observation information and sending the positioning information to the second DSP and the third DSP; the second DSP is used for forecasting the occultation event according to the positioning information and outputting the first original observation information and the second original observation information; and the third DSP is used for carrying out reflection event prediction according to the positioning information and outputting third original observation information.
Optionally, the reflective baseband module is a detachable module.
Optionally, the FPGA is configured to correlate the third data signal with a locally generated reflected signal pseudo code and a carrier, and generate a two-dimensional delay-doppler plot in real time.
Optionally, the first ASIC is configured to send 2 synchronization signals to the second ASIC and the FPGA as slave terminals.
Optionally, the first DSP, the second DSP and the third DSP perform information interaction through an McBSP interface.
Optionally, the first DSP performs data interaction with the first ASIC through a first EMIF;
the second DSP performs data interaction with the second ASIC through a second EMIF;
and the third DSP performs data interaction with the FPGA through a third EMIF.
Optionally, the first DSP is connected to the first ASIC through a first link, a second link, and a third link; wherein the first link is configured to transmit at least one of: chip select signal, write signal, read signal; the second link is address lines EA [21:2] and the third link is data lines ED [31:0].
Optionally, the first DSP includes a first external interrupt pin, where the first external interrupt pin is configured to receive an interrupt signal sent by the first ASIC.
Optionally, the second DSP is connected to the second ASIC through a fourth link, a fifth link, and a sixth link; wherein the fourth link is configured to transmit at least one of: chip select signal, write signal, read signal; the fifth link is address lines EA [21:2] and the sixth link is data lines ED [31:0].
Optionally, the second DSP includes a second external interrupt pin, where the second external interrupt pin is configured to receive an interrupt signal sent by the second ASIC.
Optionally, the third DSP is connected with the FPGA through a seventh link, an eighth link, and a ninth link; wherein the seventh link is configured to transmit at least one of: chip select signal, write signal, read signal; the eighth link is address lines EA [21:2] and the ninth link is data lines ED [31:0].
Optionally, the third DSP includes a third external interrupt pin, where the third external interrupt pin is configured to receive an interrupt signal sent by the FPGA.
Optionally, the first ADC chip includes a plurality of ADC chips, each of the first ADC chips corresponding to a signal of a satellite;
the second ADC chips comprise a plurality of second ADC chips, and each second ADC chip corresponds to a signal of a satellite;
the third ADC chip is one and corresponds to a satellite signal.
Optionally, signals acquired by the first ADC chip, the second ADC chip and the third ADC chip enter the first ASIC, the second ASIC and the FPGA at the same time under the same clock synchronization, so that the first ASIC, the second ASIC and the FPGA work synchronously under the same clock.
Optionally, the circuit further comprises: peripheral circuitry.
A receiver comprising a baseband signal processing circuit as described above.
A baseband signal processing method applied to a circuit as described above, or a receiver as described above; the method comprises the following steps:
the method comprises the steps of obtaining a positioning intermediate frequency signal obtained after being received by a positioning antenna and processed by a positioning radio frequency signal processing module, a occultation intermediate frequency signal obtained after being received by a occultation antenna and processed by a occultation radio frequency signal processing module, and a reflection intermediate frequency signal obtained after being received by a reflection antenna and processed by a reflection radio frequency signal processing module;
generating first original observation information according to the positioning intermediate frequency signal, generating second original observation information according to the occultation intermediate frequency signal, and generating third original observation information according to the reflection intermediate frequency signal;
and determining positioning information according to the first original observation information, and carrying out reflection event prediction in the occultation baseband module and reflection event prediction in the reflection baseband module based on the positioning information.
The embodiment of the invention has the following advantages:
the baseband signal processing circuit in the embodiment of the invention can comprise: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module; the original observation information is obtained through the signals collected and processed by the positioning baseband module, the occultation baseband module and the reflection baseband module, and reflection event prediction can be carried out in the reflection baseband module and occultation event prediction can be carried out in the occultation baseband module. Therefore, the satellite-masking baseband signal processing function and the reflection baseband signal processing function can be simultaneously realized in the baseband signal processing circuit, and by using the baseband signal processing circuit, the situation that two receivers are carried on the same satellite can be avoided, and the resources such as power consumption, weight, volume and the like which need to be provided are reduced.
In addition, in the embodiment of the invention, the reflection baseband module can be set as a detachable module, and the normal operation of the star masking baseband module and the positioning baseband module can not be influenced by directly removing the reflection baseband module, so that a flexible configuration circuit is realized.
Furthermore, in the embodiment of the invention, the circuit design methods of the positioning baseband module, the star masking baseband module and the reflection baseband module are similar, and are realized by adopting AD, ASIC/FPGA, DSP and peripheral circuits thereof, so that the system design complexity is simplified.
Furthermore, in the embodiment of the invention, the first DSP of the positioning baseband module, the second DSP of the occultation baseband module and the third DSP of the reflection baseband module can perform information interaction through the McBSP interface, thereby realizing high-efficiency, rapid and reliable data transmission among the DSPs.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are needed in the description of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
Fig. 1 is a schematic diagram of a baseband signal processing circuit according to an embodiment of the invention;
fig. 2a is a schematic diagram of a baseband signal processing circuit according to another embodiment of the invention;
fig. 2b is a schematic diagram of a part of a baseband signal processing circuit according to an embodiment of the invention;
fig. 2c is a schematic diagram of a part of a baseband signal processing circuit according to an embodiment of the invention;
fig. 2d is a schematic diagram of a part of a baseband signal processing circuit according to an embodiment of the invention;
fig. 2e is a schematic diagram of a part of a baseband signal processing circuit according to an embodiment of the invention;
fig. 2f is a schematic diagram of a baseband signal processing circuit according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a occultation receiver according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating steps of a baseband signal processing method according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, a schematic diagram of a baseband signal processing circuit according to an embodiment of the present invention is shown; the circuit comprises: a positioning baseband module 101, a occultation baseband module 102 and a reflection baseband module 103; wherein:
the positioning baseband module 101 is configured to collect a positioning intermediate frequency signal received by a positioning antenna and obtained after being processed by a positioning radio frequency signal processing module, generate first original observation information, and synchronously send positioning information generated according to the first original observation information to the occultation baseband module and the reflection baseband module;
the reflection baseband module 102 is configured to collect a reflection intermediate frequency signal received by the reflection antenna and obtained after being processed by the reflection radio frequency signal processing module, predict a reflection event according to the received positioning information, and generate third initial observation information;
as an example, locating the intermediate frequency signal may include: GPS (Global Positioning System ) -L1/Beidou B1 positioning intermediate frequency signals, GPS-L2 positioning intermediate frequency signals, beidou B3 positioning intermediate frequency signals, and other positioning intermediate frequency signals may also be included, and embodiments of the present invention are not limited in this respect.
And the occultation baseband module 103 is used for collecting the occultation intermediate frequency signals received by the occultation antenna and obtained after being processed by the occultation radio frequency signal processing module, forecasting the occultation event according to the received positioning information, and generating second original observation information.
The occultation intermediate frequency signal collected by the occultation antenna can comprise at least one of the following: forward atmosphere occultation intermediate frequency signal; the intermediate frequency signal is masked by the backward atmosphere; forward ionization occultation intermediate frequency signal; and (5) backward ionizing the occultation intermediate frequency signal.
For example: the invention is not limited in this regard by the sampling of GPS-L1/Beidou B1 forward atmospheric mask star intermediate frequency signal, GPS-L2 forward atmospheric mask star intermediate frequency signal, beidou B3 forward atmospheric mask star intermediate frequency signal, GPS-L1/Beidou B1 backward atmospheric mask star intermediate frequency signal, GPS-L2 backward atmospheric mask star intermediate frequency signal, beidou B3 backward atmospheric mask star intermediate frequency signal, GPS-L1/Beidou B1 forward ionizing mask star intermediate frequency signal, GPS-L2 forward ionizing mask star intermediate frequency signal, beidou B3 forward ionizing mask star intermediate frequency signal, GPS-L1/Beidou B1 backward ionizing mask star intermediate frequency signal, GPS-L2 backward ionizing mask star intermediate frequency signal, beidou B3 backward ionizing mask star intermediate frequency signal.
In an embodiment of the invention, the reflective baseband module is a detachable module.
In practical application, the reflection baseband module in the baseband signal processing circuit can be flexibly configured, and the normal operation of the star masking baseband module and the positioning baseband module can not be influenced by removing the reflection baseband module.
In one embodiment of the present invention, the circuit further comprises: peripheral circuitry.
The peripheral circuit may be configured to enable the baseband processing circuit to operate stably, for example: may be used to achieve additional protection characteristics, output a particular voltage (power), etc., as embodiments of the invention are not limited in this regard.
In the embodiment of the invention, the baseband signal processing circuit can comprise a positioning baseband module, a occultation baseband module and a reflection baseband module; the original observation information is obtained through the signals collected and processed by the positioning baseband module, the occultation baseband module and the reflection baseband module, and reflection event prediction can be carried out in the reflection baseband module and occultation event prediction can be carried out in the occultation baseband module. Therefore, the satellite-masking baseband signal processing function and the reflection baseband signal processing function can be simultaneously realized in the baseband signal processing circuit, and by using the baseband signal processing circuit, the situation that two receivers are carried on the same satellite can be avoided, and the resources such as power consumption, weight, volume and the like which need to be provided are reduced.
Referring to fig. 2a, a schematic diagram of another baseband signal processing circuit according to an embodiment of the invention is shown; the circuit comprises: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module; the positioning baseband module comprises a first ADS (Analog Digital to Analog) chip, a first ASIC (Aplication Spcecific Integrated Circuit, application specific integrated circuit) and a first DSP (Digital Signal Processing ); the star masking baseband processing module comprises a second ADS chip, a second ASIC and a second DSP; the reflective baseband module includes a third ADS chip, an FPGA (Field Programmable Grid Array, field programmable gate array), and a third DSP.
In an embodiment of the present invention, a first ADS chip is connected to the positioning rf signal processing module, and the first ADS chip is configured to collect a positioning intermediate frequency signal obtained after being processed by the positioning antenna and the positioning rf signal processing module, and convert the collected positioning intermediate frequency signal into a corresponding first data signal; the second ADS chip is connected with the occultation radio frequency signal processing module and is used for collecting occultation intermediate frequency signals obtained after being processed by the occultation antenna and the occultation radio frequency signal processing module and converting the collected occultation intermediate frequency signals into corresponding second data signals; the third ADS chip is connected with the reflection radio frequency signal processing module and is used for collecting reflection intermediate frequency signals obtained after being processed by the reflection antenna and the reflection radio frequency signal processing module and converting the collected reflection intermediate frequency signals into corresponding third data signals;
specifically, after the first ADC chip obtains the positioning intermediate frequency signal, the first ADC chip may perform AD analog-to-digital conversion on the positioning intermediate frequency signal to obtain a first data signal. As an example, the digital quantity data output by the first ADC chip may be 4bit valid data.
As an example, locating the intermediate frequency signal may include: GPS (Global Positioning System ) -L1/Beidou B1 positioning intermediate frequency signals, GPS-L2 positioning intermediate frequency signals, beidou B3 positioning intermediate frequency signals, and other positioning intermediate frequency signals may also be included, and embodiments of the present invention are not limited in this respect.
In practical application, the second ADC chip may be connected to a occultation radio frequency signal processing module in the occultation receiver, so as to collect the occultation intermediate frequency signal obtained after being processed by the occultation antenna and the occultation radio frequency signal processing module. Wherein the signals collected by the occultation antenna may include at least one of: forward atmosphere occultation intermediate frequency signal; the intermediate frequency signal is masked by the backward atmosphere; forward ionization occultation intermediate frequency signal; and (5) backward ionizing the occultation intermediate frequency signal.
For example: the invention is not limited in this regard by the sampling of GPS-L1/Beidou B1 forward atmospheric mask star intermediate frequency signal, GPS-L2 forward atmospheric mask star intermediate frequency signal, beidou B3 forward atmospheric mask star intermediate frequency signal, GPS-L1/Beidou B1 backward atmospheric mask star intermediate frequency signal, GPS-L2 backward atmospheric mask star intermediate frequency signal, beidou B3 backward atmospheric mask star intermediate frequency signal, GPS-L1/Beidou B1 forward ionizing mask star intermediate frequency signal, GPS-L2 forward ionizing mask star intermediate frequency signal, beidou B3 forward ionizing mask star intermediate frequency signal, GPS-L1/Beidou B1 backward ionizing mask star intermediate frequency signal, GPS-L2 backward ionizing mask star intermediate frequency signal, beidou B3 backward ionizing mask star intermediate frequency signal.
After the second ADC chip obtains the occultation intermediate frequency signal, the occultation intermediate frequency signal can be converted into a corresponding second data signal. The conversion process is similar to that of the first ADC chip, and will not be described here.
As an example, the digital data output by the second ADC chip may also be 4bit valid data.
In practical application, the third ADC chip may be connected to a reflected rf signal processing module in the occultation receiver, so as to collect the reflected intermediate frequency signal obtained after being processed by the reflected antenna and the reflected rf signal processing module.
In an embodiment of the present invention, the first ADC chip includes a plurality of first ADC chips, each of the first ADC chips corresponding to a frequency bin of a navigation system; the second ADC chips comprise a plurality of second ADC chips, and each second ADC chip corresponds to a frequency point of a navigation system; the third ADC chip is one and corresponds to a frequency point of a navigation system.
The signals acquired by the first ADC chip, the second ADC chip and the third ADC chip enter the first ASIC, the second ASIC and the FPGA simultaneously under the same clock synchronization, so that the first ASIC, the second ASIC and the FPGA synchronously work under the same clock.
For example: the first ADC chip may include ADC1, ADC2, ADC3; the second ADC chip comprises ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, and the third ADC chip comprises ADC16.
The ADC1 can be used for realizing sampling of GPS-L1/Beidou B1 positioning intermediate frequency signals, the ADC2 can be used for realizing sampling of GPS-L2 positioning intermediate frequency signals, and the ADC3 can be used for realizing sampling of Beidou B3 positioning intermediate frequency signals. The ADC1-ADC3 may send the sampled positioning intermediate frequency signal to the first ASIC at the same clock.
ADC4 can be used for realizing the sampling of GPS-L1/big Dipper B1 forward atmosphere occultation intermediate frequency signal, ADC5 can be used for realizing the sampling of GPS-L2 forward atmosphere occultation intermediate frequency signal, ADC6 can be used for realizing the sampling of big Dipper B3 forward atmosphere occultation intermediate frequency signal, ADC7 can be used for realizing the sampling of GPS-L1/big Dipper B1 backward atmosphere occultation intermediate frequency signal, ADC8 can be used for realizing the sampling of GPS-L2 backward atmosphere occultation intermediate frequency signal, ADC9 can be used for realizing the sampling of big Dipper B3 backward atmosphere occultation intermediate frequency signal, ADC10 can be used for realizing the sampling of GPS-L1/big Dipper B1 forward ionization occultation intermediate frequency signal, ADC11 can be used for realizing the sampling of GPS-L2 forward ionization occultation intermediate frequency signal, ADC12 can be used for realizing the sampling of big Dipper B3 forward ionization intermediate frequency signal, ADC13 can be used for realizing the sampling of GPS-L1/big Dipper B1 backward ionization intermediate frequency signal, ADC14 can be used for realizing the sampling of GPS-L2 backward ionization intermediate frequency signal, and ADC15 can be used for realizing the non-limiting star signal. The ADC4-ADC15 may send the sampled mask intermediate frequency signal to the second ASIC at the same clock.
ADC16 may be used to enable the collection of reflected intermediate frequency signals and send the reflected intermediate frequency signals to the FPGA.
The first ASIC of the positioning baseband module, the second ASIC of the occultation baseband module, and the FPGA of the reflection baseband unit may operate synchronously under the same clock CLK.
In an embodiment of the present invention, the first ASIC is configured to generate first original observation information according to the first data signal; the second ASIC is used for generating second original observation information according to the second data signal; the FPGA is used for generating third original observation information according to the third data signal;
in practical applications, the ASIC may be used for signal processing such as acquisition, tracking, measurement of GNSS baseband positioning signals.
In the positioning baseband module, the first ADC chip may provide the first data signal to a first ASIC of the positioning baseband module, and perform signal processing such as capturing, tracking, and measuring of the first data signal through the first ASIC to obtain first original observed information, for example: carrier phase, code pseudoranges, signal strength, etc., as embodiments of the invention are not limited in this regard.
In the occultation baseband module, the second ADC chip may provide the second data signal to a second ASIC of the occultation baseband module, and perform signal processing such as capturing, tracking, measuring, etc. of the second data signal through the second ASIC to obtain second original observation information, for example: carrier phase, code pseudoranges, signal strength, etc., as embodiments of the invention are not limited in this regard.
In the reflection baseband module, the third ADC chip may provide the third data signal to the FPGA of the reflection baseband module, and the FPGA generates third initial observation information, for example, a reflection channel measurement value, specifically may include a two-dimensional delay-doppler plot (DDM plot) according to the received third data signal.
In an embodiment of the present invention, the FPGA is configured to correlate the third data signal with the locally generated reflected signal pseudo code and the carrier, and generate the two-dimensional delay-doppler plot in real time.
In an embodiment of the present invention, the first ASIC is configured to send 2 synchronization signals to the second ASIC and the FPGA as the slave, as the master.
In practical application, the first ASIC of the positioning baseband module is used as a master end, the second ASIC of the occultation baseband module and the reflecting baseband module FPGA are used as slave ends, and the master end simultaneously transmits 2 synchronous signals to the slave ends, so that synchronous parallel processing among the positioning ASIC, the occultation ASIC and the reflecting FPGA can be realized.
In an embodiment of the present invention, the first DSP is configured to determine positioning information according to the first original observation information, and send the positioning information to the second DSP and the third DSP;
after the first ASIC generates the first original observation information, the first ASIC may further send the first original observation information to the first DSP, so that the first DSP determines positioning information, where the positioning information may include first position information of a satellite corresponding to a signal collected by the positioning antenna and second position information of the occultation receiver, and the first DSP may further send the positioning information to the second DSP of the occultation baseband module and the third DSP of the reflection baseband module synchronously.
In an example, the first DSP of the positioning baseband module may perform data interaction with the first ASIC through a first EMIF (External Memory Interrface, external memory interface) interface, to implement channel control, obtain first original observation information, and complete the solution of the location rate time.
FIG. 2b is a schematic diagram illustrating the interface principle between the first DSP and the first ASIC, wherein the first DSP and the first ASIC are connected through a first link, a second link and a third link; wherein the first link is for transmitting at least one of: chip select signal, write signal, read signal; the second link is address lines EA [21:2], and the third link is data lines ED [31:0].
As shown in fig. 2b, the first DSP includes a first external interrupt pin for receiving an interrupt signal sent from the first ASIC. The interrupt signal may be INT (Integer type).
In an embodiment of the present invention, the second DSP is configured to perform a occultation event forecast according to the positioning information.
After the second ASIC generates the second original observation information, the second original observation information is sent to the second DSP, and in the second DSP, satellite occulting event forecasting can be completed according to the positioning information provided by the first DSP of the positioning baseband module, wherein the satellite occulting event forecasting can forecast satellites with satellite occulting events by pointers, and specifically, the satellites with the satellite occulting events can be output.
In an example, the second DSP of the occultation baseband module may further perform data interaction with the second ASIC through the second EMIF interface to implement channel control, and obtain second original observed information such as carrier phase, code pseudo-range, and signal strength.
As shown in fig. 2c, which is a schematic diagram of the interface principle between the second DSP and the second ASIC, the second DSP and the second ASIC are connected through a fourth link, a fifth link and a sixth link; wherein the fourth link is for transmitting at least one of: chip select signal, write signal, read signal; the fifth link is address lines EA [21:2], and the sixth link is data lines ED [31:0].
As shown in fig. 2c, the second DSP includes a second external interrupt pin for receiving an interrupt signal from the second ASIC. The interrupt signal may be INT (Integer type).
In an embodiment of the invention, the third DSP is configured to predict the reflection event according to the positioning information.
After generating the third initial observation information, the FPGA sends the third initial observation information to a third DSP, and reflection event prediction can be completed in the third DSP according to positioning information provided by the first DSP of the positioning baseband module, wherein the reflection event prediction can be used for predicting satellites with reflection events by pointers, and particularly, the satellites with reflection events can be output. And can calculate the code phase and carrier frequency of the reflected signal.
In an example, the third DSP of the reflection baseband module may perform data interaction with the FPGA through the third EMIF interface to implement channel control, and obtain a measurement value of the reflection channel (i.e., third initial observation information).
Fig. 2d is a schematic diagram of an interface principle of a third DSP and an FPGA, where the third DSP and the FPGA are connected through a seventh link, an eighth link, and a ninth link; wherein the seventh link is for transmitting at least one of: chip select signal, write signal, read signal; the eighth link is address lines EA [21:2], and the ninth link is data lines ED [31:0].
As shown in fig. 2d, the third DSP includes a third external interrupt pin, where the third external interrupt pin is configured to receive an interrupt signal sent by the FPGA. The interrupt signal may be INT (Integer type).
In one embodiment of the invention, the first DSP, the second DSP and the third DSP interact with each other through an McBSP (Multichannel Buffered Serial Port, multi-channel buffered serial port) interface.
As shown in fig. 2e, the first DSP (i.e., positioning DSP) has two McBSP interfaces, each McBSP0, each having separate transmit and receive channels.
The positioning DSP sends the positioning information to the occultation DSP (namely the second DSP) and the reflection DSP (namely the third DSP) through the McBSP0 sending channel, and the occultation DSP and the reflection DSP can receive the positioning information through the McBSP0 receiving channel.
The positioning baseband module DSP, the occultation baseband module DSP and the reflection baseband module DSP exchange information through the McBSP interface, so that high-efficiency, rapid and reliable data transmission between the DSPs can be realized.
As shown in fig. 2f, a schematic diagram of a baseband signal processing circuit according to an embodiment of the present invention is shown:
the baseband signal processing circuit may include a positioning baseband module, a occultation baseband module, and a reflection baseband unit; the positioning baseband module can comprise ADC chips (which can comprise ADC 1-ADC 3, three ADC chips), a positioning baseband ASIC (i.e. the first ASIC of the previous), and a positioning DSP (i.e. the first DSP of the previous); the occultation baseband module can comprise ADC chips (which can comprise ADC 4-ADC 15 and twelve ADC chips), occultation baseband ASIC (namely the second ASIC), occultation DSP (namely the second DSP); the reflection baseband module may include an ADC16 (i.e., a third ADC), a reflection baseband FPGA (i.e., FDGA, supra), and a reflection DSP (i.e., third DSP, supra).
The ADC 1-ADC 3 are used for receiving positioning intermediate frequency signals, the ADC 4-ADC 15 are used for receiving occultation intermediate frequency signals, and the ADC16 are used for receiving reflection intermediate frequency signals; the ADC 1-ADC 16 send signals to the positioning base band ASIC, the occultation base band ASIC and the reflection base band FPGA under the same clock, and the positioning base band ASIC, the occultation base band ASIC and the reflection base band FPGA also process data under the same clock.
The positioning base band ASIC, the occultation base band ASIC and the reflection base band FPGA can be synchronized through synchronizing signals, so that the synchronous data processing of the positioning base band ASIC, the occultation base band ASIC and the reflection base band FPGA is ensured. The synchronization signals may include a synchronization signal 1 and a synchronization signal 2.
The synchronous signal 1 and the synchronous signal 2 are input signals to the reflecting baseband FPGA, and the clock signal and the reflecting intermediate frequency signal provided to the reflecting baseband module are also input signals to the reflecting baseband module.
The positioning baseband ASIC can send an interrupt signal INT to the positioning DSP to perform interrupt control on the positioning DSP; the occultation baseband ASIC can also send an interrupt signal INT to the occultation DSP to perform interrupt control on the occultation DSP; the reflective baseband FPGA may also send an interrupt signal INT to the reflective DSP to perform interrupt control INT for the reflective DSP.
For data interaction, the positioning baseband ASIC and the positioning DSP can perform data interaction through EMIF, the occultation baseband ASIC and the occultation DSP can perform data interaction through EMIF, the reflection baseband FPGA and the occultation DSP can perform data interaction through EMIF, and the positioning DSP, the occultation DSP and the reflection DSP can perform data interaction through McBSP.
In an example, the first ASIC may utilize the positioning intermediate frequency digital signal obtained by conversion of the first ADC chip to complete capturing of the 1-channel GPS L1C/a code and the 1-channel beidou B1 code under control of the first DSP, and complete signal processing tasks such as tracking and measurement of the 12-channel GPS L1C/a code, the 12-channel L2C code, the 12-channel L2P, the 8-channel beidou B1 code and the 8-channel beidou B3 code.
The AD 4-AD 15 carries out AD analog-to-digital conversion on the occultation intermediate frequency signals to obtain digital data and then provides the digital data to the second ASIC, the second ASIC can complete capturing of 1 channel GPS L1C/A codes and 1 channel Beidou B1 codes under the control of the second DSP and complete signal processing tasks such as tracking and measuring of 14 channel GPS L1C/A codes, 14 channel L2C codes, 14 channel L2P, 8 channel Beidou B1 codes and 8 channel Beidou B3 codes.
In an embodiment of the present invention, a baseband signal processing circuit includes: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module; the positioning baseband module comprises a first ADS (Analog Digital to Analog) chip, a first ASIC (application specific integrated circuit) and a first DSP; the star masking baseband processing module comprises a second ADS chip, a second ASIC and a second DSP; the reflection baseband module comprises a third ADS chip, an FPGA and a third DSP, so that a satellite-masking baseband signal processing function and a reflection baseband signal processing function can be simultaneously realized in a baseband signal processing circuit, and by using the baseband signal processing circuit, two receivers can be prevented from being carried on the same satellite, and the power consumption, weight, volume and other resources which need to be provided are reduced; in addition, the baseband signal processing circuit adopts a modularized design, the positioning baseband module, the star masking baseband module and the reflection baseband module are similar in circuit design method, and the AD, ASIC/FPGA and DSP circuits are adopted to realize the positioning baseband module, the star masking baseband module and the reflection baseband module, so that the system design complexity is simplified.
Referring to fig. 3, a schematic diagram of a receiver according to an embodiment of the present invention is shown; the occultation receiver may include: positioning antennas, occultation antennas, and reflection antennas, as well as any of the baseband signal processing circuits described above.
The receiver provided by the embodiment of the invention, wherein the baseband signal processing circuit may include: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module; the original observation information is obtained through the signals collected and processed by the positioning baseband module, the occultation baseband module and the reflection baseband module, and reflection event prediction can be carried out in the reflection baseband module and occultation event prediction can be carried out in the occultation baseband module. Therefore, the satellite-masking baseband signal processing function and the reflection baseband signal processing function can be simultaneously realized in the baseband signal processing circuit, and by using the baseband signal processing circuit, the situation that two receivers are carried on the same satellite can be avoided, and the resources such as power consumption, weight, volume and the like which need to be provided are reduced.
Referring to fig. 4, a flowchart illustrating steps of a baseband signal processing method according to an embodiment of the present invention may be applied to any of the baseband signal processing circuits described above, or to the receiver described above.
Specifically, the method comprises the following steps:
step 401, acquiring a positioning intermediate frequency signal acquired based on a positioning antenna, a reflection intermediate frequency signal acquired based on a reflection antenna and a occultation intermediate frequency signal acquired based on a occultation antenna;
step 402, generating first original observation information according to the positioning intermediate frequency signal, generating second original observation information according to the occultation intermediate frequency signal, and generating third original observation information according to the reflection intermediate frequency signal;
step 403, determining positioning information according to the first original observation information, and performing reflection event prediction in the occultation baseband module and reflection event prediction in the reflection baseband module based on the positioning information;
in the embodiment of the invention, the positioning intermediate frequency signal acquired based on the positioning antenna, the reflection intermediate frequency signal acquired based on the reflection antenna and the occultation intermediate frequency signal acquired based on the occultation antenna can be acquired; generating first original observation information according to the positioning intermediate frequency signal, generating second original observation information according to the occultation intermediate frequency signal, and generating third original observation information according to the reflection intermediate frequency signal; and positioning information can be determined according to the first original observation information, reflection event prediction is performed in the occultation baseband module and reflection event prediction is performed in the reflection baseband module based on the positioning information. Therefore, the satellite-masking baseband signal processing function and the reflection baseband signal processing function can be simultaneously realized in the baseband signal processing circuit, and by using the baseband signal processing circuit, the situation that two receivers are carried on the same satellite can be avoided, and the resources such as power consumption, weight, volume and the like which need to be provided are reduced.
It should be noted that, for simplicity of description, the method embodiments are depicted as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The baseband signal processing circuit, the receiver and the baseband signal processing method provided above have been described in detail, and specific examples are applied herein to illustrate the principles and embodiments of the present invention, and the above examples are only used to help understand the method and core idea of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (18)

1. A baseband signal processing circuit, the circuit comprising: the device comprises a positioning baseband module, a star masking baseband module and a reflecting baseband module;
the positioning baseband module is used for collecting the positioning intermediate frequency signals received by the positioning antenna and processed by the positioning radio frequency signal processing module, generating first original observation information, and synchronously transmitting the positioning information generated according to the first original observation information to the occultation baseband module and the reflection baseband module;
the occultation baseband module is used for collecting occultation intermediate frequency signals which are received by the occultation antenna and are processed by the occultation radio frequency signal processing module, forecasting occultation events according to the received positioning information and generating second original observation information;
The reflection baseband module is used for collecting the reflection intermediate frequency signals received by the reflection antenna and obtained after being processed by the reflection radio frequency signal processing module, forecasting the reflection event according to the received positioning information and generating third original observation information.
2. The circuit of claim 1, wherein the positioning baseband module comprises a first ADS chip, a first ASIC, and a first DSP; the star masking baseband processing module comprises a second ADS chip, a second ASIC and a second DSP; the reflection baseband module comprises a third ADS chip, an FPGA and a third DSP;
the first ADS chip is connected with the positioning radio frequency signal processing module and is used for acquiring positioning intermediate frequency signals obtained after being processed by the positioning antenna and the positioning radio frequency signal processing module and converting the acquired positioning intermediate frequency signals into corresponding first data signals; the second ADS chip is connected with the occultation radio frequency signal processing module and is used for acquiring occultation intermediate frequency signals obtained after being processed by the occultation antenna and the occultation radio frequency signal processing module and converting the acquired occultation intermediate frequency signals into corresponding second data signals; the third ADS chip is connected with the reflection radio frequency signal processing module and is used for collecting reflection intermediate frequency signals obtained after being processed by the reflection antenna and the reflection radio frequency signal processing module and converting the collected reflection intermediate frequency signals into corresponding third data signals;
The first ASIC is used for generating first original observation information according to the first data signal; the second ASIC is used for generating second original observation information according to the second data signal; the FPGA is used for generating third original observation information according to the third data signal;
the first DSP is used for determining the positioning information according to the first original observation information and sending the positioning information to the second DSP and the third DSP; the second DSP is used for forecasting the occultation event according to the positioning information and outputting the first original observation information and the second original observation information; and the third DSP is used for carrying out reflection event prediction according to the positioning information and outputting third original observation information.
3. The circuit of claim 1, wherein the reflective baseband module is a removable module.
4. The circuit of claim 2, wherein the circuit further comprises a logic circuit,
the FPGA is used for correlating the third data signal with a locally generated reflected signal pseudo code with a carrier wave and generating a two-dimensional delay Doppler graph in real time.
5. The circuit of claim 2, wherein the circuit further comprises a logic circuit,
The first ASIC is used as a master terminal and is used for sending 2 synchronous signals to the second ASIC and the FPGA as slave terminals.
6. The circuit of claim 2, wherein the first DSP, the second DSP, and the third DSP interact with information via an McBSP interface.
7. The circuit of claim 2, wherein the circuit further comprises a logic circuit,
the first DSP performs data interaction with the first ASIC through a first EMIF;
the second DSP performs data interaction with the second ASIC through a second EMIF;
and the third DSP performs data interaction with the FPGA through a third EMIF.
8. The circuit of claim 7, wherein the first DSP is connected to the first ASIC by a first link, a second link, and a third link; wherein the first link is configured to transmit the following signals: chip select signal, write signal, read signal; the second link is address lines EA [21:2] and the third link is data lines ED [31:0].
9. The circuit of claim 8, wherein the first DSP includes a first external interrupt pin for receiving an interrupt signal from the first ASIC.
10. The circuit of claim 7, wherein the second DSP is connected to the second ASIC through a fourth link, a fifth link, and a sixth link; wherein the fourth link is configured to transmit the following signals: chip select signal, write signal, read signal; the fifth link is address lines EA [21:2] and the sixth link is data lines ED [31:0].
11. The circuit of claim 10, wherein the second DSP includes a second external interrupt pin for receiving an interrupt signal from the second ASIC.
12. The circuit of claim 7, wherein the third DSP is connected to the FPGA through a seventh link, an eighth link, and a ninth link; wherein the seventh link is configured to transmit the following signals: chip select signal, write signal, read signal; the eighth link is address lines EA [21:2] and the ninth link is data lines ED [31:0].
13. The circuit of claim 12, wherein the third DSP includes a third external interrupt pin for receiving an interrupt signal from the FPGA.
14. The circuit of claim 2, wherein the circuit further comprises a logic circuit,
The first ADC chips comprise a plurality of first ADC chips, and each first ADC chip corresponds to a frequency point of a navigation system;
the second ADC chips comprise a plurality of second ADC chips, and each second ADC chip corresponds to a frequency point of a navigation system;
the third ADC chip is one and corresponds to a frequency point of a navigation system.
15. The circuit of claim 16, wherein signals acquired by the first ADC chip, the second ADC chip, and the third ADC chip enter the first ASIC, the second ASIC, and the FPGA simultaneously under the same clock synchronization to enable the first ASIC, the second ASIC, and the FPGA to operate synchronously under the same clock.
16. The circuit of any one of claims 1-15, wherein the circuit further comprises: peripheral circuitry.
17. A receiver, comprising: positioning antenna, occultation antenna and reflection antenna comprising the baseband signal processing circuit according to any of claims 1-16.
18. A baseband signal processing method, applied to a circuit according to any one of claims 1-18, or a receiver according to claim 19; the method comprises the following steps:
Acquiring a positioning intermediate frequency signal acquired based on a positioning antenna, a reflection intermediate frequency signal acquired based on a reflection antenna and a occultation intermediate frequency signal acquired based on a occultation antenna;
generating first original observation information according to the positioning intermediate frequency signal, generating second original observation information according to the occultation intermediate frequency signal, and generating third original observation information according to the reflection intermediate frequency signal;
and determining positioning information according to the first original observation information, and carrying out star masking event prediction in the star masking baseband module and reflection event prediction in the reflection baseband module based on the positioning information.
CN202311077615.XA 2023-08-24 2023-08-24 Baseband signal processing circuit, receiver and baseband signal processing method Pending CN117269997A (en)

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