CN117251220A - Display initialization control method and related device - Google Patents

Display initialization control method and related device Download PDF

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Publication number
CN117251220A
CN117251220A CN202311450508.7A CN202311450508A CN117251220A CN 117251220 A CN117251220 A CN 117251220A CN 202311450508 A CN202311450508 A CN 202311450508A CN 117251220 A CN117251220 A CN 117251220A
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Prior art keywords
display
program
initialization
initializing
driving chip
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CN117251220B (en
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邱勇滨
邱德胜
马凯邦
黄树杏
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Shenzhen Weili Technology Co ltd
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Shenzhen Weili Technology Co ltd
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Priority claimed from CN202311450508.7A external-priority patent/CN117251220B/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4405—Initialisation of multiprocessor systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1407—General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Human Computer Interaction (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the invention discloses a display initialization control method and a related device, wherein the method comprises the following steps: initializing the display driving chip through a first initializing program; during the initialization process, if the first initialization program is detected to be not matched with the display driving chip, using the FPGA module to monitor a designated instruction in the MIPI specification sent by the electronic equipment; when the appointed instruction is monitored, the FPGA module is utilized to carry out filtering operation on the first initializing program, and a second initializing program is sent to the display driving chip, wherein the second initializing program is a correct initializing program; and initializing the display driving chip through a second initializing program so as to enable the display driving chip to work normally. By adopting the embodiment of the invention, the normal display of the display screen can be realized when the display driving chip is not the original display driving chip.

Description

Display initialization control method and related device
Technical Field
The invention relates to the technical field of electronics, in particular to a display initialization control method and a related device.
Background
Along with the development of technology, electronic devices (such as mobile phones and tablet personal computers) become necessary electronic products for users, and display functions are important for the electronic devices, but display driving chips are relatively short, so that a solution idea can be provided, namely, display driving chips of different manufacturers are used on the same mobile phone to relieve the shortage of supply of the display driving chips, but in the display process, especially in the initialization process, the mobile phone is used for initializing and fixing the display driving chips, only the chips of specific manufacturers can be used, and the chips of other manufacturers cannot work normally, so that the problem of realizing normal display of the display screen is solved when the display driving chips are not original display driving chips.
Disclosure of Invention
The embodiment of the invention provides a display initialization control method and a related device, which can realize normal display of a display screen when a display driving chip is not an original display driving chip.
In a first aspect, an embodiment of the present invention provides a display initialization control method, applied to an electronic device, where the electronic device includes a display driving chip, a display screen, and an FPGA module, the display driving chip is connected to the display screen through a first MIPI interface, and the FPGA module is connected to the display driving chip through a second MIPI interface, the method includes:
initializing the display driving chip through a first initializing program;
in the initialization process, if the first initialization program is detected to be not matched with the display driving chip, monitoring a designated instruction in an MIPI specification sent by the electronic equipment by using the FPGA module;
when the appointed instruction is monitored, the FPGA module is utilized to carry out filtering operation on the first initializing program, and a second initializing program is sent to the display driving chip, wherein the second initializing program is a correct initializing program;
and initializing the display driving chip through the second initializing program so as to enable the display driving chip to work normally.
In a second aspect, an embodiment of the present invention provides a display initialization control device, which is applied to an electronic device, where the electronic device includes a display driving chip, a display screen, and an FPGA module, the display driving chip is connected to the display screen through a first MIPI interface, and the FPGA module is connected to the display driving chip through a second MIPI interface, and the device includes: an initialization processing unit, a monitoring unit and a loading unit, wherein,
the initialization processing unit is used for initializing the display driving chip through a first initialization program;
the monitoring unit is used for monitoring a specified instruction in an MIPI specification sent by the electronic equipment by using the FPGA module if the first initialization program is detected to be not matched with the display driving chip in the initialization processing process;
the loading unit is used for filtering the first initialization program by utilizing the FPGA module when the specified instruction is monitored, and sending a second initialization program to the display driving chip, wherein the second initialization program is a correct initialization program;
the initialization processing unit is further configured to perform initialization processing on the display driver chip through the second initialization program, so that the display driver chip works normally.
In a third aspect, an embodiment of the present invention provides an electronic device, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, the programs including instructions for performing the steps in the first aspect of the embodiment of the present invention.
In a fourth aspect, embodiments of the present invention provide a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform part or all of the steps described in the first aspect of the embodiments of the present invention.
In a fifth aspect, embodiments of the present invention provide a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described in the first aspect of the embodiments of the present invention. The computer program product may be a software installation package.
The embodiment of the invention has the following beneficial effects:
it can be seen that, the display initialization control method and related device described in the embodiments of the present invention are applied to an electronic device, where the electronic device includes a display driver chip, a display screen, and an FPGA module, the display driver chip is connected to the display screen through a first MIPI interface, the FPGA module is connected to the display driver chip through a second MIPI interface, and performs initialization processing on the display driver chip through the first initialization program, and if the first initialization program is detected to be not matched with the display driver chip in the initialization processing process, the FPGA module is used to monitor a specified instruction in MIPI specifications sent by the electronic device, and when the specified instruction is monitored, the FPGA module is used to perform a filtering operation on the first initialization program, and send a second initialization program to the display driver chip, where the second initialization program is a correct initialization program, and performs initialization processing on the display driver chip through the second initialization program, so that the display driver chip works normally, and uses the FPGA module to perform initialization for bridging and filtering the electronic device, and sends initialization to the display driver chip, so that the display driver chip can realize normal display when the display driver chip is not the original display driver chip.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a display initialization control method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 3 is a functional unit composition block diagram of a display initialization control device according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the invention. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The electronic device described in the embodiments of the present invention may include a smart Phone (such as an Android mobile Phone, an iOS mobile Phone, a Windows Phone mobile Phone, etc.), a tablet computer, a palm computer, a vehicle event recorder, a traffic guidance platform, a server, a notebook computer, a mobile internet device (MID, mobile Internet Devices), or a wearable device (such as a smart watch, a bluetooth headset), etc., which are merely examples, but not limited to, the above electronic device may also be a server, and the electronic device is not limited thereto.
FPGA (Field Programmable Gate Array), an array of element programmable logic gates, is provided in embodiments of the invention. MIPI (Mobile Industry Processor Interface), i.e. mobile industry processor interface.
Embodiments of the present invention are described in detail below.
Referring to fig. 1, fig. 1 is a flow chart of a display initialization control method provided by an embodiment of the present invention, which is applied to an electronic device, wherein the electronic device includes a display driving chip, a display screen, and an FPGA module, the display driving chip is connected to the display screen through a first MIPI interface, and the FPGA module is connected to the display driving chip through a second MIPI interface, and as shown in the drawing, the display initialization control method includes:
101. and initializing the display driving chip through a first initializing program.
In the embodiment of the invention, the first initialization program can be used for realizing the initialization function, and the first initialization program is the initialization program of the original display driver chip.
In the embodiment of the invention, the electronic equipment can comprise a display driving chip, a display screen and an FPGA module, wherein the display driving chip is connected with the display screen through a first MIPI interface, and the FPGA module is connected with the display driving chip through a second MIPI interface.
In a specific implementation, the initialization process may be performed on the display driver chip by using a first initialization program, so as to implement an initialization function.
Optionally, in step 101, the initializing the display driver chip by using a first initializing procedure may include the following steps:
11. acquiring a target hardware environment parameter;
12. determining a first driving parameter corresponding to the target hardware environment parameter;
13. acquiring content to be displayed;
14. determining target adjustment parameters corresponding to the content to be displayed;
15. adjusting the first driving parameter according to the target adjusting parameter to obtain a second driving parameter;
16. and controlling the first initialization program to initialize the display driving chip according to the second driving parameters.
In the embodiment of the present invention, the target hardware environment parameter may include at least one of the following: the system run, CPU hardware parameters, GPU hardware parameters, display driver chip hardware parameters, etc., are not limited herein. The driving parameters may include at least one of: the number of processes, the number of threads, the drive capability value, the drive rate, etc., are not limited herein.
In a specific implementation, a mapping relation between preset environment parameters and driving parameters can be stored in advance, further, target hardware environment parameters can be obtained, then, a first driving parameter corresponding to the target hardware environment parameters can be determined based on the mapping relation, further, to-be-displayed content can be obtained, different to-be-displayed content can correspond to different adjusting parameters, further, the target adjusting parameters corresponding to the to-be-displayed content can be determined, the value range of the adjusting parameters can be-0.45, the first driving parameters are adjusted according to the target adjusting parameters, a second driving parameter, namely, second driving parameter= (1+target adjusting parameter), is obtained, the first driving parameter is finally, the first initializing program is controlled to initialize the display driving chip according to the second driving parameter, so that the driving parameters can be accurately determined based on the difference of the hardware environment and the display content, and functions can be saved and the initializing effect can be ensured under the condition that normal driving is ensured.
Optionally, the determining, in step 14, the target adjustment parameter corresponding to the content to be displayed may include the following steps:
141. extracting keywords from the content to be displayed to obtain target keywords;
142. and determining the target adjustment parameters corresponding to the target keywords.
In the embodiment of the invention, the keyword extraction can be performed on the content to be displayed to obtain the target keyword, specifically, the keyword extraction can be performed on the attribute information of the content to be displayed to obtain the target keyword, or the keyword extraction can be performed on the image content of the content to be displayed to obtain the target keyword. The attribute information may include at least one of: display resolution, data format, data source, data size, etc., are not limited herein.
Furthermore, a mapping relation between preset keywords and adjustment parameters can be stored in advance, and further, the target adjustment parameters corresponding to the target keywords are determined based on the mapping relation, so that the adjustment parameters corresponding to the content to be displayed can be obtained, the driving parameters are consistent with the depth of the subsequent display content, and the initialization efficiency is improved.
102. In the initialization process, if the first initialization program is detected to be not matched with the display driving chip, the FPGA module is used for monitoring a specified instruction in the MIPI specification sent by the electronic equipment.
In the embodiment of the invention, in the initialization process, if the first initialization program is detected to be not matched with the display driving chip, the display driving chip is not the original display driving chip, and the FPGA module can be used for monitoring the designated instruction in the MIPI specification sent by the electronic equipment.
In the embodiment of the invention, the designated instruction can be preset or default.
Optionally, the specified instruction includes a 0x11 instruction.
In a specific implementation, taking a mobile phone as an example, if the initialization is not matched with the used display driving chip, abnormal display of the liquid crystal display screen can be caused. Firstly, the FPGA is used for monitoring a 0x11 (sleep out) instruction in an MIPI protocol specification sent by the mobile phone, and at the moment, the mobile phone is informed of starting to initialize the display driving chip, but the initialization is not required.
103. And when the appointed instruction is monitored, the FPGA module is utilized to carry out filtering operation on the first initializing program, and a second initializing program is sent to the display driving chip, wherein the second initializing program is the correct initializing program.
In the embodiment of the invention, when the appointed instruction is monitored, the FPGA module can be utilized to carry out filtering operation on the first initialization program and send the second initialization program to the display driving chip, and the second initialization program is the correct initialization program, namely, the second initialization program matched with the display driving chip can be loaded.
104. And initializing the display driving chip through the second initializing program so as to enable the display driving chip to work normally.
In the embodiment of the invention, the display driving chip can be initialized through the second initialization program so as to enable the display driving chip to work normally, namely, the display driving chip is initialized through the second initialization program matched with the display driving chip, so that the display driving chip can work normally.
In the embodiment of the invention, an FPGA module is adopted to perform initialization of bridging and filtering mobile phone transmission, and the initialization is transmitted to a display driving chip used by the FPGA module so as to enable the display driving chip to display normally.
Optionally, the second MIPI interface includes MIPI RX and MIPI TX, and may further include the following steps:
storing frame synchronization, line synchronization and at least one line of valid image data reception in a FIFIO by the MIPI RX of the FPGA module, transmitting the frame synchronization, the line synchronization and the at least one line of valid image data to the display driver chip using the MIPI TX according to a frame synchronization flag, a line synchronization flag, and filling a blanking period.
In the embodiment of the invention, MIPI RX of the FPGA module can receive and store frame synchronization, line synchronization and at least one line of effective image data in FIFIO, and according to the frame synchronization mark and the line synchronization mark, MIPI TX is used for sending the frame synchronization, the line synchronization and the at least one line of effective image data to the display driving chip, and filling the blanking period.
In the embodiment of the invention, the FPGA is used for bridging, besides filtering codes, image data is also required to be transmitted to the display driving chip to achieve the purpose of normal display.
That is, the MIPI interface transmits an image mode that is a video mode (image is always transmitted without stopping), and since the FIOF capacity of the FPGA module is limited, only one line of image data can be stored in FIFO, and then immediately read out and transmitted to the display driver chip through MIPI TX, and since each line of image is transmitted to the MIPI interface with a specific format, the format is line synchronization (Hsync) +blanking period (HBP) +valid data) +blanking period (HFP), and the valid data format needs to be reconstituted by the FPGA module and then transmitted to the display driver chip.
Optionally, the step 104 of initializing the display driver chip by the second initializing procedure may include the following steps:
41. determining a first execution duration corresponding to the first initialization program;
42. determining a second execution duration corresponding to the second initialization program;
43. determining a target ratio between the first execution duration and the second execution duration;
44. optimizing the second driving parameter according to the target ratio to obtain a third driving parameter;
45. and controlling the second initialization program to initialize the display driving chip according to the third driving parameter.
In the embodiment of the invention, the first execution duration corresponding to the first initialization program can be determined in the same software environment, the second execution duration corresponding to the second initialization program can be determined, further, the target ratio between the first execution duration and the second execution duration can be determined, the value range of the optimization parameter can be-0.2, the mapping relation between the preset ratio and the optimization parameter can be stored in advance, the target optimization parameter corresponding to the target ratio is determined based on the mapping relation, the second driving parameter is optimized according to the target ratio, the third driving parameter is obtained, specifically, the third driving parameter= (1+ target optimization parameter) the second driving parameter is controlled according to the third driving parameter, and finally, the second initialization program is controlled to initialize the display driving chip.
It can be seen that, the display initialization control method described in the embodiment of the invention is applied to an electronic device, the electronic device includes a display driving chip, a display screen and an FPGA module, the display driving chip is connected with the display screen through a first MIPI interface, the FPGA module is connected with the display driving chip through a second MIPI interface, the display driving chip is initialized through the first initializing program, if the first initializing program is detected to be not matched with the display driving chip in the initializing process, the FPGA module is used for monitoring a designated instruction in MIPI specifications sent by the electronic device, when the designated instruction is monitored, the FPGA module is used for performing a filtering operation on the first initializing program, and sending a second initializing program to the display driving chip, the second initializing program is a correct initializing program, and the second initializing program is used for initializing the display driving chip so that the display driving chip works normally, and the FPGA module is used for bridging the initializing the display driving chip used for the display driving chip, so that the display driving chip can display normally when the display driving chip is not the original display driving chip.
In accordance with the foregoing embodiments, referring to fig. 2, fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, as shown in the drawing, where the electronic device includes a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and in the embodiment of the present invention, the electronic device includes a display driver chip, a display screen, and an FPGA module, where the display driver chip is connected to the display screen through a first MIPI interface, and the FPGA module is connected to the display driver chip through a second MIPI interface, and the programs include instructions for executing the following steps:
initializing the display driving chip through a first initializing program;
in the initialization process, if the first initialization program is detected to be not matched with the display driving chip, monitoring a designated instruction in an MIPI specification sent by the electronic equipment by using the FPGA module;
when the appointed instruction is monitored, the FPGA module is utilized to carry out filtering operation on the first initializing program, and a second initializing program is sent to the display driving chip, wherein the second initializing program is a correct initializing program;
and initializing the display driving chip through the second initializing program so as to enable the display driving chip to work normally.
Optionally, the specified instruction includes a 0x11 instruction.
Optionally, the second MIPI interface includes MIPI RX and MIPI TX, and the above procedure further includes instructions for performing the steps of:
storing frame synchronization, line synchronization and at least one line of valid image data reception in a FIFIO by the MIPI RX of the FPGA module, transmitting the frame synchronization, the line synchronization and the at least one line of valid image data to the display driver chip using the MIPI TX according to a frame synchronization flag, a line synchronization flag, and filling a blanking period.
Optionally, in the initializing the display driver chip by the first initializing program, the program includes instructions for executing the following steps:
acquiring a target hardware environment parameter;
determining a first driving parameter corresponding to the target hardware environment parameter;
acquiring content to be displayed;
determining target adjustment parameters corresponding to the content to be displayed;
adjusting the first driving parameter according to the target adjusting parameter to obtain a second driving parameter;
and controlling the first initialization program to initialize the display driving chip according to the second driving parameters.
Optionally, in the determining the target adjustment parameter corresponding to the content to be displayed, the program includes instructions for:
extracting keywords from the content to be displayed to obtain target keywords;
and determining the target adjustment parameters corresponding to the target keywords.
It can be seen that, in the electronic device described in the embodiment of the present invention, the electronic device includes a display driver chip, a display screen, and an FPGA module, where the display driver chip is connected to the display screen through a first MIPI interface, the FPGA module is connected to the display driver chip through a second MIPI interface, and performs an initialization process on the display driver chip through a first initialization program, and if the first initialization program is detected to be not matched with the display driver chip in the initialization process, the FPGA module is used to monitor a specified instruction in the MIPI specification sent by the electronic device, and when the specified instruction is monitored, the FPGA module is used to perform a filtering operation on the first initialization program, and send a second initialization program to the display driver chip, where the second initialization program is a correct initialization program, and performs an initialization process on the display driver chip through the second initialization program, so that the display driver chip works normally, and uses the FPGA module to bridge-filter the initialization sent by the electronic device, and send the initialization to the display driver chip for normal display.
Fig. 3 is a block diagram showing the functional units of a display initialization control apparatus 300 according to an embodiment of the present invention. The display initialization control device 300 is applied to an electronic device, the electronic device comprises a display driving chip, a display screen and an FPGA module, the display driving chip is connected with the display screen through a first MIPI interface, the FPGA module is connected with the display driving chip through a second MIPI interface, and the device 300 comprises: an initialization processing unit 301, a listening unit 302 and a loading unit 303, wherein,
the initialization processing unit 301 is configured to perform an initialization process on the display driver chip through a first initialization program;
the monitoring unit 302 is configured to monitor, in an initialization process, a specified instruction in an MIPI specification sent by the electronic device using the FPGA module if it is detected that the first initialization program is not matched with the display driver chip;
the loading unit 303 is configured to perform a filtering operation on the first initialization program by using the FPGA module when the specified instruction is monitored, and send a second initialization program to the display driver chip, where the second initialization program is a correct initialization program;
the initialization processing unit 301 is further configured to perform an initialization process on the display driver chip through the second initialization program, so that the display driver chip works normally.
Optionally, the specified instruction includes a 0x11 instruction.
Optionally, the second MIPI interface includes MIPI RX and MIPI TX, and the apparatus 300 is further specifically configured to:
storing frame synchronization, line synchronization and at least one line of valid image data reception in a FIFIO by the MIPI RX of the FPGA module, transmitting the frame synchronization, the line synchronization and the at least one line of valid image data to the display driver chip using the MIPI TX according to a frame synchronization flag, a line synchronization flag, and filling a blanking period.
Optionally, in the aspect of initializing the display driver chip by the first initializing program, the initializing unit 301 is specifically configured to:
acquiring a target hardware environment parameter;
determining a first driving parameter corresponding to the target hardware environment parameter;
acquiring content to be displayed;
determining target adjustment parameters corresponding to the content to be displayed;
adjusting the first driving parameter according to the target adjusting parameter to obtain a second driving parameter;
and controlling the first initialization program to initialize the display driving chip according to the second driving parameters.
Optionally, in the aspect of determining the target adjustment parameter corresponding to the content to be displayed, the initialization processing unit 301 is specifically configured to:
extracting keywords from the content to be displayed to obtain target keywords;
and determining the target adjustment parameters corresponding to the target keywords.
It can be seen that, the display initialization control device described in the embodiment of the present invention is applied to an electronic device, where the electronic device includes a display driver chip, a display screen, and an FPGA module, the display driver chip is connected to the display screen through a first MIPI interface, the FPGA module is connected to the display driver chip through a second MIPI interface, and performs initialization processing on the display driver chip through the first initialization program, and if it is detected that the first initialization program is not matched with the display driver chip in the initialization processing, the FPGA module is used to monitor a specified instruction in MIPI specifications sent by the electronic device, and when the specified instruction is monitored, the FPGA module is used to perform a filtering operation on the first initialization program, and send a second initialization program to the display driver chip, where the second initialization program is the correct initialization program, and performs initialization processing on the display driver chip through the second initialization program, so that the display driver chip works normally, and uses the FPGA module to bridge-filter the initialization sent by the electronic device, and sends the initialization to the display driver chip, so that when the display driver chip is not the display driver chip is the original, the display driver chip can realize normal display.
It can be understood that the functions of each program module of the display initialization control device of the present embodiment may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the relevant description of the foregoing method embodiment, which is not repeated herein.
The embodiment of the present invention also provides a computer storage medium storing a computer program for electronic data exchange, where the computer program causes a computer to execute some or all of the steps of any one of the methods described in the above method embodiments.
Embodiments of the present invention also provide a computer program product comprising a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform part or all of the steps of any one of the methods described in the method embodiments above. The computer program product may be a software installation package.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present invention. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present invention.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided by the present invention, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, such as the above-described division of units, merely a division of logic functions, and there may be additional manners of dividing in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present invention may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, comprising several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the above-mentioned method of the various embodiments of the present invention. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, which may include: flash disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
The foregoing has outlined rather broadly the more detailed description of embodiments of the invention, wherein the principles and embodiments of the invention are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (10)

1. The display initialization control method is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a display driving chip, a display screen and an FPGA module, the display driving chip is connected with the display screen through a first MIPI interface, and the FPGA module is connected with the display driving chip through a second MIPI interface, and the method comprises the following steps:
initializing the display driving chip through a first initializing program;
in the initialization process, if the first initialization program is detected to be not matched with the display driving chip, monitoring a designated instruction in an MIPI specification sent by the electronic equipment by using the FPGA module;
when the appointed instruction is monitored, the FPGA module is utilized to carry out filtering operation on the first initializing program, and a second initializing program is sent to the display driving chip, wherein the second initializing program is a correct initializing program;
and initializing the display driving chip through the second initializing program so as to enable the display driving chip to work normally.
2. The method of claim 1, wherein the specified instruction comprises a 0x11 instruction.
3. The method of claim 2, wherein the second MIPI interface comprises MIPI RX and MIPI tx, the method further comprising:
storing frame synchronization, line synchronization and at least one line of valid image data reception in a FIFIO by the MIPI RX of the FPGA module, transmitting the frame synchronization, the line synchronization and the at least one line of valid image data to the display driver chip using the MIPI TX according to a frame synchronization flag, a line synchronization flag, and filling a blanking period.
4. A method according to any one of claims 1 to 3, wherein the initializing the display driver chip by the first initializing program includes:
acquiring a target hardware environment parameter;
determining a first driving parameter corresponding to the target hardware environment parameter;
acquiring content to be displayed;
determining target adjustment parameters corresponding to the content to be displayed;
adjusting the first driving parameter according to the target adjusting parameter to obtain a second driving parameter;
and controlling the first initialization program to initialize the display driving chip according to the second driving parameters.
5. The method of claim 4, wherein the determining the target adjustment parameter corresponding to the content to be displayed comprises:
extracting keywords from the content to be displayed to obtain target keywords;
and determining the target adjustment parameters corresponding to the target keywords.
6. The utility model provides a display initialization controlling means, its characterized in that is applied to electronic equipment, electronic equipment includes display driver chip, display screen, FPGA module, display driver chip passes through first MIPI interface connection the display screen, FPGA module passes through second MIPI interface connection display driver chip, the device includes: an initialization processing unit, a monitoring unit and a loading unit, wherein,
the initialization processing unit is used for initializing the display driving chip through a first initialization program;
the monitoring unit is used for monitoring a specified instruction in an MIPI specification sent by the electronic equipment by using the FPGA module if the first initialization program is detected to be not matched with the display driving chip in the initialization processing process;
the loading unit is used for filtering the first initialization program by utilizing the FPGA module when the specified instruction is monitored, and sending a second initialization program to the display driving chip, wherein the second initialization program is a correct initialization program;
the initialization processing unit is further configured to perform initialization processing on the display driver chip through the second initialization program, so that the display driver chip works normally.
7. The apparatus of claim 6, wherein the specified instruction comprises a 0x11 instruction.
8. The apparatus of claim 7, wherein the second MIPI interface comprises MIPI RX and MIPI tx, the apparatus further being configured to:
storing frame synchronization, line synchronization and at least one line of valid image data reception in a FIFIO by the MIPI RX of the FPGA module, transmitting the frame synchronization, the line synchronization and the at least one line of valid image data to the display driver chip using the MIPI TX according to a frame synchronization flag, a line synchronization flag, and filling a blanking period.
9. An electronic device comprising a processor, a memory for storing one or more programs and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-5.
10. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any one of claims 1-5.
CN202311450508.7A 2023-11-01 Display initialization control method and related device Active CN117251220B (en)

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Citations (3)

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Publication number Priority date Publication date Assignee Title
CN106021105A (en) * 2016-05-19 2016-10-12 武汉精测电子技术股份有限公司 Display module adjustment method and apparatus
CN111696445A (en) * 2020-07-27 2020-09-22 京东方科技集团股份有限公司 Display module, control method and device, electronic equipment and storage medium
CN114783334A (en) * 2022-01-10 2022-07-22 广西显沛光电科技有限公司 Method for recycling burnt display driving chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106021105A (en) * 2016-05-19 2016-10-12 武汉精测电子技术股份有限公司 Display module adjustment method and apparatus
CN111696445A (en) * 2020-07-27 2020-09-22 京东方科技集团股份有限公司 Display module, control method and device, electronic equipment and storage medium
CN114783334A (en) * 2022-01-10 2022-07-22 广西显沛光电科技有限公司 Method for recycling burnt display driving chip

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