CN117240995A - Image processing system, method and electronic equipment - Google Patents

Image processing system, method and electronic equipment Download PDF

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Publication number
CN117240995A
CN117240995A CN202311178674.6A CN202311178674A CN117240995A CN 117240995 A CN117240995 A CN 117240995A CN 202311178674 A CN202311178674 A CN 202311178674A CN 117240995 A CN117240995 A CN 117240995A
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image
statistics
node
algorithm
processing chip
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王海
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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Abstract

The application discloses an image processing system, an image processing method and electronic equipment, which belong to the technical field of image processing, wherein the image processing system comprises an image statistics processing chip integrated on a hardware layer and an image updating algorithm node arranged on a hardware abstract layer; the image algorithm updating node is used for acquiring an image algorithm issued by the server and sending the image algorithm to the image statistics processing chip; the image statistics processing chip is used for calculating first feature statistics data of the image signals through an image algorithm, and the first feature statistics data are used for adjusting the target image.

Description

Image processing system, method and electronic equipment
Technical Field
The application belongs to the technical field of image processing, and particularly relates to an image processing system, an image processing method and electronic equipment.
Background
The electronic device may perform image processing through an image algorithm (e.g., 3A Stats algorithm), where 3A refers to Auto Focus (AF), auto Exposure (AE), and auto white balance (auto white balance, AWB), and the algorithm can adjust brightness and focal length of an image and compensate chromatic aberration of a picture under different light irradiation, so that the electronic device presents a high quality image.
In the related art, the image algorithm has a large calculation amount, so that the calculation resources of the processor are easily consumed, and the performance of the operating system is reduced.
Disclosure of Invention
The embodiment of the application aims to provide an image processing system, an image processing method, image processing equipment and a storage medium, which can save the computing resources of a processor and improve the performance of an operating system.
In a first aspect, an embodiment of the present application provides an image processing system, which may include:
the image statistics processing chip is integrated in the hardware layer and the image updating algorithm node is arranged in the hardware abstract layer; wherein,
updating the image algorithm node, which is used for acquiring the image algorithm issued by the server and sending the image algorithm to the image statistics processing chip;
the image statistics processing chip is used for calculating first characteristic statistics data of the image signals through an image algorithm issued by the server, and the first characteristic statistics data are used for adjusting the target image.
In a second aspect, an embodiment of the present application provides an image processing method, which may include:
acquiring an image algorithm issued by a server through an image algorithm updating node arranged at a hardware abstraction layer;
transmitting an image algorithm to an image statistics processing chip integrated in a hardware layer through updating an image algorithm node;
And calculating first characteristic statistical data of the image signal through an image statistical processing chip and an image algorithm, wherein the first characteristic statistical data is used for adjusting the target image.
In a third aspect, an embodiment of the present application provides an electronic device including a processor, a memory, and a program or instructions stored on the memory and executable on the processor, the program or instructions when executed by the processor implementing the steps of the image processing method as shown in the second aspect.
In a fourth aspect, embodiments of the present application provide a readable storage medium having stored thereon a program or instructions which, when executed by a processor, implement the steps of the image processing method as shown in the second aspect.
In a fifth aspect, an embodiment of the present application provides a chip, the chip including a processor and a display interface, the display interface being coupled to the processor, the processor being configured to execute programs or instructions for implementing the steps of the image processing method as shown in the second aspect.
In a sixth aspect, embodiments of the present application provide a computer program product stored in a storage medium, the program product being executable by at least one processor to perform the steps of the image processing method as shown in the second aspect.
In the embodiment of the application, the image processing system can comprise an image statistics processing chip integrated on a hardware layer and an image updating algorithm node arranged on a hardware abstract layer; the image algorithm updating node is used for acquiring an image algorithm issued by the server and sending the image algorithm to the image statistics processing chip; the image statistics processing chip is used for calculating first feature statistics data of the image signals through an image algorithm, and the first feature statistics data are used for adjusting the target image. Therefore, the image algorithm updating node can acquire the image algorithm from the server and send the image algorithm to the image statistics processing chip, so that the image algorithm in the image statistics processing chip can be iterated quickly, based on the image algorithm updating node, the first characteristic statistics data of the image signal calculated by the image algorithm in the image statistics processing chip are closer to the characteristic statistics data required by the user, so that the target image adjusted by the characteristic statistics data required by the user can meet the requirement of the user on the image processing result, the computing resource of a processor is reduced, and the performance of an operating system is improved while the stability of the quality of the image processing result is improved.
Drawings
FIG. 1 is a flow chart of an image processing system;
fig. 2 is a schematic structural diagram of an image processing system according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an image processing system according to an embodiment of the present application;
FIG. 4 is a second schematic diagram of an image processing system according to an embodiment of the present application;
FIG. 5 is a third schematic diagram of an image processing system according to an embodiment of the present application;
FIG. 6 is a schematic diagram of an image processing system according to an embodiment of the present application;
FIG. 7 is a schematic diagram of an image processing system according to an embodiment of the present application;
FIG. 8 is a flowchart of an image processing method according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of an image processing apparatus according to an embodiment of the present application;
fig. 10 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 11 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions of the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which are obtained by a person skilled in the art based on the embodiments of the present application, fall within the scope of protection of the present application.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the application are capable of operation in sequences other than those illustrated or otherwise described herein, and that the objects identified by "first," "second," etc. are generally of a type not limited to the number of objects, for example, the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.
In the image processing scenario, since the image algorithm is a software algorithm, a central processing unit (Central Processing Unit, CPU) is generally used to perform 3A-related statistical calculation, which is a simple but computationally intensive calculation content, so that CPU computing power is very consumed, and the CPU is occupied for a long time, so that no time is required for processing other modules, and finally, the performance of the operating system is reduced, and the problems of frame loss, frame dropping and the like are caused, and the power consumption of the electronic device is increased.
In the related art, in order to solve the above problems, a module for executing an image algorithm is generally hardened and then integrated into an image signal processor (Image Signal Processing, ISP). Illustratively, as shown in fig. 1, the image processing flow path thereof is divided into 2.
Wherein the first pass may perform the following image processing steps:
step 1, under the condition that a camera application is received and started, the camera application can configure the working mode of a statistical module corresponding to an image algorithm, and whether a software 3A stats algorithm or a hardened stats module is used currently is confirmed;
step 2, if a hardened stats module is used, the hardware abstraction layer (Hardware Abstraction Layer, HAL) informs the hardware ISP to call the hardened 3 stats module through the/dev/isp_drv equipment node;
step 3, when the image signal is collected by the Sensor (Sensor), the image signal can be sent to a hardening 3A stats module in the ISP to calculate the statistical data of each feature in the current image signal AWB, AE, AF;
step 4, ISP sends the statistical data calculated in step 3 to software 3A Stats node of HAL layer;
step 5, the software 3A Stats node judges whether the statistical data meets the preset condition, if the statistical data meets the preset condition, the Sensor updating state is not notified, otherwise, if the statistical data does not meet the preset condition, step 6 is executed, for example, by taking AE as an example, the software 3A Stats node judges whether the statistical data of AE of the image signal and the statistical data of AE sent to the Sensor before for each frame are consistent, if the statistical data do not meet the preset condition, otherwise, the statistical data are determined to meet the preset condition;
Step 6, notifying the Sensor Node (Sensor Node) of the Sensor to update the statistical data to the Sensor hardware, and then continuously cycling through the steps 3 to 6.
The second pass may perform the following image processing steps:
step 1 is the same as step 1 of the first path, and specific steps refer to step 1 executed by the first path, and are not described herein again;
step 2, if the hardened stats module is not used, the image signal processing node, namely the ISP node, informs the ISP to close the hardened 3A stats module through the/dev/isp_drv equipment node;
step 3, (7) Sensor map, when the Sensor collects the image signal, the image signal can be sent to the software 3A stats node, and the image algorithm is used to calculate the statistical data of each feature in AWB, AE, AF of the current image signal;
step 4, the software 3A Stats node judges whether the statistical data meets the preset condition, if the statistical data meets the preset condition, the Sensor updating state is not notified, otherwise, if the statistical data does not meet the preset condition, the step 5 is executed;
step 5, informing the Sensor node of the Sensor to update the statistical data to the Sensor hardware, and then continuously cycling the steps 3 to 5.
However, for the first path, as the current image processing technology advances rapidly, the image algorithm is also iterated rapidly, and possibly the 3A stats algorithm which is just hardened in the hardening 3A stats module is replaced by a more optimal algorithm when not used, so that the 3A stats algorithm which is just hardened in the 3A stats module is meaningless, the quality of the image processing result is unstable, and the image processing cost is increased due to frequent execution of the module hardening process. For the second path, once the 3-asats algorithm is used by the 3-a Stats node, the computing resource of the processor is consumed due to the larger computing amount of the 3-a Stats algorithm, so that the CPU is occupied for a long time, no time is needed for processing other modules, the performance of the operating system is finally reduced, the problems of frame loss, frame dropping and the like are caused, and the power consumption of the electronic equipment is increased.
In order to solve the problems in the related art, embodiments of the present application provide an image processing system, method, apparatus, device, and storage medium. The image processing system provided by the embodiment of the application is described in detail below with reference to fig. 2 to 7 by means of a specific embodiment and an application scenario thereof.
First, an image processing system according to an embodiment of the present application will be described in detail with reference to fig. 2.
Fig. 2 is a schematic structural diagram of an image processing system according to an embodiment of the present application.
As shown in fig. 2, the image processing system 20 provided in the embodiment of the present application may be disposed in an electronic device, and based on this, the image processing system 20 may include:
the image statistics processing chip 201 is integrated in the hardware layer and the image updating algorithm node 202 is arranged in the hardware abstract layer; wherein,
updating the image algorithm node 202, which is used for acquiring the image algorithm issued by the server and sending the image algorithm to the image statistics processing chip 202;
the image statistics processing chip 201 is configured to calculate first feature statistics of the image signal according to an image algorithm, where the first feature statistics are used to adjust the target image.
Therefore, the image algorithm updating node can acquire the image algorithm from the server and send the image algorithm to the image statistics processing chip, so that the image algorithm in the image statistics processing chip can be iterated quickly, based on the image algorithm updating node, the first characteristic statistics data of the image signal calculated by the image algorithm in the image statistics processing chip are closer to the characteristic statistics data required by the user, so that the target image adjusted by the characteristic statistics data required by the user can meet the requirement of the user on the image processing result, the computing resource of a processor is reduced, and the performance of an operating system is improved while the stability of the quality of the image processing result is improved.
Here, the image statistics processing chip 201 in the embodiment of the present application may be integrated on a programmable digital chip (Field Programmable Gate Array, FGPA) of 3A stats, where the FGPA of 3A stats is a chip newly added in an electronic device. Node (Node) may refer to an abstraction of FGPA hardware in software, for example, when hardware such as the image statistics processing chip 201 is desired to be operated in software, the update image algorithm Node 202 may be constructed (Update FPGA Algo Node), so that the image statistics processing chip 201 may be controlled by the update image algorithm Node 202. And, the first feature statistical data of the image signal in the above-mentioned related embodiment of the present application may include at least one of the following: statistics of AF, AE, and AWB.
It should be noted that, in an example, the image processing system in the embodiment of the present application may be separately provided in the electronic device, that is, the structure shown in fig. 1 in the current electronic device is removed, so that the image processing may be performed by the image processing system in the embodiment of the present application. In another example, an image processing system provided by the embodiment of the present application may be added to the structure shown in fig. 1, as shown in fig. 2, so that image processing may be selectively performed based on two sets of image processing systems.
The above-described image processing system will be described in detail, as follows.
In one or more possible embodiments, the updating image algorithm node is further configured to obtain first version information of an image algorithm in the image statistics processing chip; acquiring second version information of an image algorithm which is transmitted by a server for the last time; under the condition that the first version information and the second version information are not matched, sending an image algorithm which is issued by the server end for the last time to the image statistics processing chip so as to update the image algorithm in the image statistics processing chip;
the image statistics processing chip is also used for calculating first characteristic statistics data of the image signals through an image algorithm issued by the server for the last time, and the first characteristic statistics data are used for adjusting the target image.
The updating image algorithm node may acquire the first version information of the image algorithm in the image statistics processing chip when receiving the latest image algorithm issued by the server, so that the updating image algorithm node may update the first image algorithm in the image statistics processing chip through the latest image algorithm provided by the server when determining that the first version information of the first image algorithm in the image statistics processing chip is not the latest version provided by the server, so that the latest image algorithm is always stored in the image statistics processing chip, thereby realizing rapid iteration of the image algorithm in the image statistics processing chip, based on which, the first feature statistics data of the image signal calculated through the latest image algorithm in the image statistics processing chip is closer to the feature statistics data required by the user, so that the target image adjusted by the feature statistics data required by the user can meet the requirement of the user on the image processing result, and the process of hardening the module of the image algorithm on the image signal processor is not required to be frequently executed, thereby reducing the image processing cost and improving the stability of the quality of the image processing result.
In another or more possible embodiments, the image processing system 20 in the embodiment of the present application further includes an update image algorithm interface disposed at the hardware abstraction layer and a first registered data channel node disposed at the driver layer;
the updated image algorithm interface is called by the updated image algorithm node and is used for reading the first version information from the image statistics processing chip through the first register data channel node.
For example, as shown in fig. 3, a chip hardware abstraction module (fpga_hal.so) may be newly added in the hardware abstraction layer, and a chip driver module (fpga_driver) may be newly added in the driver layer. The chip hardware abstract module arranged in the hardware abstract layer and the chip driving module arranged in the driving layer can perform data interaction.
The chip hardware abstraction module may include at least one interface, and the at least one interface may include an Update image algorithm interface (Update 3A AlgoFW). The chip driving module may include at least one node including a first registered data channel node (/ dev/dmac 2 h).
Further, the image processing system further comprises a second registered data channel node arranged at the driving layer; wherein,
The updated image algorithm interface is called by the updated image algorithm node and is used for writing an image algorithm which is issued by the server end for the last time in the image statistics processing chip through the second register data channel node.
Illustratively, still referring to FIG. 3, at least one node in the chip driving module may further comprise a second registered data channel node (/ dev/dmah 2 c).
Based on this, the update image algorithm interface may be invoked by the update image algorithm node, and the update image algorithm interface may invoke the first registered data channel node. Thus, during the electronic device start-up process, the flow of the image algorithm updated for the FPGA may be performed by the structure shown in fig. 3.
Specifically, as shown in fig. 3, during the startup of the electronic device, the Camera HAL process in the image capturing application such as the Camera application is automatically started up as a daemon by the operating system (linux) in the electronic device to perform the following steps:
step 1, an Update 3A AlgoFW interface in a hardware abstraction module of an added chip is called by an Update image algorithm node 202 (Update FPGA Algo Node) in the hardware abstraction layer;
step 2, the Update 3A AlgoFW interface reads the first version information of the first image algorithm stored in the image statistics processing chip 201 through the first register data channel node/dev/dma_c2h;
Step 3, update FPGA Algo Node matches the second version information of the image algorithm which is recently issued by the server and stored in the sdcard/camera_config/3a_algo_ver file in the electronic device after the first version information is obtained;
step 4, if the version information of the image statistics processing chip 201 is lower than the second version information, update FPGA Algo Node writes the last image algorithm issued by the server into the image statistics processing chip 201 through the second register data channel node (/ dev/dma_h2c).
It should be noted that, in an example, the second version information of the image algorithm that is only recently issued by the server side and stored in the above-mentioned/sdcard/camera_config/3a_algo_ver file does not include the image algorithm, so that when the version information of the image statistics processing chip 201 is lower than the second version information, the electronic device is triggered to download the image algorithm corresponding to the second version information from the server side, and the downloaded image algorithm corresponding to the second version information is written into the image statistics processing chip 201 through the second register data channel node. Thus, when the version information of the image statistics processing chip 201 is equal to the second version information, the latest image algorithm does not need to be downloaded, so that the storage space of the electronic device is saved.
Of course, in another example, the latest image algorithm and the second version information of the latest image algorithm provided by the server may also be stored in the/sdcard/camera_config/3a_algo_ver file, so that when the first version information of the first image algorithm in the image statistics processing chip 201 is lower than the second version information, the second version information may be quickly written into the image statistics processing chip 201, thereby improving the efficiency of calculating the first feature statistics data of the image signal.
In another or more possible embodiments, the image processing system in the embodiment of the present application further includes an image sensor integrated in a hardware layer and an image statistics node disposed in a hardware abstraction layer; wherein,
the image sensor is used for receiving second characteristic statistical data configured by a user;
and the image statistics node is used for outputting first feature statistics data under the condition that the first feature statistics data are matched with the second feature statistics data, and the first feature statistics data are used for adjusting the target image.
Further, the image sensor is also used for acquiring image signals.
Illustratively, as shown in fig. 4, a shadow statistics Node (3a_stats Node) may also be provided at the hardware abstraction layer. The image sensor may include a sensor (sensor) that may be used to collect image signals and receive user-configured second feature statistics that may be desired reference data configured in advance for the user, e.g., set the second feature statistics, i.e., AWB reference data, to AWB statistics as an a-interval, and when the calculated value of AWB statistics is within the a-interval, the image statistics node may determine that the first feature statistics match the second feature statistics, whereas when the calculated value of AWB statistics is not within the a-interval, the image statistics node may determine that the first feature statistics do not match the second feature statistics.
In this way, when the first feature statistics match the second feature statistics, the result of the image processing is consistent with the user's expectations, the first feature statistics may be output, and the target image may be adjusted by the first feature statistics, so that the electronic device presents a high quality image.
Alternatively, in yet another or more possible embodiments, the image statistics node is further configured to send the first feature statistics to the image sensor if it is determined that the first feature statistics do not match the second feature statistics;
the image statistics processing chip is further used for recalculating the first feature statistics data of the image signal through the latest image algorithm issued by the server side based on the image signal and the first feature statistics data until the recalculated first feature statistics data are determined to be matched with the second feature statistics data, and outputting the recalculated first feature statistics data.
Therefore, the first characteristic statistical data can be used as a reference parameter, so that the recalculated first characteristic statistical data can be matched with the second characteristic statistical data rapidly, the first characteristic statistical data required by the output user is shortened, and the image processing efficiency is improved.
In another or more possible embodiments, the image processing system in the embodiment of the present application further includes an initialization interface disposed at the hardware abstraction layer and a configuration file node disposed at the driver layer;
the initialization interface is called by the image statistics node and is used for sending shooting mode parameters to the image statistics processing chip through the configuration file node;
the shooting mode parameter is used for triggering the image statistics processing chip to be in a working mode, and the shooting mode parameter is determined by the image statistics node based on the shooting mode in application. Here, the application may be a camera application.
Further, the image statistics node is further configured to obtain, from the operation data of the application, a shooting mode parameter corresponding to a shooting mode in the application.
Illustratively, as shown in FIG. 5, at least one interface in the chip hardware abstraction module may also initialize an interface (initialization). At least one node in the chip driver module may also include a profile node (/ dev/config reg). The initialization interface can be called by the image statistics node, and the initialization interface can call the configuration file node, so that the initialization interface can be used for sending shooting mode parameters to the image statistics processing chip through the configuration file node.
Based on the structure shown in fig. 4, after the electronic device is started, a process of issuing parameters for the FPGA may be performed during the process of the user opening the camera application.
Specifically, referring to the structure of fig. 4, the following steps are performed:
step 1, after receiving a Camera application (Camera App) started by a user, the Camera application will send a current shooting mode, such as a shooting mode of 'shooting', 'video', and the like, and shooting mode parameters corresponding to the shooting mode to an image statistics Node 3a_stats Node;
step 2, the image statistics Node 3a_stats Node may call the initialization interface initialization, and send the current shooting mode parameter to the image statistics processing core 201 through the configuration file Node/dev/config_reg, so that the image statistics processing core is in a working mode.
In still another or more possible embodiments, the image processing system in an embodiment of the present application further includes a regulation node disposed at the hardware abstraction layer; wherein,
the regulation node is called by the image shooting application and is used for regulating the working mode of the image statistics node and the working mode of the image signal processor.
For example, as shown in fig. 6, in order to avoid the interference of the original software ISP Node (ISP Node) and the hardware ISP when the first feature statistics of the image signal is calculated by the last image algorithm issued by the server, when the user starts the camera application, the camera application may call the regulation Node to adjust the working modes of the ISP Node and the hardware ISP to be off.
In still another or more possible embodiments, the image processing system in the embodiment of the present application further includes an interrupt unit integrated in a hardware layer and a profile node disposed in a driving layer; wherein,
the interrupt unit is used for generating an interrupt event according to the first characteristic statistical data output by the image statistical processing chip; and calling a configuration file node, and sending an interrupt notification corresponding to the interrupt event to the image statistics node, wherein the interrupt notification is used for notifying the image statistics node to read the first characteristic statistics data from the image statistics processing chip.
Based on the above, the image processing system in the embodiment of the present application further includes a processing request interface disposed at the hardware abstraction layer and a first register data channel node disposed at the driving layer; wherein,
the processing request interface is called by the image statistics node and is used for reading first feature statistics data of image features from the image statistics processing chip through the first register data channel node.
Illustratively, as shown in FIG. 7, at least one interface in the chip hardware abstraction module may also include a process request interface (process request). And an interrupt unit (Interrupt Request, IRQ) integrated at the hardware layer.
Based on the structure shown in fig. 7, a 3A stats statistics process may be performed for the image signal collected by the sensor, and specifically, with reference to fig. 7, the following steps may be performed:
step 1, when a user starts a camera application, the camera application calls a regulating Node to regulate the working modes of an ISP Node and a hardware ISP to be closed;
step 2, the Sensor acquires an image signal and sends the image signal to the image statistics processing chip 201, and the image statistics processing chip 201 calculates at least one of the following characteristics of the image signal by using an image algorithm recently issued by the server: first feature statistics of AWB, AE, AF;
step 3, the first feature statistics data is sent to the image statistics Node 3A stats Node, in the 3A stats Node, whether the first feature statistics data and the second feature statistics data of the image information are matched or not is judged, if the first feature statistics data and the second feature statistics data are matched, the Sensor update state is not notified, otherwise, the following step 4 is executed;
and 4, the 3A stats Node informs the sensor Node to update the first characteristic statistical data to the sensor, and then steps 2 to 4 are executed in a circulating way until the first characteristic statistical data is matched with the second characteristic statistical data, so that the image processing system outputs the recalculated first characteristic statistical data, and the recalculated first characteristic statistical data is used for adjusting the target image.
Specifically, step 3 in this embodiment may specifically be as follows:
step 31, after the image statistics processing chip calculates the first feature statistics data, firstly generating an interrupt event through the interrupt unit;
step 32, the interrupt unit sends an interrupt notification corresponding to the interrupt event to the chip driving module, wherein the interrupt unit of the hardware layer realizes asynchronous notification, and when no event notification exists, the chip driving module is in a dormant state, so that the chip driving module does not occupy any CPU time slice under the condition that no event notification exists, thereby greatly reducing the performance consumption of the CPU;
step 33, after receiving the interrupt notification, the chip driving module sends an interrupt notification to the image statistics node in the HAL through a callback function (callback), wherein the interrupt notification is used for notifying the image statistics node that the image statistics processing chip calculates first characteristic statistics data, and the first characteristic statistics data are read from the image statistics processing chip;
and step 34, the image statistics node calls a processing request interface in the chip hardware abstraction module, and reads the first characteristic statistics data in the image statistics processing chip 201 through the first register data channel node/dev/dma_c2h.
Therefore, when the image processing system updating image algorithm node provided by the embodiment of the application determines that the first version information of the first image algorithm in the image statistics processing chip is not the latest version provided by the server, the first image algorithm in the image statistics processing chip is updated through the latest image algorithm provided by the server, so that the latest image algorithm is always stored in the image statistics processing chip, thereby realizing the rapid iteration of the image algorithm in the image statistics processing chip, based on the fact, the first characteristic statistical data of the image signal calculated through the latest image algorithm in the image statistics processing chip is closer to the characteristic statistical data required by a user, the target image adjusted through the characteristic statistical data required by the user can meet the requirement of the user on the image processing result, and therefore, the process of hardening the module of the image algorithm on the image signal processor is not required to be frequently executed, the image processing cost is reduced, and the quality of the image processing result is improved.
Next, based on the above image processing system, a detailed description will be given of an image processing system according to an embodiment of the present application with reference to fig. 8.
Fig. 8 is a flowchart of an image processing method according to an embodiment of the present application.
As shown in fig. 8, the image processing method provided by the embodiment of the present application may be applied to an electronic device, where the electronic device includes a hardware abstraction layer, a hardware layer, and a driving layer, and based on this, the image processing method may include the following steps:
step 810, obtaining an image algorithm issued by a server through an image algorithm updating node arranged at a hardware abstraction layer; step 820, transmitting the image algorithm to the image statistics processing chip integrated in the hardware layer by updating the image algorithm node; in step 830, first feature statistics of the image signal are calculated by the image statistics processing chip and the image algorithm, where the first feature statistics are used to adjust the target image.
Therefore, the image algorithm can be obtained from the server through updating the image algorithm node, and the image algorithm is sent to the image statistics processing chip integrated in the hardware layer through updating the image algorithm node, so that the image algorithm in the image statistics processing chip can be iterated quickly, based on the image algorithm, the first characteristic statistics data of the image signal calculated through the image algorithm in the image statistics processing chip is closer to the characteristic statistics data required by the user, the target image adjusted by being closer to the characteristic statistics data required by the user can meet the requirement of the user on the image processing result, the calculation resource of a processor is reduced, and the performance of an operating system is improved while the stability of the quality of the image processing result is improved.
The above steps are described in detail below, and are specifically described below.
First, referring to step 810, in one or more possible embodiments, first version information of an image algorithm in an image statistics processing chip is obtained by updating an image algorithm node; and obtaining the second version information of the image algorithm which is issued by the server last time.
In another or more possible embodiments, the electronic device further includes an update image algorithm interface disposed at the hardware abstraction layer and a first register data channel node disposed at the driver layer, based on which the step 810 may specifically include:
and under the condition that the updated image algorithm interface is called by the updated image algorithm node, calling a first register data channel node through the updated image algorithm interface, and reading the first version information from the image statistics processing chip.
Receiving, involving step 820, in one or more possible embodiments, based on the example in step 810 described above, step 820 may specifically include:
and under the condition that the first version information and the second version information are not matched, sending an image algorithm which is issued by the server end for the last time to the image statistics processing chip so as to update the image algorithm in the image statistics processing chip.
Then, referring to step 830, in one or more possible embodiments, based on the embodiment in step 810, step 830 may specifically include:
and calculating first characteristic statistical data of the image signal based on an image algorithm issued by the server for the last time through an image statistical processing chip, wherein the first characteristic statistical data is used for adjusting the target image.
In another or more possible embodiments, the electronic device further includes an initialization interface disposed at the hardware abstraction layer and a profile node disposed at the driver layer, based on which, before step 830, the image processing method may further include:
under the condition that the initialization interface is called by the image statistics node, calling a configuration file node through the initialization interface, and sending shooting mode parameters to the image statistics processing chip;
the shooting mode parameter is used for triggering the image statistics processing chip to be in a working mode, and the shooting mode parameter is determined by the image statistics node based on the shooting mode in application.
Based on this, the image processing method may further include, prior to the step 830:
and acquiring shooting mode parameters corresponding to shooting modes in the image shooting application from the running data of the image shooting application through the image counting node.
Further, before the step 830, the electronic device further includes a regulation node disposed at a hardware abstraction layer, and the image processing method may further include:
and under the condition that the regulation node is invoked by the application, regulating the working mode of the image statistics node and the working mode of the image signal processor through the regulation node.
In addition, in one or more possible embodiments, referring to step 830, the electronic device further includes a second registered data channel node disposed at the driving layer, based on which the image processing method may further include:
and under the condition that the updated image algorithm interface is called by the updated image algorithm node, calling a second register data channel node through the updated image algorithm interface, and writing the image algorithm which is issued by the server end last time in the image statistics processing chip.
In another or more possible embodiments, after the step 830, the electronic device further includes an image sensor integrated in a hardware layer and an image statistics node disposed in a hardware abstraction layer, based on which the image processing method may further include:
receiving second feature statistical data configured by a user through an image sensor;
and outputting the first characteristic statistical data by the image statistical node under the condition that the first characteristic statistical data is matched with the second characteristic statistical data, wherein the first characteristic statistical data is used for adjusting the target image.
In still another or more possible embodiments, referring to step 830, the electronic device further includes an interrupt unit integrated in a hardware layer and a profile node provided in a driving layer, based on which, after step 830, the image processing method may further include:
generating an interrupt event according to first characteristic statistical data output by the image statistical processing chip through an interrupt unit;
and calling the configuration file node through the interrupt unit, and sending an interrupt notification corresponding to the interrupt event to the image statistics node, wherein the interrupt notification is used for notifying the image statistics node to read the first characteristic statistics data from the image statistics processing chip.
Further, the electronic device further includes a processing request interface disposed at the hardware abstraction layer and a first registered data channel node disposed at the driver layer, based on which, after step 830, the image processing method may further include:
and under the condition that the processing request interface is called by the image statistics node, calling a first register data channel node through the processing request interface, and reading first feature statistics data of the image features from the image statistics processing chip.
In yet another or more possible embodiments, after step 830, the image processing method may further include:
Transmitting, by the image statistics node, the first feature statistics data to the image sensor if it is determined that the first feature statistics data does not match the second feature statistics data;
and recalculating the first characteristic statistical data of the image signal through an image statistical processing chip based on the image signal and the first characteristic statistical data by a latest image algorithm issued by the server until the recalculated first characteristic statistical data is determined to be matched with the second characteristic statistical data, and outputting the recalculated first characteristic statistical data.
According to the image processing method provided by the embodiment of the application, the execution subject can be an image processing device. In the embodiment of the present application, an image processing apparatus executes an image processing method as an example, and an apparatus for the image processing method according to the embodiment of the present application is described.
Based on the same inventive concept, the application also provides an image processing device. This is described in detail with reference to fig. 9.
Fig. 9 is a schematic structural diagram of an image processing apparatus according to an embodiment of the present application.
As shown in fig. 9, the image processing apparatus 90 may be applied to an electronic device, and the image processing apparatus 90 may specifically include:
the acquiring module 901 is configured to acquire an image algorithm issued by the server through an updated image algorithm node set at the hardware abstraction layer;
The transmission module 902 is configured to send an image algorithm to an image statistics processing chip integrated in a hardware layer by updating an image algorithm node;
the calculating module 903 is configured to calculate first feature statistics of the image signal through the image statistics processing chip and the image algorithm, where the first feature statistics are used to adjust the target image.
The above steps are described in detail below, and are specifically described below.
In one or more possible embodiments, the obtaining module 901 is further configured to obtain, by updating the image algorithm node, first version information of an image algorithm in the image statistics processing chip; and obtaining the second version information of the image algorithm which is issued by the server last time.
In another or more possible embodiments, the image processing apparatus 90 may further include a first reading module; wherein,
the first reading module is used for calling the first register data channel node through the image updating algorithm interface under the condition that the electronic equipment further comprises the image updating algorithm interface arranged at the hardware abstraction layer and the first register data channel node arranged at the driving layer and the image updating algorithm interface is called by the image updating algorithm node, and reading the first version information from the image statistics processing chip.
In still another or more possible embodiments, the transmission module 902 may be further configured to send, to the image statistics processing chip, an image algorithm that was last issued by the server to update the image algorithm in the image statistics processing chip if it is determined that the first version information and the second version information do not match.
In still another or more possible embodiments, the calculating module 903 may be further configured to calculate, through the image statistics processing chip, first feature statistics of the image signal based on an image algorithm recently issued by the server, where the first feature statistics are used to adjust the target image.
In still another or more possible embodiments, the transmission module 902 may be further configured to, when the electronic device further includes an initialization interface disposed at the hardware abstraction layer and a profile node disposed at the driver layer, invoke the profile node through the initialization interface and send the shooting mode parameter to the image statistics processing chip if the initialization interface is invoked by the image statistics node; the shooting mode parameter is used for triggering the image statistics processing chip to be in a working mode, and the shooting mode parameter is determined by the image statistics node based on the shooting mode in application.
In still another or more possible embodiments, the obtaining module 901 may be further configured to obtain, through the image statistics node, a shooting mode parameter corresponding to a shooting mode in the image capturing application from the operation data of the image capturing application.
In yet another or more possible embodiments, the image processing apparatus 90 may further include an adjustment module; wherein,
the adjusting module is used for adjusting the working mode of the image statistics node and the working mode of the image signal processor through the adjusting node under the condition that the electronic equipment further comprises the adjusting node arranged at the hardware abstraction layer and the adjusting node is called by an application.
In yet another or more possible embodiments, the image processing apparatus 90 may further include a processing module; wherein,
the processing module is used for calling the second register data channel node through the updated image algorithm interface under the condition that the electronic equipment further comprises the second register data channel node arranged on the driving layer and the updated image algorithm interface is called by the updated image algorithm node, and writing the image algorithm which is issued by the server end last time in the image statistics processing chip.
In yet another possible embodiment, the image processing apparatus 90 may further include a receiving module and an output module; wherein,
The receiving module is used for receiving second characteristic statistical data configured by a user through the image sensor under the condition that the electronic device further comprises the image sensor integrated at the hardware layer and the image statistical node arranged at the hardware abstract layer;
the output module is used for outputting the first characteristic statistical data through the image statistical node under the condition that the first characteristic statistical data is matched with the second characteristic statistical data, and the first characteristic statistical data is used for adjusting the target image.
In still another or more possible embodiments, the image processing apparatus 90 may further include a generation module, an output module; wherein,
the generating module is used for generating an interrupt event according to the first characteristic statistical data output by the image statistical processing chip through the interrupt unit under the condition that the electronic device further comprises the interrupt unit integrated on the hardware layer and the configuration file node arranged on the driving layer;
the transmission module 902 is further configured to invoke the profile node by using the interrupt unit, and send an interrupt notification corresponding to the interrupt event to the image statistics node, where the interrupt notification is used to notify the image statistics node to read the first feature statistics data from the image statistics processing chip.
In yet another or more possible embodiments, the image processing apparatus 90 may further include a second reading module; wherein,
the second reading module is used for calling the first registered data channel node through the processing request interface under the condition that the electronic equipment further comprises the processing request interface arranged at the hardware abstraction layer and the first registered data channel node arranged at the driving layer and the processing request interface is called by the image statistics node, and reading the first feature statistics data of the image features from the image statistics processing chip.
In yet another or more possible embodiments, the transmitting module 902 is further configured to send, by the image statistics node, the first feature statistics to the image sensor if it is determined that the first feature statistics do not match the second feature statistics;
the calculating module 903 is further configured to recalculate, by using the image statistics processing chip, the first feature statistics of the image signal based on the image signal and the first feature statistics, by using a latest image algorithm issued by the server, until it is determined that the recalculated first feature statistics match the second feature statistics, and output the recalculated first feature statistics.
The image processing device in the embodiment of the application can be an electronic device, or can be a component in the electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal, or may be other devices than a terminal. By way of example, the electronic device may be a mobile phone, tablet computer, notebook computer, palm computer, vehicle-mounted electronic device, mobile internet appliance (Mobile Internet Device, MID), augmented reality (augmented reality, AR)/Virtual Reality (VR) device, robot, wearable device, ultra-mobile personal computer, UMPC, netbook or personal digital assistant (personal digital assistant, PDA), etc., but may also be a server, network attached storage (Network Attached Storage, NAS), personal computer (personal computer, PC), television (TV), teller machine or self-service machine, etc., and the embodiments of the present application are not limited in particular.
The image processing apparatus in the embodiment of the present application may be an apparatus having an operating system. The operating system may be an Android operating system, an IOS operating system, or other possible operating systems, and the embodiment of the present application is not limited specifically.
The device cooperation apparatus provided by the embodiment of the present application can implement each process implemented by the embodiment of the image processing method shown in fig. 8, so as to achieve the same technical effect, and in order to avoid repetition, a detailed description is omitted here.
Based on the above, the image processing device provided in the embodiment of the application can acquire the image algorithm from the server through updating the image algorithm node, and send the image algorithm to the image statistics processing chip integrated in the hardware layer through updating the image algorithm node, so that the rapid iteration of the image algorithm in the image statistics processing chip is realized, based on the image algorithm, the first characteristic statistics data of the image signal calculated by the image algorithm in the image statistics processing chip is closer to the characteristic statistics data required by the user, so that the target image adjusted by the characteristic statistics data required by the user can meet the requirement of the user on the image processing result, thus reducing the calculation resource of the consumed processor, improving the stability of the quality of the image processing result, and improving the performance of the operating system.
The electronic device in the embodiment of the application includes the mobile electronic device and the non-mobile electronic device.
Fig. 11 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application.
The electronic device 1100 includes, but is not limited to: radio frequency unit 1101, network module 1102, audio output unit 1103, input unit 1104, sensor 1105, display unit 1106, user input unit 1107, interface unit 1108, memory 1109, processor 1110, and the like.
Those skilled in the art will appreciate that the electronic device 1100 may further include a power source (e.g., a battery) for powering the various components, which may be logically connected to the processor 1110 by a power management system, such as to perform functions such as managing charging, discharging, and power consumption by the power management system. The electronic device structure shown in fig. 11 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than illustrated, or may combine some components, or may be arranged in different components, which are not described in detail herein.
In this embodiment of the present application, the processor 1110 is configured to obtain an image algorithm issued by the server through an update image algorithm node set in the hardware abstraction layer. The processor 1110 may also be configured to send the image algorithm to an image statistics processing chip integrated in the hardware layer by updating the image algorithm node. The processor 1110 may also be configured to calculate, via the image statistics processing chip and the image algorithm, first feature statistics of the image signal, the first feature statistics being used to adjust the target image.
The above steps are described in detail below, and are specifically described below.
In one or more possible embodiments, the processor 1110 is further configured to obtain, by updating the image algorithm node, first version information of an image algorithm in the image statistics processing chip; and obtaining the second version information of the image algorithm which is issued by the server last time.
In another or more possible embodiments, the processor 1110 is further configured to, in a case where the electronic device further includes an update image algorithm interface provided at the hardware abstraction layer and a first register data channel node provided at the driver layer, and the update image algorithm interface is invoked by the update image algorithm node, invoke the first register data channel node through the update image algorithm interface, and read the first version information from the image statistics processing chip.
In still another or more possible embodiments, the processor 1110 is further configured to send, to the image statistics processing chip, an image algorithm that was last issued by the server to update the image algorithm in the image statistics processing chip, if it is determined that the first version information and the second version information do not match.
In still another or more possible embodiments, the processor 1110 is further configured to calculate, by using the image statistics processing chip, first feature statistics of the image signal based on an image algorithm recently issued by the server, where the first feature statistics are used to adjust the target image.
In still another or more possible embodiments, the processor 1110 is further configured to, when the electronic device further includes an initialization interface disposed at the hardware abstraction layer and a profile node disposed at the driver layer, invoke the profile node through the initialization interface and send the shooting mode parameter to the image statistics processing chip; the shooting mode parameter is used for triggering the image statistics processing chip to be in a working mode, and the shooting mode parameter is determined by the image statistics node based on the shooting mode in application.
In yet another or more possible embodiments, the processor 1110 is further configured to obtain, by the image statistics node, a shooting mode parameter corresponding to a shooting mode in the image shooting application from the running data of the image shooting application.
In still another or more possible embodiments, the processor 1110 is further configured to adjust, by the regulatory node, an operation mode of the image statistics node and an operation mode of the image signal processor in a case where the electronic device further includes the regulatory node disposed at the hardware abstraction layer, the regulatory node being invoked by the application.
In still another or more possible embodiments, the processor 1110 is further configured to, in a case where the electronic device further includes a second registered data channel node disposed in the driving layer, call the second registered data channel node through the updated image algorithm interface when the updated image algorithm interface is called by the updated image algorithm node, write the image algorithm that was last issued by the server in the image statistics processing chip.
In yet another or more possible embodiments, the processor 1110 is further configured to, in a case where the electronic device further includes an image sensor integrated in a hardware layer and an image statistics node disposed in a hardware abstraction layer, receive, by the image sensor, second feature statistics configured by a user;
and outputting the first characteristic statistical data by the image statistical node under the condition that the first characteristic statistical data is matched with the second characteristic statistical data, wherein the first characteristic statistical data is used for adjusting the target image.
In still another or more possible embodiments, the processor 1110 is further configured to, in a case where the electronic device further includes an interrupt unit integrated in a hardware layer and a profile node disposed in a driving layer, generate, by the interrupt unit, an interrupt event according to first feature statistics output by the image statistics processing chip;
and calling the configuration file node through the interrupt unit, and sending an interrupt notification corresponding to the interrupt event to the image statistics node, wherein the interrupt notification is used for notifying the image statistics node to read the first characteristic statistics data from the image statistics processing chip.
In still another or more possible embodiments, the processor 1110 is further configured to, in a case where the electronic device further includes a processing request interface disposed at the hardware abstraction layer and a first register data channel node disposed at the driver layer, invoke the first register data channel node through the processing request interface to read the first feature statistics of the image feature from the image statistics processing chip.
In yet another or more possible embodiments, the processor 1110 is further configured to send, by the image statistics node, the first feature statistics to the image sensor if it is determined that the first feature statistics do not match the second feature statistics;
and recalculating the first characteristic statistical data of the image signal through an image statistical processing chip based on the image signal and the first characteristic statistical data by a latest image algorithm issued by the server until the recalculated first characteristic statistical data is determined to be matched with the second characteristic statistical data, and outputting the recalculated first characteristic statistical data.
It should be appreciated that the input unit 1104 may include a graphics processor (Graphics Processing Unit, GPU) 11041 and a microphone 11042, the graphics processor 11041 processing image data of still images or video obtained by an image capturing device (e.g., a camera) in a video capturing mode or an image capturing mode. The display unit 1106 may include a display panel, which may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 1107 includes at least one of a touch panel 11071 and other input devices 11072. The touch panel 11071 is also referred to as a touch screen. The touch panel 11071 may include two parts, a touch detection device and a touch display. Other input devices 11072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume display keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail herein.
The memory 1109 may be used to store software programs and various data, and the memory 1109 may mainly include a first storage area storing programs or instructions and a second storage area storing data, wherein the first storage area may store an operating system, application programs or instructions (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like. Further, the memory 1109 may include volatile memory or nonvolatile memory, or the memory 1109 may include both volatile and nonvolatile memory. The nonvolatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable EPROM (EEPROM), or a flash Memory. The volatile memory may be random access memory (Random Access Memory, RAM), static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (ddr SDRAM), enhanced SDRAM (Enhanced SDRAM), synchronous DRAM (SLDRAM), and Direct RAM (DRRAM). Memory 1109 in embodiments of the present application includes, but is not limited to, these and any other suitable types of memory.
Processor 1110 may include one or more processing units; optionally, processor 1110 integrates an application processor that primarily processes operations involving an operating system, user interface, application programs, and the like, and a modem processor that primarily processes wireless display signals, such as a baseband processor. It will be appreciated that the modem processor described above may not be integrated into the processor 1110.
The embodiment of the application also provides a readable storage medium, and the readable storage medium stores a program or an instruction, which when executed by a processor, implements each process of the above image processing method embodiment, and can achieve the same technical effects, so that repetition is avoided, and no further description is provided here.
The processor is a processor in the electronic device in the above embodiment. Among them, the readable storage medium includes computer readable storage medium such as computer readable memory ROM, random access memory RAM, magnetic disk or optical disk, etc.
In addition, the embodiment of the application further provides a chip, the chip comprises a processor and a display interface, the display interface is coupled with the processor, the processor is used for running programs or instructions, the processes of the embodiment of the image processing method can be realized, the same technical effects can be achieved, and the repetition is avoided, and the description is omitted here.
It should be understood that the chips referred to in the embodiments of the present application may also be referred to as system-on-chip chips, chip systems, or system-on-chip chips, etc.
Embodiments of the present application provide a computer program product stored in a storage medium, where the program product is executed by at least one processor to implement the respective processes of the above-described image processing method embodiments, and achieve the same technical effects, and for avoiding repetition, a detailed description is omitted herein.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Furthermore, it should be noted that the scope of the methods and apparatus in the embodiments of the present application is not limited to performing the functions in the order shown or discussed, but may also include performing the functions in a substantially simultaneous manner or in an opposite order depending on the functions involved, e.g., the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in part in the form of a computer software product stored on a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method of the embodiments of the present application.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.

Claims (13)

1. An image processing system, comprising:
the image statistics processing chip is integrated in the hardware layer and the image updating algorithm node is arranged in the hardware abstract layer;
the image algorithm updating node is used for acquiring an image algorithm issued by a server and sending the image algorithm to the image statistics processing chip;
the image statistics processing chip is used for calculating first feature statistics data of the image signals through the image algorithm, and the first feature statistics data are used for adjusting the target image.
2. The system of claim 1, wherein the updated image algorithm node is further configured to obtain first version information of an image algorithm in the image statistics processing chip; acquiring second version information of an image algorithm which is transmitted by a server for the last time; under the condition that the first version information and the second version information are not matched, sending an image algorithm which is issued by the server end for the last time to the image statistics processing chip so as to update the image algorithm in the image statistics processing chip;
the image statistics processing chip is further used for calculating first feature statistics data of the image signal through an image algorithm issued by the server for the last time, and the first feature statistics data are used for adjusting the target image.
3. The system of claim 2, wherein the image processing system further comprises an update image algorithm interface disposed at the hardware abstraction layer and a first registered data channel node disposed at the driver layer;
the image updating algorithm interface is called by the image updating algorithm node and is used for reading the first version information from the image statistics processing chip through the first register data channel node.
4. A system according to claim 3, wherein the image processing system further comprises a second registered data channel node provided at the drive layer; wherein,
the image updating algorithm interface is called by the image updating algorithm node and is used for writing an image algorithm which is issued by the server end for the last time in the image statistics processing chip through the second register data channel node.
5. The system of claim 1, wherein the image processing system further comprises an image sensor integrated at the hardware layer and an image statistics node disposed at the hardware abstraction layer;
the image sensor is used for acquiring second characteristic statistical data;
The image statistics node is configured to output the first feature statistics data when it is determined that the first feature statistics data matches the second feature statistics data, where the first feature statistics data is used to adjust a target image.
6. The system of claim 5, wherein the image processing system further comprises an initialization interface disposed at the hardware abstraction layer and a profile node disposed at a driver layer;
the initialization interface is called by the image statistics node and is used for sending shooting mode parameters to the image statistics processing chip through the configuration file node;
the shooting mode parameter is used for triggering the image statistics processing chip to be in a working mode, and the shooting mode parameter is determined by the image statistics node based on an applied shooting mode.
7. The system of claim 6, wherein the image statistics node is further configured to obtain, from the operation data of the application, a shooting mode parameter corresponding to a shooting mode in the application.
8. The system of claim 6 or 7, wherein the image processing system further comprises a regulation node disposed at the hardware abstraction layer; wherein,
The regulation node is invoked by the application and is used for regulating the working mode of the image statistics node and the working mode of the image signal processor.
9. The system of claim 5, wherein the image processing system further comprises an interrupt unit integrated at the hardware layer and a profile node provided at a driver layer; wherein,
the interrupt unit is used for generating an interrupt event according to the first characteristic statistical data output by the image statistical processing chip; and invoking the configuration file node, and sending an interrupt notification corresponding to the interrupt event to the image statistics node, wherein the interrupt notification is used for notifying the image statistics node to read the first characteristic statistics data from the image statistics processing chip.
10. The system of claim 9, wherein the image processing system further comprises a processing request interface disposed at the hardware abstraction layer and a first registered data channel node disposed at the driver layer;
the processing request interface is called by the image statistics node and is used for reading first feature statistics data of the image features from the image statistics processing chip through the first register data channel node.
11. The system of claim 5, wherein the image statistics node is further configured to send the first feature statistics to the image sensor if it is determined that the first feature statistics do not match the second feature statistics;
the image statistics processing chip is further used for recalculating first characteristic statistics data of the image signal through an image algorithm issued by the server for the last time based on the image signal and the first characteristic statistics data; outputting the recalculated first feature statistic in case the recalculated first feature statistic matches the second feature statistic.
12. An image processing method, comprising:
acquiring an image algorithm issued by a server through an image algorithm updating node arranged at a hardware abstraction layer;
transmitting the image algorithm to an image statistics processing chip integrated in a hardware layer through the image algorithm updating node;
and calculating first characteristic statistical data of the image signal through the image statistical processing chip and the image algorithm, wherein the first characteristic statistical data is used for adjusting the target image.
13. An electronic device, comprising: a processor, a memory and a program or instructions stored on the memory and executable on the processor, which when executed by the processor, implement the steps of the image processing method as claimed in claim 12.
CN202311178674.6A 2023-09-11 2023-09-11 Image processing system, method and electronic equipment Pending CN117240995A (en)

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