CN117240286A - Multi-path voltage controlled oscillator and method for setting control voltage of varactor - Google Patents
Multi-path voltage controlled oscillator and method for setting control voltage of varactor Download PDFInfo
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Abstract
The application provides a multipath voltage-controlled oscillator and a method for setting control voltage of a varactor, wherein the multipath voltage-controlled oscillator of an embodiment comprises a voltage-controlled oscillator core circuit and a control voltage generator circuit. The VCO core circuit includes a varactor having a control terminal for receiving a control voltage. The control voltage generator circuit is used for receiving at least one proportional path control input and one integral path control input, and generating and outputting the control voltage to the control endpoint of the varactor according to the at least one proportional path control input and the integral path control input. The multipath voltage-controlled oscillator shares the same varactor among a plurality of paths, and can track the same DC bias voltage under the conditions of manufacturing process, voltage and temperature variation and keep the damping factor of the phase-locked loop stable for reducing electromagnetic coupling.
Description
Technical Field
The present application relates to vco design, and more particularly, to a multi-path vco and a method for setting a varactor control voltage.
Background
Some data transmission applications may require the use of a phase-locked loop (PLL) with well-controlled bandwidth and frequency, and in order to make the setting of these two loop parameters flexible, dual-path PLLs have been proposed to include a proportional path (proportional path, P-path) responsible for bandwidth control and an integral path (I-path) responsible for frequency control. The VCO (voltage-controlled oscillator) used in the pll may be implemented by an LC (inductor-capacitor) VCO, however, due to some circuit design considerations, one pll may be located near another pll in the same chip, and thus the VCO in one pll may be interfered by Electromagnetic (EM) coupling from the VCO in another pll, and generally, a dual-path pll with a larger integral path gain Ki has a better electromagnetic suppression effect, but suffers from a problem of loop stability (loop stability) of the pll, so that when using a larger integral path gain Ki, a proper and stable ratio (Kp) between the control proportional path gain Kp and the integral path gain Ki needs to be maintained under the variation of process, voltage and temperature (temperature, PVT). Conventional dual-path vco designs employ two varactors (varactors) for the integrating and scaling paths, respectively, however, the size differences of the varactors can result in poor matching, and it is difficult to track the same dc bias under process, voltage and temperature variations. Thus, there is a need for an innovative voltage controlled oscillator design that can solve the above-mentioned problems.
Disclosure of Invention
It is therefore an object of the present application to provide a multi-path voltage controlled oscillator with the same varactor controlled by inputs from different paths (including an integrating path and one or more proportional paths) and related methods.
In one embodiment of the present application, a multi-path voltage controlled oscillator is provided. The multipath voltage controlled oscillator includes a voltage controlled oscillator core circuit and a control voltage generator circuit. The VCO core circuit includes a varactor having a control terminal for receiving a control voltage. The control voltage generator circuit is used for receiving at least one proportional path control input and one integral path control input, and generating and outputting the control voltage to the control endpoint of the varactor according to the at least one proportional path control input and the integral path control input.
In one embodiment of the present application, a method of setting a control voltage at a control terminal of a varactor included in a multi-path voltage controlled oscillator is provided. The method comprises the following steps: receiving at least one proportional path control input; receiving an integral path control input; and generating and outputting the control voltage to the control terminal of the varactor according to the at least one proportional path control input and the integral path control input.
The multipath voltage controlled oscillators disclosed in the present application share the same varactor between multiple paths (including an integrating path and one or more proportional paths), and can track the same dc bias voltage under manufacturing process, voltage and temperature variations and keep the damping factor of the pll stable for reducing electromagnetic coupling.
Drawings
The application may be more completely understood in consideration of the following detailed description of embodiments in connection with the accompanying drawings, in which:
fig. 1 is a schematic diagram of a first multi-path vco design according to an embodiment of the present application.
Fig. 2 is a schematic circuit diagram of the proportional-path digital-to-analog converter shown in fig. 1 according to an embodiment of the application.
Fig. 3 is a waveform diagram of a clock signal generated by the signal generator circuit shown in fig. 1.
Fig. 4 is a schematic diagram of a second multi-path vco design according to an embodiment of the present application.
Fig. 5 is a schematic diagram of a third multi-path vco design according to an embodiment of the present application.
[ description of the symbols ]
100,400,500: multipath voltage controlled oscillator
102 Voltage controlled Oscillator core Circuit
104,404 control Voltage Generator Circuit
106,408_1,408_2,508_1,508_2: integrating-path digital-to-analog converter
108 proportional path digital-to-analog converter
110,410 signal generator circuit
112 switching circuit
Cvarp varactors
N: control endpoint
Vctrl control voltage
Vbias, DC bias voltage
VCO_N, VCO_P, output terminal
D_P, D_P1, D_P2 proportional path control input
V_P, V_P1, V_P2 proportional path control voltage
D_I integral path control input
V_I integral path control voltage
ckr, ckr': clock signal
TH <7:0>: switch control signal
A, R, time period
Detailed Description
Certain terms are used throughout the description and claims to refer to particular components. It will be appreciated by those of ordinary skill in the art that a manufacturer of hardware may refer to a same element by different names, and that the scope of the specification and claims does not identify differences in names as a way of distinguishing the elements, but rather differences in functions of the elements as a criterion of distinguishing. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Furthermore, the terms "couple" or "couple" herein include any direct and indirect electrical connection, and thus, if a first device couples to a second device, that connection may be made directly to the second device, or indirectly to the second device via other devices and connections.
FIG. 1 is a schematic diagram of a first multi-path VCO in accordance with one embodiment of the present application. In the present embodiment, the multi-path vco 100 may be used in an all-digital phase-locked loop (ADPLL) circuit, however, this is only for illustration, and not for limitation, and in fact any application using the multi-path vco 100 disclosed in the present application falls within the scope of the present application. The multi-path voltage controlled oscillator 100 includes a voltage controlled oscillator core circuit 102 and a control voltage generator circuit 104. The vco core 102 may be implemented as an lc oscillator including a varactor (varactor) cvrp having a control terminal N for receiving a control voltage Vctrl. The varactor cvapr is coupled between the output terminal vco_p and the output terminal vco_n of the lc VCO and is biased by a dc bias voltage Vbias. Note that only the components related to the present application are shown in fig. 1, and in fact, the vco core 102 may further include other components (e.g., inductors, capacitors, and transistors) to perform its specified functions.
The control voltage generator circuit 104 is configured to receive a proportional path (P-path) control input d_p and an integral path (I-path) control input d_i, and generate and output a control voltage Vctrl to a control terminal N of the varactor cvrp according to the proportional path control input d_p and the integral path control input d_i, wherein each of the proportional path control input d_p and the integral path control input d_i may be digital signals. As shown in fig. 1, the control voltage generator circuit 104 includes an integrated path digital-to-analog converter 106, a proportional path digital-to-analog converter 108, a signal generator circuit 110, and a switch circuit 112.
The integrating-path digital-to-analog converter 106 is configured to convert an integrating-path control input d_i (which is a digital-to-analog converter input of an integrating path) into an integrating-path control voltage v_i. The proportional path digital-to-analog converter 108 is configured to convert a proportional path control input d_p (which is a proportional path digital-to-analog converter input) to a proportional path control voltage v_p. The proportional-path digital-to-analog converter 108 may be implemented by a capacitor-type digital-to-analog converter (C-DAC) or a resistor-type digital-to-analog converter (R-DAC) according to practical design considerations, and the integrating-path digital-to-analog converter 106 may be implemented by a capacitor-type digital-to-analog converter or a resistor-type digital-to-analog converter according to practical design considerations.
In this embodiment, the proportional path control voltage v_p and the integral path control voltage v_i both participate in setting the control voltage Vctrl on the control terminal N of the varactor cvaprp, in other words, the same varactor cvaprp is shared by the integral path and the proportional path. For the purpose of sharing the same varactor cvatrp between the integrating and proportional paths, the control voltage Vctrl is set by time-division multiplexing (time-division multiplexing) of the proportional and integrating path control voltages v_p and v_i, specifically, the signal generator circuit 110 is used to manage time-division multiplexing of the proportional and integrating path control voltages v_p and v_i, in this embodiment, the proportional and integrating path digital-to-analog converters 108 may be implemented by capacitive and digital-to-analog converters, and the integrating and digital-to-analog converters 106 may be implemented by resistive and digital-to-analog converters, so that the switching circuit 112 is coupled between the integrating and digital-to-analog converters (which are resistive and digital-to-analog converters) 106 and the control terminal N of the varactor cvrp, and the proportional and analog-to-digital converters (which are capacitive and digital-analog converters) 108 may not be implemented by any switching circuit due to their inherent characteristics, however, the present application does not require any additional switching circuit between the capacitive and digital-to analog-to-digital converters 108 and the control terminal N of the varactor cvrp. The signal generator circuit 110 generates a clock signal ckr' with a short pulse (i.e., a short off-period) to control the enabling (enabling) of the proportional-path digital-to-analog converter 108, and generates a clock signal ckr with a long pulse (i.e., a long on-period) to control the on/off state (on/off status) of the switching circuit 112.
Please refer to fig. 2 and fig. 3 together. Fig. 2 is a schematic circuit diagram of the proportional-path digital-to-analog converter 108 of fig. 1 according to an embodiment of the application. Fig. 3 is a schematic waveform diagram of the clock signal ckr generated by the signal generator circuit 110 shown in fig. 1. Since the proportional-path digital-to-analog converter 108 is implemented by a capacitive-to-analog converter (which occupies a small chip area and can operate at high speed without buffering), the signal generator circuit 110 generates the plurality of switch control signals TH <7:0> according to the proportional-path control input d_p and the reference clock signal clk, and in this embodiment, the clock signal ckr 'received by the proportional-path digital-to-analog converter 108 (which is the capacitive-to-analog converter) may be an inverted version of the clock signal ckr, i.e., ckr' = (ckr) -. Therefore, during each period a (i.e., each off period of the clock signal ckr), the switching circuit 112 is turned off (switched off) to prohibit the integrated path control voltage v_i from being transmitted to the control terminal N of the varactor cvrp, and the proportional path digital-to-analog converter 108 is operated to drive the control terminal N of the varactor cvrp with the proportional path control voltage v_p. In each period R (i.e., each on period of the clock signal ckr), the switch circuit 112 is turned on (switched on) to allow the integrating-path digital-to-analog converter 106 to drive the control terminal N of the varactor cvrp with the integrating-path control voltage v_i, and the proportional-path digital-to-analog converter 108 is reset (reset). By properly setting the two clock signals ckr, ckr', the control voltage Vctrl can be set by time-division multiplexing of the proportional path control voltage v_p and the integral path control voltage v_i, in other words, the control voltage Vctrl is jointly controlled by the proportional path control voltage v_p and the integral path control voltage v_i by time-division multiplexing.
It should be noted that the circuit architecture of the control voltage generator circuit 104 shown in fig. 1 is only for illustration, and is not a limitation of the present application, for example, the number of switch circuits used in the control voltage generator circuit 104 may depend on the digital-to-analog converter architecture of the proportional-path digital-to-analog converter 108 and the integral-path digital-to-analog converter 106. In a first design variation where both the proportional path digital-to-analog converter 108 and the integral path digital-to-analog converter 106 are implemented using capacitive digital-to-analog converters, the switching circuit 112 shown in fig. 1 may be omitted. In a second design variation in which both the proportional-path digital-to-analog converter 108 and the integral-path digital-to-analog converter 106 are implemented using resistive-type digital-to-analog converters, an additional switching circuit is required between the control terminals N of the proportional-path digital-to-analog converter 108 and the varactor cvrp. In a third design variation in which the proportional path dac 108 is implemented with a resistive dac and the integral path dac 106 is implemented with a capacitive dac, an additional switching circuit is required between the proportional path dac 108 and the control terminal N of the varactor Cvarp, and the switching circuit 112 shown in fig. 1 may be omitted.
The multi-path vco 100 shown in fig. 1 is a dual-path vco that operates in response to a proportional path control input d_p and an integral path control input d_i, however, this is for exemplary purposes only and not as a limitation of the present application, and in a design variation, the disclosed multi-path vco may operate in response to multiple proportional path control inputs and an integral path control input.
Fig. 4 is a schematic diagram of a second multi-path vco design according to an embodiment of the present application. In the present embodiment, the multi-path vco 400 can be used in an all-digital pll circuit, however, this is for illustration only and not for limitation of the present application, and in fact any application using the disclosed multi-path vco 400 falls within the scope of the present application. The primary difference between the multi-path voltage controlled oscillator 100 and the multi-path voltage controlled oscillator 400 is that the control voltage generator circuit 404 has a plurality of proportional path digital-to-analog converters 408_1, 408_2. The control voltage generator circuit 404 is configured to receive a plurality of proportional path control inputs d_p1, d_p2 and an integral path control input d_i, and generate and output a control voltage Vctrl to a control terminal N of the varactor cvrp according to the proportional path control inputs d_p1, d_p2 and the integral path control input d_i, for example, one of the proportional path control inputs d_p1, d_p2 may be a phase-locked loop control input, and the other of the proportional path control inputs d_p1, d_p2 may be a clock and data recovery (clock and data recovery, CDR) control input.
The proportional-path digital-to-analog converter 408_1 is configured to convert a proportional-path control input d_p1 (which is a digital-to-analog converter input of a proportional path) into a proportional-path control voltage v_p1. The proportional-path digital-to-analog converter 408_2 is configured to convert the proportional-path control input d_p2 (which is a digital-to-analog converter input of another proportional path) into the proportional-path control voltage v_p2. The proportional-path digital-to-analog converter 408_1 may be implemented as a capacitive digital-to-analog converter or a resistive digital-to-analog converter according to actual design requirements. The proportional-path digital-to-analog converter 408_2 may be implemented as a capacitive digital-to-analog converter or a resistive digital-to-analog converter according to the actual design requirements.
In this embodiment, the proportional path control voltages v_p1, v_p2 and the integral path control voltage v_i are all involved in setting the control voltage Vctrl on the control terminal N of the varactor cvaprp, in other words, the same varactor cvaprp is shared by one integral path and multiple proportional paths, and the control voltage Vctrl is set by time-division multiplexing of the proportional path control voltages v_p1, v_p2 and the integral path control voltage v_i for the purpose of sharing the same varactor cvaprp between one integral path and multiple proportional paths. Like the signal generator circuit 110 shown in fig. 1, the signal generator circuit 410 is configured to manage the time division multiplexing of the proportional path control voltages v_p1 and v_p2 and the integral path control voltage v_i, in this embodiment, the proportional path digital-to-analog converters 408_1 and 408_2 can be implemented as capacitive digital-to-analog converters, and the integral path digital-to-analog converter 106 can be implemented as resistive digital-to-analog converters. The signal generator circuit 410 generates a clock signal ckr' with a short pulse (i.e., a short on period) to control the enabling of the proportional-path digital-to-analog converter 408_1, generates a clock signal ckr″ with a short pulse (i.e., a short on period) to control the enabling of the proportional-path digital-to-analog converter 408_2, and generates a clock signal ckr with a long pulse (i.e., a long on period) to control the on/off state of the switch circuit 112. As shown in fig. 4, the pulse timing of the clock signal clk 'is different from the pulse timing of the clock signal clk ", and the clock signal clk may be the exclusive-or (XOR) result of the clock signal clk' and the clock signal clk". Since details regarding the time-division multiplexing between the proportional path control voltages v_p1, v_p2 and the integral path control voltage v_i should be easily understood by those skilled in the art after reading the above paragraphs, further description is omitted here for brevity.
Fig. 5 is a schematic diagram of a third multi-path vco design according to an embodiment of the present application. In the present embodiment, the multi-path voltage controlled oscillator 500 can be used in an all-digital phase-locked loop circuit, however, this is for illustration only and not for limitation of the present application, and in fact any application using the disclosed multi-path voltage controlled oscillator 500 falls within the scope of the present application. The primary difference between the multi-path voltage-controlled oscillator 400 and the multi-path voltage-controlled oscillator 500 is that the proportional-path digital-to-analog converters 508_1 and 508_2 share the same clock signal ckr' (which may be an inverted version of the clock signal ckr). Since details regarding the time-division multiplexing between the proportional path control voltages v_p1, v_p2 and the integral path control voltage v_i should be easily understood by those skilled in the art after reading the above paragraphs, further description is omitted here for brevity.
In summary, the multi-path VCO disclosed in the present application shares the same varactor between multiple paths (including an integrating path and one or more proportional paths), and tracks the same DC bias voltage under manufacturing process, voltage and temperature variations and keeps the damping factor (damping factor) of the PLL stable for reducing electromagnetic coupling.
The foregoing description is only of the preferred embodiments of the application, and all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (20)
1. A multi-path voltage controlled oscillator, comprising:
a voltage controlled oscillator core circuit comprising:
a varactor having a control terminal for receiving a control voltage; and
a control voltage generator circuit for receiving at least one proportional path control input and one integral path control input, and generating and outputting the control voltage to the control terminal of the varactor according to the at least one proportional path control input and the integral path control input.
2. The multi-path voltage controlled oscillator of claim 1 wherein the at least one proportional path control input comprises a phase locked loop control input and a clock and data recovery control input.
3. The multi-path voltage controlled oscillator of claim 1, wherein the control voltage generator circuit comprises:
at least one proportional path digital-to-analog converter for converting the at least one proportional path control input to at least one proportional path control voltage; and
an integrating path digital-to-analog converter for converting the integrating path control input into an integrating path control voltage;
wherein the at least one proportional path control voltage and the integral path control voltage both participate in setting the control voltage on the control terminal of the varactor.
4. The multi-path voltage controlled oscillator of claim 3, wherein the control voltage generator circuit further comprises:
a signal generator circuit for managing the time-division multiplexing of the at least one proportional path control voltage and the integral path control voltage such that the control voltage is set by the time-division multiplexing of the at least one proportional path control voltage and the integral path control voltage.
5. The multi-path voltage controlled oscillator of claim 3, wherein each of the at least one proportional path digital-to-analog converter is a capacitive digital-to-analog converter.
6. The multi-path voltage controlled oscillator of claim 3 wherein the integrating-path digital-to-analog converter is a capacitive digital-to-analog converter.
7. The multi-path voltage controlled oscillator of claim 3, wherein each of the at least one proportional-path digital-to-analog converter is a resistive digital-to-analog converter.
8. The multi-path voltage controlled oscillator of claim 3 wherein the integrating-path digital-to-analog converter is a resistive digital-to-analog converter.
9. The multi-path voltage controlled oscillator of claim 3, wherein the control voltage generator circuit further comprises:
a switching circuit is coupled between the at least one proportional path digital-to-analog converter and the control terminal of the varactor.
10. The multi-path voltage controlled oscillator of claim 3, wherein the control voltage generator circuit further comprises:
a switch circuit is coupled between the integrating-path digital-to-analog converter and the control terminal of the varactor.
11. A method of setting a control voltage at a control terminal of a varactor included in a multi-path voltage controlled oscillator, comprising:
receiving at least one proportional path control input;
receiving an integral path control input; and
generating and outputting the control voltage to the control terminal of the varactor according to the at least one proportional path control input and the integral path control input.
12. The method of claim 11, wherein the at least one proportional path control input comprises a phase locked loop control input and a clock and data recovery control input.
13. The method of claim 11, wherein the step of generating and outputting the control voltage to the control terminal of the varactor in accordance with the at least one proportional path control input and the integral path control input comprises:
performing at least one proportional path digital-to-analog operation on the at least one proportional path control input to generate at least one proportional path control voltage; and
performing an integrating path digital-to-analog conversion operation on the integrating path control input to generate an integrating path control voltage;
wherein the at least one proportional path control voltage and the integral path control voltage both participate in setting the control voltage on the control terminal of the varactor.
14. The method of claim 13, wherein the step of generating and outputting the control voltage to the control terminal of the varactor in accordance with the at least one proportional path control input and the integral path control input further comprises:
the control voltage is set by time-division multiplexing of the at least one proportional path control voltage and the integral path control voltage.
15. The method of claim 13, wherein each of the at least one proportional path digital-to-analog conversion operations is performed using a capacitive digital-to-analog converter.
16. The method of claim 13, wherein the integrating-path digital-to-analog conversion operation is performed by a capacitive digital-to-analog converter.
17. The method of claim 13, wherein each of the at least one proportional-path digital-to-analog conversion operations is performed by a resistive digital-to-analog converter.
18. The method of claim 13, wherein the integrating-path digital-to-analog conversion operation is performed by a resistive digital-to-analog converter.
19. The method of claim 13, wherein the step of generating and outputting the control voltage to the control terminal of the varactor in accordance with the at least one proportional path control input and the integral path control input further comprises:
selectively delivering the at least one proportional path control voltage to the control terminal of the varactor.
20. The method of claim 13, wherein the step of generating and outputting the control voltage to the control terminal of the varactor in accordance with the at least one proportional path control input and the integral path control input further comprises:
selectively delivering the integral path control voltage to the control terminal of the varactor.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US63/351,915 | 2022-06-14 | ||
| US18/203,671 | 2023-05-31 | ||
| US18/203,671 US20230403015A1 (en) | 2022-06-14 | 2023-05-31 | Multi-path voltage-controlled oscillator with same varactor controlled by inputs from different paths and associated method |
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