CN117240272A - Capacitor charging type driving circuit and method for inhibiting oscillation of hysteresis comparator - Google Patents
Capacitor charging type driving circuit and method for inhibiting oscillation of hysteresis comparator Download PDFInfo
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- CN117240272A CN117240272A CN202210642296.1A CN202210642296A CN117240272A CN 117240272 A CN117240272 A CN 117240272A CN 202210642296 A CN202210642296 A CN 202210642296A CN 117240272 A CN117240272 A CN 117240272A
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- 230000010355 oscillation Effects 0.000 title claims abstract description 33
- 238000000034 method Methods 0.000 title claims abstract description 10
- 230000002401 inhibitory effect Effects 0.000 title description 6
- 230000000452 restraining effect Effects 0.000 claims abstract 3
- 238000007599 discharging Methods 0.000 claims description 8
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- 238000010586 diagram Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 2
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Abstract
A capacitor charging type driving circuit and method for restraining oscillation of hysteresis comparator is characterized in that: the circuit comprises a driving unit and a charging time control unit; the driving unit drives the switching tube M1 to be turned on or off based on the output voltage of the hysteresis comparator, so as to control the charge and discharge states of the capacitor and the charge state of the load at the rear stage; the charging time control unit is connected with the driving unit and is used for controlling the switching tube M1 to keep a conducting state in a delay time when the output level of the hysteresis comparator is low. The circuit has the advantages of simple structure, fewer elements, fewer parameter choices of the preset delay time and the reference voltage, and good circuit output effect.
Description
Technical Field
The present application relates to the field of integrated circuits, and more particularly, to a capacitive charging type driving circuit and method for suppressing oscillation of a hysteresis comparator.
Background
Currently, in order to suppress excessive discharge in the process of supplying power to a load at a later stage, a drive circuit is generally provided with an over-discharge protection unit, and after a possible over-discharge occurs in the circuit, a drive tube for discharge is rapidly turned off. Generally, the over-discharge protection unit in the prior art adopts a hysteresis comparator to compare the magnitude of the driving voltage, and implements a protection function when the driving voltage is too large.
However, since the hysteresis comparator typically uses two different reference voltages at the same time, switching back and forth between high and low levels is achieved. It should be noted that if the difference between the two reference voltages is too high, the circuit may be difficult to apply to a low-voltage chip or a low-voltage integrated circuit, or the power supply of the driving capacitor in the driving circuit may not be sufficiently realized. If the difference between the two reference voltages is too small, when the load is high and the output current of the driving tube is large, the hysteresis comparator is more likely to generate frequent state switching and even oscillation between the two reference voltages.
When the circuit oscillates, the actual charging time in the same period is shorter than the expected charging time, which makes it difficult to charge the driving capacitor in the circuit according to the charge amount in the circuit design. When the capacity of the capacitor is insufficient, the latter load may not be driven to fully operate in the actual discharging process.
In order to solve this problem, in the background art document CN212381445U, an LED driving circuit is provided, and an enable signal generating module is connected to the output end of the mode control module, and is controlled by an LED switch control signal when the LED driving circuit operates in a normal driving mode, and the driving control module is turned off to stop power supply when the LED driving circuit operates in an overdischarge protection mode. However, the circuit needs to reasonably relate to the values of three reference voltages, and meanwhile, the use of components such as an operational amplifier, a charge pump and the like is increased, so that the circuit structure is complex, and the application scene is few.
In view of the above, the present application provides a new capacitive charging driving circuit for suppressing oscillation of a hysteresis comparator.
Disclosure of Invention
In order to solve the defects existing in the prior art, the application aims to provide a capacitor charging type driving circuit for inhibiting oscillation of a hysteresis comparator, which prolongs the conduction of a switching tube and the charging of a driving capacitor based on a preset delay time by adding a charging time control unit.
The application adopts the following technical scheme.
The first aspect of the present application relates to a capacitive charging type driving circuit for suppressing oscillation of a hysteresis comparator, wherein the circuit comprises a driving unit and a charging time control unit; the driving unit drives the switching tube M1 to be turned on or off based on the output voltage of the hysteresis comparator, so as to control the charge and discharge states of the capacitor and the charge state of the latter-stage load; and the charging time control unit is connected with the driving unit and is used for controlling the switching tube M1 to keep a conducting state in the delay time when the output level of the hysteresis comparator is low.
Preferably, the charging time control unit comprises an or gate, a delay unit, an NOT gate and an AND gate; the first input end of the OR gate is connected with the output end of the hysteresis comparator, and the output end is respectively connected with the input end of the delay unit, the first input end of the AND gate and the grid electrode of the switching tube M1; the output end of the delay unit is connected with the second input end of the AND gate after passing through the NOT gate, and the output end of the AND gate is connected with the second input end of the OR gate.
Preferably, the driving unit comprises the hysteresis comparator, a switching tube M1, a driving resistor R and a driving capacitor C; the first positive input end of the hysteresis comparator is connected with a first reference voltage Vref1, the second positive input end of the hysteresis comparator is connected with a second reference voltage Vref2, and the negative input end of the hysteresis comparator is connected with the source electrode of the switch tube M1 and one end of the driving resistor R; the drain electrode of the switching tube M1 is connected with a power supply, the other end of the driving resistor R is used as a load output end, and the other end of the driving resistor R is grounded after passing through the driving capacitor C.
Preferably, the first reference voltage Vref1 is greater than the second reference voltage Vref2; when the output voltage of the hysteresis comparator is in a low level state, the reference voltage of the hysteresis comparator is the first reference voltage Vref1, and when the output voltage is in a high level state, the reference voltage of the hysteresis comparator is the second reference voltage Vref2.
Preferably, when the circuit is in a power-on state, the driving capacitor C is in a charging state before the negative phase input end voltage of the hysteresis comparator gradually rises to the first reference voltage Vref 1; the output voltage of the hysteresis comparator is in a high level state.
Preferably, when the voltage of the negative phase input end of the hysteresis comparator rises to the first reference voltage Vref1, the output voltage of the hysteresis comparator is switched to a low level state, and the driving capacitor is continuously charged in a delay stage after the output of the hysteresis comparator is switched to the low level; after the delay period is over, the switching tube M1 is turned off, and the driving capacitor is switched to a discharging state.
Preferably, when the driving capacitor is in a discharging state, the switching tube M1 is turned off before the negative phase input end voltage of the hysteresis comparator gradually decreases to the second reference voltage Vref2; when the negative phase input end voltage of the hysteresis comparator is reduced to the second reference voltage Vref2, the output voltage of the hysteresis comparator is switched to a high level state, and the switch tube M1 is immediately conducted.
Preferably, the preset delay time of the delay unit is determined based on the charging speed of the driving capacitor.
Preferably, the preset delay timeWherein C is the capacitance of the driving capacitor, and I is the drain-source current when the switching tube M1 is conducted.
The second aspect of the present application relates to a capacitive charging driving method for suppressing oscillation of a hysteresis comparator, which is implemented based on the capacitive charging driving circuit for suppressing oscillation of the hysteresis comparator described in the first aspect of the present application.
Compared with the prior art, the capacitor charging type driving circuit for inhibiting the oscillation of the hysteresis comparator has the advantages that the charging time control unit is added, so that the conduction of the switching tube and the charging of the driving capacitor are prolonged based on the preset delay time, the oscillation of the hysteresis comparator is inhibited, and the stability of the driving circuit for supplying energy to a later-stage load is ensured. The circuit has the advantages of simple structure, fewer elements, fewer parameter choices of the preset delay time and the reference voltage, and good circuit output effect.
Drawings
FIG. 1 is a schematic diagram of a capacitor charging type driving circuit according to the prior art;
fig. 2 is a schematic diagram of a capacitive charging driving circuit for suppressing oscillation of a hysteresis comparator according to the present application.
Detailed Description
The application is further described below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present application, and are not intended to limit the scope of the present application.
Fig. 1 is a schematic diagram of a capacitor charging type driving circuit in the prior art. As shown in fig. 1, in the driving circuit commonly used in the prior art, a hysteresis comparator is added to protect over-discharge. The hysteresis comparator is usually located at the output end of the driving switch tube M1, in the present application, the source electrode of the driving switch tube M1 receives the output voltage of the driving switch tube M1, and then compares the output voltage with the reference voltage to generate a feedback signal to drive the gate electrode of the driving switch tube M1 to be turned on or turned off.
In addition, in the application, the driving resistor R and the driving capacitor C are added in consideration of stable power supply of the load at the later stage. One end of the driving resistor R and one end of the driving capacitor C are connected in series and then connected to the output end of the switching tube, and the other end of the driving resistor R and one end of the driving capacitor C are grounded. When the capacitor is charged, the power supply to the rear-stage load is interrupted, and when the capacitor is discharged, the rear-stage load receives the power supply to the capacitor.
The working mode of the circuit is analyzed, when the chip is electrified, the B electric voltage in the circuit is 0, and the D electric voltage at the output end of the hysteresis comparator is in a high level state at the moment, so that the switching tube M1 is conducted, the charging current I charges the capacitor C through the resistor, and the voltage value of the polar plate on the capacitor C is gradually increased.
When the B electric voltage gradually rises to the first reference voltage Vref1, the voltage at the output end of the hysteresis comparator is turned over and is changed from a high level state to a low level state, at this time, the switching tube M1 is turned off, and no current exists on the B point and the driving resistor R, so that no voltage drop exists at the two ends of the driving resistor R. At this time, along with the gradual discharging action of the driving capacitor C, the voltage at the point B gradually decreases, and when the voltage at the point B gradually decreases to the second reference voltage Vref2, the signal at the output end of the hysteresis comparator completes the inversion again, and the output of the hysteresis comparator changes from the low level to the high level state, so that the driving capacitor charges again after the switching tube M1 is turned on.
When the circuit enters a stable state, the voltage at the point B can realize a round trip between the first reference voltage Vref1 and the second reference voltage Vref2. Therefore, if the voltage difference between the two reference voltages Vref1 and Vref2 is small, the switching transistor M1 continuously switches between the on state and the off state rapidly, so that it is difficult for the MOS transistor to maintain a stable working state, and even oscillate.
In the prior art, in order to prevent the oscillation of the circuit, the increase of the switching time of the on and off states of the switching transistor M1 is generally achieved by increasing the difference between the two reference voltages. However, the effectiveness of this approach is limited. For example, when the driving circuit is applied to a low-voltage chip, the value of the power supply voltage itself is low, and thus, the difference between the first reference voltage and the second reference voltage cannot be increased beyond the power supply voltage. On the other hand, in order to enable the driving capacitance to be sufficiently charged and maintained in a state where it is not excessively discharged, the value of the lower reference voltage cannot be very low.
In order to solve the problem, the application provides a novel capacitor charging type driving circuit for inhibiting oscillation of a hysteresis comparator.
Fig. 2 is a schematic diagram of a capacitive charging driving circuit for suppressing oscillation of a hysteresis comparator according to the present application. As shown in fig. 2, a capacitive charging type driving circuit for suppressing oscillation of a hysteresis comparator, wherein the circuit comprises a driving unit and a charging time control unit; the driving unit drives the switching tube M1 to be turned on or off based on the output voltage of the hysteresis comparator, so as to control the charge and discharge states of the capacitor and the charge state of the latter-stage load; and the charging time control unit is connected with the driving unit and is used for controlling the switching tube M1 to keep a conducting state in the delay time when the output level of the hysteresis comparator is low.
The design idea of the circuit is that after the output level of the hysteresis comparator is switched from a high level state to a low level state, the switching tube is controlled to be still in a conducting state within a certain preset delay time. In this way, the circuit in the application increases the on time of the switching tube to a certain extent, reduces the off time of the switching tube, in other words, prolongs the charging time of the driving capacitor, and reduces the time of the driving capacitor for supplying power to the subsequent load.
Preferably, the charging time control unit comprises an or gate, a delay unit, an NOT gate and an AND gate; the first input end of the OR gate is connected with the output end of the hysteresis comparator, and the output end is respectively connected with the input end of the delay unit, the first input end of the AND gate and the grid electrode of the switching tube M1; the output end of the delay unit is connected with the second input end of the AND gate after passing through the NOT gate, and the output end of the AND gate is connected with the second input end of the OR gate.
The charging time control unit is essentially a logic control circuit, and is used for delaying the jump of the grid voltage of the switching tube M1 from high to low in the output of the hysteresis comparator within a certain delay time. In addition, the logic control circuit can also maintain the control logic of the original circuit in other time periods, so that the voltage of the output end of the hysteresis comparator controls the on or off state of the switching tube.
Preferably, the driving unit comprises a hysteresis comparator, a switching tube M1, a driving resistor R and a driving capacitor C; the first positive input end of the hysteresis comparator is connected with a first reference voltage Vref1, the second positive input end of the hysteresis comparator is connected with a second reference voltage Vref2, and the negative input end of the hysteresis comparator is connected with the source electrode of the switch tube M1 and one end of the driving resistor R; the drain electrode of the switching tube M1 is connected with a power supply, the other end of the driving resistor R is used as a load output end, and the other end of the driving resistor R is grounded after passing through the driving capacitor C.
In a second aspect of the application, hysteresis comparators, switching tubes, and drive resistors and capacitors are connected in a manner similar to that described in the prior art to prevent overdischarge of the circuit.
Preferably, the first reference voltage Vref1 is greater than the second reference voltage Vref2; when the output voltage of the hysteresis comparator is in a low level state, the reference voltage of the hysteresis comparator is the first reference voltage Vref1, and when the output voltage is in a high level state, the reference voltage of the hysteresis comparator is the second reference voltage Vref2.
In the application, the first reference voltage can be set to be higher than the second reference voltage, so that when the voltage of the negative phase input end of the hysteresis comparator is gradually increased to be higher than the first reference voltage, the output end of the hysteresis comparator is changed from high to low, and when the voltage of the negative phase input end is gradually reduced to be lower than the second reference voltage, the output end of the hysteresis comparator is changed from low to high.
Preferably, when the circuit is in a power-on state, the driving capacitor C is in a charging state before the negative phase input end voltage of the hysteresis comparator gradually rises to the first reference voltage Vref 1; the output voltage of the hysteresis comparator is in a high level state.
In the application, when the circuit is in a power-on state, the voltage of the negative phase input end of the hysteresis comparator can be gradually increased from zero. Before the output voltage of the hysteresis comparator gradually rises and the state of the output end voltage of the hysteresis comparator is not triggered to overturn, the output end voltage of the hysteresis comparator can be kept in a high-level state.
At this time, since the initial state of the output terminal of the delay unit is low, the first input terminal of the and gate is high, so that the or gate is output in a high state. The state in which the or gate output voltage is high continues until the preset delay of the delay unit is over. The circuit will remain in this state until the voltage at point B in the circuit rises to be equal to the first reference voltage Vref 1. At this time, the voltage drop across the resistor is I R, and the voltage on the upper plate of the capacitor is V b -I*R。
Preferably, when the voltage of the negative phase input end of the hysteresis comparator rises to the first reference voltage Vref1, the output voltage of the hysteresis comparator is switched to a low level state, and the driving capacitor is continuously charged in a delay stage after the output of the hysteresis comparator is switched to the low level; after the delay period is over, the switching tube M1 is turned off, and the driving capacitor is switched to a discharging state.
Specifically, after a preset delay, the output terminal of the delay unit is flipped, so that the voltage at the H point in the circuit is changed from a high level to a low level. If the voltage at the point B is not increased to the first reference voltage Vref1, the voltage at the point D at the output end of the hysteresis comparator is not inverted and is still kept in a high level state. If the voltage at point B has risen to the first reference voltage Vref1 at this time, so that the voltage at point D is turned down, the voltage at point E will vary with the output voltage of the and gate. At this time, since the delay time has elapsed, the point F will rise with the high level of the point E, and the point H will be in a low level state, which makes the and gate output level also be in a low level, and the point E voltage will make the switching tube M1 off.
Preferably, when the driving capacitor is in a discharging state, the switching tube M1 is turned off before the negative phase input end voltage of the hysteresis comparator gradually decreases to the second reference voltage Vref2; when the negative phase input end voltage of the hysteresis comparator is reduced to the second reference voltage Vref2, the output voltage of the hysteresis comparator is switched to a high level state, and the switch tube M1 is immediately conducted.
With the switching tube M1 turned off, the driving capacitor starts to discharge and supply power to the subsequent load, in this case, the voltage at the point B gradually decreases, and before the voltage at the point B decreases to Vref2, the point D still remains in the low level state, and the state at the point E is fed back by the point Q. Since the voltage at the point E is always low, the point Q is also kept continuously in a low state.
And after the voltage of the point B in the circuit is reduced to Vref2, the voltage of the point D is turned high, so that the voltage of the point E is turned high, and the switching tube is turned on again, and at the moment, the voltage of the point E is controlled by the point D and is not influenced by a delay unit in the circuit.
Preferably, the preset delay time of the delay unit is determined based on the charging speed of the driving capacitor.
In the application, the preset delay time of the delay unit can be determined in advance based on the charging speed of the driving capacitor, so that the capacitor is ensured to be fully charged in a delayed time period, and the capacitor can be discharged to provide full electric energy for a later-stage load in a non-charging time period.
Preferably, the preset delay timeWherein C is the capacitance of the driving capacitor, and I is the drain-source current when the switching tube M1 is conducted.
In the application, the preset delay time is not longer than the time when the voltage of the point B rises or falls from one reference voltage to the other reference voltage, so long as oscillation in the circuit is not ensured.
The second aspect of the present application relates to a capacitive charging driving method for suppressing oscillation of a hysteresis comparator, which is implemented based on the capacitive charging driving circuit for suppressing oscillation of the hysteresis comparator described in the first aspect of the present application.
Compared with the prior art, the capacitor charging type driving circuit for inhibiting the oscillation of the hysteresis comparator has the advantages that the charging time control unit is added, so that the conduction of the switching tube and the charging of the driving capacitor are prolonged based on the preset delay time, the oscillation of the hysteresis comparator is inhibited, and the stability of the driving circuit for supplying energy to a later-stage load is ensured. The circuit has the advantages of simple structure, fewer elements, fewer parameter choices of the preset delay time and the reference voltage, and good circuit output effect.
While the applicant has described and illustrated the embodiments of the present application in detail with reference to the drawings, it should be understood by those skilled in the art that the above embodiments are only preferred embodiments of the present application, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present application, and not to limit the scope of the present application, but any improvements or modifications based on the spirit of the present application should fall within the scope of the present application.
Claims (10)
1. A capacitor charging type driving circuit for restraining oscillation of a hysteresis comparator is characterized in that:
the circuit comprises a driving unit and a charging time control unit; wherein,
the driving unit drives the switching tube M1 to be turned on or off based on the output voltage of the hysteresis comparator, so as to control the charge and discharge states of the capacitor and the charge state of the load at the later stage;
the charging time control unit is connected with the driving unit and is used for controlling the switching tube M1 to keep a conducting state in a delay time when the output level of the hysteresis comparator is low.
2. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 1, wherein:
the charging time control unit comprises an OR gate, a delay unit, an NOT gate and an AND gate;
the first input end of the OR gate is connected with the output end of the hysteresis comparator, and the output end of the OR gate is respectively connected with the input end of the delay unit, the first input end of the AND gate and the grid electrode of the switching tube M1;
the output end of the delay unit is connected with the second input end of the AND gate after passing through the NOT gate, and the output end of the AND gate is connected with the second input end of the OR gate.
3. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 2, wherein:
the driving unit comprises the hysteresis comparator, a switching tube M1, a driving resistor R and a driving capacitor C;
the first positive input end of the hysteresis comparator is connected with a first reference voltage Vref1, the second positive input end of the hysteresis comparator is connected with a second reference voltage Vref2, and the negative input end of the hysteresis comparator is connected with the source electrode of the switching tube M1 and one end of the driving resistor R;
the drain electrode of the switching tube M1 is connected with a power supply, the other end of the driving resistor R is used as a load output end, and the other end of the driving resistor R is grounded after passing through the driving capacitor C.
4. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 3, wherein:
the first reference voltage Vref1 is greater than the second reference voltage Vref2; and, in addition, the processing unit,
when the output voltage of the hysteresis comparator is in a low level state, the reference voltage of the hysteresis comparator is the first reference voltage Vref1, and when the output voltage is in a high level state, the reference voltage of the hysteresis comparator is the second reference voltage Vref2.
5. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 4, wherein:
when the circuit is in a power-on state, the driving capacitor C is in a charging state before the negative phase input end voltage of the hysteresis comparator is gradually increased to a first reference voltage Vref 1;
the output end voltage of the hysteresis comparator is in a high level state.
6. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 5, wherein:
when the voltage of the negative phase input end of the hysteresis comparator rises to a first reference voltage Vref1, the output voltage of the hysteresis comparator is switched to a low level state, and the driving capacitor is continuously charged in a delay stage after the output of the hysteresis comparator is switched to the low level;
and when the delay period is over, the switching tube M1 is turned off, and the driving capacitor is switched to a discharging state.
7. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 6, wherein:
when the driving capacitor is in a discharging state, the switching tube M1 is turned off before the negative phase input end voltage of the hysteresis comparator is gradually reduced to a second reference voltage Vref2;
when the negative phase input end voltage of the hysteresis comparator is reduced to the second reference voltage Vref2, the output voltage of the hysteresis comparator is switched to a high level state, and the switch tube M1 is immediately conducted.
8. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 7, wherein:
the preset delay time of the delay unit is determined based on the charging speed of the driving capacitor.
9. A capacitive charge-type driving circuit for suppressing oscillation of a hysteresis comparator as defined in claim 8, wherein:
the preset delay time
Wherein C is the capacitance of the driving capacitor, and I is the drain-source current when the switching tube M1 is turned on.
10. A capacitor charging type driving method for restraining oscillation of a hysteresis comparator is characterized in that:
the method is based on a capacitive charging drive circuit implementation as claimed in any one of claims 1-9, which suppresses oscillations of the hysteresis comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210642296.1A CN117240272A (en) | 2022-06-08 | 2022-06-08 | Capacitor charging type driving circuit and method for inhibiting oscillation of hysteresis comparator |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210642296.1A CN117240272A (en) | 2022-06-08 | 2022-06-08 | Capacitor charging type driving circuit and method for inhibiting oscillation of hysteresis comparator |
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| CN117240272A true CN117240272A (en) | 2023-12-15 |
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| CN202210642296.1A Pending CN117240272A (en) | 2022-06-08 | 2022-06-08 | Capacitor charging type driving circuit and method for inhibiting oscillation of hysteresis comparator |
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