CN117239376A - Topological structure, dual-passband filter and communication equipment - Google Patents
Topological structure, dual-passband filter and communication equipment Download PDFInfo
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Abstract
The embodiment of the application relates to the technical field of filters, in particular to a topological structure, a double-passband filter and communication equipment. Through the mode, the embodiment of the application can enable the dual-passband filter to have the characteristics of wide passband, small insertion loss, high selectivity, miniaturization and simple design.
Description
Technical Field
The embodiment of the application relates to the technical field of filters, in particular to a topological structure, a dual-passband filter and communication equipment.
Background
With the development of technology, the demands of digital applications are gradually increasing, so that the radio frequency receiving front end is developed to be compatible with different communication systems, and the microstrip dual passband filter is widely focused due to the advantages of low cost, small volume, low profile, light weight, easy integration and the like.
However, in carrying out the application, the inventors found that: the microstrip dual-passband filter on the market at present has the performance problem of poor selectivity, and the topological structure of the filter plays a decisive guiding role on the performance of the filter, so the performance of the filter can be optimized by improving the topological structure.
Disclosure of Invention
In view of the above, embodiments of the present application provide a topology that overcomes or at least partially solves the above-described problems.
According to an aspect of the embodiment of the present application, there is provided a topology structure, including an input end, an output end, a first parallel five line, a second parallel five line, a first microstrip line, a second microstrip line, a third microstrip line, a first short-circuit branch and a second short-circuit branch, wherein the first end of the first short-circuit branch and the first end of the second short-circuit branch are grounded, the first end of the first microstrip line is connected with the second end of the first short-circuit branch, the first end of the second microstrip line is connected with the second end of the second short-circuit branch, the second end of the first microstrip line, the second end of the second microstrip line and the first end of the third microstrip line are commonly connected, the first end of the first parallel five line is connected to the input end, the second end of the first parallel five line is connected to the second end of the third microstrip line, the first end of the second parallel five line is connected with the output end, and the second end of the second parallel five line is connected with the second end of the third microstrip line.
In some embodiments, the third microstrip line is used as an axis, the first parallel five lines and the second parallel five lines are symmetrically arranged, the input end and the output end are symmetrically arranged, the first microstrip line and the second microstrip line are symmetrically arranged, and the first short circuit branch and the second short circuit branch are symmetrically arranged. The topological structure is compact in space, and the miniaturization of the filter is facilitated.
In some embodiments, the first shorting stub, the second shorting stub, and the third microstrip line are parallel, the first shorting stub is perpendicular to the first microstrip line, the second shorting stub is perpendicular to the second microstrip line, the first parallel five line is perpendicular to the third microstrip line, and the second parallel five line is perpendicular to the third microstrip line. Thus, the performance of the filter is improved.
In some embodiments, the first parallel five lines include a first left transmission line, a second left transmission line, a third left transmission line, a fourth left transmission line, and a fifth left transmission line, the first left transmission line, the second left transmission line, the third left transmission line, the fourth left transmission line, and the fifth left transmission line are disposed at equal intervals in sequence, and the first left transmission line, the second left transmission line, the third left transmission line, the fourth left transmission line, and the fifth left transmission line are parallel. The first end of the first left transmission line, the first end of the third left transmission line and the first end of the fifth left transmission line are all connected to the input end, and the first end of the second left transmission line and the first end of the fourth left transmission line are all connected to one side of the second end of the third microstrip line.
In some embodiments, the second parallel five lines include a first right transmission line, a second right transmission line, a third right transmission line, a fourth right transmission line, and a fifth right transmission line, the first right transmission line, the second right transmission line, the third right transmission line, the fourth right transmission line, and the fifth right transmission line are disposed at equal intervals in sequence, and the first right transmission line, the second right transmission line, the third right transmission line, the fourth right transmission line, and the fifth right transmission line are parallel. The first end of the first right transmission line, the first end of the third right transmission line and the first end of the fifth right transmission line are all connected to the output end, and the first end of the second right transmission line and the first end of the fourth right transmission line are all connected to the other side of the second end of the third microstrip line.
In some embodiments, the topology satisfies: θ 1 +θ 3 +θ 4 ＝2*θ 6 ，θ 1 ＝θ 2 ，θ 4 ＝θ 5 ，θ 6 ＝θ 7 The θ is 1 For the electrical length of the first microstrip line, the θ 2 For the electrical length of the second microstrip line, said θ 3 For the electrical length of the third microstrip line, the θ 4 For the electrical length of the first short circuit branch, said θ 5 For the electrical length of the second short circuit branch, said θ 6 For the electrical length of the first parallel five lines, the θ 7 Is the electrical length of the second parallel five wires.
In some embodiments, the topology satisfies: z is Z 2 ＝Z 3 ＝2*Z 1 ＝Z 4 ＝Z 5 The Z is 1 For the characteristic impedance of the third microstrip line, the Z 2 Is the characteristic impedance of the first microstrip line, the Z 3 Is the characteristic impedance of the first short circuit branch, Z 4 Characteristic impedance of the second microstrip line, Z 5 Is the characteristic impedance of the second short circuit branch.
According to an aspect of an embodiment of the present application, there is provided a dual-passband filter including the topology described above.
In some embodiments, the electrical length of the first parallel five wire and the electrical length of the second parallel five wire are each a quarter wavelength corresponding to a center frequency of a stop band intermediate two pass bands of the dual-pass band filter.
According to an aspect of an embodiment of the present application, there is provided a communication device including the above-described dual-passband filter.
The embodiment of the application has the beneficial effects that: compared with the prior art, the topological structure, the dual-passband filter and the communication equipment provided by the embodiment of the application comprise an input end, an output end, a first parallel five line, a second parallel five line, a first microstrip line, a second microstrip line, a third microstrip line, a first short circuit branch and a second short circuit branch, wherein the third microstrip line is taken as an axis, the first parallel five line and the second parallel five line are symmetrically arranged, the first microstrip line and the second microstrip line are symmetrically arranged, and the first short circuit branch and the second short circuit branch are symmetrically arranged, so that the topological structure is compact and symmetrical in space, and is beneficial to miniaturization and simplified design.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a topology provided by an embodiment of the present application;
FIG. 2 is a schematic layout of a dual passband filter according to an embodiment of the present application;
fig. 3 is a diagram of S-parameter simulation results of a dual-passband filter according to an embodiment of the present application under a set of optimization parameters.
Reference numerals in the specific embodiments are as follows:
1000. a dual passband filter;
100. a topology; 200. an input end; 300. an output end;
10. a first parallel five lines; 20. a second parallel five lines; 30. a first microstrip line; 40. a second microstrip line; 50. a third microstrip line; 60. a first short circuit branch; 70. a second short circuit branch;
11. a first left transmission line; 12. a second left transmission line; 13. a third left transmission line; 14. a fourth left transmission line; 15. a fifth left transmission line;
21. a first right transmission line; 22. a second right transmission line; 23. a third right transmission line; 24. a fourth right transmission line; 25. and a fifth right transmission line.
Detailed Description
In order that the application may be readily understood, a more particular description thereof will be rendered by reference to specific embodiments that are illustrated in the appended drawings. It will be understood that when an element is referred to as being "fixed" to another element, it can be directly on the other element or one or more intervening elements may be present therebetween. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or one or more intervening elements may be present therebetween. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used in this specification includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1-2, the topology structure 100 includes an input end 200, an output end 300, a first parallel five line 10, a second parallel five line 20, a first microstrip line 30, a second microstrip line 40, a third microstrip line 50, a first short-circuit branch 60 and a second short-circuit branch 70, wherein the first end of the first short-circuit branch 60 and the first end of the second short-circuit branch 70 are grounded, the first end of the first microstrip line 30 is connected with the second end of the first short-circuit branch 60, the first end of the second microstrip line 40 is connected with the second end of the second short-circuit branch 70, the second end of the first microstrip line 30, the second end of the second microstrip line 40 and the first end of the third microstrip line 50 are commonly connected, the first end of the first parallel five line 10 is connected with the input end 200, the second end of the first parallel five line 10 is connected with the second end of the third microstrip line 50, the first end of the first parallel five line 20 is connected with the second end of the second parallel five line 20, and the second end of the second parallel five line 20 is connected with the second end of the third microstrip line 50. With the third microstrip line 50 as an axis, the first parallel five line 10 and the second parallel five line 20 are symmetrically arranged, the input end 200 and the output end 300 are symmetrically arranged, the first microstrip line 30 and the second microstrip line 40 are symmetrically arranged, and the first short-circuit branch 60 and the second short-circuit branch 70 are symmetrically arranged, so that the topological structure 100 has compact space and is beneficial to miniaturization. The first short-circuit branch 60, the second short-circuit branch 70 and the third microstrip line 50 are parallel, the first short-circuit branch 60 is perpendicular to the first microstrip line 30, the second short-circuit branch 70 is perpendicular to the second microstrip line 40, the first parallel five line 10 is perpendicular to the third microstrip line 50, and the second parallel five line 20 is perpendicular to the third microstrip line 50, which is beneficial to improving the performance of the topology structure 100.
The first parallel five lines 10 include a first left transmission line 11, a second left transmission line 12, a third left transmission line 13, a fourth left transmission line 14, and a fifth left transmission line 15, the first left transmission line 11, the second left transmission line 12, the third left transmission line 13, the fourth left transmission line 14, and the fifth left transmission line 15 are sequentially disposed at equal intervals, and the first left transmission line 11, the second left transmission line 12, the third left transmission line 13, the fourth left transmission line 14, and the fifth left transmission line 15 are parallel. The first end of the first left transmission line 11, the first end of the third left transmission line 13, and the first end of the fifth left transmission line 15 are all connected to the input end 200, and the first end of the second left transmission line 12 and the first end of the fourth left transmission line 14 are all connected to one side of the second end of the third microstrip line 50.
The second parallel five line 20 includes a first right transmission line 21, a second right transmission line 22, a third right transmission line 23, a fourth right transmission line 24, and a fifth right transmission line 25, the first right transmission line 21, the second right transmission line 22, the third right transmission line 23, the fourth right transmission line 24, and the fifth right transmission line 25 are sequentially disposed at equal intervals, and the first right transmission line 21, the second right transmission line 22, the third right transmission line 23, the fourth right transmission line 24, and the fifth right transmission line 25 are parallel. The first end of the first right transmission line 21, the first end of the third right transmission line 23 and the first end of the fifth right transmission line 25 are all connected to the output end 300, and the first end of the second right transmission line 22 and the first end of the fourth right transmission line 24 are all connected to the other side of the second end of the third microstrip line 50.
In some embodiments, the topology 100 satisfies the following conditions:
(1)θ 1 +θ 3 +θ 4 ＝2*θ 6 ，θ 1 ＝θ 2 ，θ 4 ＝θ 5 ，θ 6 ＝θ 7 the θ is 1 For the electrical length of the first microstrip line 30, the θ 2 For the electrical length of the second microstrip line 40, the θ 3 For the electrical length of the third microstrip line 50, the θ 4 For the electrical length of the first shorting stub 60, the θ 5 For the electrical length of the second shorting stub 70, the θ 6 For the electrical length of the first parallel five wire 10, the θ 7 Is the electrical length of the second parallel five wire 20.
(2)Z 2 ＝Z 3 ＝2*Z 1 ＝Z 4 ＝Z 5 The Z is 1 For the characteristic impedance of the third microstrip line 50, the Z 2 Is the characteristic impedance of the first microstrip line 30, the Z 3 Is the characteristic impedance of the first short stub 60, the Z 4 Characteristic impedance of the second microstrip line 40, Z 5 Is the characteristic impedance of the second shorting stub 70.
The present application also provides an embodiment of a dual-passband filter 1000, where the dual-passband filter 1000 includes the topology 100, and the dual-passband filter 1000 designed based on the topology 100 has the following relationship:
(1)W 1 ＝2*W 2 ＝2*W 3 . The W is 1 For the physical width of the third microstrip line 50, the W 2 Is the physical width of the first microstrip line 30, the W 3 Is the physical width of the first shorting stub 60.
(2) The electrical length of the first parallel five wire 10 and the electrical length of the second parallel five wire 20 are each a quarter wavelength corresponding to the center frequency of the stop band in the middle of the two pass bands of the dual-band filter 1000.
In some embodiments, the dual-passband filter 1000 is designed on a circuit board having a dielectric constant of 3.38, a dielectric loss of 0.0022, and a thickness of 0.813mm,the size of the circuit board is 32.4mm by 10.1mm, and it is understood that the dielectric constant, dielectric loss, thickness and size of the circuit board are not limited to the above values and can be adjusted according to the requirements. Assume that: l (L) P To form the physical length of the transmission line of the first parallel five line 10, S P To form the physical spacing, W, of adjacent transmission lines of said first parallel five line 10 P To form the physical width of the transmission line of the first parallel five line 10, L 1 L is the physical length of the third microstrip line 50 2 L is the physical length of the first microstrip line 30 3 Is the physical length of the first shorting stub 60.
From the common knowledge of microwaves, the synchronous equivalent change L P 、L 1 、L 2 And L 3 The operating frequency ranges of the two pass bands of the dual-band filter 1000 can be linearly adjusted inversely, so that there are and only three parameters affecting the performance of the dual-band filter 1000, respectively S P 、W P And W is 1 。
In some exemplary embodiments, one set of optimized dimensional parameters is: l (L) P ＝11.9mm，W P ＝0.1mm，S P ＝0.06mm，W 1 ＝2W 2 ＝2W 3 ＝4.0mm，L 1 ＝7.95mm，L 2 ＝11.6mm，L 3 =5.95 mm. As shown in fig. 3, the simulation result of the dual-passband filter 1000 designed by the above parameters shows that, in the first passband, the impedance bandwidth with the reflection coefficient smaller than-10 dB ranges from 1.318GHz to 2.536GHz, the passband center frequency is 1.927GHz, the passband absolute bandwidth is 1.218GHz, the passband relative bandwidth is 63.2%, and the in-band insertion loss is smaller than 0.56dB. In the second passband, the impedance bandwidth with the reflection coefficient smaller than-10 dB is in the range of 5.669GHz to 6.707GHz, the passband center frequency is 6.188GHz, the passband absolute bandwidth is 1.038GHz, the passband relative bandwidth is 16.8%, and the in-band insertion loss is smaller than 0.68dB. As can be seen from the simulation results, the dual-passband filter 1000 has not only a wide passband but also a small in-band insertion loss. In addition, two transmission poles are arranged in the first passband and are respectively positioned at 1.403GHz and 2.198GHz; within the second pass bandTwo transmission poles are located at 5.923GHz and 6.587GHz, respectively. These four transmission poles can ensure flatness within the passband. Within the stopband between the two passband, the stopband bandwidth with the isolation degree larger than 20dB is in the range of 3.732GHz to 4.308GHz, the center frequency of the stopband is 4.02GHz, the absolute bandwidth of the stopband is 0.576GHz, and the relative bandwidth of the stopband is 14.3%. Four transmission zeros are also located in the stop band at 0GHz, 4.003GHz, 4.218GHz and 7.684GHz, respectively. These four transmission zeroes ensure not only a high selectivity of the dual-passband filter 1000, but also a high isolation of the stopband. It will be appreciated that: said parameter L P 、S P 、W P 、W 1 、W 2 、W 3 、L 1 、L 2 And L 3 The present application is not limited to the above values, and may be adjusted as required.
In the embodiment of the present application, the topology structure 100 includes an input end 200, an output end 300, a first parallel five line 10, a second parallel five line 20, a first microstrip line 30, a second microstrip line 40, a third microstrip line 50, a first short-circuit branch 60 and a second short-circuit branch 70, and the third microstrip line 50 is taken as an axis, so that the first parallel five line 10 and the second parallel five line 20 are symmetrically arranged, the first microstrip line 30 and the second microstrip line 40 are symmetrically arranged, and the first short-circuit branch 60 and the second short-circuit branch 70 are symmetrically arranged, so that the topology structure 100 is compact in space and simple in structure, and is beneficial to miniaturization and simplification in design, and only the width of a transmission line forming the first parallel five line 10, the distance between adjacent transmission lines forming the first parallel five line 10 and the width of the third microstrip line 50 need to design, so that the dual-passband filter 1000 based on the topology structure 100 each has two transmission poles, is beneficial to the flatness inside the passband, the four-passband filter has the advantages of high insertion loss, and high passband filter 1000.
The present application also provides an embodiment of a communication device, where the communication device includes the dual-passband filter 1000, and the function and structure of the dual-passband filter 1000 may refer to the above embodiment, and will not be described in detail herein.
It should be noted that the description of the present application and the accompanying drawings illustrate preferred embodiments of the present application, but the present application may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, which are not to be construed as additional limitations of the application, but are provided for a more thorough understanding of the present application. The above-described features are further combined with each other to form various embodiments not listed above, and are considered to be the scope of the present application described in the specification; further, modifications and variations of the present application may be apparent to those skilled in the art in light of the foregoing teachings, and all such modifications and variations are intended to be included within the scope of this application as defined in the appended claims.
Claims (10)
1. A topology, comprising: the input end, the output end, the first parallel five lines, the second parallel five lines, the first microstrip line, the second microstrip line, the third microstrip line, the first short circuit branch and the second short circuit branch;
the first end of the first short circuit branch and the first end of the second short circuit branch are grounded, the first end of the first microstrip line is connected with the second end of the first short circuit branch, the first end of the second microstrip line is connected with the second end of the second short circuit branch, the second end of the first microstrip line, the second end of the second microstrip line and the first end of the third microstrip line are commonly connected, the first end of the first parallel five line is connected with the input end, the second end of the first parallel five line is connected with the second end of the third microstrip line, the first end of the second parallel five line is connected with the output end, and the second end of the second parallel five line is connected with the second end of the third microstrip line.
2. The topology of claim 1, wherein,
the third microstrip line is used as an axis, the first parallel five lines and the second parallel five lines are symmetrically arranged, the input end and the output end are symmetrically arranged, the first microstrip line and the second microstrip line are symmetrically arranged, and the first short circuit branch knot and the second short circuit branch knot are symmetrically arranged.
3. The topology of claim 2, wherein,
the first short circuit branch, the second short circuit branch and the third microstrip line are parallel, the first short circuit branch is perpendicular to the first microstrip line, the second short circuit branch is perpendicular to the second microstrip line, the first parallel five line is perpendicular to the third microstrip line, and the second parallel five line is perpendicular to the third microstrip line.
4. The topology of claim 3, wherein,
the first parallel five lines comprise a first left transmission line, a second left transmission line, a third left transmission line, a fourth left transmission line and a fifth left transmission line, the first left transmission line, the second left transmission line, the third left transmission line, the fourth left transmission line and the fifth left transmission line are sequentially arranged at equal intervals, and the first left transmission line, the second left transmission line, the third left transmission line, the fourth left transmission line and the fifth left transmission line are parallel;
the first end of the first left transmission line, the first end of the third left transmission line and the first end of the fifth left transmission line are all connected to the input end, and the first end of the second left transmission line and the first end of the fourth left transmission line are all connected to one side of the second end of the third microstrip line.
5. The topology of claim 3, wherein,
the second parallel five lines comprise a first right transmission line, a second right transmission line, a third right transmission line, a fourth right transmission line and a fifth right transmission line, the first right transmission line, the second right transmission line, the third right transmission line, the fourth right transmission line and the fifth right transmission line are sequentially arranged at equal intervals, and the first right transmission line, the second right transmission line, the third right transmission line, the fourth right transmission line and the fifth right transmission line are parallel;
the first end of the first right transmission line, the first end of the third right transmission line and the first end of the fifth right transmission line are all connected to the output end, and the first end of the second right transmission line and the first end of the fourth right transmission line are all connected to the other side of the second end of the third microstrip line.
6. The topology according to claim 1, characterized in that the topology satisfies: θ 1 +θ 3 +θ 4 ＝2*θ 6 ，θ 1 ＝θ 2 ，θ 4 ＝θ 5 ，θ 6 ＝θ 7
The theta is as follows 1 For the electrical length of the first microstrip line, θ 2 For the electrical length of the second microstrip line, said θ 3 For the electrical length of the third microstrip line, the θ 4 For the electrical length of the first short circuit branch, said θ 5 For the electrical length of the second short circuit branch, said θ 6 For the electrical length of the first parallel five lines, the θ 7 Is the electrical length of the second parallel five wires.
7. The topology according to claim 1, characterized in that the topology satisfies: z is Z 2 ＝Z 3 ＝2*Z 1 ＝Z 4 ＝Z 5
The Z is 1 For the characteristic impedance of the third microstrip line, the Z 2 Is the characteristic impedance of the first microstrip line, the Z 3 Is the characteristic impedance of the first short circuit branch, Z 4 Characteristic impedance of the second microstrip line, Z 5 Is the characteristic impedance of the second short circuit branch.
8. A dual passband filter comprising a topology as recited in any of claims 1-7.
9. The dual passband filter of claim 8, wherein,
the electrical length of the first parallel five wires and the electrical length of the second parallel five wires are each a quarter wavelength corresponding to the center frequency of the stop band in the middle of the two pass bands of the dual-pass band filter.
10. A communication device comprising a dual passband filter as claimed in any of claims 8 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202311136227.4A CN117239376A (en) | 2023-09-01 | 2023-09-01 | Topological structure, dual-passband filter and communication equipment |
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| CN202311136227.4A CN117239376A (en) | 2023-09-01 | 2023-09-01 | Topological structure, dual-passband filter and communication equipment |
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