CN117234321A - Clock virtualization method, device, operating system, equipment and storage medium - Google Patents

Abstract

The embodiment of the invention provides a clock virtualization method, a device, an operating system, equipment and a storage medium, wherein the method comprises the following steps: when a virtual machine accesses a clock space of a through physical device, the virtual machine is trapped in a hypervisor, an address segment of the clock space is stored in the hypervisor on a clock address table of the virtual machine, and the access at least comprises one of the following steps: starting a clock, closing the clock and reading clock information; when the clock address table of the virtual machine checks the clock address of the through physical device, the hypervisor accesses the corresponding space of the clock address, and feeds back the access result to the virtual machine. The virtual machine of the embodiment of the invention controls the on and off of the clock of the direct physical equipment according to the requirement, reduces the power consumption of the physical direct equipment and can acquire the clock information of any space size in time.

Description

Clock virtualization method, device, operating system, equipment and storage medium

Technical Field

The present invention relates to the field of operating systems, and in particular, to a clock virtualization method, apparatus, operating system, device, and storage medium.

Background

Currently, in the Type1 virtualization scheme, there are generally two methods for the virtualization of the clock clk:

in the method 1, the clock clk is completely controlled by the hypervisor, vm does not need to control the starting and the closing of any physical equipment clock clk, only the state of the clock clk is allowed to be read, writing is invalid, when the hypervisor starts initialization, all vm is started by default and the clock clk is required to be used, so that normal use of vm to the physical equipment can be realized, but power consumption is certainly increased, and the method is unreasonable in embedded equipment;

in the method 2, the clock clk is also a physical peripheral, an address space exists in the memory, and the read-write access to the address space is realized by controlling the on-off of the clock clk of a specific physical device, and the address space of the clock clk is distributed to vm according to the condition of the direct physical device owned by vm. In this way, vm can normally realize normal opening and closing of the owned physical device clock clk, however, in this method, the clock clk address space is allocated to vm, which depends on the attribute of the mmu page table, the minimum allocation unit is 4KB, if in a 4KB address space, the opening and closing of two physical device clocks clk can be controlled, but the two physical devices need to be allocated to different vm, and the hypervisor cannot realize the scene.

Disclosure of Invention

In view of this, the embodiments of the present invention provide a clock virtualization method, apparatus, operating system, device and storage medium. The technical scheme of the embodiment of the invention is used for clock access of the through physical equipment of each virtual machine of the Type1 virtualization system, the virtual machine controls the on and off of the clocks of the through physical equipment according to the requirements, so that the power consumption of the physical through equipment is reduced, clock information with any space size can be timely acquired, the limitation of space management granularity of an MMU is avoided, and the memory space occupied by the clock space is reduced.

In a first aspect, an embodiment of the present invention provides a clock virtualization method, including: when a virtual machine accesses a clock space of a through physical device, the virtual machine is trapped in a hypervisor, an address segment of the clock space is stored in the hypervisor on a clock address table of the virtual machine, and the access at least comprises one of the following steps: starting a clock, closing the clock and reading clock information; when the clock address table of the virtual machine checks the clock address of the through physical device, the hypervisor accesses the corresponding space of the clock address, and feeds back the access result to the virtual machine.

By the method, the virtual machine obtains and accesses the clock space of the direct physical equipment through the hypervisor according to the corresponding clock address table, so that the virtual machine can control the on and off of the clock of the direct physical equipment according to the requirements, the power consumption of the physical direct equipment is reduced, and the clock information of any space size can be obtained.

In a possible implementation manner of the first aspect, the clock virtualization method further includes: when the Hypervisor creates a virtual machine, the clock address table of the virtual machine stores the clock address field of the inquired through physical device of the virtual machine in the Hypervisor.

By the method, the clock address field of the through physical equipment of each virtual machine is stored in the clock address table of each virtual machine in the hypervisor, so that the clock space is avoided, the space management granularity of the MMU is not limited, and the memory space occupied by the clock space is reduced.

In a possible implementation manner of the first aspect, the clock address segment of each through physical device includes a base address segment and an offset address segment thereof.

By the above, the clock space address of the through physical device is obtained at the hypervisor through the base address segment and the offset address segment of the through physical device.

In a possible implementation manner of the first aspect, the clock virtualization method further includes: and when the clock address of the through physical device cannot be found in the clock address table of the virtual machine by the hypervisor, directly returning to the virtual machine.

By the method, when the clock address table of the virtual machine cannot find the clock address of the through physical device, the hypervisor directly returns to the virtual machine, so that forbidden access to the clock space of some through devices is realized.

In a possible implementation manner of the first aspect, the clock memory space of each through physical device is obtained according to the clock information size thereof.

By the method, the size of the clock space is obtained according to the clock information size of each through physical device, and the use efficiency of the memory space occupied by the clock space is improved.

In a possible implementation manner of the first aspect, the clock address table of each virtual machine is a clock address linked list.

By the method, quick searching is realized through the address linked list, and the space of the clock address table is reduced.

In a second aspect, an embodiment of the present invention provides a clock virtualization apparatus, including: the first clock access module is configured to, when a virtual machine accesses a clock space of a through physical device, trap the virtual machine into a hypervisor, where an address field of the clock space is stored in a clock address table of the virtual machine in the hypervisor, and the access at least includes one of the following: starting a clock, closing the clock and reading clock information; and the second clock access module is used for accessing the corresponding space of the clock address when the clock address table of the virtual machine detects the clock address of the direct physical equipment, and feeding back an access result to the virtual machine.

By the method, the virtual machine obtains and accesses the clock space of the direct physical equipment through the hypervisor according to the corresponding clock address table, so that the virtual machine can control the on and off of the clock of the direct physical equipment according to the requirements, the power consumption of the physical direct equipment is reduced, and the clock information of any space size can be obtained.

In a possible implementation manner of the second aspect, the clock virtualization apparatus further includes: and the clock address storage module is used for storing the clock address field of the inquired through physical equipment of the virtual machine in the clock address table of the virtual machine when the Hypervisor creates the virtual machine.

By the method, the clock address field of the through physical equipment of each virtual machine is stored in the clock address table of each virtual machine in the hypervisor, so that the clock space is avoided, the space management granularity of the MMU is not limited, and the memory space occupied by the clock space is reduced.

In one possible implementation manner of the second aspect, the clock address segment of each through physical device includes a base address segment and an offset address segment thereof.

By the above, the clock space address of the through physical device is obtained at the hypervisor through the base address segment and the offset address segment of the through physical device.

In a possible implementation manner of the second aspect, the second clock access module is further configured to directly return to the virtual machine when the clock address of the through physical device is not found in the clock address table of the virtual machine by the hypervisor.

By the method, when the clock address table of the virtual machine cannot find the clock address of the through physical device, the hypervisor directly returns to the virtual machine, so that forbidden access to the clock space of some through devices is realized.

In a possible implementation manner of the second aspect, the clock memory space of each through physical device is obtained according to the clock information size thereof.

By the method, the size of the clock space is obtained according to the clock information size of each through physical device, and the use efficiency of the memory space occupied by the clock space is improved.

In one possible implementation manner of the second aspect, the clock address table of each virtual machine is a clock address linked list.

By the method, quick searching is realized through the address linked list, and the space of the clock address table is reduced.

In a third aspect, an embodiment of the present invention provides an operating system configured to perform a method according to any embodiment of the first aspect.

In a fourth aspect, embodiments of the present invention provide a computing device comprising: a bus; a communication interface connected to the bus; at least one processor coupled to the bus; and at least one memory coupled to the bus and storing program instructions that, when executed by the at least one processor, cause the at least one processor to perform any of the embodiments of the first aspect of the invention.

In a fifth aspect, embodiments of the present invention provide a computer readable storage medium having stored thereon program instructions which when executed by a computer cause the computer to perform any of the embodiments of the first aspect of the present invention.

Drawings

FIG. 1 is a flowchart of a clock virtualization method according to an embodiment of the present invention;

FIG. 2 is a flowchart of a clock virtualization method according to a second embodiment of the present invention;

FIG. 3A is a schematic diagram of a virtualized system according to a third embodiment of a clock virtualization method of the present invention;

FIG. 3B is a flowchart illustrating a clock virtualization method according to a third embodiment of the present invention;

FIG. 4 is a schematic diagram of a clock virtualization apparatus according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a second embodiment of a clock virtualization apparatus according to the present invention;

FIG. 6 is a schematic diagram of a computing device embodiment of the present invention.

Detailed Description

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is to be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with one another without conflict.

In the following description, references to the terms "first/second/third, etc." or module a, module B, module C, etc. are used merely to distinguish between similar objects or between different embodiments, and do not represent a particular ordering of the objects, it being understood that particular orders or precedence may be interchanged as permitted so that embodiments of the invention described herein can be implemented in an order other than that illustrated or described herein.

In the following description, reference numerals indicating steps such as S110, S120, … …, etc. do not necessarily indicate that the steps are performed in this order, and the order of the steps may be interchanged or performed simultaneously as allowed.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.

The embodiment of the invention provides a clock virtualization method, a device, an operating system, equipment and a storage medium, wherein the method comprises the following steps: when a virtual machine accesses a clock space of a through physical device, the virtual machine is trapped in a hypervisor, an address segment of the clock space is stored in the hypervisor on a clock address table of the virtual machine, and the access at least comprises one of the following steps: starting a clock, closing the clock and reading clock information; when the clock address table of the virtual machine checks the clock address of the through physical device, the hypervisor accesses the corresponding space of the clock address, and feeds back the access result to the virtual machine.

The technical scheme of the embodiment of the invention is used for clock access of the through physical equipment of each virtual machine of the Type1 virtualization system, the virtual machine controls the on and off of the clocks of the through physical equipment according to the requirements, so that the power consumption of the physical through equipment is reduced, clock information with any space size can be timely acquired, the limitation of space management granularity of an MMU is avoided, and the memory space occupied by the clock space is reduced.

Embodiments of the present invention are described below with reference to the accompanying drawings. First, a first embodiment of a clock virtualization method according to the present invention will be described with reference to fig. 1.

Fig. 1 shows a flow of a clock virtualization method embodiment one, including steps S110 and S120.

S110: when a virtual machine accesses the clock space of one of its pass-through physical devices, the virtual machine is trapped in the hypervisor.

The through physical device of each virtual machine is a physical device unique to the virtual machine, the control bit and clock information of the clock are stored in a physical memory, a memory area of the hypervisor, which stores the clock control bit and clock information of the through physical device of each virtual machine, cannot be accessed by the virtual machine, and the virtual machine access area is trapped in the hypervisor.

Wherein the access includes one of: turning on the clock, turning off the clock, and reading clock information.

Each virtual machine in the hypervisor has a corresponding clock address table, and the address segment of the through physical device clock space of the virtual machine is saved. Storing the corresponding clock address table of each virtual machine in hypervisor

In some embodiments, the clock address table of each virtual machine is a linked list of clock addresses.

In some embodiments, the clock memory space of each through physical device is obtained according to the clock information size of the clock memory space, is not limited by the space management granularity of 4KB of the MMU, can realize that the clock memory space of the through physical device of different virtual machines is in one 4KB space, and reduces the memory space occupied by the clock space.

In some embodiments, when a Hypervisor creates a virtual machine, a pass-through physical device is created for the virtual machine, and a clock address field of the pass-through physical device created for the virtual machine is queried; when the clock address of a through physical device is queried, the clock address field of the queried through physical device is stored in the clock address table of the virtual machine in the hypervisor.

In some embodiments, the clock address segment of each pass-through physical device includes a base address segment and an offset address segment in its occupancy present in the hypervisor.

S120: when the clock address table of the virtual machine checks the clock address of the through physical device, the hypervisor accesses the corresponding space of the clock address, and feeds back the access result to the virtual machine.

The clock address of one physical through device is stored in the clock address linked list of each virtual machine, and the clock space of the through physical device is indicated to allow the virtual machine to access.

When the clock address table of the virtual machine detects the clock address of the through physical device with the accessed clock information, the hypervisor accesses the corresponding space of the clock address and feeds back the access result to the virtual machine.

When the access is to turn on or turn off the clock, the access result comprises the result of turning on or turn off the clock; when the access is to read the clock information, the access result includes the clock information.

In some embodiments, when the hypervisor cannot find the clock address of the pass-through physical device in the clock address table of the virtual machine, the hypervisor returns directly to the virtual machine.

In summary, in the clock virtualization method embodiment, the clock address table of each virtual machine in the hypervisor is used to obtain the clock address of the through physical device, so as to access each through physical device clock space of each virtual machine, realize controlling the on and off of the through physical device clock according to the requirement, reduce the power consumption of the physical through device, and timely obtain the clock information of any space size.

A second embodiment of a clock virtualization method according to the present invention is described below with reference to fig. 2.

The second clock virtualization method embodiment inherits all the methods of the first clock virtualization method embodiment, has all the advantages, and increases the creation method of the clock address table of the virtual machine.

Fig. 2 shows a flow of a clock virtualization method embodiment two, including steps S210 to S260. For convenience of description, in this embodiment, the clock address table of each virtual machine is a linked list of clock addresses of the virtual machine.

S210: when a Hypervisor creates a virtual machine, a physical pass-through device is created for the virtual machine, and the clock address segment of the pass-through physical device created for the virtual machine is queried.

The clock address segment and the clock space of the through physical device of each virtual machine are automatically distributed by hardware. The clock space is flexibly obtained according to the size of the clock information, is not limited by the memory management granularity of the MMU, and can be the time space of the through physical device of a plurality of virtual machines within one 4 KB.

S220: when the clock address of a through physical device is queried, the queried clock address segment of the through physical device is stored in the clock address linked list of the virtual machine.

The clock address linked list of each virtual machine is stored in the memory space managed by the hypervisor.

The clock address of one physical through device is stored in the clock address linked list of the virtual machine, and the clock space of the through physical device is indicated to allow the virtual machine to access.

S230: when a virtual machine accesses the clock space of one of its pass-through physical devices, the virtual machine is trapped in the hypervisor.

The memory area of the clock space of the through physical device of each virtual machine in the hypervisor cannot be accessed by the virtual machine, and the virtual machine access area is trapped in the hypervisor.

S240: judging whether the clock address of the direct physical equipment is found in the clock address linked list of the virtual machine by the hypervisor.

When the virtual machine is found, the operation step S250 is performed with access, otherwise, the operation step S260 is performed with return to the virtual machine.

S250: and accessing the corresponding space of the clock address by the hypervisor, and feeding back an access result to the virtual machine.

When the clock address of one physical through device is stored in the clock address linked list of the virtual machine, the clock space of the through physical device is indicated to allow the virtual machine to access.

When the access is to turn on or turn off the clock, the access result comprises the result of turning on or turn off the clock; when the access is to read the clock information, the access result includes the clock information.

When the hypervisor feeds back the clock access result to the virtual machine, step S260 is entered, the virtual machine is returned, and the virtual machine is restored to run.

S260: returning to the virtual machine, and recovering the virtual machine to run.

And when the clock address segment of the through physical equipment of the virtual machine with the accessed clock information is not queried and the virtual machine is returned, the access result is not carried out.

In summary, the second clock virtualization method embodiment adds the method for creating the clock address linked list of each virtual machine on the basis of the first clock virtualization method embodiment, so that clock access is performed according to the clock address linked list of each virtual machine during subsequent clock access, and flexible configuration of the direct physical device of the virtual machine is realized.

A third embodiment of a clock virtualization method according to the present invention is described below with reference to fig. 3A and 3B.

The third clock virtualization method embodiment is a detailed implementation of the second clock virtualization method embodiment, which has all the advantages.

Fig. 3A shows a structure of a computer system according to a third embodiment of a clock virtualization method, where two virtual machines vm0 and vm1, and a through physical device of the virtual machine vm0 is a serial port uart0 and a through physical device of the virtual machine vm1 is a serial port uart1, and each of the virtual machines vm0 and vm1 has its own clock address linked list in a hypervisor, where the hypervisor is a hypervisor shared by the virtual machines vm0 and vm1. Any number of virtual machines may be included in a real scenario, and each virtual machine may also include any number of any type of pass-through physical devices.

Fig. 3B shows a flow of a clock virtualization method embodiment three, including steps S310 to S360.

S310: hypervisor creates virtual machines vm0 and vm1.

Wherein, the hypervisor in the actual scene can create any number of virtual machines

S320: hypervisor assigns serial port uart0 to vm0 and serial port uart1 to vm1.

The serial port uart0 and the serial port uart1 are physical direct devices of the virtual machines vm0 and vm1, respectively.

In a practical scenario, each virtual machine may also include any number of any type of pass-through physical devices.

S330: searching a clock address segment belonging to uart0 in a clock address space of the hypervisor, and recording the clock address segment into a clock address linked list of vm 0.

S340: searching a clock address segment belonging to uart1 in a clock address space of the hypervisor, and recording the clock address segment into a clock address linked list of vm1.

S350: the virtual machine vm0 accesses the clock address space of the serial port uart0, the virtual machine vm0 is trapped into the hypervisor, the hypervisor searches in the address chain table of the virtual machine vm0, if the clock address of the uart0 exists, the hypervisor allows the read-write access to the clock space of the uart0, otherwise, the hypervisor returns directly, and the virtual machine vm0 is restored to operate.

S360: the virtual machine vm1 accesses the clock address space of the serial port uart1, the virtual machine vm1 is trapped into the hypervisor, the hypervisor searches in the address chain table of the virtual machine vm1, if the clock address of the uart1 exists, the hypervisor allows the read-write access to the clock space of the uart1, otherwise, the hypervisor returns directly, and the virtual machine vm1 is restored to operate.

A first embodiment of a clock virtualizer according to the present invention is described below with reference to fig. 4.

A clock virtualization apparatus embodiment one runs a method as described in a clock virtualization method embodiment one, with all the advantages of a clock virtualization method embodiment one.

Fig. 4 shows a structure of a first embodiment of a clock virtualization apparatus, including: a first clock access module 410 and a second clock access module 420.

The first clock access module 410 is configured to trap a virtual machine into a hypervisor when the virtual machine accesses the clock space of a pass-through physical device. The working principle and advantages of the method refer to step S110 of a first embodiment of a clock virtualization method.

The second clock access module 420 is configured to, when the clock address table of the virtual machine checks the clock address of the through physical device, access a space corresponding to the clock address, and feed back an access result to the virtual machine. The working principle and advantages of the method refer to step S120 of a first embodiment of a clock virtualization method.

A second embodiment of a clock virtualizer according to the present invention is described below with reference to fig. 5.

The second clock virtualization device embodiment runs the method described in the second clock virtualization method embodiment, and has all the advantages of the second clock virtualization method embodiment.

Fig. 5 shows a structure of a second embodiment of a clock virtualization apparatus, including: a clock address save module 510, a first clock access module 520, and a second clock access module 530.

The clock address saving module 510 is configured to create a physical through device for a virtual machine when the Hypervisor creates the virtual machine, and query a clock address field of the through physical device created for the virtual machine; the clock address saving module 510 is further configured to save the found clock address segment of the through physical device on the clock address linked list of the virtual machine when the clock address of the through physical device is found. The working principle and advantages of the method refer to steps S210 and S220 of a second embodiment of a clock virtualization method.

The first clock access module 520 is configured to, when a virtual machine accesses a clock space of a through physical device, trap the virtual machine into a hypervisor, refer to step S230 of a second clock virtualization method embodiment for its working principle and advantages.

The second clock access module 530 is configured to determine that the hypervisor finds the clock address of the through physical device in the clock address linked list of the virtual machine; the second clock access module 530 is further configured to access the space corresponding to the clock address by using the hypervisor, and feed back an access result to the virtual machine; the second clock access module 530 is further configured to return to the virtual machine and resume the operation of the virtual machine. The working principle and advantages of the method refer to steps S240, S250 and S260 of a second embodiment of a clock virtualization method.

The embodiment of the invention also provides an operating system which is configured to run the method of the first embodiment of the clock virtualization method or the second embodiment of the clock virtualization method.

An embodiment of the present invention also provides a computing device, described in detail below with respect to fig. 6.

The computing device 600 includes a processor 610, a memory 620, a communication interface 630, a bus 640.

It should be appreciated that the communication interface 630 in the computing device 600 shown in this figure may be used to communicate with other devices.

Wherein the processor 610 may be coupled to a memory 620. The memory 620 may be used to store the program codes and data. Accordingly, the memory 620 may be a storage unit internal to the processor 610, an external storage unit independent of the processor 610, or a component including a storage unit internal to the processor 610 and an external storage unit independent of the processor 610.

Optionally, computing device 600 may also include a bus 640. Memory 620 and communication interface 630 may be connected to processor 610 by bus 640. Bus 640 may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (EFStended Industry Standard Architecture, EISA) bus, among others. The bus 640 may be classified as an address bus, a data bus, a control bus, or the like. For ease of illustration, only one line is shown in the figure, but not only one bus or one type of bus.

It should be appreciated that in embodiments of the present invention, the processor 610 may employ a central processing unit (central processing unit, CPU). The processor may also be other general purpose processors, digital signal processors (digital signal processor, DSP), application specific integrated circuits (application specific integrated circuit, ASIC), off-the-shelf programmable gate arrays (field programmable gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. Or the processor 610 may employ one or more integrated circuits for executing associated routines to perform techniques provided by embodiments of the invention.

The memory 620 may include read only memory and random access memory, and provides instructions and data to the processor 610. A portion of the processor 610 may also include non-volatile random access memory. For example, the processor 610 may also store information of the device type.

When the computing device 600 is running, the processor 610 executes computer-executable instructions in the memory 620 to perform the operational steps of the various method embodiments.

It should be understood that the computing device 600 according to the embodiments of the present invention may correspond to a respective subject performing the methods according to the embodiments of the present invention, and that the above and other operations and/or functions of the respective modules in the computing device 600 are respectively for implementing the respective flows of the methods according to the embodiments of the present method, and are not repeated herein for brevity.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.

In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the method embodiment.

In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the decoding method according to the embodiments of the present invention. The storage medium includes various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk.

The embodiments of the present invention also provide a computer-readable storage medium having stored thereon a computer program for performing the operational steps of the method embodiments when executed by a processor.

The computer storage media of embodiments of the invention may take the form of any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

The computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Computer program code for carrying out operations of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).

Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the above embodiments, but may include many other equivalent embodiments without departing from the spirit of the invention, which fall within the scope of the invention.

Claims (10)

1. A method of clock virtualization, comprising:

when a virtual machine accesses a clock space of a through physical device, the virtual machine is trapped in a hypervisor, an address segment of the clock space is stored in the hypervisor on a clock address table of the virtual machine, and the access at least comprises one of the following steps: starting a clock, closing the clock and reading clock information;

when the clock address table of the virtual machine checks the clock address of the through physical device, the hypervisor accesses the corresponding space of the clock address, and feeds back the access result to the virtual machine.

2. The method as recited in claim 1, further comprising:

when the Hypervisor creates a virtual machine, the clock address table of the virtual machine stores the clock address field of the inquired through physical device of the virtual machine in the Hypervisor.

3. The method of claim 2, wherein the clock address segment of each pass-through physical device includes a base address segment and an offset address segment thereof.

4. The method as recited in claim 1, further comprising:

and when the clock address of the through physical device cannot be found in the clock address table of the virtual machine by the hypervisor, directly returning to the virtual machine.

5. The method of claim 1, wherein the clock memory space of each pass-through physical device is obtained from its clock information size.

6. The method of claim 1, wherein the clock address table of each virtual machine is a linked list of clock addresses.

7. A clock virtualizing apparatus, comprising:

the first clock access module is configured to, when a virtual machine accesses a clock space of a through physical device, trap the virtual machine into a hypervisor, where an address field of the clock space is stored in a clock address table of the virtual machine in the hypervisor, and the access at least includes one of the following: starting a clock, closing the clock and reading clock information;

and the second clock access module is used for accessing the corresponding space of the clock address when the clock address table of the virtual machine detects the clock address of the direct physical equipment, and feeding back an access result to the virtual machine.

8. An operating system configured to run the method of any one of claims 1 to 6.

9. A computing device, comprising:

a bus;

a communication interface connected to the bus;

at least one processor coupled to the bus;

and at least one memory coupled to the bus and storing program instructions that, when executed by the at least one processor, cause the at least one processor to perform the method of any of claims 1 to 6.

10. A computer readable storage medium, characterized in that it has stored thereon program instructions, which when executed by a computer, cause the computer to perform the method of any of claims 1 to 6.