CN117234010A - Display substrate, display panel and display device - Google Patents
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- CN117234010A CN117234010A CN202311434103.4A CN202311434103A CN117234010A CN 117234010 A CN117234010 A CN 117234010A CN 202311434103 A CN202311434103 A CN 202311434103A CN 117234010 A CN117234010 A CN 117234010A
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- 239000000758 substrate Substances 0.000 title claims abstract description 135
- 239000004065 semiconductor Substances 0.000 claims abstract description 67
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Abstract
The application provides a display substrate, a display panel and a display device, relates to the technical field of display, and can reduce the problem of brightness difference of pixels in different columns. The display substrate includes: the data line extends along a first direction; the grid line extends along the second direction, and the grid line and the data line intersect to form a pixel area; orthographic projections of the first semiconductor connecting part and the second semiconductor connecting part on the substrate layer overlap with orthographic projections of the grid lines on the substrate layer; a first pixel electrode and a second pixel electrode are arranged in the pixel region, the first semiconductor connecting part is electrically connected with the first pixel electrode through a first electrode lead wire, the second semiconductor connecting part is electrically connected with the second pixel electrode through a second electrode lead wire, the first semiconductor connecting part and the second semiconductor connecting part are both connected with the same data line, and the length of the first electrode lead wire along the second direction is smaller than that of the second electrode lead wire along the second direction; the distance between the first electrode segment and the nearest gate line is smaller than the distance between the second electrode segment and the nearest gate line.
Description
Technical Field
The embodiment of the application relates to the technical field of display, in particular to a display substrate, a display panel and a display device.
Background
With the continuous progress of display technology, the requirements for display effects of display panels are gradually increased. The conventional display substrate can control the voltage of the pixel electrode through the data signal, so as to change the light emitting brightness of the pixel corresponding to the pixel electrode.
However, in the existing display substrate, there is a phenomenon that at least two columns of pixel electrodes are driven by one data signal line, so that distances between the pixel electrodes of different columns and the data signal line are different, and further, differences exist between voltages of the pixel electrodes of different columns, so that brightness differences exist between pixels of different columns, a shaking pattern appears on the display panel, stability of a display screen is affected, and display effect of the display panel is affected.
Disclosure of Invention
According to the display substrate, the display panel and the display device provided by the embodiment of the application, under the condition that one data signal line drives at least two rows of pixel electrodes, the problems that the display panel has shaking marks and the stability of a display picture and the display effect of the display panel are affected due to the fact that differences exist between voltages of the pixel electrodes in different rows and the brightness of pixels in different rows are caused are solved.
In a first aspect of an embodiment of the present application, there is provided a display substrate including:
a substrate layer;
the data lines are arranged on one side of the substrate layer and extend along a first direction;
the grid lines and the data lines are arranged on the same side of the substrate layer, the grid lines extend along a second direction, the first direction intersects with the second direction, and the grid lines intersect with the data lines to form pixel areas;
the semiconductor layer comprises a plurality of first semiconductor connecting parts and a plurality of second semiconductor connecting parts, and the orthographic projections of the first semiconductor connecting parts and the second semiconductor connecting parts on the substrate layer overlap with orthographic projections of the grid lines on the substrate layer;
a first pixel electrode and a second pixel electrode are arranged in the pixel region, the first semiconductor connecting part is electrically connected with the first pixel electrode through a first electrode lead, the second semiconductor connecting part is electrically connected with the second pixel electrode through a second electrode lead, the first semiconductor connecting part and the second semiconductor connecting part are electrically connected with the same data line, and the length of the first electrode lead along the second direction is smaller than that of the second electrode lead along the second direction;
Wherein a distance between a first electrode segment and the nearest gate line is smaller than a distance between a second electrode segment and the nearest gate line, the first electrode segment being the first electrode lead extending in the second direction, the second electrode segment being the second electrode lead extending in the second direction.
In some embodiments, in the first direction, two gate lines, that is, a first gate line and a second gate line, are disposed between two adjacent rows of the pixel regions;
the orthographic projection of the first semiconductor connecting part on the substrate layer overlaps with the orthographic projection of the first grid line on the substrate layer, and the orthographic projection of the second semiconductor connecting part on the substrate layer overlaps with the orthographic projection of the second grid line on the substrate layer;
the first semiconductor connection part and the second semiconductor connection part are respectively arranged at two sides of the pixel area.
In some embodiments, the gate line includes a first gate line segment, a second gate line segment, and a third gate line segment, wherein the first gate line segment is disposed at least partially opposite the first electrode segment in the first direction, the second gate line segment is disposed at least partially opposite the second electrode segment in the first direction, and the third gate line segment is disposed between the first gate line segment and the second gate line segment;
The distance between the first electrode segment and the first gate segment is smaller than the distance between the second electrode segment and the second gate segment.
In some embodiments, the second gate line segment has a dimension in the first direction that is less than a dimension of the first gate line segment in the first direction.
In some embodiments, the first gate line segment has a dimension in the first direction that is greater than a dimension of the third gate line segment in the first direction, and the second gate line segment has a dimension in the first direction that is less than a dimension of the third gate line segment in the first direction; or alternatively, the first and second heat exchangers may be,
the size of the first grid line section in the first direction is equal to the size of the third grid line section in the first direction, and the size of the second grid line section in the first direction is smaller than the size of the third grid line section in the first direction; or alternatively, the first and second heat exchangers may be,
the first gate line segment has a dimension in the first direction that is greater than a dimension of the third gate line segment in the first direction, and the second gate line segment has a dimension in the first direction that is equal to the dimension of the third gate line segment in the first direction.
In some embodiments, a dimension of the second gate segment in the second direction is greater than a dimension of the second electrode segment in the second direction; and/or the number of the groups of groups,
The first gate segment has a dimension in the second direction that is greater than a dimension of the first electrode segment in the second direction.
In some embodiments, a dimension of the second gate line segment in the second direction is equal to a dimension of the second pixel electrode in the second direction; and/or the number of the groups of groups,
the first gate line segment has a size in the second direction equal to a size of the first pixel electrode in the second direction.
In some embodiments, the gate line includes a protrusion and a recess, wherein the protrusion is disposed at least partially opposite to the second electrode section in the first direction, the protrusion protrudes toward a direction away from the second pixel electrode, the recess is disposed at least partially opposite to the first electrode section in the second direction, the recess is recessed toward a direction close to the first pixel electrode, and a dimension of the protrusion and the recess in the first direction is equal.
In some embodiments, the size of the recess in the second direction is greater than the size of the first electrode segment in the second direction; and/or the number of the groups of groups,
the dimension of the projection in the second direction is greater than the dimension of the second electrode segment in the second direction.
In some embodiments, a dimension of the recess in the second direction is equal to a dimension of the first pixel electrode in the second direction; and/or the number of the groups of groups,
the dimension of the projection in the second direction is equal to the dimension of the second pixel electrode in the second direction.
In some embodiments, the first pixel electrode and the second pixel electrode connected to the same data line have the same polarity.
In some embodiments, a distance between the first gate line segment and the first pixel electrode is less than a distance between the second gate line segment and the second pixel electrode.
In some embodiments, the first pixel electrode has a dimension in the first direction that is greater than a dimension of the second pixel electrode in the first direction.
In a second aspect of an embodiment of the present application, there is provided a display panel including:
a display substrate as in any one of the first aspects above;
the color film substrate is arranged opposite to the display substrate;
the liquid crystal layer is arranged between the display substrate and the color film substrate.
A third aspect of an embodiment of the present application provides a display device, including:
A display substrate as in any one of the first aspects above; or alternatively, the first and second heat exchangers may be,
the display panel according to the second aspect.
According to the display substrate provided by the embodiment of the application, the first pixel electrode and the second pixel electrode are arranged in the pixel area formed by crossing the grid lines and the data lines, and the distance between the first electrode section and the nearest grid line is adjusted to be smaller than the distance between the second electrode section and the nearest grid line, so that the distance between the second electrode lead with larger overlapping area and the grid line is increased under the condition that the length of the first electrode lead along the second direction is smaller than the length of the second electrode lead along the second direction, the capacitance difference of coupling capacitors formed between different electrode leads and the grid lines is reduced, the voltage difference between the first pixel electrode and the second pixel electrode is reduced, the brightness difference of pixels corresponding to the first pixel electrode and the second pixel electrode is reduced, the stability of a display picture is improved, the uniformity and the accuracy of the display picture are improved, the shaking marks of the display panel are inhibited, and the display effect of the display panel is improved.
Drawings
In order to more clearly illustrate the technical solution of the present application, the drawings that are needed in the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present application;
FIG. 2 is a plot of pixel voltage versus feedthrough voltage provided by an embodiment of the present application;
fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the present application;
fig. 4 is a schematic partial structure diagram of a display substrate according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of another display substrate according to an embodiment of the present application;
FIG. 6 is a schematic block diagram of a display substrate according to another embodiment of the present application;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of another display device according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to the embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The embodiments described in the examples below do not represent all embodiments consistent with the application. Merely exemplary of systems and methods consistent with aspects of the application as set forth in the claims. In the several embodiments provided in the present embodiments, it should be understood that the disclosed apparatus and method may be implemented in other manners, and the apparatus embodiments described below are merely exemplary.
In the present application, words of "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, which designate orientations or positional relationships, are used for convenience in describing the positional relationships of the constituent elements with reference to the drawings, are merely for convenience in describing the present application and simplifying the description, and do not designate or imply that the apparatus or elements to be referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus are not to be construed as limiting the present application. The positional relationship of the constituent elements is appropriately changed according to the direction in which the constituent elements are described. Therefore, the present application is not limited to the words described in the specification, and may be appropriately replaced according to circumstances.
The present application has been described with reference to cross-sectional and/or plan views as idealized exemplary figures. In the drawings, the thickness of layers and the area of regions are exaggerated for clarity. Thus, variations from the shape of the drawings due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
With the continuous progress of display technology, the requirements for display effects of display panels are gradually increased. The conventional display substrate can control the voltage of the pixel electrode through the data signal, so as to change the light emitting brightness of the pixel corresponding to the pixel electrode.
Taking a liquid crystal display substrate as an example, polarization occurs when liquid crystal molecules maintain the same polarity for a long time, so that the conventional liquid crystal display substrate generally needs to switch the polarity of a pixel electrode to inhibit the polarization of the liquid crystal molecules, thereby improving the display effect of the display substrate and prolonging the service life of a display device. In the conventional display substrate, two columns of pixel electrodes are driven by one data signal line, and voltages of the different columns of pixel electrodes are controlled by connecting the two columns of pixel electrodes with different transistors.
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present application. As shown in fig. 1, the display substrate includes a substrate layer 100, a plurality of data lines 200, a plurality of gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The semiconductor layer 400 includes a first semiconductor connection part 410 and a second semiconductor connection part 420, the first semiconductor connection part 410 is electrically connected to the first pixel electrode 510 through the first electrode lead 610, the first semiconductor connection part 410 is electrically connected to the data line 200 through the third electrode lead 710, the second semiconductor connection part 420 is electrically connected to the second pixel electrode 520 through the second electrode lead 620, the second semiconductor connection part 420 is electrically connected to the data line 200 through the fourth electrode lead 720, the length of the first electrode lead 610 in the second direction is smaller than the length of the second electrode lead 620 in the second direction, and the length of the third electrode lead 710 in the second direction is smaller than the length of the fourth electrode lead 720 in the second direction. Wherein Y represents a first direction and X represents a second direction.
The capacitance formula can be:
calculating the capacitance between two electrodes, wherein C is the capacitance between the two electrodes, ε r For the dielectric constant of the medium between the two electrodes, S is the overlap area of the two electrodes, k is the electrostatic force constant, and d is the distance between the two electrodes. It can be seen from the above formula that the overlapping area of the two electrodes is positively correlated with the capacitance value, and the distance between the two electrodes is negatively correlated with the capacitance value. Therefore, the capacitance of the first pixel electrode 510 is smaller than that of the second pixel electrode 520.
Further, there is a feed-through effect between the source-drain electrode and the gate of the transistor, and the feed-through voltage can be obtained by:
determining, wherein DeltaV p Feed-through voltage for pixel electrode, C gs C is the coupling capacitance between the source or drain and the gate of the transistor pg C 'is the coupling capacitance between one gate of the transistor and the pixel electrode' pg C is the coupling capacitance between the other gate of the transistor and the pixel electrode st Coupling capacitance for common voltage signal, C lc Is the capacitance of the liquid crystal layer, C pd Coupling capacitance between data line and pixel electrode electrically connected to transistor, C' pd Coupling capacitance between another adjacent data line and pixel electrode, V gh V is a high level signal when the gate is open gl Is gate offA low signal when closed. The method can be used for preparing the composite material by:
V pixel ＝V 0 -ΔV p (3)
determining the voltage of each pixel electrode, wherein V pixel V is the voltage of the pixel electrode 0 Is the theoretically highest pixel voltage that can be achieved.
Fig. 2 is a graph showing a relationship between pixel voltage and feedthrough voltage according to an embodiment of the present application. As shown in fig. 2, the Gate signal controls the transistor to be turned on to light the corresponding pixel in the high level interval, and controls the transistor to be turned off in the low level interval, V com Is of common voltage, V 0 positive The highest pixel voltage which can be achieved by the pixel electrode theory with positive polarity, V 0 positive Is greater than V com ，V Negative 0 The highest pixel voltage, V, theoretically attainable for a pixel electrode of negative polarity Negative 0 Is less than V com ，V Pixel positive The actual voltage of the pixel electrode with positive polarity, V pixel negative Actual voltage of pixel electrode with negative polarity, V Pixel positive And V is equal to com The absolute value of the difference value is used for controlling the brightness of the pixel corresponding to the positive-polarity pixel electrode pixel negative And V is equal to com The absolute value of the difference value is used for controlling the brightness of the pixel corresponding to the pixel electrode with negative polarity, deltaV p-positive Feed-through voltage of positive polarity pixel electrode, deltaV p-positive Is V (V) 0 positive And V is equal to Pixel positive Voltage difference DeltaV of (V) p-negative Feed-through voltage of pixel electrode with negative polarity, deltaV p-negative Is V (V) Negative 0 And V is equal to pixel negative Is a voltage difference of (a). As can be seen from FIG. 2, the pixel electrode electrically connected to the same data signal line is at V0 positive or V Negative 0 When the voltages are equal, deltaV of each pixel electrode p-positive Or DeltaV p-negative The smaller the difference between the pixels, the smaller the brightness difference of the pixels, and the higher the stability of the display screen.
In general, the relative positions of the pixel electrodes and the data lines are fixed and the voltage of each pixel electrode is equal to that of the corresponding data line pd And C' pd The effect of (a) is the same and does not cause a difference in feed-through voltages. Thus, shadowThe main factor of the voltage response of the pixel electrode includes the coupling capacitance C between the source or drain and gate of the transistor gs Coupling capacitance C between one gate of the transistor and the pixel electrode pg And a coupling capacitance C 'between the other gate of the transistor and the pixel electrode' pg 。
Referring to fig. 1, the first pixel electrode 510 close to the data line 200 is closer to the data line 200 than the second pixel electrode 520 far from the data line 200, the electrode lead length required for forming the electrical connection is shorter, the area overlapping the gate line 300 is smaller, and the coupling capacitance C is formed gs Is smaller, which results in a voltage V of the first pixel electrode 510 pixel1 A voltage V greater than the second pixel electrode 520 pixel2 Therefore, a voltage difference is formed between two columns of pixel electrodes, and a brightness difference is formed between pixels in different columns, so that the display panel has a shaking pattern, and the stability of a display picture and the display effect of the display panel are affected.
In view of the above, the embodiments of the present application provide a display substrate, a display panel and a display device, which can solve the problems that when one data signal line drives at least two rows of pixel electrodes, there is a difference between voltages of the pixel electrodes in different rows, and there is a difference between brightness of pixels in different rows, so that a shaking pattern appears on the display panel, and stability of a display screen and display effect of the display panel are affected.
In a first aspect of an embodiment of the present application, there is provided a display substrate including: the liquid crystal display device includes a substrate layer, a plurality of data lines, a plurality of gate lines, a first pixel electrode, a second pixel electrode, a semiconductor layer, a first electrode lead, and a second electrode lead. The data lines are arranged on one side of the substrate layer and extend along the first direction Y; the plurality of gate lines and the plurality of data lines are arranged on the same side of the substrate layer, the plurality of gate lines extend along a second direction X, wherein the first direction Y intersects with the second direction X, and the plurality of gate lines intersect with the plurality of data lines to form pixel areas; the semiconductor layer comprises a plurality of first semiconductor connecting parts and a plurality of second semiconductor connecting parts, and the orthographic projections of the first semiconductor connecting parts and the second semiconductor connecting parts on the substrate layer overlap with the orthographic projections of the grid lines on the substrate layer; a first pixel electrode and a second pixel electrode are arranged in the pixel region, the first semiconductor connecting part is electrically connected with the first pixel electrode through a first electrode lead, the second semiconductor connecting part is electrically connected with the second pixel electrode through a second electrode lead, the first semiconductor connecting part and the second semiconductor connecting part are electrically connected with the same data line, and the length of the first electrode lead along the second direction X is smaller than that of the second electrode lead along the second direction X; the distance between the first electrode segment and the nearest grid line is smaller than that between the second electrode segment and the nearest grid line, the first electrode segment is a first electrode lead extending in the second direction X, and the second electrode segment is a second electrode lead extending in the second direction X.
Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the present application. As shown in fig. 3, the display substrate includes a substrate layer 100, a plurality of data lines 200, a plurality of gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The semiconductor layer 400 includes a first semiconductor connection part 410 and a second semiconductor connection part 420, the first semiconductor connection part 410 is electrically connected to the first pixel electrode 510 through the first electrode lead 610, the first semiconductor connection part 410 is electrically connected to the data line 200 through the third electrode lead 710, the second semiconductor connection part 420 is electrically connected to the second pixel electrode 520 through the second electrode lead 620, the second semiconductor connection part 420 is electrically connected to the data line 200 through the fourth electrode lead 720, the length of the third electrode lead 710 in the second direction X is smaller than the length of the fourth electrode lead 720 in the second direction X, the length L1 of the first electrode lead 610 in the second direction X is smaller than the length L2 of the second electrode lead 621 in the second direction X, and the distance H1 between the first electrode segment 611 and the nearest gate line 300 is smaller than the distance H2 between the second electrode segment and the nearest gate line 300. The electrical connection of the first pixel electrode 510 and the data line 200 is a short connection, and the electrical connection of the second pixel electrode 520 and the data line 200 is a long connection.
For example, the pixel colors corresponding to the pixel electrodes may be any one of red, green and blue, and the pixel colors corresponding to the first pixel electrode 510 and the second pixel electrode 520 in the same pixel region may be the same or different. The colors of the pixels corresponding to the driving of the first pixel electrode 510 and the second pixel electrode 520 in the different pixel regions may be the same or different.
For example, the polarities of the adjacent data lines 200 may be different to realize column inversion of the liquid crystal molecules corresponding to the adjacent pixel regions, thereby avoiding polarization of the liquid crystal molecules and prolonging the service life of the display panel.
For example, the difference between H1 and H2 may be determined according to at least one of a difference in length between the third electrode lead 710 extending in the second direction X and the fourth electrode lead 720 extending in the second direction X, and a difference in distance between the third electrode lead 710 and the fourth electrode lead 720 and the nearest gate line 300, respectively.
In the display substrate provided by the embodiment of the application, the first pixel electrode 510 and the second pixel electrode 520 are arranged in the pixel region formed by crossing the gate line 300 and the data line 200, and the distance H1 between the first electrode segment 611 and the nearest gate line 300 is adjusted to be smaller than the distance H2 between the second electrode segment 621 and the nearest gate line 300, so that the length L1 of the first electrode lead 610 along the second direction X is smaller than the length L2 of the second electrode lead 620 along the second direction X, the distance between the second electrode lead 620 with larger overlapping area and the gate line 300 is increased, the capacitance difference of the coupling capacitance formed between different electrode leads and the gate line 300 is reduced, and therefore, the brightness difference of pixels corresponding to the first pixel electrode 510 and the second pixel electrode 520 is reduced, the brightness uniformity and the stability of a display picture are improved, the uniformity and the accuracy of the display picture are improved, the shaking of the display panel is suppressed, and the display effect of the display panel is improved.
In some possible embodiments, two gate lines 300, respectively a first gate line and a second gate line, are disposed between the pixel regions of two adjacent rows in the first direction Y; the front projection of the first semiconductor connection portion 410 on the substrate layer 100 overlaps with the front projection of the first gate line on the substrate layer 100, and the front projection of the second semiconductor connection portion 420 on the substrate layer 100 overlaps with the front projection of the second gate line on the substrate layer 100; the first semiconductor connection portion 410 and the second semiconductor connection portion 420 are disposed on both sides of the pixel region, respectively.
For example, adjacent pixel electrodes may be electrically connected to different gate lines 300, respectively.
Referring to fig. 3, the gate line 300 includes a first gate line 310 and a second gate line 320, and a first gate line 310 and a second gate line 320 are disposed between two adjacent pixel regions, and a dual gate driving is formed between pixels in the same row, so that the cost of COF (Chip On Film) package can be reduced compared to a single gate driving structure.
In some possible embodiments, the gate line 300 includes a first gate line segment, a second gate line segment, and a third gate line segment, where the first gate line segment is disposed at least partially opposite the first electrode segment 611 in the first direction Y, the second gate line segment is disposed at least partially opposite the second electrode segment 621 in the first direction Y, and the third gate line segment is disposed between the first gate line segment and the second gate line segment; the distance between the first electrode segment 611 and the first gate segment is less than the distance between the second electrode segment 621 and the second gate segment.
It should be noted that, in the case where the first gate line segment and the first electrode segment 611 are at least partially disposed opposite to each other in the first direction Y, a projection of the first gate line segment along the first direction Y on a plane where the first electrode segment 611 is located at least partially overlaps the first electrode segment 611; in the case where the second gate line segment is disposed at least partially opposite to the second electrode segment 621 in the first direction Y, a projection of the second gate line segment along the first direction Y on a plane of the second electrode segment 621 at least partially overlaps the second electrode segment 612.
Fig. 4 is a schematic partial structure diagram of a display substrate according to an embodiment of the present application. As shown in fig. 4, the display substrate includes a substrate layer 100, a plurality of data lines 200, a plurality of gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The gate line 300 includes a first gate line segment 301, a second gate line segment 302, and a third gate line segment 303, the first gate line segment 301 is disposed at least partially opposite to the first electrode segment 611 in the first direction Y, the second gate line segment 302 is disposed at least partially opposite to the second electrode segment 621 in the first direction Y, and the third gate line segment 303 is disposed between the first gate line segment 301 and the second gate line segment 302.
Illustratively, in the case where one gate line 300 exists between adjacent pixel regions, the distance between the semiconductor connection portions on the same gate line is relatively short, so that the length of the third gate line segment 303 can be increased in the second direction X, avoiding breakage of the gate line 300. In the case where two gate lines 300 are present between adjacent pixel regions, the first pixel electrode 510 connected in short and the second pixel electrode 520 connected in long are alternately arranged, and the distance between the semiconductor connection parts on the same gate line 300 is long, so that the length of the third gate line segment 303 can be reduced, the lengths of the first gate line segment 301 and the second gate line segment 302 can be increased, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 electrically connected to the same data line 200 can be reduced, the brightness uniformity and the stability of the display screen can be improved, the shaking marks of the display panel can be suppressed, and the display effect of the display panel can be improved.
In some possible embodiments, the second gate line segment 302 has a smaller dimension in the first direction Y than the first gate line segment 301.
Referring to fig. 4, the first gate line segment 301 has a dimension H3 in the first direction Y, the second gate line segment 302 has a dimension H4 in the first direction Y, and the third gate line segment 303 has a dimension H5 in the first direction Y, wherein H3 is smaller than H4.
Illustratively, the shapes of the first gate line segment 301, the second gate line segment 302, and the third gate line segment 303 are obtained by etching the gate line 300.
According to the display substrate provided by the embodiment of the application, the dimension H3 of the first grid line segment 301 in the first direction Y is smaller than the dimension H4 of the second grid line segment 302 in the first direction Y, so that the distance between the first electrode segment 611 and the first grid line segment 301 is smaller than the distance between the second electrode segment 621 and the second grid line segment 302, the coupling capacitance difference formed by the first pixel electrode 510 and the second pixel electrode 520 respectively and the grid line 300 which are electrically connected is further reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 is reduced, the brightness uniformity and the stability of a display picture are improved, the shaking marks of the display panel are restrained, and the display effect of the display panel is improved.
In some possible embodiments, the dimension H3 of the first gate line segment 301 in the first direction Y is greater than the dimension H5 of the third gate line segment 303 in the first direction Y, and the dimension H4 of the second gate line segment 302 in the first direction Y is less than the dimension H5 of the third gate line segment 303 in the first direction Y.
According to the display substrate provided by the embodiment of the application, the size in the first direction Y is gradually reduced along the first grid line segment 301 to the second grid line segment 302, so that the capacitance difference between the coupling capacitance between the first grid line segment 301 and the first electrode segment 611 and the coupling capacitance between the second grid line segment 302 and the second electrode segment 621 can be further increased, and further, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 which are electrically connected with the same data line 200 can be further reduced, and therefore, the brightness uniformity and the stability of a display picture can be further improved, the shaking marks of the display panel are suppressed, and the display effect of the display panel is improved.
In some possible embodiments, the dimension H3 of the first gate line segment 301 in the first direction Y is greater than the dimension H5 of the third gate line segment 303 in the first direction Y, and the dimension H4 of the second gate line segment 302 in the first direction Y is equal to the dimension H5 of the third gate line segment 303 in the first direction Y.
According to the display substrate provided by the embodiment of the application, the dimension H4 of the second grid line segment 302 in the first direction Y is equal to the dimension H5 of the third grid line segment 303 in the first direction Y, and the dimension H3 of the first grid line segment 301 in the first direction Y can be relatively reduced, so that the dimension ratio of the grid line 300 to the pixel electrode can be reduced in the first direction Y, and black lines of a display picture can be avoided under the condition that the number of the pixel electrodes is increased in the first direction Y, and the display effect of the display picture can be improved, and the resolution of the display panel can be improved.
In some possible embodiments, the dimension H3 of the first gate line segment 301 in the first direction Y is equal to the dimension H5 of the third gate line segment 303 in the first direction Y, and the dimension H4 of the second gate line segment 302 in the first direction Y is smaller than the dimension H5 of the third gate line segment 303 in the first direction Y.
According to the display substrate provided by the embodiment of the application, the dimension H3 of the first grid line segment 301 in the first direction Y is equal to the dimension H5 of the third grid line segment 303 in the first direction Y, so that the undersize of the grid line 300 in the first direction Y can be avoided, the risk of breakage of the grid line 300 can be reduced, the safety and stability of the display substrate can be improved, and the service life of the display substrate can be prolonged.
In some possible embodiments, the dimension of second gate segment 302 in second direction X is greater than the dimension L2 of second electrode segment 621 in second direction X.
The display substrate provided by the embodiment of the application can increase the overlapping area of the second grid line segment 302 and the second electrode segment 621, and further reduce the coupling capacitance between the second electrode lead 620 and the nearest grid line 300, so that the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 can be reduced, the brightness uniformity and the stability of a display picture can be improved, the shaking marks of the display panel can be restrained, and the display effect of the display panel can be improved.
In some possible embodiments, the dimension of the first gate segment 301 in the second direction X is greater than the dimension L1 of the first electrode segment 611 in the second direction X.
The display substrate provided by the embodiment of the application can increase the overlapping area of the first grid line segment 301 and the first electrode segment 611, further increase the coupling capacitance between the first electrode lead 610 and the nearest grid line 300, thereby reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display picture, inhibiting the shaking marks of the display panel and improving the display effect of the display panel.
In some possible embodiments, the size of the second gate line segment 302 in the second direction X is equal to the size of the second pixel electrode 520 in the second direction X.
Note that, a coupling capacitance is also formed between the pixel electrode and the gate line 300. According to the display substrate provided by the embodiment of the application, the coupling capacitance between the second grid line segment 302 and the second pixel electrode 520 can be reduced, the total capacitance value generated by the second pixel electrode 520 can be reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 can be further reduced, the brightness uniformity and the stability of a display picture are improved, the shaking marks of the display panel are suppressed, and the display effect of the display panel is improved.
In some possible embodiments, the size of the first gate line segment 301 in the second direction X is equal to the size of the first pixel electrode 510 in the second direction X.
According to the display substrate provided by the embodiment of the application, the coupling capacitance between the first grid line segment 301 and the first pixel electrode 510 is increased, so that the capacitance difference between the first pixel electrode 510 and the second pixel electrode 520 is reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 is further reduced, the brightness uniformity and stability of a display picture are improved, the shaking marks of the display panel are suppressed, and the display effect of the display panel is improved.
In some possible embodiments, the gate line 300 includes a protrusion disposed at least partially opposite to the second electrode segment 621 in the first direction Y, the protrusion protruding toward a direction away from the second pixel electrode 520, and a recess disposed at least partially opposite to the first electrode segment 611 in the second direction X, the recess being recessed toward a direction closer to the first pixel electrode 510, the protrusion and the recess being equal in size in the first direction Y.
Illustratively, the dimension of the protrusions in the first direction Y may be smaller than the dimension of the recesses in the first direction Y, such that the distance between the protrusions and the second pixel electrode 520 and the distance between the protrusions and the second electrode segment 621 may be further increased, further reducing the corresponding coupling capacitance of the second pixel electrode 520.
Fig. 5 is a schematic structural diagram of another display substrate according to an embodiment of the present application. As shown in fig. 5, the display substrate includes a substrate layer 100, a plurality of data lines 200, a plurality of gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The gate line 300 includes a concave portion 331 and a convex portion 332.
According to the display substrate provided by the embodiment of the application, the concave part 331 and the convex part 332 with the same width are arranged, so that the fracture risk of the grid line 300 can be reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 which are electrically connected with the same data line 200 can be reduced, the stability and the brightness uniformity of a display picture are improved, the display effect of the display panel is improved, and the generation of the shaking phenomenon is inhibited.
In some possible embodiments, the size of the recess 331 in the second direction X is greater than the size of the first electrode segment 611 in the second direction X.
According to the display substrate provided by the embodiment of the application, the overlapping area of the concave part 331 and the first electrode segment 611 can be increased, and the coupling capacitance between the first electrode lead 610 and the nearest grid line 300 is further increased, so that the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 can be reduced, the brightness uniformity and the stability of a display picture are improved, the shaking marks of the display panel are suppressed, and the display effect of the display panel is improved.
In some possible embodiments, the dimension of protrusion 332 in the second direction X is greater than the dimension of second electrode segment 621 in the second direction X.
The display substrate provided by the embodiment of the application can increase the overlapping area of the protruding part 332 and the second electrode segment 621, and further reduce the coupling capacitance between the second electrode lead 620 and the nearest grid line 300, so that the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 can be reduced, the brightness uniformity and the stability of the display picture can be improved, the shaking marks of the display panel can be restrained, and the display effect of the display panel can be improved.
In some possible embodiments, the size of the recess 331 in the second direction X is equal to the size of the first pixel electrode 510 in the second direction X.
According to the display substrate provided by the embodiment of the application, the coupling capacitance between the concave part 331 and the first pixel electrode 510 is increased, so that the capacitance difference between the first pixel electrode 510 and the second pixel electrode 520 is reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 is further reduced, the brightness uniformity and the stability of a display picture are improved, the shaking marks of the display panel are suppressed, and the display effect of the display panel is improved.
In some possible embodiments, the size of the protrusion 332 in the second direction X is equal to the size of the second pixel electrode 520 in the second direction X.
According to the display substrate provided by the embodiment of the application, the coupling capacitance between the protruding part 332 and the second pixel electrode 520 can be reduced, the total capacitance value generated by the second pixel electrode 520 can be reduced, the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 can be further reduced, the brightness uniformity and the stability of a display picture can be improved, the shaking marks of the display panel can be restrained, and the display effect of the display panel can be improved.
In some possible embodiments, the polarities of the first pixel electrode 510 and the second pixel electrode 520 connected to the same data line 200 are the same.
It should be noted that, the polarities of the data signals transmitted by the same data line 200 are the same, so that the polarities of the first pixel electrode 510 and the second pixel electrode 520 electrically connected to the same data line 200 are the same, and the column inversion can be implemented on the liquid crystal molecules corresponding to each pixel region, so as to inhibit the polarization phenomenon of the liquid crystal molecules, improve the stability of the display panel, and prolong the service life of the display panel.
In some possible embodiments, the distance between the first gate line segment 301 and the first pixel electrode 510 is smaller than the distance between the second gate line segment 302 and the second pixel electrode 520.
It should be noted that, a coupling capacitance is formed between the gate line 300 and the pixel electrode, and the display substrate provided in the embodiment of the present application can reduce the capacitance value between the second pixel electrode 520 and the second gate line segment 302, so as to reduce the sum of the coupling capacitances corresponding to the second pixel electrode 520, reduce the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improve the brightness uniformity and stability of the display panel, inhibit the generation of the shaking marks, and improve the display effect of the display panel.
In some possible embodiments, the size of the first pixel electrode 510 in the first direction Y is greater than the size of the second pixel electrode 520 in the first direction Y.
Fig. 6 is a schematic structural diagram of still another display substrate according to an embodiment of the present application. As shown in fig. 6, the display substrate includes a substrate layer 100, a plurality of data lines 200, a plurality of gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. Wherein, the size of the first pixel electrode 510 in the first direction Y is larger than the size of the second pixel electrode 520 in the first direction Y.
According to the display substrate provided by the embodiment of the application, the dimension of the first pixel electrode 510 in the first direction Y is larger than the dimension of the second pixel electrode 520 in the first direction Y, so that the distance between the first pixel electrode 510 and the first electrode segment 611 is smaller than the distance between the second pixel electrode 520 and the second electrode segment 621, and meanwhile, the distance between the first pixel electrode 510 and the grid line 300 is smaller than the distance between the second pixel electrode 520 and the grid line, the difference between the sum of coupling capacitances corresponding to the second pixel electrode 520 and the first pixel electrode 510 is further reduced, the difference between the first pixel electrode 510 and the second pixel electrode 520 is reduced, the brightness difference between the pixels corresponding to the first pixel electrode 510 and the second pixel electrode 520 is reduced, the brightness uniformity and the stability of a display picture are improved, the generation of a shaking pattern is suppressed, and the display effect of the display panel is improved.
In a second aspect of an embodiment of the present application, there is provided a display panel including: a display substrate as in any one of the first aspects above; the color film substrate is arranged opposite to the display substrate; the liquid crystal layer is arranged between the display substrate and the color film substrate.
Fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present application. As shown in fig. 7, the display panel includes: a display substrate 1000, a liquid crystal layer 1100 and a color film substrate 1200.
It should be noted that, the color filter film and the black matrix are disposed on the color film substrate 1200, where the color filter film is disposed opposite to the pixel electrode to filter out light of other colors, and the black matrix is disposed opposite to the data line 200 and the gate line 300 respectively. The color film substrate 1200 is further provided with a common electrode, the common electrode and the pixel electrode form a vertical electric field, the vertical electric field acts on the liquid crystal layer 1100, and liquid crystal molecules rotate under the action of the electric field to realize the adjustment of light transmission so as to change the luminous brightness of the pixel corresponding to the pixel electrode and form a display picture.
A third aspect of an embodiment of the present application provides a display device, including: the display substrate according to any one of the first aspects above.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present application. As shown in fig. 8, the display device includes a display substrate 1000.
In some possible embodiments, the display device includes: the display panel according to the second aspect.
Fig. 9 is a schematic structural diagram of another display device according to an embodiment of the present application. As shown in fig. 9, the display device includes a display panel 2000. The display panel 2000 may be applied to a touch panel display, a liquid crystal display, a display, etc., and may also be applied to a profile display, for example, a smart watch display, etc.
In the display substrate 1000 provided in the embodiment of the application, the first pixel electrode 510 and the second pixel electrode 520 are disposed in the pixel region formed by intersecting the gate line 300 and the data line 200, and by adjusting the distance H1 between the first electrode segment 611 and the nearest gate line 300 to be smaller than the distance H2 between the second electrode segment 621 and the nearest gate line 300, when the length L1 of the first electrode lead 610 along the second direction X is smaller than the length L2 of the second electrode lead 620 along the second direction X, the distance between the second electrode lead 620 with larger overlapping area and the gate line 300 is increased, and the capacitance difference of the coupling capacitance formed between the different electrode leads and the gate line 300 is reduced, so that the brightness difference of the corresponding pixels of the first pixel electrode 510 and the second pixel electrode 520 is reduced, the stability and the accuracy of the display screen are improved, the pan-head line of the display panel 2000 is suppressed, and the display effect of the display panel 2000 is improved.
It should be noted that, the display device provided in the embodiment of the present application may include a smart phone, a tablet computer, a notebook computer, a television, an intelligent wearable display device, etc., and the intelligent wearable display device may include an intelligent watch, etc., which is not limited in particular.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (15)
1. A display substrate, comprising:
a substrate layer;
the data lines are arranged on one side of the substrate layer and extend along a first direction;
The grid lines and the data lines are arranged on the same side of the substrate layer, the grid lines extend along a second direction, the first direction intersects with the second direction, and the grid lines intersect with the data lines to form pixel areas;
the semiconductor layer comprises a plurality of first semiconductor connecting parts and a plurality of second semiconductor connecting parts, and the orthographic projections of the first semiconductor connecting parts and the second semiconductor connecting parts on the substrate layer overlap with orthographic projections of the grid lines on the substrate layer;
a first pixel electrode and a second pixel electrode are arranged in the pixel region, the first semiconductor connecting part is electrically connected with the first pixel electrode through a first electrode lead, the second semiconductor connecting part is electrically connected with the second pixel electrode through a second electrode lead, the first semiconductor connecting part and the second semiconductor connecting part are electrically connected with the same data line, and the length of the first electrode lead along the second direction is smaller than that of the second electrode lead along the second direction;
wherein a distance between a first electrode segment and the nearest gate line is smaller than a distance between a second electrode segment and the nearest gate line, the first electrode segment being the first electrode lead extending in the second direction, the second electrode segment being the second electrode lead extending in the second direction.
2. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
in the first direction, two grid lines, namely a first grid line and a second grid line, are arranged between two adjacent rows of pixel areas;
the orthographic projection of the first semiconductor connecting part on the substrate layer overlaps with the orthographic projection of the first grid line on the substrate layer, and the orthographic projection of the second semiconductor connecting part on the substrate layer overlaps with the orthographic projection of the second grid line on the substrate layer;
the first semiconductor connection part and the second semiconductor connection part are respectively arranged at two sides of the pixel area.
3. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
the grid line comprises a first grid line segment, a second grid line segment and a third grid line segment, wherein the first grid line segment and the first electrode segment are at least partially oppositely arranged in the first direction, the second grid line segment and the second electrode segment are at least partially oppositely arranged in the first direction, and the third grid line segment is arranged between the first grid line segment and the second grid line segment;
the distance between the first electrode segment and the first gate segment is smaller than the distance between the second electrode segment and the second gate segment.
4. The display substrate according to claim 3, wherein,
the second gate line segment has a dimension in the first direction that is less than a dimension of the first gate line segment in the first direction.
5. The display substrate according to claim 4, wherein,
the size of the first grid line segment in the first direction is larger than the size of the third grid line segment in the first direction, and the size of the second grid line segment in the first direction is smaller than the size of the third grid line segment in the first direction; or alternatively, the first and second heat exchangers may be,
the size of the first grid line section in the first direction is equal to the size of the third grid line section in the first direction, and the size of the second grid line section in the first direction is smaller than the size of the third grid line section in the first direction; or alternatively, the first and second heat exchangers may be,
the first gate line segment has a dimension in the first direction that is greater than a dimension of the third gate line segment in the first direction, and the second gate line segment has a dimension in the first direction that is equal to the dimension of the third gate line segment in the first direction.
6. The display substrate according to claim 3, wherein,
A dimension of the second gate segment in the second direction is greater than a dimension of the second electrode segment in the second direction; and/or the number of the groups of groups,
the first gate segment has a dimension in the second direction that is greater than a dimension of the first electrode segment in the second direction.
7. The display substrate according to claim 6, wherein,
the size of the second grid line section in the second direction is equal to the size of the second pixel electrode in the second direction; and/or the number of the groups of groups,
the first gate line segment has a size in the second direction equal to a size of the first pixel electrode in the second direction.
8. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
the grid line comprises a protruding portion and a recessed portion, wherein the protruding portion is arranged at least partially opposite to the second electrode section in the first direction, the protruding portion protrudes towards the direction away from the second pixel electrode, the recessed portion is arranged at least partially opposite to the first electrode section in the second direction, the recessed portion is recessed towards the direction close to the first pixel electrode, and the protruding portion and the recessed portion are equal in size in the first direction.
9. The display substrate of claim 8, wherein the display substrate comprises a transparent substrate,
the size of the concave part in the second direction is larger than the size of the first electrode section in the second direction; and/or the number of the groups of groups,
the dimension of the projection in the second direction is greater than the dimension of the second electrode segment in the second direction.
10. The display substrate of claim 9, wherein the display substrate comprises a transparent substrate,
the size of the concave part in the second direction is equal to the size of the first pixel electrode in the second direction; and/or the number of the groups of groups,
the dimension of the projection in the second direction is equal to the dimension of the second pixel electrode in the second direction.
11. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
the first pixel electrode and the second pixel electrode connected to the same data line have the same polarity.
12. The display substrate according to claim 3, wherein,
the distance between the first gate line segment and the first pixel electrode is smaller than the distance between the second gate line segment and the second pixel electrode.
13. The display substrate of claim 12, wherein the display substrate comprises a transparent substrate,
The first pixel electrode has a larger dimension in the first direction than the second pixel electrode.
14. A display panel, comprising:
the display substrate of any one of claims 1 to 13;
the color film substrate is arranged opposite to the display substrate;
the liquid crystal layer is arranged between the display substrate and the color film substrate.
15. A display device, comprising:
the display substrate of any one of claims 1 to 13; or alternatively, the first and second heat exchangers may be,
the display panel of claim 14.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202311434103.4A CN117234010A (en) | 2023-10-31 | 2023-10-31 | Display substrate, display panel and display device |
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| CN202311434103.4A CN117234010A (en) | 2023-10-31 | 2023-10-31 | Display substrate, display panel and display device |
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| CN202311434103.4A Pending CN117234010A (en) | 2023-10-31 | 2023-10-31 | Display substrate, display panel and display device |
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