CN117221565A - VGTP-based image display method and device under high delay, medium and electronic equipment - Google Patents
VGTP-based image display method and device under high delay, medium and electronic equipment Download PDFInfo
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Abstract
The disclosure relates to an image display method, device, medium and electronic equipment based on VGTP (video graphics transport protocol) under high delay. The method comprises the following steps: if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, the actual frames are subjected to inter-frame buffer storage in the second preset time so that the number of the buffered actual frames reaches the number of the target frames, and the buffered actual frames are decoded in the first preset time to display the corresponding pictures; if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting the frames into the received actual frames in a first preset time, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures. The method and the device solve the problems of blocking, blurring, faults and the like in the image display of the VGTP protocol, and realize the normal display of the image picture under high delay.
Description
Technical Field
The disclosure relates to the technical field of data transmission, and in particular relates to an image display method, device, medium and electronic equipment based on VGTP (video graphics transport protocol) under high delay.
Background
When the network conditions are very poor, the image display of the real-time compression transmission protocol (VANXVM Graphic Transport Protocol, VGTP) of the computer image based on the man-machine interface can suffer from difficulties, such as jamming, blurring, faults and the like, so that the user experience is affected.
Accordingly, there is a need to provide a new solution to ameliorate one or more of the problems presented in the above solutions.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the present disclosure is to provide an image display method, apparatus, medium, and electronic device based on VGTP under high latency, which overcome, at least in part, one or more of the problems due to the limitations and disadvantages of the related art.
According to a first aspect of embodiments of the present disclosure, there is provided an image display method under VGTP-based high delay, the method comprising:
if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, carrying out inter-frame buffer on the actual frames in the second preset time so that the number of the buffered actual frames reaches the number of the target frames, and decoding the buffered actual frames in the first preset time to display the corresponding pictures;
if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
In an embodiment of the disclosure, if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures, where the steps include:
if the actual frames in the first preset time are only I frames and no P frames, inserting the P frames into the actual frames so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
In an embodiment of the disclosure, if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures, where the steps include:
if the actual frames received by the zero terminal in the first preset time are only the P frames and the I frames are not included, inserting the I frames into the actual frames so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
In an embodiment of the disclosure, if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures, where the steps include:
if the actual frames received by the zero terminal in the first preset time are only the P frames and the I frames are not included, inserting the I frames into the actual frames so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
According to a second aspect of embodiments of the present disclosure, there is provided an image display apparatus based on VGTP under high latency, the apparatus comprising:
the buffer memory module is used for buffering the actual frames in a second preset time if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than that of the target frames, so that the number of the buffered actual frames reaches the number of the target frames, and decoding the buffered actual frames in the first preset time to display the corresponding pictures;
and the frame inserting module is used for inserting frames into the received actual frames in the first preset time if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
In an embodiment of the disclosure, the frame inserting module includes:
and the first frame inserting sub-module is used for inserting the P frames into the actual frames if the actual frames received by the zero terminal in the first preset time are only I frames and no P frames, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
In an embodiment of the disclosure, the frame inserting module includes:
and the second frame inserting sub-module is used for inserting the I frame into the actual frame if the actual frame received by the zero terminal in the first preset time is only the P frame, the I frame is not included, and the P frame is inserted, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and the complemented actual frame is decoded to display a corresponding picture.
According to a third aspect of the embodiments of the present disclosure, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the image display method under VGTP high latency described in any of the embodiments above.
According to a fourth aspect of embodiments of the present disclosure, there is provided an electronic device, comprising:
a processor; and
a memory for storing executable instructions of the processor;
wherein the processor is configured to perform the steps of the VGTP high latency image display method of any of the embodiments described above via execution of the executable instructions.
The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects:
in one embodiment of the disclosure, by the above method, when the actual frames transmitted to the zero terminal are continuous and the actual frames received in the first preset time are smaller than the target frames, the actual frames are buffered between frames, so that the number of buffered actual frames reaches the number of target frames, and the corresponding pictures are displayed; when the actual frames transmitted to the zero terminal are discontinuous, inserting the frames into the actual frames, complementing the number of the actual frames to be consistent with the number of the target frames, and displaying the corresponding frames. The method and the device solve the problems of blocking, blurring, faults and the like in the image display of the VGTP protocol, and realize the normal display of the image picture under high delay.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.
Fig. 1 schematically illustrates a step flow diagram of an image display method under VGTP-based high latency in an exemplary embodiment of the present disclosure;
fig. 2 schematically illustrates a block diagram of an image display apparatus under VGTP-based high delay in an exemplary embodiment of the present disclosure;
FIG. 3 schematically illustrates a program product schematic in an exemplary embodiment of the present disclosure;
fig. 4 schematically illustrates a schematic diagram of an electronic device in an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus a repetitive description thereof will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor devices and/or microcontroller devices.
In this exemplary embodiment, an image display method based on VGTP under high delay is first provided. Referring to what is shown in fig. 1, the method may include:
step S101: if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is smaller than the number of the target frames, the actual frames are subjected to inter-frame buffer storage in the second preset time, so that the number of the buffered actual frames reaches the number of the target frames, and the buffered actual frames are decoded in the first preset time to display the corresponding pictures.
Step S102: if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
By the method, when the actual frames transmitted to the zero terminal are continuous and the actual frames received in the first preset time are smaller than the target frames, the actual frames are subjected to inter-frame buffer storage, so that the number of the buffered actual frames reaches the number of the target frames, and the corresponding pictures are displayed; when the actual frames transmitted to the zero terminal are discontinuous, inserting the frames into the actual frames, complementing the number of the actual frames to be consistent with the number of the target frames, and displaying the corresponding frames. The method and the device solve the problems of blocking, blurring, faults and the like in the image display of the VGTP protocol, and realize the normal display of the image picture under high delay.
Next, the respective steps of the above-described method in the present exemplary embodiment will be described in more detail with reference to fig. 1.
In step S101, if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, the actual frames are buffered in the second preset time, so that the number of the buffered actual frames reaches the number of the target frames, and the buffered actual frames are decoded in the first preset time to display the corresponding pictures.
It should be understood that, the virtual machine generally encodes an actual frame, then sends the encoded actual frame to the zero terminal, and the zero terminal decodes the encoded actual frame after receiving the encoded actual frame, so that the picture of the decoded actual frame is displayed on the zero terminal. However, when the communication delay between the virtual machine and the zero terminal is relatively large, the VGTP protocol transmission can be divided into the following two cases when the zero terminal is displayed:
1) The actual frames transmitted from the virtual machine to the zero terminal are continuous, only the delay is larger, and the actual frames have no frame loss;
2) The actual frames transmitted from the virtual machine to the zero terminal are discontinuous, and there is a case of frame loss, resulting in picture discontinuity when the zero terminal decodes.
When the actual frames transmitted to the zero terminal by the virtual machine are continuous and the number of the actual frames received by the zero terminal in the first preset time is smaller than the number of the target frames, namely, the zero terminal delays when receiving the target frames in the first preset time, so that the zero terminal only receives the actual frames in the first preset time, inter-frame buffering is needed to be carried out on the actual frames, particularly, inter-frame buffering is needed to be carried out on the actual frames in the second preset time, so that the number of the actual frames buffered between frames reaches the number of the target frames in the first preset time, then the zero terminal decodes the actual frames buffered between frames in the first preset time, and displays pictures corresponding to the decoded actual frames buffered between frames. The setting of the first preset time and the second preset time is performed according to actual conditions, and the disclosure is not limited to this. The target frame is a received frame set by the zero terminal in a first preset time. The number of frames of the actual frame and the number of frames of the target frame can be set according to the actual situation, and the present disclosure is not limited thereto.
In one example, when the first preset time is 1S, the target frame is 60 frames, the actual frame is 30 frames, at this time, an inter-frame buffer of 1.5S is set, and the previous second of picture is displayed with a delay of 0.5S, so that the problems of insufficient frame rate and stuck picture can be well solved.
In step S102, if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
It should be understood that when the actual frames transmitted to the zero terminal by the virtual machine are discontinuous, the actual frames need to be inserted, so that the number of the actual frames is complemented to be consistent with the number of the target frames, then the complemented actual frames are decoded at the zero terminal, and the frames corresponding to the complemented actual frames are displayed.
It should be further understood that the inserting of the actual frames is performed so that when the number of the actual frames is complemented to be consistent with the number of the target frames, the inserting is divided into two cases, that is, the actual frames received by the zero terminal in the first preset time have only I frames and no P frames, and the actual frames received by the zero terminal in the first preset time have only P frames and no I frames. The actual frames need to be interpolated according to the situation. The specific manner of performing interpolation on the actual frame is described in the following embodiments, which are not described herein.
In one embodiment, if the actual frames received by the zero terminal according to VGTP protocol are discontinuous, inserting frames into the received actual frames in the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures, including:
if the actual frames received by the zero terminal in the first preset time are only I frames and no P frames, inserting the P frames into the actual frames so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
It should be understood that when the zero terminal only has the I frame and no P frame in the actual frames received in the first preset time, in this case, only the P frame needs to be inserted into the actual frames when the actual frames are inserted, so as to realize that after the actual frames are inserted, the number of the actual frames is complemented to be consistent with the number of the target frames, and then the zero terminal decodes the complemented actual frames to display the pictures corresponding to the decoded and complemented actual frames.
In one example, when the first preset time is 1s and the target frame is 60 frames, the actual frame transmitted for 1s only has an I frame and no P frame, and at this time, 60 frames of pictures can be completed by adopting a frame inserting mode, and then the pictures are displayed at a zero terminal (i.e. a display).
In one embodiment, if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames in the first preset time, so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures, where the inserting frames include:
if the actual frames received by the zero terminal in the first preset time are only the P frames and the I frames are not included, inserting the I frames into the actual frames, reinserting the P frames so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
It should be understood that when the zero terminal only has P frames and no I frames in the actual frames received in the first preset time, the picture will be unclear at this time, in this case, the I frames need to be immediately requested from the virtual machine, so that the virtual machine sends the I frames to the zero terminal, that is, inserts the frames into the actual frames. That is, only an I frame is needed to be inserted into an actual frame to complement the picture, then a P frame is inserted into a target frame to complete the insertion of the actual frame, so that the number of the actual frames is completed to be consistent with the number of the target frames, and then the completed actual frame is decoded at a zero terminal to display the picture corresponding to the decoded and completed actual frame.
In one example, when the first preset time is 1s and the target frame is 60 frames, only P frames and no I frames are transmitted within 1s, and the picture is unclear, at this time, the I frames need to be immediately requested to be transmitted to the virtual machine to complement the picture, then the P frames are inserted, the 60 frames are complemented, and then the picture is displayed at a zero terminal (i.e. a display).
It should be noted that although the steps of the methods of the present disclosure are illustrated in the accompanying drawings in a particular order, this does not require or imply that the steps must be performed in that particular order or that all of the illustrated steps be performed in order to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform, etc. In addition, it is also readily understood that these steps may be performed synchronously or asynchronously, for example, in a plurality of modules/processes/threads.
Further, in the present exemplary embodiment, there is also provided an image display apparatus based on VGTP under high delay. Referring to fig. 2, the apparatus 200 may include a buffering module 201 and a frame inserting module 202.
The buffer module 201 is configured to buffer the actual frames in a second preset time if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, so that the number of the buffered actual frames reaches the number of the target frames, and decode the buffered actual frames in the first preset time to display the corresponding frames.
And a frame inserting module 202, configured to insert frames of the received actual frames within the first preset time if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decode the complemented actual frames to display the corresponding pictures.
In one embodiment, the frame insertion module 202 includes:
and the first frame inserting sub-module is used for inserting the P frames into the actual frames if the actual frames received by the zero terminal in the first preset time are only I frames and no P frames, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
In one embodiment, the frame insertion module 202 includes:
and the second frame inserting sub-module is used for inserting the I frame into the actual frame and reinserting the P frame if the actual frame received by the zero terminal in the first preset time is only the P frame and is free of the I frame, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
The specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.
It should be noted that although in the above detailed description several modules or units of a device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit in accordance with embodiments of the present disclosure. Conversely, the features and functions of one module or unit described above may be further divided into a plurality of modules or units to be embodied. The components shown as modules or units may or may not be physical units, may be located in one place, or may be distributed across multiple network elements. Some or all of the modules may be selected according to actual needs to achieve the objectives of the disclosed solution. Those of ordinary skill in the art will understand and implement the present application without undue burden.
In an exemplary embodiment of the present disclosure, there is also provided a computer readable storage medium having stored thereon a computer program, which when executed by a processor, can implement the steps of the VGTP high latency based image display method described in any of the above embodiments. In some possible embodiments, the aspects of the present application may also be implemented in the form of a program product comprising program code for causing a terminal device to carry out the steps according to the various exemplary embodiments of the present application as described in the VGTP-based high-latency image display method section of the present specification, when said program product is run on the terminal device.
Referring to fig. 3, a program product 300 for implementing the above-described method according to an embodiment of the present application is described, which may employ a portable compact disc read only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The computer readable storage medium may include a data signal propagated in baseband or as part of a carrier wave, with readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A readable storage medium may also be any readable medium that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).
In an exemplary embodiment of the present disclosure, an electronic device is also provided, which may include a processor, and a memory for storing executable instructions of the processor. Wherein the processor is configured to perform the steps of the VGTP high latency based image display method described in any of the embodiments above via execution of the executable instructions.
Those skilled in the art will appreciate that the various aspects of the application may be implemented as a system, method, or program product. Accordingly, aspects of the application may be embodied in the following forms, namely: an entirely hardware embodiment, an entirely software embodiment (including firmware, micro-code, etc.) or an embodiment combining hardware and software aspects may be referred to herein as a "circuit," module "or" system.
An electronic device 600 according to this embodiment of the application is described below with reference to fig. 4. The electronic device 600 shown in fig. 4 is merely an example, and should not be construed as limiting the functionality and scope of use of embodiments of the present application.
As shown in fig. 4, the electronic device 600 is embodied in the form of a general purpose computing device. Components of electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one memory unit 620, a bus 630 connecting the different system components (including the memory unit 620 and the processing unit 610), a display unit 640, etc.
Wherein the storage unit stores program codes that can be executed by the processing unit 610, so that the processing unit 610 performs the steps according to various exemplary embodiments of the present application described in the above-described VGTP-based high-latency image display method section of the present specification. For example, the processing unit 610 may perform the steps as shown in fig. 1.
The memory unit 620 may include readable media in the form of volatile memory units, such as Random Access Memory (RAM) 6201 and/or cache memory unit 6202, and may further include Read Only Memory (ROM) 6203.
The storage unit 620 may also include a program/utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment.
Bus 630 may be a local bus representing one or more of several types of bus structures including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or using any of a variety of bus architectures.
The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboard, pointing device, bluetooth device, etc.), one or more devices that enable a user to interact with the electronic device 600, and/or any device (e.g., router, modem, etc.) that enables the electronic device 600 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 650. Also, electronic device 600 may communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the Internet, through network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 over the bus 630. It should be appreciated that although not shown, other hardware and/or software modules may be used in connection with electronic device 600, including, but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
From the above description of embodiments, those skilled in the art will readily appreciate that the example embodiments described herein may be implemented in software, or may be implemented in software in combination with the necessary hardware. Accordingly, the technical solution according to the embodiments of the present disclosure may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (may be a CD-ROM, a usb disk, a mobile hard disk, etc.) or on a network, and include several instructions to cause a computing device (may be a personal computer, a server, or a network device, etc.) to perform the above-described VGTP-based high-latency image display method according to the embodiments of the present disclosure.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
Claims (8)
1. An image display method based on VGTP under high delay is characterized in that the method comprises the following steps:
if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, carrying out inter-frame buffer on the actual frames in the second preset time so that the number of the buffered actual frames reaches the number of the target frames, and decoding the buffered actual frames in the first preset time to display the corresponding pictures;
if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
2. The VGTP high latency based image display method according to claim 1, wherein if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the completed actual frames to display the corresponding pictures thereof, comprising:
if the actual frames received by the zero terminal in the first preset time are only I frames and no P frames, inserting the P frames into the actual frames so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
3. The VGTP high latency based image display method according to claim 1, wherein if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, inserting frames into the received actual frames within the first preset time so as to complement the number of the actual frames to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures thereof, comprising:
if the actual frames received by the zero terminal in the first preset time are only the P frames and the I frames are not included, inserting the I frames into the actual frames, reinserting the P frames so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
4. An image display device based on VGTP under high latency, the device comprising:
the buffer memory module is used for buffering the actual frames in a second preset time if the actual frames received by the zero terminal according to the VGTP protocol are continuous and the number of the actual frames received in the first preset time is less than the number of the target frames, so that the number of the buffered actual frames reaches the number of the target frames, and decoding the buffered actual frames in the first preset time to display the corresponding pictures;
and the frame inserting module is used for inserting frames into the received actual frames in the first preset time if the actual frames received by the zero terminal according to the VGTP protocol are discontinuous, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display corresponding pictures.
5. The VGTP high latency based image display device according to claim 4, wherein the frame insertion module comprises:
and the first frame inserting sub-module is used for inserting the P frames into the actual frames if the actual frames received by the zero terminal in the first preset time are only I frames and no P frames, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
6. The VGTP high latency based image display device according to claim 4, wherein the frame insertion module comprises:
and the second frame inserting sub-module is used for inserting the I frame into the actual frame and reinserting the P frame if the actual frame received by the zero terminal in the first preset time is only the P frame and is free of the I frame, so that the number of the actual frames is complemented to be consistent with the number of the target frames, and decoding the complemented actual frames to display the corresponding pictures.
7. A computer-readable storage medium having stored thereon a computer program, characterized in that the program when executed by a processor realizes the steps of the image display method under VGTP high delay as claimed in any of claims 1 to 3.
8. An electronic device, comprising:
a processor; and
a memory for storing executable instructions of the processor;
wherein the processor is configured to perform the steps of the image display method under VGTP high latency as claimed in any of claims 1 to 3 via execution of the executable instructions.
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