CN117218989A

CN117218989A - Display panel, driving method thereof and computer readable storage medium

Info

Publication number: CN117218989A
Application number: CN202311042036.1A
Authority: CN
Inventors: 于泳; 解红军; 许传志
Original assignee: Yungu Guan Technology Co Ltd; Hefei Visionox Technology Co Ltd
Current assignee: Yungu Guan Technology Co Ltd; Hefei Visionox Technology Co Ltd
Priority date: 2023-08-16
Filing date: 2023-08-16
Publication date: 2023-12-12

Abstract

The application provides a display panel, a driving method thereof and a computer readable storage medium, concretely, the driving method of the display panel comprises the following steps: receiving a trigger instruction; setting a refresh rate of a first display area of the display panel to a first refresh rate in response to a trigger instruction, the display frame of the first display area including a write frame and a hold frame; in the same holding frame of the first display region, the data voltage of the data line is held unchanged. In the application, the driving chip is arranged in the same holding frame of the first display area, and the data voltage of the data line is kept unchanged, so that the power consumption of the driving chip can be reduced.

Description

Display panel, driving method thereof and computer readable storage medium

Technical Field

The application belongs to the technical field of display, and particularly relates to a display panel, a driving method thereof and a computer readable storage medium.

Background

With the development of display technology, the application scenes of the display panel are more and more, and the display requirements of users on the display panel are more and more diversified, for example, the display panel can support multiple refresh frequencies at present.

Meanwhile, low power consumption is always a hot spot pursued by the display panel industry, but the display panel supporting multiple refresh frequencies still has the problem of high power consumption.

Disclosure of Invention

The application provides a display panel, a driving method thereof and a computer readable storage medium, which can reduce power consumption of the display panel.

In order to solve the technical problems, the application adopts a technical scheme that: provided is a driving method of a display panel, the driving method including: receiving a trigger instruction; setting a refresh rate of a first display area of the display panel to a first refresh rate in response to the trigger instruction, wherein a display frame of the first display area comprises a write frame and a hold frame; in the same holding frame of the first display area, the data voltage of the data line is kept unchanged.

The application adopts another technical scheme that: there is provided a display panel comprising a processor, a memory and a communication circuit, the processor being coupled to the memory and the communication circuit, respectively, the memory having program data stored therein, the processor implementing steps in a method according to any of the above method embodiments by executing the program data in the memory.

The application adopts another technical scheme that: there is provided a computer readable storage medium storing a computer program executable by a processor to perform the steps of any one of the method embodiments described above.

The beneficial effects of the application are as follows: the application sets the driving chip in the same holding frame of the first display area, keeps the data voltage of the data line unchanged, and can reduce the power consumption of the driving chip.

Drawings

For a clearer description of the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the description below are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art, wherein:

FIG. 1 is a flow chart of a driving method of a display panel according to an embodiment of the application;

FIG. 2 is a schematic flow chart of step S2 in FIG. 1;

FIG. 3 is a schematic diagram of a display area of a display panel according to an embodiment of the application;

FIG. 4 is a schematic diagram of a display frame composition in the display panel shown in FIG. 3;

FIG. 5 is a schematic view of another embodiment of a display area in a display panel according to the present application;

fig. 6 is a schematic diagram of SW signals in the display panel shown in fig. 5;

FIG. 7 is a schematic diagram of an embodiment of a display frame composition in a display panel according to the present application;

FIG. 8 is a schematic diagram of a display panel according to an embodiment of the application;

FIG. 9 is a schematic diagram of a computer-readable storage medium according to an embodiment of the present application;

reference numerals illustrate: 1, a data line; 2 a first display area; 3 a second display area; 4, driving a chip; a 20 display panel; a processor 21; 22 memories; 23 a communication circuit; 400 a computer readable storage medium; 410 computer program.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

In order to better explain the scheme of the present application, the basic structure and driving process of the display panel will be briefly described.

The display panel generally includes a scan driving circuit and pixel circuits arranged in an array in a display area. The scanning driving circuit comprises a plurality of shift registers which are arranged in a cascading way, the pixel circuit is matched with the light emitting device to form a sub-pixel, each stage of shift register is correspondingly connected with one scanning line, scanning signals are provided for the sub-pixels in the corresponding row through the scanning lines, and each column of sub-pixels is correspondingly connected with one data line.

In the picture display process, data writing is carried out on each pixel circuit in a progressive scanning mode, namely, a shift register provides scanning signals for the pixel circuits through scanning lines, data voltages on the data lines are transmitted to the corresponding pixel circuits corresponding to the duration of conducting potential of the scanning signals so as to realize data writing, and each pixel circuit outputs driving current according to the data voltages to drive a light emitting device to emit light for display. When the scanning line provides a cut-off potential, the data voltage of the data line cannot be transmitted to the corresponding pixel circuit, and data writing is not performed.

In the related art, for a display panel capable of switching display frequencies, display frames of sub-pixels may be divided into a write frame and a sustain frame. In the writing frame, the shift register provides a conduction potential for the pixel circuit to enable the data voltage to be written into the pixel circuit; in the hold frame, the shift register supplies a cut-off potential to the pixel circuit, and the pixel circuit does not perform data writing any more.

In addition, in an embodiment of the present application, the display panel supports a plurality of refresh frequencies. For convenience of explanation, the highest refresh rate is referred to as a high refresh rate, the other refresh rates are referred to as low refresh rates, the driving mode at the high refresh rate is referred to as a high-frequency driving mode, and the driving mode at the low refresh rate is referred to as a low-frequency driving mode. It will be appreciated that the frame rate (also known as refresh rate) of the high frequency drive mode is higher than the frame rate of the low frequency drive mode. Specifically, the frame rate (refresh rate) refers to the number of times the electron beam repeatedly scans an image on the screen per unit time.

In the high frequency drive mode, the display frame includes only the write frame, and in the low frequency drive mode, the display frame includes both the write frame and the hold frame. Wherein the write frame and the hold frame differ in that: in the writing frame, the shift register provides a conduction potential for the pixel circuit to enable the data voltage to be written into the pixel circuit; in the hold frame, the shift register supplies a cut-off potential to the pixel circuit, and the pixel circuit does not perform data writing any more. That is, the display data is refreshed in the write frame, the displayed picture is changed constantly, and the picture will not change in the hold frame.

The following describes the technical scheme of the application. First, the driving method of the display panel of the present application is executed by the driving chip 4, and the driving chip 4 generally receives an instruction from the control motherboard and drives the display screen to display according to the instruction.

Referring to fig. 1, in an embodiment, a driving method of a display panel includes:

s1, receiving a trigger instruction.

Specifically, the driving chip 4 receives a trigger instruction sent by the control main board, and then outputs data to the display screen body according to the trigger instruction, so that the display screen body displays pictures.

And S2, setting the refresh rate of a first display area of the display panel to be a first refresh rate in response to the trigger instruction, wherein a display frame of the first display area comprises a writing frame and a holding frame.

Specifically, the first display area 2 of the display panel may be the entire display area or a part of the display area in the display panel. In the display area of the same display panel, a plurality of first display areas 2 may be included, and may be used for displaying different pictures, if the display area includes a plurality of first display areas 2 at the same time, as long as a trigger instruction sets the refresh rate corresponding to the first display areas 2 to a first refresh frequency, the subsequent steps are executed for the first display areas 2.

Wherein the first refresh rate is a low refresh rate that is less than a highest refresh rate of the display panel. For example, when the highest refresh rate of the display panel is 240HZ, the first refresh rate may be 120HZ or 60HZ.

In one embodiment, when the refresh rate is 120HZ, 120 frames are displayed in the corresponding display area 1s, and all of the 120 frames are write frames. When the first refresh rate is smaller than the highest refresh rate of the display panel, for example, the first refresh rate is 60HZ, 120 frames are still displayed in the corresponding display area 1s, but 60 frames in the 120 frames are writing frames, and the other 60 frames are holding frames.

And S3, in the same holding frame of the first display area, the data voltage of the data line is kept unchanged.

Specifically, as is clear from the above description, in the holding frame, the display frame does not need to be changed, the data voltage of the data line 1 is not transmitted to the corresponding pixel circuit, so in the holding frame, the specific value of the data voltage on the data line 1 does not affect the display frame, and in order to avoid abrupt change of the data voltage of the data line 1, the power consumption of the driving chip 4 is increased, in this embodiment, the design that the data voltage of the data line 1 is unchanged in the same holding frame of the first display area 2, that is, in the same holding frame, the abrupt change of the data voltage on each data line 1 does not occur.

From the above, it can be seen that, in the present application, since the voltage on the data line 1 in the hold frame does not affect the display screen, the data voltage of the data line 1 is kept unchanged in the hold frame, so that power consumption caused by abrupt change of the voltage output by the driving chip 4 can be avoided, excessive power consumption of the battery can be avoided, and the service lives of the display panel and the display device can be prolonged.

Optionally, in step S3, in the same holding frame of the first display area 2, the step of holding the data voltage of the data line 1 unchanged further includes:

s31, with the switching of the holding frame of the first display area, the writing data voltage of the data line is kept unchanged.

When switching from one holding frame to another holding frame, the writing data voltage of the data line 1 is kept unchanged, so that the writing data voltage of the data line 1 is kept unchanged in the continuous holding frames, the power consumption can be reduced, the excessively high power consumption of a battery is avoided, and the service lives of the display panel and the display device are prolonged.

s32, along with the switching of the holding frame of the first display area, the writing data voltage of the setting data line changes according to a preset rule.

When switching from one holding frame to another, the write data voltage of the data line 1 is set to change according to a preset rule, so that the write data voltage of the data line 1 does not change randomly, and the power consumption of the random change of the data voltage is larger than the power consumption of the random change of the data voltage according to the preset rule, so that the power consumption of the driving chip 4 can be further reduced by the setting.

When the write data voltage of the data line 1 is set to change according to a preset rule with the switching of the hold frame, the following design may be performed: with the switching of the hold frame, the write data voltage of the data line 1 gradually rises or falls.

In summary, with the switching of the holding frame of the first display area 2, the writing data voltage of the setting data line 1 changes according to the preset rule, so that the extra power consumption of the display panel caused by the random change of the writing data voltage in the holding frame in the prior art can be reduced, and the effect of reducing the power consumption of the display panel can be further played.

Optionally, in step S3, in the same holding frame of the first display area 2, the step of holding the data voltage of the data line 1 unchanged includes:

s33, in the same holding frame of the first display area, the writing data voltage of the data line is kept to be a preset fixed value.

The picture displayed in the first display area 2 corresponding to the first refresh rate is already written in the writing frame and no new picture is written in the holding frame, but the data line 1 is still in operation, and by giving the data line 1 a fixed voltage, this voltage will not be written in the actual pixel nor actually emit light. The written fixed potential makes the data line 1 not operate, only hold, and at the same time does not affect the picture, so as to reduce the power consumption. The preset fixed value can be set according to actual requirements, and the application is not limited.

In one embodiment, the predetermined fixed value ranges from 0.2V to 7.9V, for example, the predetermined fixed value is 0.2V, 0.8V, 1V, 2V, 3V, 4V, 5V, 6V, 7V, or 7.9V.

and S34, in the same holding frame of the first display area, the data line is kept in a high-resistance state.

In the high-resistance Hi-Z setting, the driving chip 4 does not control the voltage in the data line 1, so that the data line 1 is suspended and is not assigned with a value, a display picture is not adjusted, the data voltage in the data line 1 is unchanged, and the power consumption of the driving chip 4 in the display panel is reduced.

Optionally, in step S3, in the same holding frame of the first display area 2, the step of holding the data voltage of the data line unchanged includes:

and S35, responding to the trigger instruction, further setting the refresh rate of the second display area 3 to be a second refresh rate larger than the first refresh rate, keeping the data voltage of the data line 1 unchanged in the same holding frame of the first display area 2, and setting the writing data voltage of the data line 1 to be equal to the target data voltage.

Specifically, in the above scheme, the display area is divided into a plurality of different areas, and different refresh rates are set for the different areas. Wherein different areas are arranged in the extending direction of the data line 1 in the partitioning, and the different areas are connected to the same data line. In the dividing, the display area may be divided into 2 areas, or may be divided into 3, 4 or more areas, but for convenience of description, the dividing into 2 areas is described herein, that is, the display area is divided into the first display area 2 and the second display area 3 at this time, and the first display area 2 and the second display area 3 are adjacently disposed along the extending direction of the data line at this time, and the first display area 2 and the third display area 3 are connected to the same data line.

While the second refresh rate is greater than the first refresh rate, e.g., the first refresh rate is 60HZ and the second refresh rate is 120HZ.

In the same scanning period, if the second display area 3 is scanned first and then the first display area 2 is scanned, the target data voltage is the data voltage written into the data line 1 when the second display area 3 is scanned last before the first display area 2 is scanned. In the same scanning period, if the first display area 2 is scanned first and then the second display area 3 is scanned, the target data voltage is the data voltage written into the data line 1 when the second display area 3 is scanned first after the first display area 2 is scanned.

The following is explained in connection with examples:

assuming that the data voltage written to the data line 1 is a when the second display area 3 is scanned for the last time before the first display area 2 is scanned (the data voltage written to the data line 1 is a when the last pixel row of the second display area 3 is scanned in the case of progressive scanning), the data voltage written to the data line 1 is always a in the holding frame of the first display area 2. Assuming that the data voltage written to the data line 1 is B when the second display area 3 is scanned for the first time after the first display area 2 is scanned (i.e., the data voltage written to the data line 1 is B when the first row of pixels of the second display area 3 is scanned in the case of progressive scanning), the data voltage written to the data line 1 is always B in the holding frame of the first display area 2.

The design can keep the voltage of the data line 1 unchanged in the switching process of the first display area 2 and the second display area 3, and avoid the power consumption caused by abrupt change of the data voltage output by the driving chip 4.

Step S2 further includes:

s20, further setting the refresh rate of the second display area 3 to a second refresh rate different from the first refresh rate in response to the trigger instruction, generating an SW signal, wherein the period of the SW signal is equal to the scanning period of the scanning signal, and the first display area 2 and the second display area 3 are arranged in the extending direction of the data line 1; in the current scanning period, the display frame scanned to the first display area 2 is determined when the SW signal is at the first level, and the display frame scanned to the second display area 3 is determined when the SW signal is at the second level.

Specifically, the scanning period is a period of time for scanning the display panel once, for example, the display panel includes 100 pixel rows, and the scanning period is a period of time for scanning 100 pixel rows at a time. If the highest refresh frequency of the display panel is 120Hz, there are 120 scan periods per unit time, and in fig. 4, the scan period is T.

The SW signal is generated according to the relative positions of the first display area 2 and the second display area 3 indicated by the trigger instruction. The SW signal is used to indicate whether the first display area 2 or the second display area 3 is currently scanned during scanning.

In each scanning period, when the SW signal is at a first level, the display frame scanned to the first display area 2 is determined, when the SW signal is at a second level, the display frame scanned to the second display area 3 is determined, in an application scene, the first level is a high level, the second level is a low level, in other application scenes, the first level may be a low level, and the second level may be a high level. Wherein, when the display area is divided in the manner of fig. 3, the waveform diagram of the SW signal is shown in fig. 4, and when the display area is divided in the manner of fig. 5, the waveform diagram of the SW signal is shown in fig. 6.

After the SW signal is generated, the display frame of the first display area 2 and the display frame of the second display area 3 may be determined, and the display frame of the first display area 2 may be further divided into a write frame and a hold frame.

Referring to fig. 2, in step S2, the step of dividing the display frame of the first display area 2 into a write frame and a hold frame includes:

s21, determining the ratio of the highest refresh rate to the first refresh rate.

The highest refresh rate and the first refresh rate of the display panel are obtained, and the ratio of the highest refresh rate and the first refresh rate is calculated.

S22, setting a first frame in the display frames of the first display area 2 as a writing frame, and simultaneously setting (K-1) holding frames between any two adjacent writing frames in the display frames of the first display area 2, wherein K is a ratio.

Referring to fig. 4, when the highest refresh rate of the display panel is 120Hz and the first refresh rate is 60Hz, the ratio K is 2, and among the display frames of the first display area 2, the first frame is a writing frame, and 1 holding frame exists between any two writing frames.

Referring to fig. 7, when the highest refresh rate of the display panel is 120Hz and the first refresh rate is 30Hz, the ratio K is 4, and among the display frames of the first display area 2, the first frame is a writing frame, and 3 holding frames exist between any two writing frames.

It should be noted that, the scheme of the present application is described in detail above with the display area divided into a plurality of different areas and the different areas set with different refresh rates, but the scheme of the present application may also be applied to an application scenario where the display area is not divided into a plurality of different areas, for example, in an application scenario, in a first period, the refresh rate of the entire display area of the display panel is the highest refresh rate, but in a second period, the refresh rate of the entire display area of the display panel becomes less than the first refresh rate of the highest refresh rate under the triggering of the triggering command. That is, in this case, the first display region is the entire display region of the display panel, and similarly, the data voltage of the data line is kept unchanged in the same holding frame of the first display region in the second period, so that the power consumption of the driving chip can be reduced.

Referring to fig. 8, the present application further provides a display panel 20, which includes a processor 21, a memory 22 and a communication circuit 23, wherein the processor 21 is coupled to the memory 22 and the communication circuit 23, respectively, the memory 22 stores program data, and the processor 21 implements the steps of the method according to any one of the above embodiments by executing the program data in the memory 22. In operation, the display panel 20 performs the method steps in any of the above embodiments, and the detailed method steps are referred to in the above description, which is not repeated herein.

The display panel 20 may be applied to a mobile or fixed terminal such as an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a smart band, a smart watch, an ultra-personal computer, or a navigator.

Referring to fig. 9, the present application further provides a computer readable storage medium 400, where the computer readable storage medium 400 stores a computer program 410, and the computer program 410 is executable by a processor to implement the steps as described in any of the above method embodiments.

The computer readable storage medium 400 may be a device such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, which may store the computer program 410, or may be a server storing the computer program 410, which may send the stored computer program 410 to another device for running, or may also run the stored computer program 410 itself.

The foregoing description is only illustrative of the present application and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present application.

Claims

1. A driving method of a display panel, the method comprising:

receiving a trigger instruction;

setting a refresh rate of a first display area of the display panel to a first refresh rate in response to the trigger instruction, wherein a display frame of the first display area comprises a write frame and a hold frame;

in the same holding frame of the first display area, the data voltage of the data line is kept unchanged.

2. The driving method according to claim 1, wherein the step of holding the data voltage of the data line unchanged in the same holding frame of the first display area further comprises:

the write data voltage of the data line is maintained as the hold frame of the first display region is switched.

3. The driving method according to claim 1, wherein the step of holding the data voltage of the data line unchanged in the same holding frame of the first display area further comprises:

setting the writing data voltage of the data line to change according to a preset rule along with the switching of the holding frame of the first display area;

preferably, the step of setting the write data voltage of the data line to vary according to a preset rule includes:

the write data voltage of the data line is set to be increased or decreased with the switching of the hold frame of the first display area.

4. The driving method according to claim 1, wherein the step of holding the data voltage of the data line unchanged in the same holding frame of the first display area includes:

in the same holding frame of the first display area, the writing data voltage of the data line is held to be a preset fixed value;

preferably, the preset fixed value ranges from 0.2V to 7.9V.

5. The driving method according to claim 1, wherein the step of holding the data voltage of the data line unchanged in the same holding frame of the first display area includes:

in the same holding frame of the first display area, the data line is held in a high resistance state.

6. The driving method according to claim 1, wherein the step of holding the data voltage of the data line unchanged in the same holding frame of the first display area includes:

the method comprises the steps that in response to a trigger instruction, the refresh rate of a second display area is further set to be larger than the second refresh rate of the first refresh rate, in the same holding frame of the first display area, the data voltage of the data line is kept unchanged, the writing data voltage of the data line is set to be equal to a target data voltage, the first display area and the second display area are adjacently arranged along the extending direction of the data line, and the first display area and the second display area are connected with the same data line;

in the same scanning period, the second display area is scanned first, then the first display area is scanned, the target data voltage is the data voltage written into the data line when the first display area is scanned last before the first display area is scanned, or in the same scanning period, the first display area is scanned first, then the second display area is scanned, and the target data voltage is the data voltage written into the data line when the first scanning is performed after the first display area is scanned.

7. The driving method according to claim 1, wherein before the display frame of the first display area includes a write frame and a hold frame, further comprising:

further setting a refresh rate of a second display area to a second refresh rate different from the first refresh rate in response to the trigger instruction, generating an SW signal, wherein a period of the SW signal is equal to a scanning period of a scanning signal, the first display area and the second display area being arranged in an extending direction of the data line;

and in the current scanning period, when the SW signal is at a first level, determining the display frame scanned to the first display area, and when the SW signal is at a second level, determining the display frame scanned to the second display area.

8. The driving method according to claim 1, wherein the display frame of the first display area includes a write frame and a hold frame, comprising:

determining a ratio of the highest refresh rate to the first refresh rate;

setting a first frame in the display frames of the first display area as a writing frame, and simultaneously setting (K-1) holding frames between any two adjacent writing frames in the display frames of the first display area, wherein K is the ratio.

9. A display panel comprising a processor, a memory and a communication circuit, the processor being coupled to the memory and the communication circuit, respectively, the memory having program data stored therein, the processor implementing the steps of the method according to any of claims 1 to 8 by executing the program data in the memory.

10. A computer readable storage medium, characterized in that it stores a computer program executable by a processor to implement the steps in the method according to any one of claims 1-8.