CN117215136A - Waveguide integrated logic gate device unit, photoelectric logic gate and encryption transmission method thereof - Google Patents
Waveguide integrated logic gate device unit, photoelectric logic gate and encryption transmission method thereof Download PDFInfo
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- CN117215136A CN117215136A CN202311187682.7A CN202311187682A CN117215136A CN 117215136 A CN117215136 A CN 117215136A CN 202311187682 A CN202311187682 A CN 202311187682A CN 117215136 A CN117215136 A CN 117215136A
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- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000005540 biological transmission Effects 0.000 title claims abstract description 12
- 230000003287 optical effect Effects 0.000 claims abstract description 21
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 15
- 239000010703 silicon Substances 0.000 claims abstract description 15
- 230000004888 barrier function Effects 0.000 claims abstract description 6
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 3
- 230000008020 evaporation Effects 0.000 claims abstract description 3
- 238000001704 evaporation Methods 0.000 claims abstract description 3
- 239000002135 nanosheet Substances 0.000 claims abstract description 3
- 230000005693 optoelectronics Effects 0.000 claims description 12
- 239000000969 carrier Substances 0.000 claims description 5
- 238000005286 illumination Methods 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims description 3
- 230000009471 action Effects 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 230000008859 change Effects 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 238000007539 photo-oxidation reaction Methods 0.000 claims description 2
- 238000005036 potential barrier Methods 0.000 claims description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 10
- 238000013461 design Methods 0.000 abstract description 2
- 238000004891 communication Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- 238000012545 processing Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 230000004298 light response Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000000638 stimulation Effects 0.000 description 1
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Abstract
According to the waveguide integrated logic gate device unit, the photoelectric logic gate and the encryption transmission method thereof, a 220nm SOI substrate is selected as a substrate of a photon chip, a first ridge waveguide and a third ridge waveguide are sequentially etched on substrate silicon, a source electrode and a drain electrode are respectively arranged on two sides of the ridge waveguide, an evaporation aluminum oxide layer is deposited on silicon and used for isolating other structures on the silicon and aluminum oxide layer, BP is transferred to the source electrode, the drain electrode, the first ridge waveguide and the third ridge waveguide, the source electrode is arranged close to the first ridge waveguide, the drain electrode is arranged close to the third ridge waveguide, BP and Au are contacted to form a barrier region, and the barrier region is used for laser to pass through; the first ridge waveguide and the third ridge waveguide are provided with 1 multiplied by 2 optical switches, the input ends of the optical switches are connected with laser, and the two output ends of the optical switches are respectively connected with the first ridge waveguide and the third ridge waveguide, wherein BP is black phosphorus nano-sheet. The invention realizes the XNOR logic gate and designs a physical layer encryption and decryption scheme based on the XNOR gate.
Description
Technical Field
The invention relates to the technical field of photoelectric information, in particular to a waveguide integrated logic gate device unit, a photoelectric logic gate and an encryption transmission method thereof.
Background
For binary optical signal processing, cascading multiple detectors is a widely used strategy at present. The AND OR functions may be implemented by two separate uv OR visible photodetectors in series OR parallel. The NOT function may be implemented by a photodetector in series with a resistor. However, since the input and output signals of the optoelectronic logic gates are in different domains, other complex logic functions cannot be created by combining the basic logic functions. To enrich the functionality, some novel photocoupling mechanisms were introduced, valley-polarization controlled optical responses were used to construct NAND gates, and the NOR function was performed by the ultrafast optical field controlled virtual-real carriers. Despite much effort, no nonlinear electro-optic logic gate and multilayer composite logic function has been reported until now.
Silicon-based photoelectrons are one of the best candidate systems of future computing systems, and have the advantages of large-area integration, high reliability and the like. The development of silicon-based compatible photoelectric logic devices is expected to greatly improve the information processing efficiency, and can be integrated with other active and passive optical elements. It is therefore of great interest to design a multifunctional optoelectronic logic gate based on narrow bandgap semiconductors for silicon chip integration. Although some photoelectric logic gates based on nano materials are reported at present, all the photoelectric logic gates work in an ultraviolet-visible band, do not relate to a communication band, and cannot be compatible with the existing silicon photonic chips. In recent years, two-dimensional materials exhibit excellent photoelectric characteristics, in which a narrow band gap BP exhibits the potential for strong mid-infrared light response and high-speed response. Two-dimensional materials have achieved tremendous results with silicon chip integrated photodetectors, modulators, transistor devices, thanks to the interplay of van der waals interactions between layers. The waveguide integrated photoelectric device brings great possibility for the programmable photoelectric device, and is expected to realize further improvement in the aspects of functional richness, integration level and area utilization efficiency.
The photoelectric logic gate is a basic element unit for photoelectric network signal processing and is also a basic unit for optical calculation, so that the research of the photoelectric logic gate becomes a hot research direction in the field of photoelectric signal processing. Logical encryption of signals is one of the important applications of logical operations, and methods for processing higher rate signals are studied. In the prior art, an XNOR logic gate is not realized by multi-waveguide integrated photoelectric signal processing, and a logic encryption scheme is not realized by using an on-chip integrated photoelectric logic gate.
Disclosure of Invention
It is a first object of the present invention to provide a multi-waveguide integrated logic gate device unit, which addresses the problems of the prior art.
For this purpose, the above object of the present invention is achieved by the following technical solutions:
a multi-waveguide integrated logic gate device cell, characterized by: a 220nm SOI substrate is selected as a base of a photon chip, a first ridge waveguide and a third ridge waveguide are sequentially etched on base silicon, a source electrode and a drain electrode are respectively arranged on two sides of the ridge waveguide, wherein the source electrode and the drain electrode are composite electrodes containing Au layers, an evaporation aluminum oxide layer is deposited on silicon for isolating silicon and other structures on the aluminum oxide layer,
transferring BP to a source electrode, a drain electrode, a first ridge waveguide and a third ridge waveguide, wherein the source electrode is close to the first ridge waveguide, the drain electrode is close to the third ridge waveguide, BP and Au are contacted to form a barrier region, and the barrier region is used for laser to pass through;
the first ridge waveguide and the third ridge waveguide are provided with 1 multiplied by 2 optical switches, the input ends of the optical switches are connected with laser, the two output ends of the optical switches are respectively connected with the first ridge waveguide and the third ridge waveguide, the optical switches are used for switching photons between the first ridge waveguide and the third ridge waveguide, and BP is black phosphorus nano-sheet.
The invention can also adopt or combine the following technical proposal when adopting the technical proposal:
as a preferable technical scheme of the invention: the distance between the source electrode and the first ridge waveguide and the distance between the drain electrode and the third ridge waveguide are 1 μm.
As a preferable technical scheme of the invention: the distance between the first ridge waveguide and the third ridge waveguide is 10 μm.
As a preferable technical scheme of the invention: the BP is covered with an h-BN film layer, the h-BN film layer prevents the BP from photo-oxidation reaction with water oxygen in the air,
as a preferable technical scheme of the invention: the light-transmitting states of the first ridge waveguide and the third ridge waveguide controlled by the optical switch are used as input I together; and a bias voltage is synchronously input to the drain electrode as an input two, the Au/BP/Au device unit reacts to illumination and bias conditions, photo-generated carriers are generated under illumination, the carriers are transported under the combined action of the potential barrier and the bias voltage, and a current value between the source electrode and the drain electrode is used as an output signal of the device.
As a preferable technical scheme of the invention: in the first input, a continuous voltage signal is applied to the optical switch, the path of laser is switched between a first ridge waveguide and a third ridge waveguide along with the change of a voltage value, the laser is defined as being input into 1 through the first ridge waveguide, and the laser is defined as being input into 0 through the third ridge waveguide; .
In input two, the positive open circuit voltage is defined as 0"1", and the negative open circuit voltage is defined as 1"0".
As a preferable technical scheme of the invention: under dark state condition, the current of the device unit is in a low current state, when laser is introduced into the first ridge waveguide or the third ridge waveguide, obvious photocurrent and open-circuit voltage are shown, when the first ridge waveguide is conducted, the open-circuit voltage is negative-Voc open-circuit voltage, when the third ridge waveguide is conducted, the open-circuit voltage is positive-Voc open-circuit voltage, and the positive-Voc open-circuit voltage and the negative open-circuit voltage are selected as working voltage points of logic device input two.
In the second input, the positive open circuit voltage is defined as "1", and the negative open circuit voltage is defined as "0".
As a preferable technical scheme of the invention: the positive open-circuit voltage and the negative open-circuit voltage are reference voltages with positive and negative symmetry.
A second object of the present invention is to provide an encryption transmission method of an optoelectronic logic gate, which aims at the problems in the prior art.
For this purpose, the above object of the present invention is achieved by the following technical solutions: the encryption transmission method of the photoelectric logic gate comprises the steps that a key signal is used as a signal of an input I, a UCAS code is used as a signal of an input II, and an encryption signal is obtained through the photoelectric logic gate.
A third object of the present invention is to provide an encryption transmission method of an optoelectronic logic gate, which aims at the problems in the prior art.
For this purpose, the above object of the present invention is achieved by the following technical solutions: the decryption transmission method of the photoelectric logic gate is characterized by comprising the following steps of: the key signal is used as a signal of the input I, the encryption result signal is used as a signal of the input II, and the decryption signal is obtained through the photoelectric logic gate.
The invention has the following beneficial effects: according to the multi-waveguide integrated logic gate device unit, the photoelectric logic gate and the encryption transmission method thereof, through local photon stimulation and potential driving, the BP detection unit integrated by the silicon waveguide is used for photoelectric logic operation, the optical switch is introduced to realize the switching of input signals, the XNOR logic gate is realized, and the physical layer encryption/decryption scheme is designed based on the XNOR gate. The multi-waveguide integrated logic gate device unit, the photoelectric logic gate and the encryption transmission method thereof apply the photoelectric logic device integrated based on the communication band waveguide to the secret communication system, realize the secret communication system with high speed, wide bandwidth and high safety, and have great application prospect in the technical field of encryption communication.
Drawings
FIG. 1 is a schematic diagram of a multi-waveguide integrated logic gate device unit of the present invention;
FIG. 2 is a schematic diagram of components of an XNOR logic gate, wherein Au/BP/Au devices have output characteristics curves in dark state, first ridge waveguide on light, third ridge waveguide on light, and truth tables of XNOR gates;
FIG. 3 is a graph showing experimental results of the optoelectronic logic gate of the present invention;
FIG. 4 is a schematic diagram of a communication band photoelectric logic gate XNOR encryption and decryption scheme, a is a schematic diagram of the XNOR logic gate in encrypting signals, and b is an experimental result of the XNOR logic gate in decrypting signals;
in the accompanying drawings: a substrate 1; an alumina layer 2; a first ridge waveguide 7; a third ridge waveguide 8; BP3; h-BN film layer 4; a source electrode 5; and a drain electrode 6.
Detailed Description
The invention will be described in further detail with reference to the drawings and specific embodiments.
Example 1
In the logic gate device unit integrated by multiple waveguides, as shown in fig. 1, two ridge waveguides are provided, and the two ridge waveguides are respectively: a first ridge waveguide 7 and a third ridge waveguide 8, an Au/BP/Au device being placed on top of the ridge waveguides. The distance between the source electrode and the first ridge waveguide and the distance between the drain electrode and the third ridge waveguide were 1 μm to allow the laser light to pass near the Au/BP interface. The distance between the first ridge waveguide and the third ridge waveguide is 10 μm.
Fig. 2a shows a current/voltage curve of the device when each ridge waveguide is in light-on, and under the dark state condition, the current of the device is in a low current state, when laser is led into the first ridge waveguide or the third ridge waveguide, the laser shows a significant open-circuit voltage, when the first ridge waveguide is in light-on, the open-circuit voltage is-Voc, and when the third ridge waveguide is in light-on, the open-circuit voltage is +voc. Voc is selected as the operating voltage point of the logic device.
Fig. 2b is an operating condition of a logic XNOR, where the light-on state of the ridge waveguide is selected as input one, and two potential gradients in the input back-to-back device can be adjusted simultaneously by the bias voltage.
In fig. 3, orange, blue and green represent the light signals entering from the first ridge waveguide 7 and the third ridge waveguide 8, respectively, and gray indicates that no photons are entering. The 0 or 1 of the second input signal (IN 2) is defined as a positive open circuit voltage and a negative open circuit voltage. Two symmetrical open circuit voltages are chosen as operating voltage points, since the dark current is offset by the net photocurrent at Voc and is therefore in a low state. The output signal is defined as the absolute value of the current of the device.
In fig. 2 and 3, CH1 represents the first ridge waveguide 7, CH2 represents the third ridge waveguide 8, -Voc is a negative open-circuit voltage, and +voc is a positive open-circuit voltage.
Next, a physical layer encryption and decryption scheme based on the optoelectronic logic device is designed, as shown in fig. 3 a. The Boolean XNOR gate is a core device in a decision and comparison circuit, and can realize address identification and data encryption and decryption. The signal "UCAS" is compiled using American Standard Code for Information Interchange (ASCII). Two signals (IN 1 is a key, IN2 is "UCAS") are input to XNOR, and an encrypted signal can be obtained. The encryption result and the key are then input again to the XNOR, resulting in a decrypted signal.
The above detailed description is intended to illustrate the present invention by way of example only and not to limit the invention to the particular embodiments disclosed, but to limit the invention to the precise embodiments disclosed, and any modifications, equivalents, improvements, etc. that fall within the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A multi-waveguide integrated logic gate device cell, characterized by: a 220nm SOI substrate is selected as a base of a photon chip, a first ridge waveguide and a third ridge waveguide are sequentially etched on base silicon, a source electrode and a drain electrode are respectively arranged on two sides of the ridge waveguide, wherein the source electrode and the drain electrode are composite electrodes containing Au layers, an evaporation aluminum oxide layer is deposited on silicon for isolating silicon and other structures on the aluminum oxide layer,
transferring BP to a source electrode, a drain electrode, a first ridge waveguide and a third ridge waveguide, wherein the source electrode is close to the first ridge waveguide, the drain electrode is close to the third ridge waveguide, BP and Au are contacted to form a barrier region, and the barrier region is used for laser to pass through;
the first ridge waveguide and the third ridge waveguide are provided with 1 multiplied by 2 optical switches, the input ends of the optical switches are connected with laser, the two output ends of the optical switches are respectively connected with the first ridge waveguide and the third ridge waveguide, the optical switches are used for switching photons between the first ridge waveguide and the third ridge waveguide, and BP is black phosphorus nano-sheet.
2. A multi-waveguide integrated logic gate device cell as in claim 1, wherein: the distance between the source electrode and the first ridge waveguide and the distance between the drain electrode and the third ridge waveguide are 1 μm.
3. A multi-waveguide integrated logic gate device cell as in claim 1, wherein: the distance between the first ridge waveguide and the third ridge waveguide is 10 μm.
4. A multi-waveguide integrated logic gate device cell as in claim 1, wherein: the BP is covered with an h-BN film layer, and the h-BN film layer prevents the BP from photo-oxidation reaction with water oxygen in the air.
5. An optoelectronic logic gate based on the waveguide integrated logic gate device unit of any of claims 1-4, characterized by: the light-transmitting states of the first ridge waveguide and the third ridge waveguide controlled by the optical switch are used as input I together; and a bias voltage is synchronously input to the drain electrode as an input two, the Au/BP/Au device unit reacts to illumination and bias conditions, photo-generated carriers are generated under illumination, the carriers are transported under the combined action of the potential barrier and the bias voltage, and a current value between the source electrode and the drain electrode is used as an output signal of the device.
6. The optoelectronic logic gate as set forth in claim 5 wherein: in input one, a continuous voltage signal is applied to the optical switch, the path of the laser is switched between a first ridge waveguide through which the laser defines an input of "1" and a third ridge waveguide through which the laser defines an input of "0" following a change in the voltage value.
7. The optoelectronic logic gate as set forth in claim 5 wherein: under the dark state condition, the current of the device unit is in a low current state, when laser is introduced into the first ridge waveguide or the third ridge waveguide, obvious photocurrent and open-circuit voltage are shown, when the first ridge waveguide is conducted, the open-circuit voltage is negative open-circuit voltage, when the third ridge waveguide is conducted, the open-circuit voltage is positive open-circuit voltage, the positive open-circuit voltage and the negative open-circuit voltage are selected as working voltage points of the logic device input two,
in the second input, the positive open circuit voltage is defined as "1", and the negative open circuit voltage is defined as "0".
8. The optoelectronic logic gate as set forth in claim 7 wherein: the positive open-circuit voltage and the negative open-circuit voltage are reference voltages with positive and negative symmetry.
9. An encrypted transmission method based on the optoelectronic logic gate according to any one of claims 5 to 8, characterized in that: the secret key signal is used as a signal of an input one, the UCAS code is used as a signal of an input two, and the encryption signal is obtained through the photoelectric logic gate.
10. A decryption transmission method based on an optoelectronic logic gate according to any one of claims 5-8, characterized in that: the key signal is used as a signal of the input I, the encryption result signal is used as a signal of the input II, and the decryption signal is obtained through the photoelectric logic gate.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310712215 | 2023-06-15 | ||
| CN2023107122155 | 2023-06-15 |
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| CN117215136A true CN117215136A (en) | 2023-12-12 |
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| CN202311187682.7A Pending CN117215136A (en) | 2023-06-15 | 2023-09-13 | Waveguide integrated logic gate device unit, photoelectric logic gate and encryption transmission method thereof |
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- 2023-09-13 CN CN202311187682.7A patent/CN117215136A/en active Pending
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