CN117202487A

CN117202487A - Printed circuit board, battery management system, battery pack and electric equipment

Info

Publication number: CN117202487A
Application number: CN202311234514.9A
Authority: CN
Inventors: 陈亮
Original assignee: Xiamen Xinnengda Technology Co Ltd
Current assignee: Xiamen Xinnengda Technology Co Ltd
Priority date: 2023-09-22
Filing date: 2023-09-22
Publication date: 2023-12-08

Abstract

The application discloses a printed circuit board, a battery management system, a battery pack and electric equipment. The printed circuit board comprises at least two circuits, wherein the at least two circuits comprise a first circuit and a second circuit, and the first circuit and the second circuit are connected to a common node; the at least one short circuit resistor comprises a first short circuit resistor, the first short circuit resistor comprises a first bonding pad and a second bonding pad, the first bonding pad is connected with the second bonding pad, the first bonding pad is electrically connected with the first circuit, and the second bonding pad is electrically connected with the second circuit.

Description

Printed circuit board, battery management system, battery pack and electric equipment

Technical Field

The application relates to the technical field of circuit boards, in particular to a printed circuit board, a battery management system, a battery pack and electric equipment.

Background

In layout design of a printed circuit board, it is sometimes necessary to draw out a plurality of lines from the same node. In such a scenario, engineers are required to separately design the outgoing lines to prevent the abnormal condition of merging of the lines.

Disclosure of Invention

The application aims to provide a printed circuit board, a battery management system, a battery pack and electric equipment, which can provide a scheme for enabling design software to automatically identify different circuits so as to reduce the risk of converging the circuits.

To achieve the above object, in a first aspect, the present application provides a printed circuit board comprising: at least two lines and at least one shorting resistor; the at least two lines include a first line and a second line, the first line and the second line are connected to a common node, the at least one shorting resistor includes a first shorting resistor, the first shorting resistor includes a first pad and a second pad, the first pad is connected to the second pad, the first pad is electrically connected to the first line, and the second pad is electrically connected to the second line.

By means of the mode, the design software can identify that the first circuit and the second circuit are in different networks through the first short-circuit resistor, and therefore the risk of confluence of the first circuit and the second circuit is reduced.

In an alternative manner, the printed circuit board further includes a voltage conversion circuit configured as a step-down circuit, the voltage conversion circuit including a voltage transmission branch, the first line including a voltage transmission branch, the second line including a power transmission circuit, the power transmission circuit configured to provide a transmission path for current on the power loop, the common node including a first common node, the voltage transmission branch and the power transmission circuit being electrically connected to the first common node, the first pad and the voltage transmission branch being electrically connected, the second pad and the power transmission circuit being electrically connected.

In an alternative manner, the at least two lines further include a third line, the voltage conversion circuit further includes a signal transmission branch, the third line includes a signal transmission branch, the common node further includes a second common node, the signal transmission branch and the voltage transmission branch are electrically connected to the second common node, the at least one shorting resistor further includes a second shorting resistor, the second shorting resistor includes a third pad and a fourth pad, the third pad is connected to the fourth pad, the third pad is electrically connected to the voltage transmission branch, and the fourth pad is electrically connected to the signal transmission branch.

In an alternative manner, the printed circuit board further comprises a current sampling resistor, the first circuit further comprises a current sampling circuit configured to collect current flowing through the current sampling resistor, the second circuit comprises a power transmission circuit configured to provide a transmission path for current on the power loop, the current sampling resistor is disposed on the power transmission circuit, and the common node comprises a node to which the current sampling circuit is connected.

In an alternative mode, the current sampling circuit comprises a first current sampling branch and a second current sampling branch, the common node comprises a third common node and a fourth common node, the first current sampling branch is electrically connected with a first end of the current sampling resistor, the second current sampling branch is electrically connected with a second end of the current sampling resistor, the first current sampling branch is electrically connected with the power transmission circuit at the third common node, the second current sampling branch is electrically connected with the power transmission circuit at the fourth common node, the short-circuit resistor further comprises a third short-circuit resistor and a fourth short-circuit resistor, the third short-circuit resistor comprises a fifth pad and a sixth pad, the fifth pad is connected with the sixth pad, the fourth short-circuit resistor comprises a seventh pad and an eighth pad, the seventh pad is connected with the eighth pad, the fifth pad is electrically connected with the first current sampling branch, the sixth pad is electrically connected with the power transmission circuit, the seventh pad is electrically connected with the second current sampling branch, and the eighth pad is electrically connected with the power transmission circuit.

In an alternative form, the printed circuit board further comprises a voltage sampling circuit comprising a voltage generation branch and a voltage sampling branch. The common node includes a fifth common node, the voltage generation branch and the voltage sampling branch are electrically connected to the fifth common node, the first line further includes a voltage generation branch configured to generate a first voltage, the second line includes a voltage sampling branch configured to sample the first voltage, the shorting resistor further includes a fifth shorting resistor including a ninth pad and a tenth pad, the ninth pad is connected to the tenth pad, the ninth pad is electrically connected to the voltage generation branch, and the tenth pad is electrically connected to the voltage sampling branch.

In a second aspect, the present application provides a battery management system comprising a printed circuit board as described above.

In a third aspect, the present application provides a battery pack comprising a battery module and a battery management system as described above. The battery module comprises at least one electric core.

In a fourth aspect, the present application provides a powered device comprising a load and a battery pack as described above. Wherein the battery pack is used for supplying power to the load.

The beneficial effects of the application are as follows: the printed circuit board provided by the application has the advantages that the first short-circuit resistor comprising the two bonding pads is respectively connected with the first circuit and the second circuit connected with the public node, so that design software can identify that the first circuit and the second circuit are in different networks through the first short-circuit resistor, and the risk of converging the first circuit and the second circuit is reduced.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.

Fig. 1 is a schematic structural diagram of a printed circuit board according to a first embodiment of the present application;

fig. 2 is a schematic structural diagram of a printed circuit board according to a second embodiment of the present application;

FIG. 3 is a schematic diagram of a circuit configuration corresponding to the configuration shown in FIG. 2;

FIG. 4 is a schematic circuit diagram of the circuit shown in FIG. 3 with additional voltage conversion branches;

fig. 5 is a schematic structural diagram of a printed circuit board according to a third embodiment of the present application;

fig. 6 is a schematic diagram of a circuit configuration corresponding to the configuration shown in fig. 5;

fig. 7 is a schematic structural diagram of a printed circuit board according to a fourth embodiment of the present application;

fig. 8 is a schematic structural diagram of a printed circuit board according to a fifth embodiment of the present application;

fig. 9 is a schematic circuit diagram corresponding to the structure of the current sampling circuit and the power transmission circuit shown in fig. 8;

FIG. 10 is a diagram of a related art layout and a diagram of the present application;

fig. 11 is a schematic structural diagram of a printed circuit board according to a sixth embodiment of the present application;

fig. 12 is a schematic diagram of a circuit configuration corresponding to the configuration shown in fig. 11;

fig. 13 is a schematic structural diagram of an electric device according to a first embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be described in detail below with reference to the accompanying drawings in the embodiments of the present application. The following examples are illustrative and not limiting, are intended to provide a basic understanding of the application, and are not intended to identify key or critical elements of the application or to delineate the scope of the application.

It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or one or more intervening elements may be present therebetween.

In addition, technical features which are described below and which are involved in the various embodiments of the application may be combined with each other without constituting a conflict.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a printed circuit board according to an embodiment of the application. The printed circuit board 100 includes at least two lines and at least one shorting resistor. As shown in fig. 1, at least two lines include a first line L1 and a second line L2, and at least one shorting resistor includes a first shorting resistor R1.

The first line L1 and the second line L2 are connected to a common node CN. Each of the at least two lines is a circuit having a specific function formed by connecting elements of various functions in accordance with a circuit principle through an electrical connection line. The common node CN is a connection point between the first line L1 and the second line L2, and the common node CN may include one or more connection points.

The first shorting resistor R1 includes a first pad r1_1 and a second pad r1_2, and the first pad r1_1 is connected to the second pad r1_2. The first and second pads r1_1 and r1_2 may be PCB pads, which are areas of the printed circuit board 100 designed for connection of electronic components, and the electronic components on the printed circuit board 100 are electrically connected to traces on the PCB through the PCB pads, and the first and second pads r1_1 and r1_2 may be circular or rectangular and made of copper or other conductive materials. The connection between the first pad r1_1 and the second pad r1_2 may be that the first pad r1_1 and the second pad r1_2 overlap on the printed circuit board 100 (as shown in fig. 1, at least a part of the area of the first pad r1_1 overlaps at least a part of the area of the second pad r1_2) to form a physical connection, so as to form an electrical connection between the first pad r1_1 and the second pad r1_2. The combination of the first pad r1_1 and the second pad r1_2 is similar to the package of the resistive element, and the first pad r1_1 and the second pad r1_2 are electrically connected (i.e., the first pad r1_1 and the second pad r1_2 are shorted), the combination of the first pad r1_1 and the second pad r1_2 may be referred to as a shorting resistor (i.e., the first shorting resistor R1).

In the related art, when the first line L1 and the second line L2 are connected to the common node CN, the design software (e.g., altium Designer, etc.) generally recognizes the first line L1 and the second line L2 as the same network. Then, when the printed circuit board 100 is designed, the design software defaults the first line L1 and the second line L2 to be converged multiple times, specifically, after the first line L1 and the second line L2 are led out from the common node CN, the first line L1 and the second line L2 can be electrically connected again, so as to have connection points other than the common node CN. In this way, the first line L1 and the second line L2 may be caused to interact with each other, and the first line L1 and the second line L2 may be caused to function abnormally.

The network is generally referred to as NET in the design of the printed circuit board 100, where the network refers to the connection relationship between the components, the components under the same network have the same network label, the components with the same network label indicate that they are electrically connected together, whereas the components under different networks have different network labels, and the components with different network labels indicate that they are not electrically connectable. For the related art, since the design software recognizes the first line L1 and the second line L2 as the same network, i.e., the first line L1 and the second line L2 have the same network label, the design software defaults to the first line L1 and the second line L2 to be merged multiple times.

In the present application, by electrically connecting the first pad r1_1 and the first line L1 and the second pad r1_2 and the second line L2, respectively, the design software can recognize the first line L1 and the second line L2 as different networks, that is, the first line L1 and the second line L2 have different network numbers. When the printed circuit board 100 is designed, the design software defaults to draw the first line L1 and the second line L2 out of the common node CN, and then the first line L1 and the second line L2 cannot be recombined, i.e., cannot establish electrical connection again, so that only the first line L1 and the second line L2 are connected to the common node CN. Therefore, the risk of the first line L1 and the second line L2 converging is low, the risk of the mutual influence between the first line L1 and the second line L2 is also low, and the normal operation of the functions of the first line L1 and the second line L2 is maintained.

It will be appreciated that in fig. 1, the first shorting resistor R1 is shown as being disposed on the left side of the common node CN, and in other embodiments, the first shorting resistor R1 may be disposed on the right side of the common node CN or overlap the common node CN.

Referring to fig. 2, fig. 2 illustrates an exemplary structure corresponding to fig. 1. As shown in fig. 2, the printed circuit board 100 further includes a voltage conversion circuit 10, and the voltage conversion circuit 10 is configured as a step-down circuit. Specifically, the voltage conversion circuit 10 is configured to reduce an input voltage (i.e., a voltage input to the voltage conversion circuit 10) to a desired output voltage. The voltage conversion circuit 10 is typically composed of one or more electronic components (e.g., transformers, inductors, capacitors, diodes, and transistors). In some embodiments, the voltage conversion circuit 10 may be configured as a BUCK switching regulator, i.e., a BUCK circuit, and the voltage conversion circuit 10 includes a voltage transmission branch 11, where the voltage transmission branch 11 is a transmission path from an input voltage to an output voltage.

The first line L1 comprises a voltage transmission branch 11. The second line L2 includes a power transfer circuit 20, the power transfer circuit 20 being configured to provide a transfer path for current on the power loop. The power loop refers to a circuit system for transmitting electric power, and mainly consists of a power supply and a load. The common node CN includes a first common node N1, and the voltage transmission branch 11 and the power transmission circuit 20 are electrically connected to the first common node N1.

The first pad r1_1 is electrically connected to the voltage transmission branch 11, the second pad r1_2 is electrically connected to the power transmission circuit 20, and the voltage transmission branch 11 and the power transmission branch 20 can be identified as two different networks, i.e., the voltage transmission branch 11 and the power transmission branch 20 have different network numbers, so that the voltage transmission branch 11 and the power transmission branch 20 are connected to the first common node N1 and cannot be electrically connected again at other positions than the first common node N1. The risk of interaction between the voltage transmission branch 11 and the power transmission branch 20 is low, so that the normal operation of the voltage transmission branch 11 and the power transmission branch 20 is maintained.

Referring to fig. 3, fig. 3 illustrates a circuit corresponding to the structure shown in fig. 2. As shown in fig. 3, the voltage transmission branch 11 includes a first power node p+ (the first power node p+ provides an input voltage for the first buck chip U1), and a loop from the first buck chip U1 to the first output voltage VO1. The first buck chip U1 is for reducing the voltage of the battery BAT to the first output voltage VO1. In some embodiments, the first BUCK chip U1 may be a BUCK chip. The power transfer circuit 20 includes a loop in which the battery BAT supplies power to a load RL (in this embodiment, the load is represented by a resistor).

The voltage transmission branch 11 (specifically, the ground gnd_vo1 of the first output voltage VO 1) and the power transmission loop 20 (specifically, the second power node P-) are electrically connected to the second power node P-, i.e. the second power node P-is the first common node N1. The first shorting resistor R1 is electrically connected between the ground gnd_vo1 of the first output voltage VO1 and the second power node P-. Specifically, the first pad r1_1 is electrically connected to the second power node P-, and the second pad r1_2 is electrically connected to the ground terminal gnd_vo1 of the first output voltage VO1. The voltage transmission branch 11 and the power transmission branch 20 can be identified as two different networks.

Furthermore, in other embodiments, when the voltage conversion circuit 10 includes a plurality of different voltage transmission branches to provide different output voltages, corresponding short-circuit resistors may be set with reference to the circuit shown in fig. 3 to configure different network numbers for the different voltage transmission branches.

For example, as shown in fig. 4, the voltage conversion circuit 10 further includes another voltage transmission branch 11a. Wherein the voltage transmission branch 11a is adapted to output a second output voltage VO2 based on the voltage of the battery BAT. The second output voltage VO2 is different from the first output voltage VO1 in magnitude, e.g., the second output voltage VO2 is 24V and the first output voltage VO1 is 12V. The voltage transmission branch 11a includes a second buck chip U1a, and the second buck chip U1a reduces the voltage of the battery BAT to the second output voltage VO2.

A shorting resistor R1a is disposed between the ground gnd_vo2 of the second output voltage VO2 and the second power node P-. One pad r1a_1 of the shorting resistor R1a is electrically connected to the second power node P-, and the other pad r1a_2 of the shorting resistor R1a is electrically connected to the ground terminal gnd_vo2 of the second output voltage VO2. The voltage transmission branch 11a and the power transmission branch 20 may be identified as different networks, i.e. the voltage transmission branch 11a and the power transmission branch 20 have different network numbers. Further, the voltage transmission branch 11 and the voltage transmission branch 11a are also identified as different networks and have different network numbers. The risk of mutual interference between the voltage transmission branch 11 and the voltage transmission branch 11a is low, which is beneficial to improving the working stability of the voltage transmission branch 11 and the voltage transmission branch 11a.

In one embodiment, as shown in fig. 3, the voltage conversion circuit 10 further includes a signal transmission branch 12. The at least two lines further comprise a third line L3 comprising a signal transmission branch 12.

The public node CN also comprises a second public node N2. The signal transmission branch 12 and the voltage transmission branch 11 are electrically connected to the second common node N2. The at least one shorting resistor further includes a second shorting resistor R2, the second shorting resistor R2 including a third pad r2_1 and a fourth pad r2_2, the third pad r2_1 being connected to the fourth pad r2_2.

The third pad r2_1 is electrically connected to the voltage transmission branch 11, and the fourth pad r2_2 is electrically connected to the signal transmission branch 12. In turn, the voltage transmission branch 11 and the signal transmission branch 12 may be identified as different networks and have different network numbers. The risk of mutual interference between the voltage transmission branch 11 and the signal transmission branch 12 is low, so that the stability of the operation of the voltage transmission branch 11 and the signal transmission branch 12 is improved.

Referring to fig. 6, fig. 6 illustrates a circuit corresponding to the structure shown in fig. 5. As shown in fig. 6, the voltage transmission branch 11 includes a loop from the first power node p+, the first buck chip U1 to the first output voltage VO1. The signal transmission branch 12 includes a loop for transmitting a control signal of the first buck chip U1.

The voltage transmission branch 11 (specifically, the ground gnd_vo1 of the first output voltage VO 1) and the signal transmission branch 12 (specifically, the ground agnd_vo1 of the control signal of the first buck chip U1) are electrically connected to the second common node N2. Then, the second shorting resistor R2 may be electrically connected between the ground gnd_vo1 of the first output voltage VO1 and the ground agnd_vo1 of the control signal of the first buck chip U1, specifically, the first pad r1_1 is electrically connected to the ground gnd_vo1 of the first output voltage VO1, and the second pad r1_2 is electrically connected to the ground agnd_vo1 of the control signal of the first buck chip U1. The voltage transmission branch 11 and the signal transmission branch 12 can be identified as two different networks.

In one embodiment, as shown in fig. 7, the printed circuit board 100 further includes a current sampling resistor R1.

Wherein the first line L1 comprises a further current sampling circuit 30, the current sampling circuit 30 being configured to collect a current flowing through the current sampling resistor R1. The second line L2 includes a power transfer circuit 20, the power transfer circuit 20 being configured to provide a transfer path for current on the power loop.

Specifically, the current sampling resistor R1 is provided on the power transmission circuit 20. The common node includes a node where the current sampling circuit 30 is connected to the power transfer circuit 20. For example, as shown in fig. 7, the common node includes a third common node N3, which is a node where the current sampling circuit 30 is connected to the power transmission circuit 20.

Referring to fig. 8, fig. 8 illustrates a circuit corresponding to the structure shown in fig. 7. As shown in fig. 8, the current sampling circuit 30 includes a first current sampling branch 31 and a second current sampling branch 32. The common nodes include a third common node N3 and a fourth common node N4.

The first current sampling branch 31 is electrically connected to a first end of the current sampling resistor RS, the second current sampling branch 32 is electrically connected to a second end of the current sampling resistor RS, the first current sampling branch 31 is electrically connected to the power transmission circuit 20 at the third common node N3, and the second current sampling branch 32 is electrically connected to the power transmission circuit 20 at the fourth common node N4.

The shorting resistor further includes a third shorting resistor R3 and a fourth shorting resistor R4. The third shorting resistor R3 includes a fifth pad r3_1 and a sixth pad r3_2, and the fifth pad r3_1 is connected to the sixth pad r3_2; the fourth shorting resistor R4 includes seventh and eighth pads r4_1 and r4_2, and the seventh pad r4_1 is connected to r4_2.

The fifth pad r3_1 is electrically connected to the first current sampling branch 31, and the sixth pad r3_2 is electrically connected to the power transmission circuit 20. In turn, the first current sampling branch 31 and the power transfer circuit 20 may be identified as different networks and have different network numbers. The risk of mutual interference between the first current sampling branch 31 and the power transmission circuit 20 is low, which is beneficial to improving the working stability of the first current sampling branch 31 and the power transmission circuit 20.

The seventh pad r4_1 is electrically connected to the second current sampling branch 32 and the eighth pad r4_2 is electrically connected to the power transmission circuit 20. In turn, the second current sampling branch 32 and the power transfer circuit 20 may be identified as different networks and have different network designations. The risk of mutual interference between the second current sampling branch 32 and the power transmission circuit 20 is low, which is beneficial to improving the working stability of the second current sampling branch 32 and the power transmission circuit 20.

Referring to fig. 9, fig. 9 illustrates a circuit corresponding to the structures of the current sampling circuit 30 and the power transmission circuit 20 shown in fig. 8. As shown in fig. 9, the power transfer circuit 20 includes a loop in which the battery BAT supplies power to the load RL. The current sampling resistor RS is disposed between the first power node p+ and the second power node P-.

Specifically, the first current sampling branch 31 is connected to the third common node N3 through a third shorting resistor R3 and the power transmission circuit 20. The first current sampling branch 31 and the power transfer branch 20 may be identified as two distinct networks.

The second current sampling branch 32 is connected to the fourth common node N4 through a fourth shorting resistor R4 and the power transmission circuit 20. The second current sampling branch 32 and the power transfer branch 20 may be identified as two distinct networks.

It will be appreciated that in fig. 9, the current sampling resistor RS is exemplified as being disposed between the first power node p+ and the second power node P-. In other embodiments, the current sampling resistor RS may be disposed at other positions of the power transmission branch 20, for example, between the negative electrode B-of the battery BAT and the second power node P-, which is not particularly limited in the embodiments of the present application.

The layout design of the printed circuit board shown in fig. 10 is further described as an example. Part (a) in fig. 10 shows a layout design in the related art, and part (b) in fig. 10 shows a layout design provided by an embodiment of the present application.

As shown in part (a) of fig. 10, the current sampling resistor RS also includes two pads, pad rl_1 and pad rl_2, respectively. The pad rl_1 leads out the power transmission circuit 20 and the first current sampling branch 31 through the third common node N3, and the pad rl_2 leads out the power transmission circuit 20 and the second current sampling branch 32 through the fourth common node N4. In the related art, since the corresponding short-circuit resistor is not provided, the power transmission circuit 20 and the first current sampling branch 31 are recombined from the third common node N3, that is, the power transmission circuit 20 and the first current sampling branch 31 have the overlapping portion 20a. In this case, it may occur that the power transmission circuit 20 interferes with the first current sampling branch 31, resulting in a malfunction of the power transmission circuit 20 and/or the first current sampling branch 31.

In the present application, as shown in part (b) of fig. 10, by providing the third resistor R3 and the fourth shorting resistor R4, the design software can identify the power transmission circuit 20 and the first current sampling branch 31 as different networks, and the power transmission circuit 20 and the second current sampling branch 32 as different networks. The power transfer circuit 20 and the first current sampling branch 31 are no longer merged after the third common node N3, and the power transfer circuit 20 and the second current sampling branch 32 are no longer merged after the fourth common node N4. Therefore, the risk of interaction between the power transmission circuit 20 and the first current sampling branch 31 and between the power transmission circuit 20 and the second current sampling branch 32 is also low, which is beneficial to improving the stability of the operation of the power transmission circuit 20, the first current sampling branch 31 and the second current sampling branch 32.

Referring to fig. 11, fig. 11 shows a structure in which a voltage sampling circuit 40 is added to the structure shown in fig. 10. As shown in fig. 11, the printed circuit board 100 includes a voltage sampling circuit 40. The voltage sampling circuit 40 comprises a voltage generation branch 41 and a voltage sampling branch 42. The common node CN includes a fifth common node N5, and the voltage generation branch 41 and the voltage sampling branch 42 are electrically connected to the common node N5. The shorting resistor further includes a fifth shorting resistor R5.

Wherein the first line L1 comprises a voltage generating branch 41, the voltage generating branch 41 being configured to generate a first voltage. The second line L2 includes a voltage sampling branch 42, the voltage sampling branch 42 being configured to sample a first voltage.

Specifically, the fifth shorting resistor R5 includes a ninth pad r5_1 and a tenth pad r5_2, and the ninth pad r5_1 and the tenth pad r5_2 are connected. The ninth pad r5_1 is electrically connected to the voltage generation branch 41, and the tenth pad r5_2 is electrically connected to the voltage sampling branch 42. In turn, the voltage generation branch 41 and the voltage sampling branch 42 may be identified as different networks and have different network numbers. The risk of mutual interference between the voltage generation branch 41 and the voltage sampling branch 42 is low, which is beneficial to improving the working stability of the voltage generation branch 41 and the voltage sampling branch 42.

Referring to fig. 12, fig. 12 illustrates a circuit corresponding to the structure shown in fig. 11. As shown in fig. 12, the voltage generation branch 41 includes a loop of the first power node p+, the third buck chip U3, and the first voltage V1. The third buck chip U3 is for reducing the voltage of the battery BAT to the first voltage V1. In some embodiments, the third BUCK chip U3 may be a BUCK chip. In some embodiments, the voltage sampling branch 42 may be a circuit of a plurality of resistors connected in series, and the magnitude of the first voltage V1 is determined by sampling the voltage on the fifth common node N5 divided across any resistor.

The voltage generating branch 41 (specifically, the output terminal of the third buck chip U3, i.e. the positive electrode of the first voltage V1) and the voltage sampling branch 42 are electrically connected to the fifth common node N5. Then, the fifth shorting resistor R5 may be electrically connected between the positive electrode of the first voltage V1 and the voltage sampling branch 42, specifically, the ninth pad r5_1 is electrically connected to the positive electrode of the first voltage V1, and the tenth pad r5_2 is electrically connected to the voltage sampling branch 42. The voltage generating branch 41 and the voltage sampling branch 42 may be identified as two different networks.

The embodiment of the application also provides a battery management system. The battery management system includes a printed circuit board in any of the embodiments of the present application.

The embodiment of the application also provides a battery pack, which comprises a battery module and the battery management system in any embodiment of the application.

The battery module is used for storing and providing electric energy. The battery module comprises at least one electric core. When the battery module comprises more than two battery cells, each battery cell can be connected in series, connected in parallel or in a form of mixed connection of series and parallel. In some embodiments, the battery module is a rechargeable battery. For example, the battery module 200 may be a lead-acid battery, a nickel-cadmium battery, a nickel-hydrogen battery, a lithium ion battery, a sodium ion battery, a lithium polymer battery, a lithium iron phosphate battery, or the like. The battery module may be repeatedly charged in a recyclable manner.

The battery management system (Battery Management System, BMS) is used for detecting, managing and/or protecting the battery modules, etc.

The embodiment of the application also provides electric equipment, as shown in fig. 13, the electric equipment 1 comprises a battery pack 1000 and a load 2000. The load 2000 may be an electrical device in the electrical consumer 1.

The powered device 1 may be any suitable device that requires power from the battery pack 1000, such as an unmanned aerial vehicle, an energy storage product, an electric tool, a two-wheeled vehicle, a household appliance, etc.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the application, the steps may be implemented in any order, and there are many other variations of the different aspects of the application as described above, which are not provided in detail for the sake of brevity; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.

Claims

1. A printed circuit board, comprising:

at least two lines including a first line and a second line, the first line and the second line being connected to a common node;

the circuit comprises at least one short-circuit resistor, wherein the at least one short-circuit resistor comprises a first short-circuit resistor, the first short-circuit resistor comprises a first bonding pad and a second bonding pad, and the first bonding pad is connected with the second bonding pad;

the first bonding pad is electrically connected with the first circuit, and the second bonding pad is electrically connected with the second circuit.

2. The printed circuit board of claim 1, further comprising a voltage conversion circuit configured as a buck circuit, the voltage conversion circuit comprising a voltage transfer branch;

the first line includes the voltage transfer branch, and the second line includes a power transfer circuit configured to provide a transfer path for current on a power loop;

the common node comprises a first common node, and the voltage transmission branch and the power transmission circuit are electrically connected to the first common node;

the first bonding pad is electrically connected with the voltage transmission branch circuit, and the second bonding pad is electrically connected with the power transmission circuit.

3. The printed circuit board of claim 2, wherein the at least two lines further comprise a third line, the voltage conversion circuit further comprising a signal transmission branch, the third line comprising the signal transmission branch;

the common node further comprises a second common node, and the signal transmission branch and the voltage transmission branch are electrically connected to the second common node;

the at least one short circuit resistor further comprises a second short circuit resistor, the second short circuit resistor comprises a third bonding pad and a fourth bonding pad, and the third bonding pad is connected with the fourth bonding pad;

the third bonding pad is electrically connected with the voltage transmission branch, and the fourth bonding pad is electrically connected with the signal transmission branch.

4. A printed circuit board according to any of claims 1 to 3, wherein the printed circuit board further comprises a current sampling resistor;

the first line further includes a current sampling circuit configured to collect a current flowing through the current sampling resistor;

the second line includes a power transfer circuit configured to provide a transfer path for current on a power loop;

the current sampling resistor is arranged on the power transmission circuit, and the common node comprises a node connected with the power transmission circuit by the current sampling circuit.

5. The printed circuit board of claim 4, wherein the current sampling circuit comprises a first current sampling leg and a second current sampling leg, the common node comprising a third common node and a fourth common node;

the first current sampling branch circuit is electrically connected with a first end of the current sampling resistor, the second current sampling branch circuit is electrically connected with a second end of the current sampling resistor, the first current sampling branch circuit is electrically connected with the power transmission circuit to be connected with the third common node, and the second current sampling branch circuit is electrically connected with the power transmission circuit to be connected with the fourth common node;

the short circuit resistor further comprises a third short circuit resistor and a fourth short circuit resistor, the third short circuit resistor comprises a fifth bonding pad and a sixth bonding pad, and the fifth bonding pad is connected with the sixth bonding pad; the fourth short-circuit resistor comprises a seventh bonding pad and an eighth bonding pad, and the seventh bonding pad is connected with the eighth bonding pad;

the fifth bonding pad is electrically connected with the first current sampling branch circuit, the sixth bonding pad is electrically connected with the power transmission circuit, the seventh bonding pad is electrically connected with the second current sampling branch circuit, and the eighth bonding pad is electrically connected with the power transmission circuit.

6. The printed circuit board of claim 3, wherein the printed circuit board further comprises a voltage sampling circuit comprising a voltage generation branch and a voltage sampling branch;

the common node comprises a fifth common node, wherein the voltage generation branch and the voltage sampling branch are electrically connected to the fifth common node;

the first line further includes the voltage generation branch configured to generate a first voltage;

the second line includes the voltage sampling branch configured to sample the first voltage;

the short-circuit resistor further comprises a fifth short-circuit resistor, the fifth short-circuit resistor comprises a ninth bonding pad and a tenth bonding pad, and the ninth bonding pad is connected with the tenth bonding pad;

the ninth bonding pad is electrically connected with the voltage generation branch, and the tenth bonding pad is electrically connected with the voltage sampling branch.

7. A battery management system comprising a printed circuit board according to any one of claims 1-6.

8. A battery pack comprising a battery module and the battery management system of claim 7, the battery module comprising at least one cell.

9. A powered device comprising a load and the battery pack of claim 8, the battery pack configured to power the load.