CN117193707A - Data processing method, device, electronic equipment and computer readable storage medium - Google Patents
Data processing method, device, electronic equipment and computer readable storage medium Download PDFInfo
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Abstract
The embodiment of the application provides a data processing method, a data processing device, electronic equipment and a computer readable storage medium, and relates to the technical field of embedded microprocessors. The method comprises the following steps: acquiring source data input by a user and target operation parameters corresponding to the source data; if the target operation parameter is an integer, the following operation is performed on the source data and the target operation parameter: and respectively performing shift operation, rounding operation and step code updating operation on the source data through a floating point number type conversion unit based on the shift value, the updating value and the sticky bit corresponding to the source data, and generating target data so as to complete a target exponent operation instruction. The embodiment of the application provides a novel method for realizing a target exponent operation instruction, which can highly multiplex the existing floating point number type conversion unit, realize the target exponent operation instruction on the basis of the floating point number type conversion unit, and can reduce the power consumption of a processor under the condition of identical performance compared with the traditional method realized on a floating point number multiply-add unit.
Description
Technical Field
The present application relates to the field of embedded microprocessors, and in particular, to a data processing method, apparatus, electronic device, and computer readable storage medium.
Background
The embedded microprocessor is a core part of the embedded system and directly relates to the performance of the whole embedded system. Since the advent of microprocessors, embedded systems have also been rapidly developed, and embedded microprocessors are responsible for important tasks of control and system operation, enabling host devices to be intelligent, flexible in design and easy and simple to operate.
The embedded microprocessor has its corresponding instruction system, and the function of the instruction system also determines the computer system and its basic functions. Each instruction designed in the instruction system corresponds to a prescribed functional operation to be performed by the microprocessor, i.e., the implementation of the instruction functions is performed by physical devices in the microprocessor. The execution speed of the instruction functions will directly affect the performance of the microprocessor. For example, an FSCALE instruction (an exponent operation instruction) may be used to implement exponent operation, and a microprocessor generally performs the FSCALE instruction (i.e., a target exponent operation instruction) by multiplexing addition and multiplication, which has problems of slow operation speed and high power consumption.
Disclosure of Invention
The embodiment of the application provides a data processing method, a device, electronic equipment and a computer readable storage medium, which can solve the problems of low operation speed and high power consumption of an embedded microprocessor in the process of executing an FSCALE instruction. The technical scheme is as follows:
according to an aspect of an embodiment of the present application, there is provided a data processing method, including:
acquiring source data input by a user and target operation parameters corresponding to the source data; wherein the source data is floating point number;
if the target operation parameter is an integer, performing the following operation on the source data and the target operation parameter to execute the target exponent operation instruction, and generating target data corresponding to the source data:
determining format attribute of the source data based on the hidden bit of the source data;
calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data;
and respectively performing shifting operation, rounding operation and order code updating operation on the source data through a floating point number type conversion unit based on the shifting value, the updating value and the sticky bit to generate target data.
In one possible implementation manner, the calculating the source data according to the format attribute and the numerical range of the target operation parameter to generate a shift value, an updated value of a step code of the source data, and a sticky bit of the source data includes:
when the format attribute is a denormalized floating point number and the target operation parameter is a negative number, taking the absolute value of the target operation parameter as a shift value, determining an update value of a step code according to the leading zero count of the mantissa of the source data, the bit width of the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the mantissa and the target operation parameter;
when the format attribute is a denormalized floating point number and the target operation parameter is a positive number, determining a shift value based on the difference value of the leading zero count of the mantissa and the target operation parameter, determining an update value of the step code according to the maximum value of the step code, the leading zero count and the target operation parameter, and setting the sticky position as zero;
when the format attribute is a non-normalized floating point number and the target operation parameter is equal to zero, the shift value and the viscous position are zero, and the step code is not updated.
In one possible implementation manner, the method further includes:
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, determining a shift value and an update value of the step code according to the bit widths of the step code and the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the step code and the mantissa and the target operation parameter;
When the format attribute is a normalized floating point number and the target operation parameter is a non-negative number, the shift value and the viscous position are zero, and the update value of the step code is determined according to the maximum value of the step code, the step code and the target operation parameter.
In still another possible implementation manner, the generating, by using the floating point number type conversion module, the shift operation, the rounding operation and the step code update operation on the source data based on the shift value, the update value and the sticky bit, respectively, includes:
performing shifting operation on the mantissa of the source data based on the shifting value to obtain a shifted mantissa;
rounding the shifted mantissa based on the sticky bit to obtain a target mantissa;
and carrying out format packaging based on the updated value of the step code, the target mantissa and the sign bit of the source data to generate target data.
In yet another possible implementation manner, the above-mentioned step-code-based updating value, the target mantissa, and the sign bit of the source data are formatted and packed to generate the target data, which includes:
when the secondary updating of the step code of the source data is determined according to the shifting operation and the rounding operation, updating the updated value of the step code according to the target mantissa to obtain the target step code;
and carrying out format packaging based on the target order code, the target mantissa and the sign bit of the source data to generate target data.
In another possible implementation manner, the method further includes:
and generating exception state information corresponding to the target data based on the rounding rule corresponding to the rounding operation and the format attribute change state of the source data in the operation.
In another possible implementation manner, the source data is a half-precision floating point number, and the method further includes:
when the format attribute is a denormal floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number, a denormal floating point number or an infinite floating point number;
when the format attribute is a non-normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a non-normalized floating point number or zero;
when the format attribute is a normalized floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number or an infinite floating point number;
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a normalized floating point number, a non-normalized floating point number or zero.
According to another aspect of an embodiment of the present application, there is provided a data processing apparatus including:
The acquisition module is used for acquiring source data input by a user and target operation parameters corresponding to the source data; wherein the source data is floating point number;
the operation module is used for performing the following operation operations on the source data and the target operation parameters if the target operation parameters are integers so as to execute a target index operation instruction and generate target data corresponding to the source data:
determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing shifting operation, rounding operation and order code updating operation on the source data through a floating point number type conversion unit based on the shifting value, the updating value and the sticky bit to generate target data.
In one possible implementation manner, the operation module is configured to, when calculating the source data according to the format attribute and the numerical range of the target operation parameter, generate a shift value, an updated value of a step code of the source data, and a sticky bit of the source data:
when the format attribute is a denormalized floating point number and the target operation parameter is a negative number, taking the absolute value of the target operation parameter as a shift value, determining an update value of a step code according to the leading zero count of the mantissa of the source data, the bit width of the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the mantissa and the target operation parameter;
When the format attribute is a denormalized floating point number and the target operation parameter is a positive number, determining a shift value based on the difference value of the leading zero count of the mantissa and the target operation parameter, determining an update value of the step code according to the maximum value of the step code, the leading zero count and the target operation parameter, and setting the sticky position as zero;
when the format attribute is a non-normalized floating point number and the target operation parameter is equal to zero, the shift value and the viscous position are zero, and the step code is not updated.
In one possible implementation manner, the above operation module is further configured to:
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, determining a shift value and an update value of the step code according to the bit widths of the step code and the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the step code and the mantissa and the target operation parameter;
when the format attribute is a normalized floating point number and the target operation parameter is a non-negative number, the shift value and the viscous position are zero, and the update value of the step code is determined according to the maximum value of the step code, the step code and the target operation parameter.
In yet another possible implementation manner, the operation module is configured to, when performing, based on the shift value, the update value, and the sticky bit, a shift operation, a rounding operation, and a step code update operation on the source data by the floating point type conversion module, generate target data, respectively:
Performing shifting operation on the mantissa of the source data based on the shifting value to obtain a shifted mantissa;
rounding the shifted mantissa based on the sticky bit to obtain a target mantissa;
and carrying out format packaging based on the updated value of the step code, the target mantissa and the sign bit of the source data to generate target data.
In yet another possible implementation manner, the operation module is configured to, when performing format packaging based on the update value of the step code, the target mantissa, and the sign bit of the source data, generate the target data:
when the secondary updating of the step code of the source data is determined according to the shifting operation and the rounding operation, updating the updated value of the step code according to the target mantissa to obtain the target step code;
and carrying out format packaging based on the target order code, the target mantissa and the sign bit of the source data to generate target data.
In another possible implementation manner, the above operation module is further configured to:
and generating exception state information corresponding to the target data based on the rounding rule corresponding to the rounding operation and the format attribute change state of the source data in the operation.
In another possible implementation manner, the source data is a half-precision floating point number, and the operation module is further configured to:
When the format attribute is a denormal floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number, a denormal floating point number or an infinite floating point number;
when the format attribute is a non-normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a non-normalized floating point number or zero;
when the format attribute is a normalized floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number or an infinite floating point number;
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a normalized floating point number, a non-normalized floating point number or zero.
According to another aspect of an embodiment of the present application, there is provided an electronic apparatus including: a memory, a processor and a computer program stored on the memory, the processor executing the computer program to perform the steps of the method according to the first aspect of the embodiment of the application.
According to a further aspect of embodiments of the present application there is provided a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of the method of the first aspect of embodiments of the present application.
According to an aspect of an embodiment of the present application, there is provided a computer program product comprising a computer program which, when executed by a processor, implements the steps of the method of the first aspect of the embodiment of the present application.
The technical scheme provided by the embodiment of the application has the beneficial effects that:
according to the embodiment of the application, through the floating point number type conversion unit, the following operation is performed on source data input by a user and target operation parameters corresponding to the source data: determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing a shift operation, a rounding operation and a step code updating operation on the source data based on the shift value, the updating value and the sticky bit, and generating target data to complete a target exponent operation instruction. In the execution process of the target exponent operation instruction, the embodiment of the application realizes the rapid execution of the target exponent operation instruction by multiplexing the existing floating point number type conversion unit to carry out shift operation, rounding operation and order code updating operation; compared with the prior art that the target exponent operation instruction is realized based on the complex data path of the multiplication and addition unit, the floating point number type conversion unit adopted in the embodiment of the application has the advantages that the data path is simpler, the operation efficiency can be improved, and the power consumption of a processor can be reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are required to be used in the description of the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic diagram of an application scenario of a data processing method according to an embodiment of the present application;
FIG. 2 is a schematic flow chart of a data processing method according to an embodiment of the present application;
FIG. 3-1 is a schematic flow chart of an arithmetic operation in a data processing method according to an embodiment of the present application;
FIG. 3-2 is a schematic flow chart of a further operation in the data processing method according to the embodiment of the present application;
FIG. 4 is a schematic flow chart of generating sticky bits in a data processing method according to an embodiment of the present application;
FIG. 5 is a flow chart of an exemplary data processing method according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a data processing apparatus according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a data processing electronic device according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described below with reference to the drawings in the present application. It should be understood that the embodiments described below with reference to the drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application, and the technical solutions of the embodiments of the present application are not limited.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and "comprising," when used in this specification, specify the presence of stated features, information, data, steps, operations, elements, and/or components, but do not preclude the presence or addition of other features, information, data, steps, operations, elements, components, and/or groups thereof, all of which may be included in the present specification. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein indicates that at least one of the items defined by the term, e.g., "a and/or B" may be implemented as "a", or as "B", or as "a and B".
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
Since the advent of microprocessors, embedded systems have evolved rapidly, embedded processors are undoubtedly the core of embedded systems, which are directly related to the performance of the entire embedded system. An embedded processor is generally considered to be a generic term for the operation and control core devices in an embedded system.
The embedded microprocessor is similar to the microprocessor design of a common desk computer in basic principle, but has higher working stability, smaller power consumption, strong adaptability to environment (such as temperature, humidity, electromagnetic field, vibration and the like), smaller volume and more integrated functions. In general, an embedded processor has the following features: the system has the advantages of strong real-time multitasking supporting capability, memory area protection function, expandable microprocessor structure, strong interrupt processing capability and low power consumption.
When an exponential instruction such as FSCALE is executed, the speed of the operation is often low due to the integer power of 2 to be calculated.
The application provides a data processing method, a data processing device, electronic equipment and a computer readable storage medium, and aims to solve the technical problems in the prior art.
The technical solutions of the embodiments of the present application and technical effects produced by the technical solutions of the present application are described below by describing several exemplary embodiments. It should be noted that the following embodiments may be referred to, or combined with each other, and the description will not be repeated for the same terms, similar features, similar implementation steps, and the like in different embodiments.
As shown in fig. 1, the data processing method of the present application may be applied to the scenario shown in fig. 1, specifically, the server 102 obtains, from the client 101, source data input by a user and a target operation parameter corresponding to the source data, determines a format attribute of the source data based on a hidden bit of the source data when the target operation parameter is an integer, and calculates the source data according to the format attribute of the source data and a numerical range of the target operation parameter, so as to generate a shift value, an update value of a step code of the source data, and a sticky bit of the source data. Then, based on the values, the server 102 performs a shift operation, a rounding operation and a step code update operation on the source data by using the floating point type conversion unit, so as to generate target data corresponding to the source data, so as to complete execution of the target exponent operation instruction. Finally, the server 102 transmits the target data 101 to the client.
In the scenario shown in fig. 1, the data processing method may be performed in a server, or in other scenarios, may be performed in a terminal.
As will be appreciated by those skilled in the art, a "terminal" as used herein may be a cell phone, tablet computer, PDA (Personal Digital Assistant ), MID (Mobile Internet Device, mobile internet device), etc.; the "server" may be implemented as a stand-alone server or as a server cluster composed of a plurality of servers.
An embodiment of the present application provides a data processing method, as shown in fig. 2, which may be applied to a processor, where the method includes:
s201, acquiring source data input by a user and target operation parameters corresponding to the source data.
Wherein the source data may be floating point numbers conforming to the IEEE 754 (IEEE binary floating point arithmetic standard) format.
Specifically, the user can input source data and target operation parameters corresponding to the source data to the processor through operation of the terminal peripheral. The processor may be an embedded microprocessor, which may be communicatively coupled to the terminal via a wired or wireless network.
S202, if the target operation parameters are integers, performing the following operation operations on the source data and the target operation parameters to execute a target exponent operation instruction, and generating target data corresponding to the source data:
S2021, determining format attribute of the source data based on the hidden bit of the source data;
s2022, calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscosity bit of the source data;
s2023, based on the shift value, the update value and the sticky bit, performing shift operation, rounding operation and step code update operation on the source data by the floating point number type conversion unit respectively, to generate target data.
The target exponent operation instruction may be an FSCALE instruction, where the FSCALE instruction is configured to perform an operation of the following exponent function:
DstFP＝SrcFP*2.0 scale (1)
wherein SrcFP is the source data, scale is the target operation parameter, and DstFP is the target data.
The specific operation will be described in detail below.
In the embodiment of the application, the operation performed by the processor can be applied to the fields of image processing, video processing, AI (Artificial Intelligence ) processing and the like. For example, based on the data processing in the embodiment of the present application, the arithmetic operation shown in the above formula (1) may be performed to complete the exponential operation required in the AI processing process, so as to improve the operation efficiency, optimize the flow of the AI processing, and improve the operation power consumption of the processor.
According to the embodiment of the application, through the floating point number type conversion unit, the following operation is performed on source data input by a user and target operation parameters corresponding to the source data: determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing a shift operation, a rounding operation and a step code updating operation on the source data based on the shift value, the updating value and the sticky bit, and generating target data to complete a target exponent operation instruction. In the embodiment of the application, in the process of executing the target exponent operation instruction operation, the rapid operation of the target exponent operation instruction is realized by multiplexing the existing floating point number type conversion unit; compared with the prior art that the target exponent operation instruction is realized based on the complex data path of the multiplication and addition unit, the floating point number type conversion unit adopted in the embodiment of the application has the advantages that the data path is simpler, the operation efficiency can be improved, and the power consumption of a processor can be reduced.
In an embodiment of the present application, as shown in fig. 3-1, the calculating the source data according to the format attribute and the numerical range of the target operation parameter to generate the shift value, the updated value of the step code of the source data, and the viscosity bit of the source data includes:
(1) When the format attribute is a denormalized floating point number and the target operation parameter is a negative number, taking the absolute value of the target operation parameter as a shift value, determining an update value of a step code according to the leading zero count of the mantissa of the source data, the bit width of the mantissa and the target operation parameter, and determining the sticky bit according to the suffix zero count of the mantissa and the target operation parameter.
Wherein, the direction of the shift value is right shift.
Specifically, the updated value of the step code may be determined based on the following formula:
when LZC+|scale|is equal to or greater than Mbits+1, EXP' =0;
EXP' =exp when lzc+|scale| < mbits+1;
wherein LZC is the leading zero count of the mantissa of the source data; mbits is the bit width of the mantissa, for example, 11 bits when the source data is a half-precision floating point number, and 23 bits when the source data is a single-precision floating point number; EXP is the code of the source data, EXP' is the updated value of the code. When EXP' =0, the source data, i.e., the denormalized floating point number, may be converted to 0, i.e., the target data may be 0.
Alternatively, the viscous position may be determined based on the following formula:
when TZC is less than or equal to (|scale| -2), s=1;
When TZC > (|scale| -2), s=0;
wherein TZC is a suffix zero count of mantissa of the source data, and S is a value of sticky bit.
(2) When the format attribute is a denormalized floating point number and the target operation parameter is a positive number, a shift value is determined based on the difference value of the leading zero count of the mantissa and the target operation parameter, and an update value of the step code is determined according to the maximum value of the step code, the leading zero count and the target operation parameter, so that the sticky position is zero.
Specifically, the shift value may be determined based on the following formula:
when LZC < scale, shift_number=lzc;
when LZC is not less than scale, shift_number=lzc-scale;
wherein shift_number is a shift value, and the direction of the shift value is left shift.
Alternatively, the updated value of the step code may be determined based on the following formula:
when exp+inc is greater than or equal to EMAX, EXP' =emax;
when exp+inc < EMAX, expv=exp+inc;
wherein inc is a calculation parameter:
when LZC < scale, inc=scale-LZC;
when LZC is greater than or equal to scale, inc=0;
wherein, EMAX is the maximum value of the step code; for example, when the source data is a half-precision floating point number, the bit width of the step code is 5 bits, i.e., the maximum value of the step code is 31.
Where EXP' =emax, the source data, i.e., the denormalized floating point number, may be converted to infinity, i.e., the target data may be infinity.
When EXP' =exp+inc, the source data, i.e., the target data corresponding to the denormalized floating point number, may be the normalized or denormalized floating point number.
(3) When the format attribute is a non-normalized floating point number and the target operation parameter is equal to zero, the shift value and the viscous position are zero, and the step code is not updated.
When the shift value is zero, namely, the mantissa is not shifted; and when the above-mentioned step code is not updated, i.e., EXP' =exp.
In one possible implementation manner provided in the embodiment of the present application, as shown in fig. 3-2, the method further includes:
(1) When the format attribute is a normalized floating point number and the target operation parameter is a negative number, the shift value and the updated value of the step code are determined according to the bit widths of the step code and the mantissa and the target operation parameter, and the sticky bit is determined according to the suffix zero count of the step code and the mantissa and the target operation parameter.
Specifically, the shift value shift_number may be calculated based on the following formula:
when (EXP-1+Mbits+1+scale)<At 0, shift_number=shift/unumber max ；
When (EXP-1+mbits+1+scale) > 0, and (EXP-1+scale) <0, shift_number= |scale| - (EXP-1) +1;
when (EXP-1+mbits+1+scale) is not less than 0, and (EXP-1+scale) is not less than 0, shift_number=0;
Wherein, shift_number max And (3) the maximum value which can be shifted is the mantissa of the source data within the value range of the floating point number in the preset format.
Alternatively, the updated value of the step code may be calculated based on the following formula:
EXP' =0 when EXP-1+mbits+1+scale < 0;
when EXP-1+mbits+1+scale is not less than 0, and EXP-1+scale <0, EXP' =1;
when EXP-1+mbits+1+scale is not less than 0, and EXP-1+scale is not less than 0, EXP' =exp+scale;
when EXP' =0, the source data, i.e., the target data corresponding to the normalized floating point number, may be 0.
When EXP' =1, the source data, i.e., the target data corresponding to the normalized floating point number, may be a denormal floating point number.
When EXP' =exp+scale, the source data, i.e., the target data corresponding to the normalized floating point number, may also be the normalized floating point number.
Alternatively, the viscous position may be calculated based on the following formula:
when TZC is less than or equal to (len-2), S=1;
when TZC > (len-2), s=0;
wherein len is the length factor:
when EXP-1+scale is not less than 0, len=0;
when EXP-1+scale <0, len= |scale| - (EXP-1);
(2) When the format attribute is a normalized floating point number and the target operation parameter is a non-negative number, the shift value and the viscous position are zero, and the update value of the step code is determined according to the maximum value of the step code, the step code and the target operation parameter.
Specifically, the updated value of the step code may be calculated based on the following formula:
when exp+scale is ≡emax, EXP' =emax;
when exp+scale < EMAX, expv=emax+scale;
where EXP' =emax, the source data, i.e., normalized floating point number, may be converted to infinity, i.e., the target data may be infinity.
When EXP' =emax+scale, the source data, i.e., the target data corresponding to the normalized floating point number, may be a denormal floating point number.
The embodiment of the application provides a possible implementation manner, which is based on a shift value, an update value and a sticky bit, and performs shift operation, rounding operation and step code update operation on source data respectively through a floating point number type conversion module to generate target data, wherein the method comprises the following steps:
s301, performing shift operation on the mantissa of the source data based on the shift value to obtain a shifted mantissa.
Specifically, when the shift operation is performed, the sign bit of the source data is unchanged, the left shift or the right shift is performed for the mantissa, and the free bit is complemented with 0, so as to obtain the shifted mantissa.
S302, rounding operation is carried out on the shifted mantissa based on the sticky bit, and the target mantissa is obtained.
Wherein the rounding operations may correspond to different rounding rules, for example rounded up to an even number rounding in +++ direction or rounding in the- ≡direction, etc. The embodiment of the present application is not particularly limited.
Specifically, the relationship between the sticky bit and the rounding bit is shown in fig. 4, wherein the mantissa after the rounding bit R may be used as a sticky region, and the value of the sticky bit may be determined based on the sticky region; for example, when the value of all bits in the sticky region is 0, the sticky bit is 0; when there is at least one non-zero bit in the sticky region, the sticky bit is 1. In the viscous region of fig. 5, where there is at least one non-zero bit, a viscous bit of 1 can be obtained.
S303, carrying out format packaging based on the update value of the step code, the target mantissa and the sign bit of the source data to generate target data.
Specifically, the updated value of the step code, the target mantissa, and the sign bit of the source data may be formatted based on the IEEE 754 encoding format to generate the target data.
In some embodiments, the target data may be generated directly by packaging; in other embodiments, the updated value of the step code may be updated twice based on data following the shift operation and the rounding operation, and then packed to generate the target data, the second update process of the step code being described in more detail below.
The embodiment of the application provides a possible implementation manner, wherein the step-code-based updating value, the target mantissa and the sign bit of the source data are subjected to format packaging to generate target data, and the method comprises the following steps:
S401, when it is determined that the step code of the source data needs to be updated for the second time according to the shift operation and the rounding operation, the update value of the step code is updated according to the target mantissa, and the target step code is obtained.
Specifically, the processor may update the updated value of the step code with reference to the carry information provided by the rounding subunit to obtain the target step code.
For example, when shifting mantissas, the mantissa is the maximum value in the current floating point number format, and the rounding operation is as follows:
mantissa＝1.111111+0.000001＝10.000000 (2)
wherein mantssa is mantissa, +0.000001 is a rounding operation;
then a second update of the update value EXP 'of the step code is required, taking EXP' +1 as the target step code. Its corresponding mantissa becomes 1.000000.
S402, format packaging is carried out based on the target order code, the target mantissa and the sign bit of the source data, and target data is generated.
Specifically, the target data may be generated by format-packing the target level, the target mantissa, and the sign bit of the source data based on the IEEE 754 encoding format.
The embodiment of the application provides a possible implementation manner, and the method further comprises the following steps:
and generating exception state information corresponding to the target data based on the rounding rule corresponding to the rounding operation and the format attribute change state of the source data in the operation.
Specifically, the exception state information corresponding to the target data may be generated based on the rounding rule corresponding to the rounding operation, the source data, the carry information determined by the foregoing rounding operation, the target mantissa, and the target step code.
The exception state information is used for representing the exception handling state of the processor in the calculation process.
For example, when the target data is in definition (infinity), the corresponding exception status information may be overflow (overflow), i.e., the calculated value of the target data exceeds the maximum value that can be represented by the current floating point number format.
When the target data is a non-specification value or 0 and the condition of inexact is satisfied, the corresponding exception status information may be unrerflow.
When in the rounding operation, the rounding bit of the mantissa and the bit of the sticky region are not 0, the corresponding exception status information may be ineact.
When the target data input result is nan (non a number), the corresponding exceptional state information may be invalid operation, i.e., illegal operation.
The embodiment of the application provides a possible implementation mode, wherein the source data is a half-precision floating point number, and the bit width of the step code is 5; then for normalized floating point numbers, the maximum value of the code is 31 and the minimum value is 0; when the step code is 0, the source data is 0 or a denormal floating point number; when the level is greater than 31, the source data is definition.
The method further comprises the steps of:
when the format attribute is a denormal floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number, a denormal floating point number or an infinite floating point number.
When the format attribute is a non-normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a non-normalized floating point number or zero.
When the format attribute is a normalized floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number or an infinite floating point number;
wherein the step code is updated based on the target operation parameter.
When the format attribute is a normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a normalized floating point number, a non-normalized floating point number or zero;
wherein the mantissa may be modified.
In the embodiment of the application, when the source data is a normalized floating point number and the target operation parameter is a negative number, if |scale| is large enough, i.e., |scale| > (exp+mbits), the target data will approach 0, i.e., the updated value of the step code and the mantissa will be so small that the target data cannot be identified by the existing floating point number encoding rule, so that the target data is 0, the target data can be said to be so large that the step code value and the mantissa value of the target data are consumed, and the target data becomes 0. If scale consumes only the order value and part of the mantissa bits, the target data will become a denormalized floating point number. If the level cannot consume the level value to minimize the level value, the level value needs to be updated.
In other embodiments, when the source data is a denormal floating point number, we need to compare the difference between LZC and the target operational parameter scale. If scale is large enough, the step value is updated based on the difference, and the target data may be normalized floating point numbers. For example, for a denormalized source data, the mantissa may be 0.000110101, at which point scale is 3 or more, 2 3 *0.000110101 The whole number of mantissas may be changed from 0 to 1 by = 1.1010100000, i.e. the target data is a normalized floating point number, and in this embodiment, the target operation parameter is sufficiently large as long as it is not smaller than 3. If scale is less than or equal to LZC and scale is not equal to 0, the code is unchanged, and the mantissa is updated according to the value of scale.
For a better understanding of the above data processing method, an example of the data processing method of the present application is described in detail below in conjunction with fig. 5, and the above method may be applied to a microprocessor including a floating point type conversion unit including a preamble 0 count subunit, a suffix 0 count subunit, a shift subunit, a sticky bit generation subunit, a code update subunit, a rounding subunit, a format packing subunit, and an exception status information generation subunit: the method comprises the following steps:
S501, the microprocessor acquires source data input by a user and target operation parameters corresponding to the source data.
S502, determining the TZC of the mantissa of the source data based on the leading 0 counting subunit and the trailing 0 counting subunit.
S503, generating a shift value based on the LZC and the target operation parameter.
S504, the shifting subunit performs shifting operation on the mantissa according to the shifting value, and generates a shifted mantissa.
S505, the sticky bit generating subunit generates a sticky bit S based on the TZC and the target operation parameter.
S506, the rounding subunit performs rounding operation on the shifted mantissa based on the viscosity bit S to obtain a target mantissa.
S507, the step code updating subunit determines an updating value of the step code based on the LZC and the target operation parameter. When it is determined that the step code of the source data needs to be updated secondarily according to the shift operation and the rounding operation, the step code updating subunit updates the updated value of the step code again with reference to the carry information provided by the rounding subunit, and a target step code is obtained.
S508, the format packaging subunit performs format packaging based on the target order code, the target mantissa and the sign bit of the source data to generate target data. And the exceptional state information generating subunit generates exceptional state information corresponding to the target data based on the rounding rule, the source data, the carry information, the target mantissa and the target level code corresponding to the rounding operation.
According to the embodiment of the application, through the floating point number type conversion unit, the following operation is performed on source data input by a user and target operation parameters corresponding to the source data: determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing a shift operation, a rounding operation and a step code updating operation on the source data based on the shift value, the updating value and the sticky bit, and generating target data to complete a target exponent operation instruction. In the embodiment of the application, in the process of executing the target exponent operation instruction operation, the rapid operation of the target exponent operation instruction is realized by multiplexing the existing floating point number type conversion unit; compared with the prior art that the target exponent operation instruction is realized based on the complex data path of the multiplication and addition unit, the floating point number type conversion unit adopted in the embodiment of the application has the advantages that the data path is simpler, the operation efficiency can be improved, and the power consumption of a processor can be reduced.
An embodiment of the present application provides a data processing apparatus, as shown in fig. 6, the data processing apparatus 60 may include: an acquisition module 601 and an operation module 602;
The acquiring module 601 is configured to acquire source data input by a user and a target operation parameter corresponding to the source data; wherein the source data is floating point number;
the operation module 602 is configured to perform, if the target operation parameter is an integer, the following operation operations on the source data and the target operation parameter to execute the target exponent operation instruction, and generate target data corresponding to the source data:
determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing shifting operation, rounding operation and order code updating operation on the source data through a floating point number type conversion unit based on the shifting value, the updating value and the sticky bit to generate target data.
In one possible implementation manner provided in the embodiment of the present application, the operation module 602 is configured to, when calculating the source data according to the format attribute and the numerical range of the target operation parameter, generate a shift value, an update value of a step code of the source data, and a sticky bit of the source data:
when the format attribute is a denormalized floating point number and the target operation parameter is a negative number, taking the absolute value of the target operation parameter as a shift value, determining an update value of a step code according to the leading zero count of the mantissa of the source data, the bit width of the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the mantissa and the target operation parameter;
When the format attribute is a denormalized floating point number and the target operation parameter is a positive number, determining a shift value based on the difference value of the leading zero count of the mantissa and the target operation parameter, determining an update value of the step code according to the maximum value of the step code, the leading zero count and the target operation parameter, and setting the sticky position as zero;
when the format attribute is a non-normalized floating point number and the target operation parameter is equal to zero, the shift value and the viscous position are zero, and the step code is not updated.
In an embodiment of the present application, a possible implementation manner is provided, where the above operation module 602 is further configured to:
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, determining a shift value and an update value of the step code according to the bit widths of the step code and the mantissa and the target operation parameter, and determining a sticky bit according to the suffix zero count of the step code and the mantissa and the target operation parameter;
when the format attribute is a normalized floating point number and the target operation parameter is a non-negative number, the shift value and the viscous position are zero, and the update value of the step code is determined according to the maximum value of the step code, the step code and the target operation parameter.
In one possible implementation manner provided in the embodiment of the present application, the operation module 602 is configured to, when performing a shift operation, a rounding operation, and a step update operation on source data by using a floating point type conversion module based on a shift value, an update value, and a sticky bit, generate target data, respectively:
Performing shifting operation on the mantissa of the source data based on the shifting value to obtain a shifted mantissa;
rounding the shifted mantissa based on the sticky bit to obtain a target mantissa;
and carrying out format packaging based on the updated value of the step code, the target mantissa and the sign bit of the source data to generate target data.
In one possible implementation manner provided in the embodiment of the present application, the operation module 602 is configured to, when performing format packaging based on the update value of the step code, the target mantissa, and the sign bit of the source data, generate the target data:
when the secondary updating of the step code of the source data is determined according to the shifting operation and the rounding operation, updating the updated value of the step code according to the target mantissa to obtain the target step code;
and carrying out format packaging based on the target order code, the target mantissa and the sign bit of the source data to generate target data.
In an embodiment of the present application, a possible implementation manner is provided, where the above operation module 602 is further configured to:
and generating exception state information corresponding to the target data based on the rounding rule corresponding to the rounding operation and the format attribute change state of the source data in the operation.
In one possible implementation manner provided in the embodiment of the present application, the source data is a half-precision floating point number, and the operation module 602 is further configured to:
When the format attribute is a denormal floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number, a denormal floating point number or an infinite floating point number;
when the format attribute is a non-normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a non-normalized floating point number or zero;
when the format attribute is a normalized floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number or an infinite floating point number;
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a normalized floating point number, a non-normalized floating point number or zero.
The device of the embodiment of the present application may perform the method provided by the embodiment of the present application, and its implementation principle is similar, and actions performed by each module in the device of the embodiment of the present application correspond to steps in the method of the embodiment of the present application, and detailed functional descriptions of each module of the device may be referred to the descriptions in the corresponding methods shown in the foregoing, which are not repeated herein.
According to the embodiment of the application, through the floating point number type conversion unit, the following operation is performed on source data input by a user and target operation parameters corresponding to the source data: determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing a shift operation, a rounding operation and a step code updating operation on the source data based on the shift value, the updating value and the sticky bit, and generating target data to complete a target exponent operation instruction. In the embodiment of the application, in the process of executing the target exponent operation instruction operation, the rapid operation of the target exponent operation instruction is realized by multiplexing the existing floating point number type conversion unit; compared with the prior art that the target exponent operation instruction is realized based on the complex data path of the multiplication and addition unit, the floating point number type conversion unit adopted in the embodiment of the application has the advantages that the data path is simpler, the operation efficiency can be improved, and the power consumption of a processor can be reduced.
The embodiment of the application provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory, wherein the processor executes the computer program to realize the steps of a data processing method, and compared with the related technology, the method can realize the following steps: according to the embodiment of the application, through the floating point number type conversion unit, the following operation is performed on source data input by a user and target operation parameters corresponding to the source data: determining format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data; and respectively performing a shift operation, a rounding operation and a step code updating operation on the source data based on the shift value, the updating value and the sticky bit, and generating target data to complete a target exponent operation instruction. In the embodiment of the application, in the process of executing the target exponent operation instruction operation, the rapid operation of the target exponent operation instruction is realized by multiplexing the existing floating point number type conversion unit; compared with the prior art that the target exponent operation instruction is realized based on the complex data path of the multiplication and addition unit, the floating point number type conversion unit adopted in the embodiment of the application has the advantages that the data path is simpler, the operation efficiency can be improved, and the power consumption of a processor can be reduced.
In an alternative embodiment, an electronic device is provided, as shown in fig. 7, the electronic device 70 shown in fig. 7 comprising: a processor 701 and a memory 703. The processor 701 is coupled to a memory 703, such as via a bus 702. Optionally, the electronic device 70 may further comprise a transceiver 704, the transceiver 704 may be used for data interaction between the electronic device and other electronic devices, such as transmission of data and/or reception of data, etc. It should be noted that, in practical applications, the transceiver 704 is not limited to one, and the structure of the electronic device 70 is not limited to the embodiment of the present application.
The processor 701 may be a CPU (Central Processing Unit ), general purpose processor, DSP (Digital Signal Processor, data signal processor), ASIC (Application Specific Integrated Circuit ), FPGA (Field Programmable Gate Array, field programmable gate array) or other programmable logic device, transistor logic device, hardware components, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules and circuits described in connection with this disclosure. The processor 701 may also be a combination that performs computing functions, such as including one or more microprocessors, a combination of a DSP and a microprocessor, or the like.
Bus 702 may include a path to transfer information between the components. Bus 702 may be a PCI (Peripheral Component Interconnect, peripheral component interconnect Standard) bus or an EISA (Extended Industry Standard Architecture ) bus, or the like. Bus 702 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in fig. 7, but not only one bus or one type of bus.
The Memory 703 may be a ROM (Read Only Memory) or other type of static storage device that can store static information and instructions, a RAM (Random Access Memory ) or other type of dynamic storage device that can store information and instructions, an EEPROM (Electrically Erasable Programmable Read Only Memory ), a CD-ROM (Compact Disc Read Only Memory, compact disc Read Only Memory) or other optical disk storage, optical disk storage (including compact discs, laser discs, optical discs, digital versatile discs, blu-ray discs, etc.), magnetic disk storage media, other magnetic storage devices, or any other medium that can be used to carry or store a computer program and that can be Read by a computer, without limitation.
The memory 703 is used for storing a computer program for executing an embodiment of the present application and is controlled to be executed by the processor 701. The processor 701 is arranged to execute a computer program stored in the memory 703 for carrying out the steps shown in the foregoing method embodiments.
Among them, electronic devices include, but are not limited to: mobile terminals such as mobile phones, notebook computers, PADs, etc., and stationary terminals such as digital TVs, desktop computers, etc.
Embodiments of the present application provide a computer readable storage medium having a computer program stored thereon, which when executed by a processor, implements the steps of the foregoing method embodiments and corresponding content.
Embodiments of the present application provide a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions such that the computer device performs:
acquiring source data input by a user and target operation parameters corresponding to the source data; wherein the source data is floating point number;
If the target operation parameter is an integer, performing the following operation on the source data and the target operation parameter to execute the target exponent operation instruction, and generating target data corresponding to the source data:
determining format attribute of the source data based on the hidden bit of the source data;
calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an update value of a step code of the source data and a viscous bit of the source data;
and respectively performing shifting operation, rounding operation and order code updating operation on the source data through a floating point number type conversion unit based on the shifting value, the updating value and the sticky bit to generate target data.
The terms "first," "second," "third," "fourth," "1," "2," and the like in the description and in the claims and in the above figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate, such that the embodiments of the application described herein may be implemented in other sequences than those illustrated or otherwise described.
It should be understood that, although various operation steps are indicated by arrows in the flowcharts of the embodiments of the present application, the order in which these steps are implemented is not limited to the order indicated by the arrows. In some implementations of embodiments of the application, the implementation steps in the flowcharts may be performed in other orders as desired, unless explicitly stated herein. Furthermore, some or all of the steps in the flowcharts may include multiple sub-steps or multiple stages based on the actual implementation scenario. Some or all of these sub-steps or phases may be performed at the same time, or each of these sub-steps or phases may be performed at different times, respectively. In the case of different execution time, the execution sequence of the sub-steps or stages can be flexibly configured according to the requirement, which is not limited by the embodiment of the present application.
The foregoing is merely an optional implementation manner of some of the implementation scenarios of the present application, and it should be noted that, for those skilled in the art, other similar implementation manners based on the technical ideas of the present application are adopted without departing from the technical ideas of the scheme of the present application, and the implementation manner is also within the protection scope of the embodiments of the present application.
Claims (10)
1. A data processing method, applied to a processor, comprising:
acquiring source data input by a user and target operation parameters corresponding to the source data; wherein the source data is floating point number;
if the target operation parameter is an integer, performing the following operation on the source data and the target operation parameter to execute a target exponent operation instruction, and generating target data corresponding to the source data:
determining a format attribute of the source data based on the hidden bit of the source data;
calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an updated value of a step code of the source data and a viscous bit of the source data;
and generating target data by respectively performing shift operation, rounding operation and step code updating operation on the source data through a floating point number type conversion unit based on the shift value, the updating value and the sticky bit.
2. The method of claim 1, wherein the calculating the source data based on the format attribute and the range of values of the target operation parameter, generating a shift value, an updated value of a step of the source data, a sticky bit of the source data, comprises:
when the format attribute is a denormalized floating point number and the target operation parameter is a negative number, taking the absolute value of the target operation parameter as a shift value, determining an update value of the jump code according to a leading zero count of the mantissa of the source data, the bit width of the mantissa and the target operation parameter, and determining the sticky bit according to a suffix zero count of the mantissa and the target operation parameter;
when the format attribute is a denormalized floating point number and the target operation parameter is a positive number, determining the shift value based on the difference value of the leading zero count of the mantissa and the target operation parameter, determining an updated value of the step code according to the maximum value of the step code, the leading zero count and the target operation parameter, and setting the viscous position to be zero;
when the format attribute is a denormalized floating point number and the target operation parameter is equal to zero, the shift value and the sticky position are zero, and the step code is not updated.
3. The method according to claim 2, wherein the method further comprises:
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, determining a shift value and an update value of the step code according to the bit width of the step code and the mantissa and the target operation parameter, and determining the sticky bit according to the suffix zero count of the step code and the mantissa and the target operation parameter;
and when the format attribute is a normalized floating point number and the target operation parameter is a non-negative number, the shift value and the viscous position are zero, and the updated value of the step code is determined according to the maximum value of the step code, the step code and the target operation parameter.
4. The method of claim 1, wherein generating target data by performing a shift operation, a rounding operation, and a step code update operation on the source data, respectively, by a floating point type conversion module based on the shift value, the update value, and the sticky bit, comprises:
performing shifting operation on the mantissa of the source data based on the shifting value to obtain a shifted mantissa;
rounding the shifted mantissa based on the sticky bit to obtain a target mantissa;
And carrying out format packaging based on the updated value of the step code, the target mantissa and the sign bit of the source data to generate target data.
5. The method of claim 4, wherein the generating the target data based on the updated value of the step code, the target mantissa, and the sign bit of the source data in a format package comprises:
when the secondary updating of the step code of the source data is determined according to the shifting operation and the rounding operation, updating the updated value of the step code according to the target mantissa to obtain a target step code;
and carrying out format packaging based on the target order code, the target mantissa and the sign bit of the source data to generate target data.
6. The method according to claim 1, wherein the method further comprises:
and generating exception state information corresponding to the target data based on the rounding rule corresponding to the rounding operation and the format attribute change state of the source data in the operation.
7. The method of claim 1, wherein the source data is a half-precision floating point number, the method further comprising:
when the format attribute is a denormal floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number, a denormal floating point number or an infinite floating point number;
When the format attribute is a non-normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a non-normalized floating point number or zero;
when the format attribute is a normalized floating point number and the target operation parameter is a positive number, the target data corresponding to the source data is a normalized floating point number or an infinite floating point number;
when the format attribute is a normalized floating point number and the target operation parameter is a negative number, the target data corresponding to the source data is a normalized floating point number, a non-normalized floating point number or zero.
8. A data processing apparatus, comprising:
the acquisition module is used for acquiring source data input by a user and target operation parameters corresponding to the source data; wherein the source data is floating point number;
the operation module is used for performing the following operation operations on the source data and the target operation parameters if the target operation parameters are integers so as to execute a target exponent operation instruction and generate target data corresponding to the source data:
determining a format attribute of the source data based on the hidden bit of the source data; calculating the source data according to the format attribute and the numerical range of the target operation parameter, and generating a shift numerical value, an updated value of a step code of the source data and a viscous bit of the source data; and generating target data by respectively performing shift operation, rounding operation and step code updating operation on the source data through a floating point number type conversion unit based on the shift value, the updating value and the sticky bit.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory, characterized in that the processor executes the computer program to carry out the steps of the method according to any one of claims 1 to 7.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any one of claims 1 to 7.
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