CN117193491A - Server device - Google Patents

Server device Download PDF

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Publication number
CN117193491A
CN117193491A CN202311205737.2A CN202311205737A CN117193491A CN 117193491 A CN117193491 A CN 117193491A CN 202311205737 A CN202311205737 A CN 202311205737A CN 117193491 A CN117193491 A CN 117193491A
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CN
China
Prior art keywords
circuit board
power supply
server
socket
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311205737.2A
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Chinese (zh)
Inventor
徐肖
康佳
张营兵
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XFusion Digital Technologies Co Ltd
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XFusion Digital Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by XFusion Digital Technologies Co Ltd filed Critical XFusion Digital Technologies Co Ltd
Priority to CN202311205737.2A priority Critical patent/CN117193491A/en
Publication of CN117193491A publication Critical patent/CN117193491A/en
Pending legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the application provides a server, which comprises a first circuit board, a second circuit board, a central processing unit, a PCIE card, a first signal cable and a first power supply socket, wherein the central processing unit is arranged on the first circuit board; the second circuit board is provided with a first mounting groove, the PCIE card is arranged on the first mounting groove, one end of the first signal cable is electrically connected with the first circuit board, and the first signal cable extends to the first mounting groove to be electrically connected with the PCIE card; the first power supply socket is arranged at one side edge of the second circuit board and is used for supplying power to the PCIE card. According to the server provided by the embodiment of the application, more space is reserved on the second circuit board of the server for arranging PCIE cards or other functional devices, so that the computing capacity of the server can be improved.

Description

Server device
Technical Field
The application relates to the technical field of servers, in particular to a server.
Background
With the rise of big data, cloud computing and AI, the demands for the processing speed of the server system are increasing.
The AI server has a strong image processing capability and a strong computing capability, so with the rapid development of big data, cloud computing and AI (Artificial intelligence ), the AI server is widely used. The GPU server belongs to one of the AI servers, and comprises a main board, a daughter board, a central processing unit and an image processor, wherein the central processing unit is positioned on the main board and is electrically connected with the main board, the image processor is positioned on the daughter board and is electrically connected with the daughter board, and the image processor is electrically connected with the central processing unit through an internal wiring of the daughter board. When the image processor and the central processing unit are electrically connected through the internal wiring of the daughter board, the loss of signal transmission is large. In addition, in order to expand the number of image processors electrically connected to the central processor and to extend the link of signal transmission, an enhancement chip may be disposed between the central processor and the image processors, where the enhancement chip is disposed on the daughter board, and the enhancement chip occupies a space on the board surface of the daughter board. In addition, in order to further increase the processing speed of the GPU server, the number of image processors on the daughter board is increased or an image processor with a higher operation speed is used, so that a power supply connector needs to be newly added on the daughter board to supply power to the image processor, and the power supply connector also occupies space on the board surface of the daughter board.
Accordingly, in the related art, the space on the board surface of the sub-board is occupied by the enhanced chip and the power supply connector, so that the space on the sub-board available for arranging the image processor and other functional devices is small.
Disclosure of Invention
The embodiment of the application provides a server, and more space is reserved on a second circuit board of the server for arranging PCIE cards or other functional devices, so that the computing capacity of the server can be improved.
The first aspect of the embodiment of the application provides a server, which comprises a first circuit board, a second circuit board, a central processing unit, a PCIe card, a first signal cable and a first power supply socket, wherein the central processing unit is arranged on the first circuit board; the second circuit board is provided with a first mounting groove, the PCIE card is arranged on the first mounting groove, one end of the first signal cable is electrically connected with the first circuit board, and the first signal cable extends to the first mounting groove to be electrically connected with the PCIE card; the first power supply socket is arranged at one side edge of the second circuit board and is used for supplying power to the PCIE card.
According to the server provided by the embodiment of the application, the first circuit board, the second circuit board, the central processing unit, the PCIE card, the first signal cable and the first power supply socket are arranged, and the central processing unit is arranged on the first circuit board; the second circuit board is provided with a plurality of first mounting slots, the PCIE card is arranged on the first mounting slots, one end of the first signal cable is electrically connected with the first circuit board, the first signal cable extends to the first mounting slots to be electrically connected with the PCIE card, and the first signal cable is directly electrically connected with the PCIE card, so that the loss of the CPU when the CPU and the PCIE card transmit signals can be reduced. Therefore, the enhancement chip is not required to be arranged on the second circuit board for prolonging the signal transmission link, the enhancement chip can be prevented from occupying the position on the second circuit board, the space on the second circuit board can be saved, and meanwhile, the cost can be saved. The first power supply socket is arranged at the side edge of the second circuit board, so that the space of the second circuit board occupied by the first power supply socket is smaller, PCIE cards or other functional devices are arranged in more space on the second circuit board, and the computing capacity of the server can be improved.
In a possible implementation manner, in the server provided by the embodiment of the present application, the first circuit board and the second circuit board are arranged along a height direction of the server, the second circuit board has a first board surface and a second board surface opposite to each other along the height direction, the first board surface is opposite to the first circuit board, the PCIE card is located on one side of the second board surface, the first mounting slot penetrates through the first board surface and the second board surface, and the first signal cable penetrates through the first board surface into the first mounting slot to be connected with the PCIE card. The first mounting groove is formed in the through groove penetrating the second circuit board, the first signal cable penetrates through the first mounting groove and is electrically connected with the PCIE card, the first signal cable can be prevented from being wound onto the second board surface from the side edge of the second circuit board, the length of the first signal cable can be reduced, and the wiring of the first signal cable is tidy.
In a possible implementation manner, the server provided by the embodiment of the application includes a first connector, a first lead and a second connector which are electrically connected in sequence, wherein the first connector is electrically connected with a first circuit board, and the second connector includes a signal socket and a first mounting part, and the first mounting part is connected with the signal socket; the first mounting part is positioned on one side of the first board surface, the second circuit board is provided with a second mounting part, and the first mounting part is connected with the second mounting part; the signal socket is arranged in the first mounting groove in a penetrating mode, the signal socket extends out of the second board surface through the first mounting groove, and the PCIE card is spliced with the signal socket. Through inserting the signal plug in the signal socket, when being connected PCIE card and first signal cable electricity, also can fix PCIE card on the second circuit board, from this, saved the structure that PCIE card and second circuit board are connected, in addition, first installation department is located first face one side for can have more spaces to set up PCIE card or other functional device on the second face of second circuit board.
In one possible implementation manner, the server provided by the embodiment of the application is provided with a protruding part on the side edge, and the first power supply socket is arranged on the protruding part. Through setting up first power supply socket on the bulge that extends from first side, can avoid carrying out great change to the internal wiring of second circuit board, even be provided with components and parts on first side, also can avoid first power supply socket to interfere with components and parts of first side department. In addition, the area of the protruding part only needs to be slightly larger than the projection area of the first power supply socket on the protruding part, so that the space occupied by the protruding part in the shell is smaller.
In a possible implementation manner, the server provided by the embodiment of the application further comprises a power backboard and a first power supply cable, wherein the first power supply cable is used for electrically connecting the power backboard and the first power supply socket. The first power supply socket may be electrically connected to the power back plane through a first power supply cable to increase the power supplied to the second circuit board.
In a possible implementation manner, in the server provided by the embodiment of the present application, the second circuit board further includes a second power supply socket and a second power supply cable, where the second power supply socket is disposed on a side edge of the second circuit board, and the number of the second power supply sockets, the number of the second power supply cables, and the number of PCIE cards are the same, and the second power supply socket is connected with the first power supply socket through an internal wiring of the second circuit board; one end of the second power supply cable is electrically connected with the second power supply socket, and the other end of the second power supply cable is electrically connected with the PCIE card. When the PCIE card is powered by the first power supply socket, the first internal wiring is only added on the second circuit board, and the rest power supply loops and the second copper bars are shared power supply loops, so that the second circuit board is changed slightly.
In a possible implementation manner, in the server provided by the embodiment of the application, the number of the protruding parts is at least two, the at least two protruding parts are arranged at intervals along the side edge of the second circuit board, and each protruding part is provided with the first power supply socket.
In a possible implementation manner, the server provided by the embodiment of the application further comprises a second installation slot on the second circuit board, and the server further comprises a network card, wherein the network card is inserted into the second installation slot.
In a possible implementation manner, in the server provided by the embodiment of the present application, the second mounting groove is located in the middle area of the second circuit board, so that PCIE cards are arranged in order on the second circuit board.
In a possible implementation manner, the server provided by the embodiment of the application further includes a casing, and the first circuit board, the second circuit board and the power backboard are all located in the casing.
These and other aspects, implementations, and advantages of the exemplary embodiments will become apparent from the following description of the embodiments, taken in conjunction with the accompanying drawings. It is to be understood that the specification and drawings are solely for purposes of illustration and not as a definition of the limits of the application, for which reference should be made to the appended claims. Additional aspects and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. Furthermore, the aspects and advantages of the application may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims.
Drawings
FIG. 1 is a schematic diagram of a GPU server in the related art;
fig. 2 is a schematic structural diagram of a server according to an embodiment of the present application;
fig. 3 is a schematic diagram of a second structure of a server according to an embodiment of the present application;
FIG. 4 is a schematic diagram of electrical connection relationships between components in a server according to an embodiment of the present application;
FIG. 5 is a right side view I of FIG. 2;
FIG. 6 is a second right side view of FIG. 2;
fig. 7 is a schematic structural diagram of a second circuit board and a power back board in a server according to an embodiment of the present application;
fig. 8 is a schematic diagram of an electrical connection relationship between a second circuit board and a power back board in a server according to an embodiment of the present application;
fig. 9 is a schematic diagram of a second electrical connection relationship between a second circuit board and a power back board in a server according to an embodiment of the present application.
Reference numerals illustrate:
100n, GPU server;
110n, a main board;
120n, daughter boards; 121n, a first socket; 122n, a second socket; 123n, internal wiring; 124n, enhancement chip; 125n, a heat sink; 126n, power supply connectors;
130n, a central processing unit;
140n, an image processor;
150n, a power backboard; 151n, a first copper bar; 152n, a second copper bar;
100. a server;
110. a first circuit board;
111. a third connector;
120. a second circuit board; 120a, a first side; 120b, a second side; 120c, a third side; 120d, fourth side; 120e, a first plate surface; 120f, a second plate surface;
121. a first mounting slot;
122. a second mounting portion; 1221. a second mounting hole;
123. a protruding portion;
125. a second power supply socket;
126. a second power supply cable;
127. the second mounting groove position;
130. a central processing unit;
140. PCIE card;
141. a signal plug;
142. a power interface;
150. a first signal cable; 150a, a first end; 150b, a second end;
151. a first connector;
152. a first lead; 1521. a wire core;
153. a second connector; 1531. a signal socket; 1532. a first mounting portion; 1532a, first mounting holes; 1533. a fastener;
160. a first power supply socket;
170. a housing;
171. a bottom wall;
172. a sidewall;
180. a power backboard;
181. a first copper bar;
182. a second copper bar;
183. a first power supply cable;
190. a network card;
l1, a first internal wiring;
l2, a second internal wiring;
x, a first direction;
y, second direction;
z, height direction.
Detailed Description
The terminology used in the description of the embodiments of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application, as will be described in detail with reference to the accompanying drawings.
For ease of understanding, the technical terms involved in the embodiments of the present application will be explained and explained first.
And the central processing unit: the central processing unit (Central Processing Unit, abbreviated as CPU) is an operation core and a processing core of an electronic device such as a server, and is mainly used for interpreting instructions and processing data.
An image processor: an image processor (Graphics Processing Unit, GPU) is a microprocessor that processes image operations on an electronic device such as a server.
GPU server: GPU servers typically employ a combination of a central processor with multiple image processors, the central processor being responsible for multitasking and scheduling, the image processors being responsible for image processing and parallel computing. Therefore, the GPU server has stronger image processing capability and calculation capability. The GPU server is widely used in various fields such as intelligent analysis, security monitoring and the like of medical images. The GPU server belongs to one of AI servers (Artificial intelligence ).
PCIE signal: the PCIE signal (peripheral component interconnect express, peripheral equipment high-speed connection standard) is a signal that is communicated between the CPU and the PCIE card through a PCIE protocol, and the PCIE link is a transmission link that transmits the PCIE signal.
Solid state disk: solid state disk (Solid State Drives, SSD for short) is a hard disk made of an array of solid state electronic memory chips.
With the rapid development of big data, cloud computing and AI, AI servers are widely used. Next, the configuration of the AI server will be described with respect to the GPU server as an example.
Fig. 1 is a schematic structural diagram of a GPU server in the related art. In the related art, the GPU server is denoted by 100n, and each component in the GPU server 100n is also added with a suffix n to distinguish from the server provided in the embodiment of the present application.
Referring to fig. 1, the GPU server 100n includes a motherboard 110n, a daughter board 120n, a central processor 130n, and an image processor 140n, and the central processor 130n may be soldered on the motherboard 110n and electrically connected with the motherboard 110 n.
The sub-board 120n is soldered with a plurality of first sockets 121n, and the image processor 140n is plugged into the first sockets 121n to be electrically connected with the sub-board 120 n. The daughter board 120n also has a second receptacle 122n thereon, and the second receptacle 122n is electrically connected to the first receptacle 121n through an internal trace 123n on the daughter board 120 n. The second socket 122n is used for electrically connecting with the motherboard 110n, and thus, the image processor 140n is electrically connected with the central processor 130n located on the motherboard 110n via the first socket 121n, the internal wiring 123n, and the second socket 122n in sequence.
In order to expand the number of the image processors 140n electrically connected to the central processor 130n and to extend the transmission link of the central processor 130n and the image processors 140n, an enhanced chip 124n may be disposed on the sub-board 120n, the enhanced chip 124n being located between the second socket 122n and the first socket 121n, the enhanced chip 124n being electrically connected to the first socket 121n and the second socket 122n through the internal wiring 123n, respectively, the central processor 130n being electrically connected to the plurality of image processors 140n through one enhanced chip 124n, and in fig. 1, the central processor 130n being electrically connected to the four image processors 140n through one enhanced chip 124 n.
The enhancement chip 124n may be a Switch chip or a re-timer chip. The enhancement chip 124n occupies space on the daughter board 120 n. In addition, the heat spreader 125n is generally required on the enhancement chip 124n, and the heat spreader 125n is also larger and occupies more positions on the daughter board 120n, and the cost of the enhancement chip 124n is higher.
In addition, when signals between the image processor 140n and the central processing unit 130n are transmitted through the internal wiring 123n of the sub-board 120n, energy loss is large.
The GPU server 100n further includes a power backplate 150n, the power backplate 150n includes a first copper bar 151n and a second copper bar 152n, the first copper bar 151n connects the power backplate 150n and the motherboard 110n to supply power to components on the motherboard 110n, and the second copper bar 152n connects the power backplate 150n and the daughter board 120n to supply power to components on the daughter board 120 n.
In order to further increase the processing speed of the GPU server 100n, the number of the image processors 140n on the sub-board 120n is increased or the image processors 140n with higher operation speed are used, so that a new power supply connector 126n needs to be added on the sub-board 120n, the power supply connector 126n is also electrically connected to the power supply back plane 150n, the power supply connector 126n can increase the power supplied by the power supply back plane 150n to the sub-board 120n, and the power supply connector 126n also occupies the space on the board surface of the sub-board 120 n.
The space on the board of the daughter board 120n is occupied by the enhanced chip 124n and the power supply connector 126n, so that the space on the daughter board available for arranging the image processor 140n and other functional devices is smaller, which is disadvantageous for the improvement of the computing power of the GPU server.
Based on this, the embodiment of the application provides a server, and more space is available on the second circuit board of the server for arranging PCIE cards or other functional devices, so that the computing capability of the server can be improved.
Fig. 2 is a schematic structural diagram of a server according to an embodiment of the present application; fig. 3 is a schematic diagram of a second structure of a server according to an embodiment of the present application; FIG. 4 is a schematic diagram of electrical connection relationships between components in a server according to an embodiment of the present application; fig. 5 is a right side view of fig. 2, wherein the chassis of the server is omitted from fig. 3, and the chassis and power back plate of the server are omitted from fig. 5.
Referring to fig. 2 to 5, the server 100 provided by the embodiment of the present application includes a first circuit board 110, a second circuit board 120, a central processing unit 130, a PCIE card 140, a first signal cable 150 and a first power supply socket 160, where the central processing unit 130 is disposed on the first circuit board 110; the second circuit board 120 is provided with a plurality of first mounting slots 121, the PCIE card 140 is arranged on the first mounting slots 121, one end of the first signal cable 150 is electrically connected with the first circuit board 110, and the first signal cable 150 extends to the first mounting slots 121 to be electrically connected with the PCIE card 140; the first signal cable 150 is used for transmitting high-speed signals between the central processor 130 and the PCIE card 140, the first power supply socket 160 is disposed at a side edge of the second circuit board 120, and the first power supply socket 160 is used for supplying power to the PCIE card 140.
With continued reference to fig. 2, the server 100 further includes a casing 170, where the casing 170 has a rectangular parallelepiped structure, and the casing 170 includes a length direction X, a width direction Y, and a height direction Z. The chassis 170 includes a bottom wall 171, side walls 172, and an upper cover (wherein the upper cover is not shown in fig. 2 in order to clearly illustrate the internal structure of the chassis 170), and the chassis 170 serves to support and house the components in the server 100.
The first circuit board 110 and the second circuit board 120 are both located in the housing 170, and the board surfaces of the first circuit board 110 and the second circuit board 120 are both perpendicular to the height direction Z. The first circuit board 110 is a motherboard of the server 100, and the central processor 130 is disposed on the first circuit board 110 and electrically connected to the first circuit board 110. The number of the central processors 130 on the first circuit board 110 may be one, or may be two or more, and in the embodiment shown in fig. 2 to 4, the number of the central processors 130 is two. The first circuit board 110 is also electrically connected to a memory card, a baseboard management controller, and other components and their peripheral circuits, and in order to facilitate the electrical connection between the cpu 130 and other electronic devices on the first circuit board 110, the cpu 130 is generally disposed in a middle area of the first circuit board 110.
The second circuit board 120 is used for installing PCIE cards 140 in the server 100. A plurality of PCIE cards 140 are typically disposed on the second circuit board 120, and in the embodiment shown in fig. 2 to 4, eight PCIE cards 140 are disposed on the second circuit board 120. The PCIE cards 140 are all disposed on the second circuit board 120, so that the overall layout of the server 100 is more compact and tidy. PCIE card 140 may be a network card, SSD, GPU, etc.
Specifically, the second circuit board 120 is provided with a plurality of first mounting slots 121, and the plurality of first mounting slots 121 are arranged at intervals along the length direction X or the width direction Y, in this embodiment, the plurality of first mounting slots 121 are arranged at intervals along the width direction Y, and the PCIE card 140 is mounted on the first mounting slots 121. The PCIE card 140 may be mounted on the first mounting slot 121 by a fastener.
As mentioned above, the signal transmission loss between the PCIE card 140 and the central processing unit 130 is larger when the signal is transmitted through the internal wiring of the second circuit board 120, and in the embodiment of the present application, the problem of signal transmission loss is improved by providing the external cable.
Specifically, the server provided in the embodiment of the present application further includes a first signal cable 150, where a first end 150a of the first signal cable 150 is electrically connected to the first circuit board 110, and further electrically connected to the central processor 130 on the first circuit board 110. The second end 150b of the first signal cable 150 directly extends to the first mounting slot 121 and is then electrically connected to the PCIE card 140. That is, the first signal cable 150 can be directly electrically connected to the PCIE card 140 at the second end 150b without passing through the internal wiring of the second circuit board 120, and the cable is provided with a shielding layer, so that the loss of the cable when transmitting signals is smaller than that of the internal wiring of the circuit board, and the loss of the central processing unit 130 and the PCIE card 140 when transmitting signals can be reduced by directly electrically connecting the second end 150b of the first signal cable 150 to the PCIE card 140. Through setting up many signal cable that link up first circuit board 110 and PCIE card 140 one-to-one, need not to set up the enhancement chip again on second circuit board 120, can avoid the enhancement chip to occupy the position on second circuit board 120, these spaces on second circuit board 120 can be used for setting up other functional devices of PCIE card, have still practiced thrift the cost simultaneously.
With continued reference to fig. 2 to 4, the server 100 further includes a power back plate 180, a first copper bar 181 and a second copper bar 182, where the first copper bar 181 is electrically connected to the power back plate 180 and the first circuit board 110, and the second copper bar 182 is electrically connected to the power back plate 180 and the second circuit board 120.
Also located within the housing 170 is a power back plate 180. The power back plate 180 may be mounted to the side wall 172 of the housing 170. The power back plate 180 is provided with a power conversion module for receiving external power and converting it into power adapted to the first circuit board 110 and the second circuit board 120 to power the server. Specifically, a first copper bar 181 and a second copper bar 182 are led out from the power back plate 180, and the first copper bar 181 is electrically connected to the first circuit board 110 to supply power to the central processor 130 and other components on the first circuit board 110. The second copper bar 182 is electrically connected to the second circuit board 120 to supply power to the PCIE card 140 and other components on the second circuit board 120.
When the number of PCIE cards 140 on the second circuit board 120 increases or the performance of the PCIE cards 140 on the second circuit board 120 increases, the overall power consumption of the second circuit board 120 increases, and thus, it is necessary to increase the power supplied to the second circuit board 120. However, when the cross-sectional area of the second copper bar 182 is increased to increase the power supplied to the second circuit board 120, the increase of the cross-sectional area of the second copper bar 182 makes the second copper bar 182 occupy a larger space in the server 100, the structure of the server 100 is changed more greatly, and in addition, the larger the cross-sectional area of the copper bar is, the more current carrying is reduced after multiplying by the temperature coefficient, so that the current carrying rate of the copper bar is reduced along with the increase of the cross-sectional area, and the improvement effect of increasing the current carrying of the copper bar simply by increasing the cross-sectional area of the second copper bar 182 is limited.
The power supplied to the second circuit board 120 may be increased by providing the first power supply socket 160 at the side of the second circuit board 120. The server 100 further includes a first power supply cable 183, and the first power supply socket 160 may be electrically connected to the power supply back plate 180 through the first power supply cable 183, thereby increasing power supplied to the second circuit board 120 without changing the cross-sectional area of the second copper bar 182.
Specifically, in the present embodiment, the second circuit board 120 may have a rectangular structure, and the second circuit board 120 includes a first side 120a, a second side 120b, a third side 120c, and a fourth side 120d, wherein the first side 120a and the third side 120c extend along the width direction Y, and the second side 120b and the fourth side 120d extend along the length direction X. With continued reference to fig. 2, in the present embodiment, the second side 120b, the third side 120c and the fourth side 120d are all close to the side wall 172 of the housing 170, and thus the first power supply socket 160 may be disposed on the first side 120a side. In other embodiments, the first power supply socket 160 may also be disposed on the second side 120b, the third side 120c, or the fourth side 120 d.
Providing the first power supply socket 160 at the first side 120a of the second circuit board 120 may reduce the space occupied by the first power supply socket 160 on the second circuit board 120.
This is because, if the first power supply socket 160 is located at the middle region of the second circuit board 120, the first power supply socket 160 is entirely located on the second circuit board 120, and when the first power supply socket 160 is located at the side of the second circuit board 120, only a portion of the first power supply socket 160 electrically connected to the second circuit board 120 is located on the second circuit board 120, and the remaining portion of the first power supply socket 160 may protrude beyond the side of the second circuit board 120.
In addition, the second circuit board 120 has more electronic components disposed in the middle area, and the first power supply socket 160 and the electronic components around the first power supply socket 160 need to maintain electrical gaps, so that when the first power supply socket 160 is located in the middle area of the second circuit board 120, the space occupied by the first power supply socket 160 on the second circuit board 120 is larger, and when the first power supply socket 160 is located at the side of the second circuit board 120, the space occupied by the first power supply socket 160 on the second circuit board 120 is smaller. The middle area on the second circuit board 120 may be used to set up a greater number of PCIE cards 140 or other functional devices.
In addition, the first power supply cable 183 electrically connected to the first power supply socket 160 does not interfere with the electronic components on the second circuit board 120.
In the server 100 provided by the embodiment of the application, by arranging the first circuit board 110, the second circuit board 120, the central processing unit 130, the PCIE card 140, the first signal cable 150 and the first power supply socket 160, the central processing unit 130 is arranged on the first circuit board 110; the second circuit board 120 is provided with a plurality of first mounting slots 121, the PCIE card 140 is disposed on the first mounting slots 121, one end of the first signal cable 150 is electrically connected with the first circuit board 110, the first signal cable 150 extends to the first mounting slots 121 to be electrically connected with the PCIE card 140, and the PCIE card 140 is directly electrically connected with the PCIE card 150 through the first signal cable 150, so that loss when the central processing unit 130 and the PCIE card 140 transmit signals can be reduced. Therefore, the enhancement chip is not required to be arranged on the second circuit board 120 for extending the signal transmission link, so that the enhancement chip can be prevented from occupying the position on the second circuit board 120, the space on the second circuit board 120 can be saved, and meanwhile, the cost can be saved. The first power supply socket 160 is disposed at the side of the second circuit board 120, so that the space occupied by the first power supply socket 160 on the second circuit board 120 is smaller, and therefore, more space is provided on the second circuit board 120 to arrange PCIE cards 140 or other functional devices, and thus, the computing capability of the server 100 can be improved.
Next, a specific manner in which the first signal cable 150 is directly electrically connected to the PCIE card 140 will be described.
Referring to fig. 2, 3 and 5, the first circuit board 110 and the second circuit board 120 are arranged along the height direction Z of the server 100, the second circuit board 120 has a first board surface 120e and a second board surface 120f opposite to each other along the height direction Z, the PCIE card 140 is located on one side of the second board surface 120f, the first mounting slot 121 penetrates through the first board surface 120e and the second board surface 120f, and the first signal cable 150 is penetrated in the first mounting slot 121 through the first board surface 120e to be connected with the PCIE card 140.
The first circuit board 110 and the second circuit board 120 are generally arranged in the height direction Z, whereby the size of the chassis 170 in the length direction X or the width direction Y can be reduced, and thus the compactness of the structure of the server 100 can be increased. In the present embodiment, the electrical connection manner of the first signal cable 150 and the PCIE card 140 is described by taking the example that the first circuit board 110 is located below the second circuit board 120 along the height direction Z.
The first circuit board 110 may be mounted on the bottom wall 171 of the cabinet 170, and the second circuit board 120 may be mounted on the side wall 172 of the cabinet 170. With continued reference to fig. 5, a surface of the second circuit board 120 facing the first circuit board 110 is denoted by a first plate surface 120e, and a surface of the second circuit board 120 facing away from the first circuit board 110 is denoted by a second plate surface 120f.
The first mounting groove 121 is a through groove penetrating the first plate surface 120e and the second plate surface 120f in the height direction Z.
The first end 150a of the first signal cable 150 is electrically connected to the first circuit board 110, and the second end 150b of the first signal cable 150 extends upward from the first circuit board 110, passes through the first mounting slot 121, and is electrically connected to the PCIE card 140 located on the second board 120f.
The first mounting slot 121 is arranged to penetrate through the through slot of the second circuit board 120, and the first signal cable 150 is electrically connected with the PCIE card 140 through the first mounting slot 121, so that the first signal cable 150 can be prevented from winding onto the second board surface 120f from the side edge of the second circuit board 120, the length of the first signal cable 150 can be reduced, and the wiring of the first signal cable 150 is tidy.
Fig. 6 is a right side view of fig. 2.
Referring to fig. 2 and 6, the first signal cable 150 includes a first connector 151, a first lead 152 and a second connector 153 electrically connected in sequence, the first connector 151 being electrically connected with the first circuit board 110, the second connector 153 including a signal receptacle 1531 and a first mounting portion 1532, the first mounting portion 1532 being connected with the signal receptacle 1531; the first mounting portion 1532 is located on the first board 120e side, the second circuit board 120 has a second mounting portion 122 thereon, and the first mounting portion 1532 is connected to the second mounting portion 122; the signal receptacle 1531 is disposed in the first mounting slot 121 and extends out of the second board 120f through the first mounting slot 121, and the pcie card 140 is plugged into the signal receptacle 1531.
Specifically, the first circuit board 110 further has a third connector 111, and the first end 150a of the first signal cable 150 has a first connector 151, where the first connector 151 is plugged with the corresponding third connector 111 on the first circuit board 110.
The second end 150b of the first signal cable 150 has a second connector 153 thereon, and the first connector 151 and the second connector 153 are electrically connected by a first lead 152. The first lead 152 includes a plurality of cores 1521, where the cores 1521 are configured to connect with different pins of the first connector 151 and the second connector 153.
Next, a specific structure of the second connector 153 will be described.
With continued reference to fig. 6, the first mounting portion 1532 of the second connector 153 is used to fix the second connector 153 to the second circuit board 120. Specifically, in the present embodiment, the first mounting portion 1532 is a boss extending from the signal receptacle 1531, the first mounting portion 1532 has a first mounting hole 1532a thereon, the second mounting portion 122 has a second mounting hole 1221 thereon, the first mounting hole 1532a and the second mounting hole 1221 are aligned, and the fastener 1533 is screwed into the first mounting hole 1532a and the second mounting hole 1221 to mount the second connector 153 on the second circuit board 120.
In other embodiments, one of the first and second mounting portions 1532 and 122 may be a clip, and the other may be a clip, so long as the first and second mounting portions 1532 and 122 can reliably mount the second connector 153 on the second circuit board 120.
The signal receptacle 1531 is partially inserted into the first mounting groove 121, and the signal receptacle 1531 partially extends out of the second plate surface 120f. The PCIE card 140 has a signal plug 141, and the PCIE card 140 can be electrically connected to the first signal cable 150 by inserting the signal plug 141 into the signal receptacle 1531.
Since the signal jack 1531 is fixed to the second circuit board 120 via the first mounting portion 1532, by inserting the signal plug 141 into the signal jack 1531, the PCIE card 140 may be fixed to the second circuit board 120 while the PCIE card 140 is electrically connected to the first signal cable 150, thereby omitting a structural member for connecting the PCIE card 140 to the second circuit board 120, and the first mounting portion 1532 is located on the first board 120e side, so that more space is available on the second board 120f of the second circuit board 120 for arranging the PCIE card 140 or other functional devices.
Next, a specific arrangement of the first power supply socket 160 will be described.
Fig. 7 is a schematic structural diagram of a second circuit board and a power back board in a server according to an embodiment of the present application.
Referring to fig. 7, the first power supply socket 160 is illustrated as being disposed on the first side 120 a. The first side 120a has a protrusion 123 thereon, and the first power supply socket 160 is disposed on the protrusion 123.
Specifically, the second circuit board 120 has a protrusion 123 extending from the first side 120 a.
By disposing the first power supply socket 160 on the protrusion 123 extending from the first side 120a, a large modification of the internal wiring of the second circuit board 120 can be avoided, and even if components are disposed on the first side 120a, interference of the first power supply socket 160 with components at the first side 120a can be avoided. In addition, the area of the protruding portion 123 only needs to be slightly larger than the projected area of the first power supply socket 160 on the protruding portion 123, so that the space occupied by the protruding portion 123 in the housing 170 is also smaller.
Fig. 8 is a schematic diagram of an electrical connection relationship between a second circuit board and a power back board in a server according to an embodiment of the present application; fig. 9 is a schematic diagram of a second electrical connection relationship between a second circuit board and a power back board in a server according to an embodiment of the present application.
Referring to fig. 7 and 9, the second circuit board 120 further includes a second power supply socket 125 and a second power supply cable 126, the second power supply socket 125 is disposed at an edge of the first side 120a, the number of the second power supply sockets 125, the number of the second power supply cables 126, and the number of PCIE cards 140 are the same, and the second power supply socket 125 is connected with the first power supply socket 160 through the first internal trace L1 of the second circuit board 120; one end of the second power supply cable 126 is electrically connected to the second power supply socket 125, and the other end of the second power supply cable 126 is electrically connected to the PCIE card 140.
First, a process in which the second copper bar 182 supplies power to the PCIE cards 140 on the second circuit board 120 will be described.
Referring to fig. 7 and 8, the plurality of second power supply sockets 125 are sequentially arranged along the first side 120a, a PCIE card 140 has a power interface 142 on a side facing the first side 120a, and two ends of the second power supply cable 126 are plugged into the second power supply sockets 125 and the power interface 142 through connectors respectively. The second power supply socket 125 is also electrically connected to the second copper bar 182 through the second internal trace L2 of the second circuit board 120. The second internal trace L2 is shown in fig. 8 with a broken line to distinguish it from the first internal trace L1.
That is, the electrical energy enters from the second copper bar 182, is distributed to the different second power sockets 125 through the second internal wires L2 of the second circuit board 120, and then powers the PCIE card 140 through the second power cable 126.
Next, a procedure in which the first power supply socket 160 supplies power to the PCIE cards 140 on the second circuit board 120 will be described.
With continued reference to fig. 7 and 8, in the present embodiment, the first power supply socket 160 is electrically connected to the different second power supply socket 125 via the first internal trace L1 of the second circuit board 120, and is electrically connected to the PCIE card 140 via the second power supply cable 126. Power enters from the first power supply socket 160, is distributed to different second power supply sockets 125 through the first internal trace L1 of the second circuit board 120, and is supplied to the PCIE card 140 via the second power supply cable 126.
That is, when the PCIE card 140 is powered by the first power supply socket 160, the first internal trace L1 is only added to the second circuit board 120, and the rest of power supply loops and the second copper bars 182 are shared power supply loops, so that the modification of the second circuit board 120 is smaller.
With continued reference to fig. 6 and 7, the number of the protruding portions 123 is at least two, and at least two protruding portions 123 are disposed at intervals along the side, and each protruding portion 123 is provided with the first power supply socket 160.
The number of the protruding portions 123 may be two, or may be three or more, and specifically, may be set according to the power consumption of the PCIE card 140.
In the present embodiment, the number of the protruding portions 123 is two, and the two protruding portions 123 are disposed at intervals along the first side 120 a. Each of the protruding portions 123 is provided with a first power supply socket 160. In fig. 8, one of the first power supply sockets 160 is connected to a portion of the second power supply socket 125, and the other first power supply socket 160 is connected to another portion of the power supply socket 125. In fig. 9, one of the first power supply sockets 160 is connected to all of the second power supply sockets 125, and the other power supply socket 160 is connected to all of the second power supply sockets 125. By providing two first power supply sockets 160, the power supplied to the second circuit board 120 may be increased, so that the power supply capability of the second circuit board 120 may be increased, and thus, the number or the operation speed of PCIE cards 140 may be set on the second circuit board 120.
Through the direct electrical connection of the first signal cable 150 and the PCIE card 140, the enhanced chip on the second circuit board 120 may be omitted, and space on the second circuit board 120 may be saved. By arranging the first power supply socket 160 on the board edge of the second circuit board 120, the space occupied by the first power supply socket 160 on the second circuit board 120 can be reduced, the saved space can be used for arranging PCIE cards and other functional devices, and the wiring difficulty of the second circuit board 120 can be reduced. In this embodiment, the other functional device may be a network card 190.
With continued reference to fig. 7 and 8, the second circuit board 120 further has a second mounting slot 127, and the server 100 further includes a network card 190, where the network card 190 is inserted into the second mounting slot 127.
With continued reference to fig. 8, the second mounting slots 127 are located in the middle region of the second circuit board 120, and the number of the first mounting slots 121 on both sides of the second mounting slots 127 is the same.
In this embodiment, eight first mounting slots 121 are shown, four first mounting slots 121 are respectively disposed on two sides of the second mounting slot 127 along the length direction X, and PCIE cards 140 may be disposed on each first mounting slot 121. Four first mounting slots 121 are respectively disposed on two sides of the second mounting slot 127 along the width direction Y, so that the PCIE cards 140 are arranged on the second circuit board 120 in order.
In describing embodiments of the present application, it should be noted that, unless explicitly stated or limited otherwise, the terms "mounted," "connected," and "coupled" should be construed broadly, and may be, for example, fixedly coupled, indirectly coupled through an intermediary, in communication between two elements, or in an interaction relationship between two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to specific circumstances.
The terms first, second, third, fourth and the like in the description and in the claims and in the above-described figures, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the embodiments of the present application, and are not limited thereto; although embodiments of the present application have been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. The server is characterized by comprising a first circuit board, a second circuit board, a central processing unit, a PCIE card, a first signal cable and a first power supply socket, wherein the central processing unit is arranged on the first circuit board;
the second circuit board is provided with a first mounting groove, the PCIE card is arranged on the first mounting groove, one end of the first signal cable is electrically connected with the first circuit board, and the first signal cable extends to the first mounting groove to be electrically connected with the PCIE card;
the first power supply socket is arranged at one side edge of the second circuit board and is used for supplying power to the PCIE card.
2. The server of claim 1, wherein the first circuit board and the second circuit board are arranged along a height direction of the server, the second circuit board has a first board surface and a second board surface opposite along the height direction, the first board surface is opposite to the first circuit board, the PCIE card is located at one side of the second board surface, the first mounting slot penetrates the first board surface and the second board surface, and the first signal cable penetrates the first mounting slot through the first board surface to connect with the PCIE card.
3. The server of claim 2, wherein the first signal cable includes a first connector, a first lead, and a second connector electrically connected in sequence, the first connector electrically connected to the first circuit board, the second connector including a signal socket and a first mounting portion, the first mounting portion being connected to the signal socket;
the first mounting part is positioned at one side of the first board surface, the second circuit board is provided with a second mounting part, and the first mounting part is connected with the second mounting part;
the signal socket penetrates through the first mounting groove and extends out of the second board surface through the first mounting groove, and the PCIE card is spliced with the signal socket.
4. A server according to claim 3, wherein the side edge has a projection thereon, the first power supply socket being disposed on the projection.
5. The server of claim 4, further comprising a power backplane and a first power supply cable for electrically connecting the power backplane and a first power supply outlet.
6. The server of claim 5, wherein the second circuit board further comprises a second power socket and a second power supply cable, the second power socket is disposed on the side of the second circuit board, the number of the second power sockets, the number of the second power supply cables, the number of PCIE cards are the same, and the second power socket is connected with the first power socket through an internal trace of the second circuit board;
one end of the second power supply cable is electrically connected with the second power supply socket, and the other end of the second power supply cable is electrically connected with the PCIE card.
7. The server of claim 6, wherein the number of said protrusions is at least two, at least two of said protrusions being spaced along said side of said second circuit board, each of said protrusions having said first power socket disposed thereon.
8. The server according to any one of claims 1 to 7, further comprising a second mounting slot on the second circuit board, wherein the server further comprises a network card, and wherein the network card is inserted into the second mounting slot.
9. The server of claim 8, wherein the second mounting slot is located in a middle region of the second circuit board.
10. The server of claim 5, further comprising a chassis, wherein the first circuit board, the second circuit board, and the power backplane are all located within the chassis.
CN202311205737.2A 2023-09-15 2023-09-15 Server device Pending CN117193491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311205737.2A CN117193491A (en) 2023-09-15 2023-09-15 Server device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311205737.2A CN117193491A (en) 2023-09-15 2023-09-15 Server device

Publications (1)

Publication Number Publication Date
CN117193491A true CN117193491A (en) 2023-12-08

Family

ID=88997622

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311205737.2A Pending CN117193491A (en) 2023-09-15 2023-09-15 Server device

Country Status (1)

Country Link
CN (1) CN117193491A (en)

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