CN117177599A - Display substrate and display device - Google Patents

Display substrate and display device Download PDF

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Publication number
CN117177599A
CN117177599A CN202311271339.0A CN202311271339A CN117177599A CN 117177599 A CN117177599 A CN 117177599A CN 202311271339 A CN202311271339 A CN 202311271339A CN 117177599 A CN117177599 A CN 117177599A
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China
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light
light emitting
electrode
sub
layer
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CN202311271339.0A
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Chinese (zh)
Inventor
袁粲
李永谦
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BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
Hefei BOE Zhuoyin Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
Hefei BOE Zhuoyin Technology Co Ltd
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Priority to CN202311271339.0A priority Critical patent/CN117177599A/en
Publication of CN117177599A publication Critical patent/CN117177599A/en
Pending legal-status Critical Current

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Abstract

The present disclosure provides a display substrate and a display device, the display substrate including: a substrate base including a plurality of pixel regions; the light-emitting device layer is arranged on one side of the substrate base plate and comprises a plurality of light-emitting devices, and each light-emitting device is arranged in one pixel area. Wherein each light emitting device includes: at least two light emitting areas arranged at intervals, each light emitting area comprising: a first electrode, at least two light-emitting layers and a second electrode which are arranged on the substrate in a laminated manner, wherein an intermediate electrode is arranged between the adjacent light-emitting layers; for the same light emitting device, the first electrodes of the light emitting areas are separated from each other and connected to the same first voltage control end through mutually independent first conductive channels, and the middle electrodes of the light emitting areas are separated from each other and connected to the same second voltage control end through mutually independent second conductive channels.

Description

Display substrate and display device
Technical Field
The disclosure relates to the technical field of display, in particular to a display substrate and a display device.
Background
With the development of display technology, the requirements for resolution and pixel aperture ratio of the display device are increasing. Thus, stacked organic light emitting diodes (Organic Light Emitting Diode, OLED) have grown and have received great attention. The stacked OLED devices are formed by stacking light emitting devices with different colors in each pixel area, so that the light emitting devices with different colors share the same pixel opening, thereby breaking the PPI (Pixels PerInch, pixel density unit, representing the number of Pixels owned Per Inch) limit caused by the scheme of carrying out array arrangement on the light emitting devices with different colors, and greatly improving the pixel opening rate. However, in the stacked OLED structure, a dark spot problem caused by impurity foreign matter (Particle) is easily generated in the process of forming an electrode between adjacent light emitting layers, and the product yield is affected.
Disclosure of Invention
The display substrate and the display device provided by the embodiment of the disclosure are beneficial to realizing the maintenance of the problem of the dark spot of the laminated OLED particles, so that the product yield is improved.
In a first aspect, some embodiments of the present disclosure provide a display substrate, including: a substrate base including a plurality of pixel regions; the light-emitting device layer is arranged on one side of the substrate base plate and comprises a plurality of light-emitting devices, and each light-emitting device is arranged in one pixel area. Wherein each of the light emitting devices includes: at least two light emitting areas arranged at intervals, each light emitting area comprising: a first electrode, at least two light-emitting layers and a second electrode which are stacked on the substrate, wherein an intermediate electrode is arranged between adjacent light-emitting layers; for the same light-emitting device, the first electrodes of the light-emitting areas are separated from each other and are connected to the same first voltage control end through mutually independent first conductive channels, and the middle electrodes of the light-emitting areas are separated from each other and are connected to the same second voltage control end through mutually independent second conductive channels.
Optionally, the display substrate further includes: the first maintenance electrode and the second maintenance electrode are arranged in each pixel area, the first maintenance electrode is connected with the first voltage control end, and the second maintenance electrode is connected with the second voltage control end. In the same light-emitting device, the first electrode of each light-emitting area is connected to the first maintenance electrode through mutually independent first conductive channels respectively; each light-emitting area is connected to the second maintenance electrode through a second conductive channel which is independent of the second conductive channel.
Optionally, the first repair electrode, the first conductive channel and the first electrode are arranged in the same layer, and the second repair electrode, the second conductive channel and the intermediate electrode are arranged in the same layer.
Optionally, the first repair electrode and the second repair electrode are located at two opposite sides of the pixel region, and an arrangement direction of the first repair electrode and the second repair electrode intersects with an arrangement direction of at least two light-emitting regions.
Optionally, the light emitting device layer further includes: a pixel defining layer disposed on a side of the first electrode remote from the substrate, the pixel defining layer comprising: a plurality of pixel openings and a blocking portion disposed within each of the pixel openings, the blocking portion separating the pixel opening into at least two pixel sub-openings, each of the pixel sub-openings configured to define one of the light emitting regions of the light emitting device, each of the pixel sub-openings exposing at least a portion of a region of a first electrode of the corresponding light emitting region.
Optionally, the display substrate further includes: a connection metal layer provided on a side of the first electrode close to the substrate base plate, comprising: a first connection portion and a second connection portion; the flat layer is arranged between the connecting metal layer and the first electrode, and the flat layer is provided with a first opening and a second opening. The first opening exposes at least a part of the area of the first connecting part, and the first maintenance electrode is connected with the first voltage control end through the first connecting part exposed at the first opening; the pixel defining layer is further provided with a third opening, orthographic projections of the second connecting portion, the second opening and the third opening on the substrate are at least partially overlapped, so that at least a part of area of the second connecting portion is exposed from the third opening, and the second maintenance electrode is connected with the second voltage control end through the third opening and the second connecting portion exposed at the second opening.
Optionally, the second electrodes of the light emitting devices are connected to each other, and a light emitting layer between the intermediate electrode and the second electrode covers the intermediate electrode and covers the second conductive path, the second repair electrode, and the third opening to prevent the second electrode from being shorted with the intermediate electrode.
Optionally, at least two of the light emitting regions include: the first electrode of the first light-emitting area and the first electrode of the second light-emitting area are connected to the same first voltage control end through mutually independent first conductive channels, and the middle electrode of the first light-emitting area and the middle electrode of the second light-emitting area are connected to the same second voltage control end through mutually independent second conductive channels.
Optionally, the at least two light emitting layers include: the intermediate electrode is arranged between the first light-emitting layer and the second light-emitting layer;
at least one of the first light emitting layer and the second light emitting layer is a quantum dot light emitting layer, the first light emitting layer emits light under the action of a first voltage difference between the first electrode and the intermediate electrode, and the second light emitting layer emits light under the action of a second voltage difference between the intermediate electrode and the second electrode.
Optionally, one of the first light emitting layer and the second light emitting layer is an organic light emitting layer, and the other is a quantum dot light emitting layer; the organic light emitting layer emits light of a first color; the quantum dot light emitting layer includes a first quantum dot that emits light of a second color and a second quantum dot that emits light of a third color.
Optionally, for each of the light emitting regions, the first electrode, the first light emitting layer, and the intermediate electrode constitute a first light emitting sub-element, and the intermediate electrode, the second light emitting layer, and the second electrode constitute a second light emitting sub-element, the first light emitting sub-element being connected in series with the second light emitting sub-element. The display substrate further includes: a pixel circuit provided on a side of the light emitting device layer close to the substrate, the pixel circuit including: a first driving sub-circuit and a second driving sub-circuit, the output terminals of the first and second driving sub-circuits being the second voltage control terminals, the first driving sub-circuit being configured to control the magnitude of the driving current flowing through the first light emitting sub-element of each of the light emitting regions, the second driving sub-circuit being configured to control the magnitude of the driving current flowing through the second light emitting sub-voltage of each of the light emitting regions.
In a second aspect, some embodiments of the present disclosure provide a display apparatus including: the display substrate provided in the first aspect.
In the display substrate and the display device provided in some embodiments of the present disclosure, the stacked light emitting device disposed in each pixel area is divided into at least two light emitting areas arranged at intervals, the first electrodes of the light emitting areas in the same light emitting device are separated from each other and led out to the same first voltage control end through mutually independent first conductive channels, and the middle electrodes of the light emitting areas are separated from each other and led out to the same second voltage control end through mutually independent second conductive channels. Therefore, when the dark spot problem caused by particles exists in the pixel area, the abnormal light-emitting area with the defects of the particles can be detected, even the Particle generation layer in the abnormal light-emitting area is detected, and then the abnormal light-emitting area is disconnected from other normal light-emitting areas of the pixel area by cutting off the first conductive channel and/or the second conductive channel of the abnormal light-emitting area, so that the display of the other normal light-emitting areas is not influenced, and the product yield is improved.
The foregoing description is merely an overview of the technical solutions provided by the embodiments of the present disclosure, and in order to make the technical means of the embodiments of the present disclosure more clear, it may be implemented according to the content of the specification, and in order to make the foregoing and other objects, features and advantages of the embodiments of the present disclosure more understandable, the following detailed description of the embodiments of the present disclosure will be given.
Drawings
In order to more clearly illustrate the technical solutions in the present disclosure, the drawings that are required to be used in the description of the embodiments will be briefly described below. It will be apparent to those of ordinary skill in the art that the drawings in the following description are of some embodiments of the present disclosure and that other drawings may be derived from these drawings without undue effort.
FIG. 1 illustrates an overall plan view of a display substrate of some embodiments of the present disclosure;
FIG. 2 illustrates a schematic plan view of a single pixel region of a display substrate in accordance with some embodiments of the present disclosure;
FIG. 3 illustrates a cross-sectional schematic view of a single pixel region of a display substrate in accordance with some embodiments of the present disclosure;
FIG. 4 illustrates a schematic plan view of a first maintenance electrode, a first conductive via, and a first electrode of some embodiments of the present disclosure;
FIG. 5 illustrates a schematic plan view of a second repair electrode, a second conductive via, and an intermediate electrode according to some embodiments of the present disclosure;
FIG. 6A illustrates a schematic diagram of a connection metal layer according to some embodiments of the present disclosure;
FIG. 6B illustrates a schematic view of a planar layer opening in accordance with some embodiments of the present disclosure;
FIG. 6C illustrates a schematic view of a first via and a second via of some embodiments of the present disclosure;
FIG. 6D illustrates a schematic plan view of some embodiments of the present disclosure after forming a first electrode, a first conductive via, and a first repair electrode;
FIG. 6E illustrates a schematic diagram of an opening of a pixel defining layer in accordance with some embodiments of the present disclosure;
FIG. 6F illustrates a schematic plan view of some embodiments of the present disclosure after forming a first light emitting layer;
FIG. 6G illustrates a schematic plan view of the intermediate electrode, the second conductive via, and the second repair electrode after formation of some embodiments of the present disclosure;
FIG. 6H illustrates a schematic plan view of a second light emitting layer after formation of some embodiments of the present disclosure;
FIG. 7 illustrates a schematic cross-sectional view of a single light emitting region of some embodiments of the present disclosure;
fig. 8 illustrates an equivalent circuit diagram of a light emitting device of a single pixel region according to some embodiments of the present disclosure;
fig. 9 illustrates a circuit diagram of a pixel circuit of a display substrate of some embodiments of the present disclosure;
FIG. 10 is a schematic diagram showing maintenance of the second light emitting area LB in FIG. 2 with Particle defects;
FIG. 11 is a schematic view showing the first light emitting layer of FIG. 7 having Particle defects;
FIG. 12 is a schematic diagram showing the maintenance of the first light emitting layer of the second light emitting region LB in FIG. 2 with Particle defects;
FIG. 13 is a schematic view showing the presence of Particle defects in the second light emitting layer of FIG. 7;
FIG. 14 is a schematic diagram showing maintenance of the second light emitting layer of the second light emitting region LB in FIG. 2 with Particle defects;
fig. 15 is a schematic view of a display device according to some embodiments of the present disclosure.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It should be noted that, the term "and/or" appearing herein is merely an association relationship describing the association object, and indicates that three relationships may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone. The term "plurality" includes two or more than two cases. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. "up", "down", "left", "right" and the like are used only to indicate a relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may be changed accordingly.
It will be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present between the layer or element and the other layer or substrate. The phrase "a and B co-layer arrangement" in this disclosure means that a and B are formed simultaneously by the same patterning process. Is bright. The "patterning process" referred to in this disclosure includes, for metallic materials, inorganic materials, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, photoresist stripping, and the like, and for organic materials, processes such as organic material coating, mask exposure, and development, and the like.
Fig. 1 illustrates an overall plan view of a display substrate of some embodiments of the present disclosure. As shown in fig. 1, a display substrate 10 provided in some embodiments of the present disclosure includes: a display region DR and a non-display region NR at least partially surrounding the display region DR. The display region DR includes a plurality of pixel regions distributed in an array. Each pixel region is provided with one sub-pixel P. Each sub-pixel P includes a light emitting device and a pixel circuit driving the light emitting device.
For example, as shown in fig. 1, the display substrate 10 further includes a plurality of scan lines GL and a plurality of data lines DL. The plurality of scanning lines GL and the plurality of data lines DL cross each other to define a plurality of pixel regions distributed in an array in the display region DR, and each pixel region is provided with a pixel circuit of one sub-pixel P.
For example, as shown in fig. 1, the display substrate 10 may further include a scan driving circuit SC, which may be, for example, a gate driving circuit (e.g., a GOA driving circuit), and a data driving circuit DC, which are located in the non-display region NR. The scan driving circuit SC is connected to the pixel circuits through the scan lines GL to supply various scan signals, and the data driving circuit DC is connected to the pixel circuits through the data lines DL to supply data signals. Note that, the positional relationship of the scan driving circuit SC and the data driving circuit DC, the scan lines GL and the data lines DL in the display substrate 10 shown in fig. 1 is merely an example, and the actual arrangement positions may be designed as needed.
The light emitting device in the sub-pixel P includes at least two light emitting layers stacked, so that one sub-pixel P can emit light of various colors to realize full-color display. For example, one subpixel P can emit red, green, and blue light. Of course, the types of light that can be emitted from one subpixel P are not limited to three, and may be less than three or more than three.
Through the above-mentioned stromatolite light emitting device framework, can merge traditional a plurality of sub-pixels that send multiple color light into a sub-pixel P, share a pixel opening, compare in the scheme that arranges a plurality of sub-pixels that send single color light in a pixel district, be favorable to reducing the area that has the pixel occupation of multiple light emitting color to further promote the pixel aperture ratio (for example, theoretical pixel aperture ratio can reach 300%), realize higher resolution (PPI), can be used to realize the display product of superelevation PPI.
In order to further improve the product yield of the display substrate 10 on the basis of improving the pixel aperture ratio and the resolution ratio, so as to reduce the production cost and promote the mass production of ultra-high PPI products, some embodiments of the present disclosure provide a maintenance design scheme suitable for the above-mentioned stacked light emitting device architecture, and the structure of the display substrate provided by these embodiments is described in detail below.
For example, fig. 2 illustrates a schematic plan view of a single pixel region of a display substrate of some embodiments of the present disclosure, fig. 3 illustrates a schematic cross-sectional view of a single pixel region of a display substrate of some embodiments of the present disclosure, and fig. 3 may be a cross-sectional view taken along section line A-A in fig. 2. As shown in fig. 2 and 3, some embodiments of the present disclosure provide a display substrate 10 including: the substrate 100 and the light emitting device layer provided on one side of the substrate 100.
The substrate 100 includes a plurality of pixel regions distributed in an array. For example, the substrate base 100 may be a rigid substrate. The rigid substrate may include, for example, a glass substrate, a PMMA (Polymethyl methacrylate ) substrate, a silicon substrate, or the like. In this case, the display substrate 10 may be a rigid display substrate. For another example, the substrate base 100 may be a flexible substrate. The flexible substrate may include, for example, a PET (Polyethylene terephthalate ) substrate, a PEN (Polyethylene naphthalate two formic acid glycol ester, polyethylene naphthalate) substrate, a PI (Polyimide) substrate, or the like. In this case, the display substrate 10 may be a flexible display substrate.
The light emitting device layer includes a plurality of light emitting devices, each of which is disposed in one pixel region. Each light emitting device includes: at least two light emitting regions arranged at intervals. Each light emitting region includes: a first electrode, at least two light emitting layers, and a second electrode, which are provided on the substrate 100, are stacked with an intermediate electrode provided between adjacent light emitting layers. For example, the specific number of at least two light emitting layers may be two, or may be three such as a red light emitting layer, a green light emitting layer, and a blue light emitting layer, or may be more, which is not limited in this embodiment.
For the same light-emitting device, the first electrodes of the light-emitting areas are separated from each other and are connected to the same first voltage control end through mutually independent first conductive channels so as to receive a first control voltage; the middle electrodes of the light-emitting areas are separated from each other and are connected to the same second voltage control end through mutually independent second conductive channels so as to receive second control voltage; the second electrode of each light emitting region is connected to the third voltage control terminal to receive the third control voltage.
For example, the first voltage control terminal and the third voltage control terminal may be voltage output terminals, the second voltage control terminal may be output terminals of a pixel circuit, that is, the middle electrode of each light emitting area of the same light emitting device is connected with the pixel circuit corresponding to the light emitting device through the second conductive channel and the second repair electrode, and the second control voltage is a driving voltage signal output by the pixel circuit. For example, the first voltage control terminal and the third voltage control terminal may be the same voltage terminal, i.e. the first control voltage and the third control voltage are voltage signals from the same voltage terminal. Alternatively, the first voltage control terminal and the third voltage control terminal may be different voltage terminals, i.e. the first control voltage and the third control voltage are different voltage signals from different voltage terminals.
The laminated light-emitting device arranged in each pixel area is divided into at least two light-emitting areas which are arranged at intervals, the first electrodes of the light-emitting areas in the same light-emitting device are separated from each other and led out to the same first voltage control end through mutually independent first conductive channels, the middle electrodes of the light-emitting areas are separated from each other and led out to the same second voltage control end through mutually independent second conductive channels, and independent voltage signal transmission paths can be provided for the first electrodes and the middle electrodes of each light-emitting area. When the dark spot problem caused by particles exists in the pixel area is detected, the abnormal light-emitting area with the defects of the particles can be detected, even the Particle generation layer in the abnormal light-emitting area is detected, and then the abnormal light-emitting area is disconnected from other normally displayed light-emitting areas of the pixel area by cutting off the first conductive channel and/or the second conductive channel of the abnormal light-emitting area, so that the display of other normally light-emitting areas is not influenced, and the product yield is improved.
For example, the number of light emitting regions divided per light emitting device may be two in consideration of the pixel aperture ratio. Of course, in other embodiments, the light emitting device may be divided into three or more light emitting regions, which is not limited in this embodiment. It should be noted that the film layer structures of the light emitting areas are the same, and the same film layer of different light emitting areas can be arranged in the same layer; the areas of the light emitting areas of the same light emitting device may be the same or may be different, and set according to actual needs.
Taking as an example that each light emitting device comprises two light emitting areas, a first light emitting area and a second light emitting area, respectively. At this time, the first electrodes of the first light emitting region and the second light emitting region are connected to the same first voltage control terminal through mutually independent first conductive channels. The intermediate electrodes of the first light emitting region and the second light emitting region are connected to the same second voltage control terminal through mutually independent second conductive channels. For example, as shown in fig. 2, the first electrodes 131 of the first light emitting areas LA are connected by being led out through the first conductive paths a1, the first electrodes 131 of the second light emitting areas LB are connected by being led out through the first conductive paths a2, the intermediate electrodes 133 of the first light emitting areas LA are connected by being led out through the second conductive paths b1, and the intermediate electrodes 133 of the second light emitting areas LB are connected by being led out through the second conductive paths b 2.
The first conductive path (e.g., a1, a2 in fig. 2) may be disposed in the same layer as the first electrode 131. For example, the first conductive path may be a signal trace extending from the first electrode 131 and configured to transmit the first control voltage output from the first voltage control terminal to the first electrode 131 of the corresponding light emitting region. The second conductive path (e.g., b1, b2 in fig. 2) may be provided in the same layer as the intermediate electrode 133. For example, the second conductive path may be a signal trace extending from the intermediate electrode 133 and configured to transmit the second control voltage output from the second voltage control terminal to the intermediate electrode 133 of the corresponding light emitting region.
As shown in fig. 2, in order to facilitate connection of a first conductive channel of each light emitting region of the same light emitting device to the same first voltage control terminal and connection of a second conductive channel of each light emitting region of the same light emitting device to the same second voltage control terminal, the display substrate 10 provided in some embodiments of the present disclosure may further include: a first repair electrode 141 and a second repair electrode 142. The first repair electrode 141 and the second repair electrode 142 are disposed at each pixel region. The first repair electrode 141 is connected to a first voltage control terminal in the pixel region, and the second repair electrode 142 is connected to a second voltage control terminal in the pixel region. In the same light emitting device, the first electrode of each light emitting region is connected to the first repair electrode 141 through the first conductive paths (e.g., a1, a2 in fig. 2) independent of each other, respectively; each of the light emitting regions is connected to a second repair electrode 142 through a second conductive path (e.g., b1, b2 in fig. 2) independent of each other, respectively.
The first repair electrode 141 and the second repair electrode 142 are disposed in regions other than the light emitting region. For example, the first repair electrode 141 and the second repair electrode 142 may be located at opposite sides of the pixel region, and the arrangement direction of the first repair electrode 141 and the second repair electrode 142 intersects with the arrangement direction of the at least two light emitting regions. For example, as shown in fig. 2, the first light emitting area LA and the second light emitting area LB are arranged in a first direction (e.g., X direction in fig. 2), and the first repair electrode 141 and the second repair electrode 142 are arranged in a second direction (e.g., Y direction in fig. 2), and the first direction and the second direction may be perpendicular to each other. For example, in order to facilitate the wiring of the first conductive path and the second conductive path, the first repair electrode 141 and the second repair electrode 142 may be located at intermediate positions of the above-described at least two light emitting regions in the arrangement direction thereof.
One of the first electrode 131 and the second electrode 135 is an anode, and the other is a cathode. For example, the first electrode 131 serves as an anode, the second electrode 1 serves as a cathode, and the intermediate electrode 133 serves as a cathode of the lower light-emitting layer adjacent thereto and also serves as an anode of the upper light-emitting layer adjacent thereto.
The first electrodes 131 of adjacent light emitting regions of the same light emitting device are spaced apart from each other. For example, the light emitting device is a top emission device, and the first electrode 131 is a reflective anode. At this time, the first electrode 131 may have a structure of a composite structure of a transparent conductive oxide film/a metal film/a transparent conductive oxide film sequentially stacked. The material of the transparent conductive oxide film may be, for example, any of ITO (Indium tin oxide) and IZO (Indium zinc oxide Indium zinc oxide), and the material of the metal film may be, for example, any of gold (Au), silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), and platinum (Pt). For another example, the first electrode 131 may have a single-layer structure, and may have conductivity and reflectivity, and the single-layer structure may be made of any of metal materials such as Au, ag, cu, al, ni, pt.
The intermediate electrodes 133 of adjacent light emitting regions of the same light emitting device are also spaced apart from each other. For example, the intermediate electrode 133 may be a transparent conductive oxide film such as IZO or ITO, or the like.
In some embodiments, the second electrodes 135 of the respective light emitting devices may be connected to each other to form coplanar electrodes. For example, the second electrode 135 may be a transparent conductive oxide film such as IZO, or may be a metal film having a certain transmittance such as any one of aluminum (Al), silver (Ag), and magnesium (Mg), or any one of a magnesium-silver alloy and an aluminum-lithium alloy, which is not limited in this embodiment.
In an alternative embodiment, the first repair electrode 141, the first conductive path (e.g., a1, a2 in fig. 2), and the first electrode 131 may be disposed in the same layer. Fig. 4 illustrates a schematic plan view of a first repair electrode, a first conductive via, and a first electrode of some embodiments of the present disclosure. As shown in fig. 4, a first conductive path a1 is led out from the first electrode 131A of the first light emitting area LA, a first conductive path a2 is led out from the first electrode 131B of the second light emitting area LB, and both the first conductive paths a1 and a2 are connected to the first maintenance electrode 141 located at the left side of the light emitting area in fig. 3. Similarly, the second repair electrode 142, the second conductive path (e.g., b1, b2 in fig. 2), and the intermediate electrode 133 may be disposed in the same layer. Fig. 5 illustrates a schematic plan view of a second repair electrode, a second conductive via, and an intermediate electrode according to some embodiments of the present disclosure. As shown in fig. 5, the second conductive path B1 is led out from the middle electrode 133A of the first light emitting area LA, the second conductive path B2 is led out from the middle electrode 133B of the second light emitting area LB, and both the second conductive paths B1 and B2 are connected to the second repair electrode 142 located at the right side of the light emitting area in fig. 3.
It should be noted that, when the first electrode 131 is a multi-layer composite structure, the first repair electrode 141 and the first conductive path (e.g., a1, a2 in fig. 2) may be the same multi-layer composite structure as the first electrode 131, or may be the same layer as one of the layers in the multi-layer composite structure. For example, when the first electrode 131 is a composite structure of ITO/Cu/ITO, the first repair electrode 141 and the first conductive path (e.g., a1, a2 in fig. 2) may be a composite structure of ITO/Cu/ITO, or may be a single ITO layer or Cu layer, which is not limited in this embodiment.
For example, as shown in fig. 3, the light emitting device layer further includes: the pixel defining layer 120 is disposed on a side of the first electrode away from the substrate 100. The pixel defining layer 120 includes: a plurality of pixel openings and a blocking portion 122 disposed in each pixel opening. Each pixel opening corresponds to one light emitting device and is configured to define a light emitting region of the corresponding light emitting device. The barrier 122 divides the pixel opening into at least two pixel sub-openings, so that the light emitting device may be divided into at least two light emitting regions as described above. Each pixel sub-opening is configured to define one light emitting region of the light emitting device, each pixel sub-opening exposing at least a portion of a region of the first electrode of the corresponding light emitting region.
In addition, as shown in fig. 3, the display substrate 10 provided in some embodiments of the present disclosure further includes: the driving functional layer 110 is disposed between the substrate 100 and the light emitting device layer. For example, the driver functionality layer 110 may include, but is not limited to: the active layer, the gate metal layer, the gate dielectric layer, the interlayer insulating layer, the source drain metal layer, the passivation layer and the like are configured to form a functional layer of a plurality of pixel circuits, and each pixel circuit is connected with one light emitting device to drive the corresponding light emitting device to emit light.
In an alternative embodiment, to facilitate connection of the first repair electrode to the first voltage control terminal and connection of the second repair electrode to the second voltage control terminal, the driving function layer 110 further includes: and a connection metal layer disposed on a side of the first electrode close to the substrate 100. For example, the material of the connection metal layer may be the same as that of the source-drain metal layer forming the pixel circuit. The connecting metal layer includes: a first connection portion M1 and a second connection portion M2.
In order to ensure the flatness of the first electrode, the driving function layer 110 further includes: and a flat layer disposed between the connection metal layer and the first electrode. For example, the material of the planarization layer may be an insulating Resin (Resin) material. The flat layer is provided with a first opening K1 and a second opening K2, and the first opening K1 exposes at least a partial region of the first connection portion M1. The first repair electrode 141 is connected to the first voltage control terminal through a first connection portion M1 exposed at the first opening K1. The pixel defining layer 120 covers the first repair electrode 141 and the first opening K1 and is further provided with a third opening 123, and orthographic projections of the second connection portion M2, the second opening K2, and the third opening 123 on the substrate 100 at least partially overlap to expose at least a portion of the area of the second connection portion M2 from the third opening 123. The second repair electrode 142 is connected to the second voltage control terminal through the third opening 123 and the second connection portion M2 exposed at the second opening K2.
For example, the first repair electrode 141 may overlap the first connection portion M1 through the first opening K1, and the first connection portion M1 is connected to the first voltage control terminal through the first via hole V1, the second repair electrode 142 may overlap the second connection portion M2 through the third opening 123 and the second opening K2, and the second connection portion M2 is connected to the second voltage control terminal through the second via hole V2.
As shown in fig. 3, in some embodiments, the at least two light emitting layers are two layers, that is, the first light emitting layer 132 and the second light emitting layer 134, and an intermediate electrode 133 is disposed between the first light emitting layer 132 and the second light emitting layer 134. The first light emitting layer 132 is stacked between the first electrode 131 and the intermediate electrode 133, and the second light emitting layer 134 is stacked between the intermediate electrode 133 and the second electrode 132. The first light emitting layer 132 emits light by a first voltage difference between the first electrode 131 and the intermediate electrode 133, and the second light emitting layer 134 emits light by a second voltage difference between the intermediate electrode 133 and the second electrode 135, to realize color display.
In view of the fact that the second electrode 135 is stacked on the intermediate electrode 133, when the second electrodes 135 of the respective light emitting devices are connected to each other to realize the coplanar electrodes, in order to avoid the second electrode 135 from contacting the second conductive path (e.g., b1, b2 in fig. 2) and/or the second repair electrode 142 to cause a short problem between the second electrode 135 and the intermediate electrode 133, the light emitting layer between the intermediate electrode 133 and the second electrode 135, i.e., the above-mentioned second light emitting layer 134, may be made to cover the intermediate electrode 133 and the second conductive path, the second repair electrode 142, and the third opening 123 to isolate the second electrode 135 from the second conductive path and the second repair electrode 142 as well, thereby preventing the second electrode 135 from being shorted with the intermediate electrode 133. That is, the front projections of the intermediate electrode 133, the second conductive via, the second repair electrode 142, and the third opening 123 on the substrate 100 are all located within the front projection boundary of the second light emitting layer 134 on the substrate 100.
The following is divided into two light emitting areas, i.e., a first light emitting area LA and a second light emitting area LB, with a light emitting device, each light emitting area comprising: two light-emitting layers are illustrated as an example of a process for preparing some of the film layers of an exemplary display substrate 10. Fig. 6A to 6H show schematic diagrams of a film layer from a connection metal layer to a second electrode within a single pixel region.
Referring to fig. 6A to 6H, a connection metal layer may be first prepared on the substrate 100 where the pixel circuits are prepared. For example, fig. 6A shows a schematic view of a connection metal layer of some embodiments of the present disclosure, as shown in fig. 6A, the connection metal layer including a first connection portion M1 and a second connection portion M2. Note that, the rectangular first connection portion M1 and the rectangular second connection portion M2 shown in fig. 6A are only schematic, and the first connection portion M1 and the second connection portion M2 may have other shapes, such as a circle, an ellipse, or a prism, which is not limited in this embodiment.
Then, a planarization layer is formed on the connection metal layer, and first and second openings K1 and K2 are prepared at positions on the planarization layer corresponding to the first and second connection portions M1 and M2. For example, fig. 6B illustrates a schematic view of a planar layer opening according to some embodiments of the present disclosure, where, as shown in fig. 6B, a first connection portion M1 is exposed at a first opening K1, and a second connection portion M2 is exposed at a second opening K2.
Next, a first via is prepared at the first connection portion M1 exposed at the first opening K1, and a second via is prepared at the second connection portion M2 exposed at the second opening K2. For example, fig. 6C shows a schematic diagram of a first via and a second via according to some embodiments of the present disclosure, where, as shown in fig. 6C, the first connection portion M1 is connected to the first voltage control terminal of the lower layer through the first via V1, and the second connection portion M2 is connected to the second voltage control terminal of the lower layer through the second via V2.
Further, a first conductive film layer for preparing the first electrode is formed, and patterning is performed on the first conductive film layer to form the first electrode, the first conductive channel and the first maintenance electrode of each light emitting region. For example, fig. 6D is a schematic plan view illustrating a first electrode, a first conductive channel and a first repair electrode after forming some embodiments of the present disclosure, as shown in fig. 6D, the first electrode 131A of the first light emitting area LA and the first electrode 131B of the second light emitting area LB are spaced apart from each other, and extend out of one first conductive channel a1, a2 respectively to be connected to the first repair electrode 141. The first repair electrode 141 is brought into contact with the first connection portion M1 exposed at the first opening K1 as a junction of the first electrodes of the respective light emitting regions, thereby conducting.
Further, a pixel defining layer 120 is formed. For example, fig. 6E shows a schematic diagram of an opening of the pixel defining layer 120 of some embodiments of the present disclosure, as shown in fig. 6E, the pixel defining layer 120 includes: the first pixel sub-opening 121A, the second pixel sub-opening 121B, and the third opening 123 are indicated by dashed boxes in fig. 6E. The front projection of the first pixel sub-opening 121A on the substrate 100 is located within the front projection boundary of the first electrode 131A of the first light emitting area LA on the substrate 100, i.e., at least a part of the area of the first electrode 131A of the first light emitting area LA is exposed. The orthographic projection of the second pixel sub-opening 121B on the substrate 100 is located within the orthographic projection boundary of the first electrode 131B of the second light emitting area LB on the substrate 100, that is, at least a partial area of the first electrode 131B of the second light emitting area LB is exposed. The third opening 123 is located in a region other than the first light emitting region LA and the second light emitting region LB, exposing the second opening K2, thereby exposing the second connection portion M2.
Further, a first light emitting layer is formed. For example, fig. 6F illustrates a schematic plan view of some embodiments of the present disclosure after forming the first light emitting layer, and as illustrated in fig. 6F, the first light emitting layer 132 may cover the first light emitting region LA and the second light emitting region LB, i.e., the first light emitting layer 132 of the first light emitting region LA and the second light emitting region LB may be common.
Further, a second conductive film layer for preparing the intermediate electrode is formed, and patterning is performed on the second conductive film layer to form the intermediate electrode, the second conductive channel and the second maintenance electrode of each light emitting region. For example, fig. 6G illustrates a schematic plan view of the first light emitting area LA after forming the intermediate electrode, the second conductive channel, and the second repair electrode according to some embodiments of the present disclosure, as shown in fig. 6G, the intermediate electrode 133A of the first light emitting area LA and the intermediate electrode 133B of the second light emitting area LB are spaced apart from each other, and one second conductive channel B1, B2 extends out to be connected to the second repair electrode 142, respectively. The second repair electrode 142 is in contact with the second connection portion M2 exposed at the third opening 123 and the second opening K2, which are sleeved, as an intersection point of the intermediate electrodes of the respective light emitting regions, so as to be conductive.
Further, forming the second light emitting layer, for example, fig. 6H illustrates a schematic plan view of the second light emitting layer after forming the second light emitting layer according to some embodiments of the present disclosure, as illustrated in fig. 6H, the second light emitting layer 134 covers the first light emitting region LA and the second light emitting region LB, that is, the second light emitting layer 134 of the first light emitting region LA and the second light emitting region LB may also be common, and also covers the second conductive channels (b 1, b 2), the second repair electrode 142, and the third opening 123, for example, the plan shape of the second light emitting layer 134 in a single pixel region may be in a "convex" shape in fig. 6H, and the second conductive channels (b 1, b 2), the second repair electrode 142, and the third opening are blocked 123 to prevent the subsequently formed second electrode from directly connecting with the intermediate electrode, resulting in a Short circuit (Short).
Further, a second electrode is formed. For example, as shown in fig. 2, the second electrodes 135 of the first and second light emitting areas LA and LB may be connected to each other. For example, the second electrodes of the respective light emitting devices may also be connected to each other.
In some embodiments, one of the first and second light emitting layers may be an organic light emitting layer and the other may be a quantum dot light emitting layer. The light-emitting brightness of the organic light-emitting layer is positively correlated with the voltage difference between the anode and the cathode thereof; the light-emitting wave band of the quantum dot light-emitting layer is a discontinuous wave band and is related to the voltage difference between the anode and the cathode, namely, under the action of different voltage differences, the light-emitting color points of the quantum dot light-emitting layer are different, namely, the types of the light-emitting quantum dots are different, and light with different colors is emitted. Therefore, different colors can be displayed in a frame through the pixel circuit to control the first light-emitting layer and the second light-emitting layer in a time-sharing mode, and finally color display can be realized through color mixing.
For example, the organic light emitting layer emits light of a first color, and the quantum dot light emitting layer includes first and second quantum dots configured to be excited to light of different colors, respectively. For example, the first quantum dot can be excited to light of a second color and the second quantum dot can be excited to light of a third color. For example, the first color may be blue, and the second and third colors red and green, respectively. The colors of the light of the first color, the light of the second color, and the light of the third color are not limited to the colors listed above, and the types of the three colors may be adjusted according to specific needs.
Of course, the first light emitting layer and the second light emitting layer may be quantum dot light emitting layers, which is not limited in this embodiment.
Taking the first light-emitting layer as an organic light-emitting layer and the second light-emitting layer as a quantum dot light-emitting layer as an example, fig. 7 shows a schematic cross-sectional view of a single light-emitting region according to some embodiments of the present disclosure. As shown in fig. 7, the single light emitting region includes a first electrode 131, a first light emitting layer 132, an intermediate electrode 133, a second light emitting layer 134, and a second electrode 135, which are sequentially stacked from bottom to top. The first light emitting layer 132 is an organic light emitting layer, and the second light emitting layer 134 is a quantum dot light emitting layer, including a first quantum dot Q1 and a second quantum dot Q2.
For each light emitting region, the first electrode 131, the first light emitting layer 132, and the intermediate electrode 133 may constitute a first light emitting sub-element EL1, and the intermediate electrode 133, the second light emitting layer 134, and the second electrode 135 may constitute a second light emitting sub-element EL2. The first light emitting sub-element EL1 is connected in series with the second light emitting sub-element EL2.
Taking an example in which the light emitting device is divided into a first light emitting region and a second light emitting region, fig. 8 illustrates an equivalent circuit diagram of the light emitting device of a single pixel region of some embodiments of the present disclosure. As shown in fig. 8, the two light emitting regions may form four light emitting sub-elements, which are the first light emitting sub-elements EL11, EL12 and the second light emitting sub-elements EL21, EL22, respectively. The first light emitting sub-element EL11 and the second light emitting sub-element EL21 correspond to a first light emitting region, and the first light emitting sub-element EL12 and the second light emitting sub-element EL22 correspond to a second light emitting region. The first light-emitting sub-elements EL11, EL12 and the second light-emitting sub-elements EL21, EL22 constitute two parallel branches, one of which is the first light-emitting sub-element EL11 and the second light-emitting sub-element EL21 connected in series, and the other is the first light-emitting sub-element EL12 and the second light-emitting sub-element EL22 connected in series.
The anodes of the first light emitting sub-elements EL11 and EL12 may be connected together through the first conductive paths a1 and a2 and the first repair electrode 141 and connected to the first voltage control terminal to receive the first control voltage VDC1. The connection node n1_1 between the first light emitting sub-element EL11 and the second light emitting sub-element EL21 is the intermediate electrode 133 of the first light emitting area LA, and the connection node n1_2 between the first light emitting sub-element EL12 and the second light emitting sub-element EL22 is the intermediate electrode 133 of the second light emitting area LB. The connection nodes n1_1 and n1_2 may be connected together through the second conductive paths b1 and b2 and the second repair electrode 142, and connected to the second voltage control terminal to receive the second control voltage. The cathodes of the second light emitting sub-elements EL21 and EL22 are connected together and to a third voltage control terminal to receive a third control voltage VDC2.
For example, fig. 9 shows a circuit diagram of a pixel circuit of the display substrate 10 of some embodiments of the present disclosure. As shown in fig. 9, the pixel circuit 200 includes: the output terminals of the first driving sub-circuit 1A and the second driving sub-circuit 1B are the second voltage control terminals. For the pixel circuit 200 of each pixel region, the first driving sub-circuit 1A is configured to control the magnitude of the driving current flowing through the first light emitting sub-element of each light emitting region, and the second driving sub-circuit 1B is configured to control the magnitude of the driving current flowing through the second light emitting sub-element of each light emitting region.
As shown in fig. 9, for example, the pixel circuit 200 provided in some embodiments of the present disclosure may further include: a first data writing sub-circuit 2A and a second data writing sub-circuit 2B. The first Data writing sub-circuit 2A is configured to write the first Data signal Data1 to the control terminal of the first driving sub-circuit 1A in response to the first Data scanning signal Gate1, the first driving sub-circuit 1A being configured to control the magnitude of the driving current flowing through the first light emitting sub-elements EL11 and EL12 according to the first Data signal Data 1; the second Data writing sub-circuit 2B is configured to write the second Data signal Data2 to the control terminal of the second driving sub-circuit 1B in response to the second Data scanning signal Gate2, and the second driving sub-circuit 1B is configured to control the magnitude of the driving current flowing through the second light emitting element EL2 according to the second Data signal Data2 to realize writing of the first Data signal Data1 to the control terminal of the first driving sub-circuit 1A for controlling the magnitude of the driving current flowing through the first light emitting element EL1, and writing of the second Data signal Data2 to the control terminal of the second driving sub-circuit 1B for controlling the magnitude of the driving current flowing through the second light emitting sub-elements EL21 and EL 22.
As shown in fig. 9, for example, the pixel circuit 200 further includes a first memory sub-circuit 3A and a second memory sub-circuit 3B. The first Data writing sub-circuit 2A is connected to the first terminal of the first storage sub-circuit 3A and configured to transmit the first Data signal Data1 to the first terminal of the first storage sub-circuit 3A in response to the first Data scanning signal Gate 1; the first drive sub-circuit 1A comprises a control terminal, a first terminal and a second terminal, the control terminal of the first drive sub-circuit 1A is connected to the first terminal of the first storage sub-circuit 3A, the first terminal of the first drive sub-circuit 1A is configured to receive the first power supply voltage VDD, and the second terminal of the first drive sub-circuit 1A and the second terminal of the first storage sub-circuit 3A are connected to the first node N1. The first node N1 is an output terminal of the pixel circuit 200, i.e., the second voltage control terminal, and is connected to a connection node n1_1 between the first light emitting sub-element EL11 and the second light emitting sub-element EL21 and a connection node n1_2 between the first light emitting sub-element EL12 and the second light emitting sub-element EL 22.
The second Data writing sub-circuit 2B is connected to the first terminal of the second storage sub-circuit 3B and configured to transmit the second Data signal Data2 to the first terminal of the second storage sub-circuit 3B in response to the second Data scanning signal Gate 2; the second driving sub-circuit 1B includes a control terminal, a first terminal and a second terminal, the control terminal of the second driving sub-circuit 1B is connected to the first terminal of the second storage sub-circuit 3B, the first terminal of the second driving sub-circuit 1B is configured to receive the second power supply voltage VSS, and the second terminal of the second driving sub-circuit 1B is connected to the first node N1; a second terminal of the second memory sub-circuit 3B is connected to the first terminal of the second driving sub-circuit 1B to receive the second power supply voltage VSS. The first Data signal Data1 written by the first Data write circuit 2A to the control terminal of the first driving sub-circuit 1A may thus be stored in the first storage sub-circuit 3A to generate a driving current for driving the first light emitting sub-elements EL11 and EL12 to emit light according to the first Data signal Data1 at the time of, for example, a light emission period, and the second Data signal Data2 written by the second Data write circuit 2B to the control terminal of the second driving sub-circuit 1B may be stored in the second storage sub-circuit 3B to generate a driving current for driving the second light emitting sub-elements EL21 and EL22 to emit light according to the second Data signal Data2 at the time of, for example, a light emission period.
For example, the first power supply voltage is, for example, a high power supply voltage VDD, and the second power supply voltage is, for example, a low power supply voltage VSS. For example, the second supply voltage terminal is a ground terminal.
For example, the first driving sub-circuit 1A includes a first driving transistor T2, and the first storage sub-circuit 3A includes a first storage capacitor C1. The gate of the first driving transistor T2 is connected to the first electrode of the first storage capacitor C1. The first electrode of the first driving transistor T2 is configured to receive the first power voltage VDD, and the second electrode of the first driving transistor T2 and the second electrode of the first storage capacitor C1 are both connected to the first node N1. The first driving transistor T2 is configured to control a current for driving the first light emitting sub-elements EL11 and EL12 to emit light under control of a voltage of a gate of the first driving transistor T2. The second drive sub-circuit 1B includes a second drive transistor T4, and the second storage sub-circuit 3B includes a second storage capacitor C2. The gate of the second driving transistor T4 is connected to the first electrode of the second storage capacitor C2, the first electrode of the second driving transistor T4 is configured to receive the second power voltage VSS, and the second electrode of the second driving transistor T4 is connected to the first node N1. The second driving transistor T4 is configured to control a current for driving the second light emitting sub-elements EL21 and EL22 to emit light under control of a voltage of a gate of the second driving transistor T4; the second electrode of the second storage capacitor C2 is connected to the first electrode of the second driving transistor T4. Thus, the first Data signal Data1 is stored in the first storage capacitor C1, and the second Data signal Data2 is stored in the second storage capacitor C2.
For example, the first Data writing sub-circuit 2A includes a first Data transistor T1, a first pole of the first Data transistor T1 is connected to a first pole of the first storage capacitor C1 and a Gate of the first driving transistor T2, a second pole of the first Data transistor T1 is configured to receive the first Data signal Data1, and the first Data transistor T1 is configured to write the first Data signal Data1 to the Gate of the first driving transistor T2 and the first storage capacitor C1 in response to the first Data scan signal Gate 1; the second Data writing sub-circuit 2B includes a second Data transistor T5, a first pole of the second Data transistor T5 is connected to a first pole of the second storage capacitor C2 and a Gate of the second driving transistor T4, a second pole of the second Data transistor T5 is configured to receive the second Data signal Data2, and the second Data transistor T5 is configured to write the second Data signal Data2 to the Gate of the second driving transistor T4 and the second storage capacitor C2 in response to the second Data scan signal Gate 2.
As shown in fig. 9, for example, the pixel circuit 200 further includes: the first sensing sub-circuit 4A and the first sensing signal line SENSE1, a first terminal of the first sensing sub-circuit 4A is connected to the first node N1, a control terminal of the first sensing sub-circuit 4A is configured to receive the first sensing scan signal Gate3, a second terminal of the first sensing sub-circuit 4A is connected to the first sensing signal line SENSE1, the first sensing signal line SENSE1 is connected to a first external detection circuit (not shown in the drawing), and the first sensing sub-circuit 4A is configured to detect an electrical characteristic of the pixel circuit 200 of the sub-pixel through the first external detection circuit in response to the first sensing scan signal Gate3 to realize external compensation. The electrical characteristics include, for example, at least one of a threshold voltage and/or carrier mobility of the first driving transistor T2, a threshold voltage and/or carrier mobility of the second driving transistor T4, and a driving current of the first light emitting sub-elements EL11, EL12 and/or the second light emitting sub-elements EL21, EL 22. The first external detection circuit may be, for example, a conventional circuit including a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), and the like.
As shown in fig. 9, for example, the first sensing sub-circuit 4A includes a first sensing transistor T3, a first pole of the first sensing transistor T3 is connected to the first node N1, a second pole of the first sensing transistor T3 is connected to the first sensing signal line SENSE1 to be connected to the first external detection circuit, a Gate of the first sensing transistor T3 is configured to receive the first sensing scan signal Gate3, and the first sensing transistor T3 is configured to detect an electrical characteristic of the pixel circuit 200 of the sub-pixel to which the first sensing transistor T3 belongs through the first external detection circuit in response to the first sensing scan signal Gate3 to realize external compensation.
For example, the pixel circuit 200 further includes a second sensing sub-circuit 4B and a second sensing signal line SENSE2. The first end of the second sensing sub-circuit 4B is connected to the first node N1, the control end of the second sensing sub-circuit 4B is configured to receive the second sensing scan signal Gate4, the second end of the first sensing sub-circuit 4A is connected to the second sensing signal line SENSE2, and the second sensing signal line SENSE2 is connected to a second external detection circuit (not shown in the figure), for example, the second external detection circuit is similar in structure and function to the first external detection circuit; the second sensing sub-circuit 4B is configured to detect the electrical characteristics of the pixel circuit 200 of the sub-pixel to which it belongs by the second external detection circuit in response to the second sensing scan signal Gate4 to realize external compensation.
As shown in fig. 9, for example, the second sensing sub-circuit 4B includes a second sensing transistor T6, a first pole of the second sensing transistor T6 is connected to the first node N1, and a second pole of the second sensing transistor T6 is connected to the second sensing signal line SENSE2 to be connected to the second external detection circuit. The Gate of the second sensing transistor T6 is configured to receive the second sensing scan signal Gate4, and the second sensing transistor T6 is configured to detect the electrical characteristics of the pixel circuit 200 of the sub-pixel to which it belongs through the second external detection circuit in response to the second sensing scan signal Gate4 to realize external compensation.
The first pole of the second sensing transistor T6 is connected to the first node, the second pole of the second sensing transistor T6 is connected to the second sensing signal line SENSE2 to be connected to the second external detection circuit, the Gate of the second sensing transistor T6 is configured to receive the second sensing scan signal Gate4, and the second sensing transistor T6 is configured to detect the electrical characteristics of the sub-pixel through the second external detection circuit in response to the second sensing scan signal Gate4 to realize external compensation.
The transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other switching devices with the same characteristics, and the embodiments of the present disclosure are all described by taking the thin film transistors as examples. The source and drain of the transistor used herein may be symmetrical in structure, so that the source and drain may be indistinguishable in structure. In embodiments of the present disclosure, in order to distinguish between two poles of a transistor, except for the gate, one pole is directly described as a first pole, and the other pole as a second pole. In addition, transistors can be classified into N-type and P-type transistors according to their characteristics. When the transistor is a P-type transistor, the on voltage is a low level voltage (e.g., 0V, -5V, -10V, or other suitable voltage), and the off voltage is a high level voltage (e.g., 5V, 10V, or other suitable voltage); when the transistor is an N-type transistor, the on voltage is a high level voltage (e.g., 5V, 10V, or other suitable voltage) and the off voltage is a low level voltage (e.g., 0V, -5V, -10V, or other suitable voltage). In the following description, the transistor in fig. 9 is exemplified as an N-type transistor, but not as a limitation of the present disclosure.
Some embodiments of the present disclosure also provide a control method of the pixel circuit 200, the control method including: the first light emitting sub-elements EL11, EL12 and the second light emitting sub-elements EL21, EL22 are controlled to emit light in different periods, respectively, wherein the display period of one frame of image includes at least two periods including a first period in which at least the first light emitting sub-elements EL11, EL12 emit light of a first color and a second period in which at least the second light emitting sub-elements EL21, EL22 emit light of a second color. In this control method of the pixel circuit 200, light emission is performed by time-divisionally driving the first light-emitting sub-elements EL11, EL12 and the second light-emitting sub-elements EL21, EL22, so that the first light-emitting sub-elements EL11, EL12 and the second light-emitting sub-elements EL21, EL22 emit two kinds of color light, respectively, in at least two periods to realize color display.
In some embodiments, the pixel circuit 200 may control the first and second light emitting sub-elements EL11, EL12, EL21, EL22 to emit light in two periods to display a color image. At this time, one frame image includes a first period and a second period, for example, one frame image is divided into two periods in total; for example, the first period is the first 1/2 frame, and the second period is the second 1/2 frame, in which case the light emitting duration of each color is substantially the same, which is advantageous for obtaining a better color display effect and reducing the difficulty of control. Of course, this is not limited to the case, and the duration of the first period and the second period may be unequal. Because a frame of display image only needs to be split into two parts, namely two stages (such as a front 1/2 frame and a rear 1/2 frame), the high refresh frequency is easier to realize, and the display effect is improved.
For example, the light emitting layers of the first light emitting sub-elements EL11, EL12 are organic light emitting layers, that is, organic light emitting diodes; the light emitting layers of the second light emitting sub-elements EL21, EL22 are quantum dot light emitting layers, including the first quantum dots and the second quantum dots, that is, quantum dot light emitting diodes. Then, the first light emitting sub-elements EL11, EL12 may be controlled to emit light of the first color and the first quantum dots in the second light emitting sub-elements EL21, EL22 may be controlled to emit light of the second color during the first period; in the second period, the second quantum dots in the second light emitting subelement EL21, EL22 are controlled to emit light of the third color. Accordingly, the control method of the pixel circuit 200 may include: writing a first Data signal Data1 for controlling gray scales of a first color and a second color in a first period; and writing a second Data signal Data2 for controlling gray scale of the third color in the second period.
The display process of the first period includes a first Data writing and resetting phase and a first light-emitting phase in which both the first light-emitting sub-elements EL11, EL12 and the second light-emitting sub-elements EL21, EL22 emit light, for example, simultaneously, both of which are controlled by the first Data signal Data1, that is, the gray scale of the first color and the gray scale of the second color are controlled by the first Data signal Data 1. The display process of the second period may include a second data writing and resetting phase and a second light emitting phase after the first period. In the second light emitting stage, the light emission of the second light emitting sub-elements EL21, EL22 is controlled by the second Data signal Data2, i.e. the gray scale of the third color is controlled by the second Data signal Data2.
At this time, the first voltage control terminal and the third voltage control terminal may be different voltage terminals, and the first control voltage and the third control voltage may be different voltage signals from the different voltage terminals. This makes it easier to obtain voltage differences in different ranges, and to control the light emission of the first light-emitting sub-elements EL11, EL12 (organic light-emitting diodes) and the second light-emitting sub-elements EL21, EL22 (quantum dot light-emitting diodes), respectively.
In some embodiments, the pixel circuit 200 may also control the first and second light emitting sub-elements EL11, EL12, EL21, EL22 to emit light in three periods to display a color image. For example, one frame image includes a first period, a second period, and a third period, for example, one frame image is divided into three periods in total; for example, the first period is the first 1/3 frame, the second period is the second 1/3 frame, and the third period is the third 1/3 frame, which is the case, the light emitting duration of each color is basically the same, so that it is beneficial to obtain better color display effect and reduce the difficulty of control. Of course, this is not limited to the case, and the durations of the first period, the second period, and the third period may be unequal.
For example, the first light emitting sub-elements EL11, EL12 may be controlled to emit light of a first color during a first period; controlling the first quantum dots in the second light emitting subelements EL21, EL22 to emit light of a second color during a second period; and controlling the second quantum dots in the second light emitting subelement EL21, EL22 to emit light of a third color during a third period. Accordingly, the control method of the pixel circuit 200 may include: in a first period, writing a first Data signal Data1 for controlling gray scale of a first color; and writing second Data signals Data2 for controlling gray scales of the second color and the third color in the second period and the third period, respectively.
The display process of the first period includes a first data writing and resetting phase and a first light emitting phase. One operational process or control method of the pixel circuit 200 includes the following steps. In the first Data writing and resetting phase, the second control signal Gate2 (i.e., the second Data scanning signal Gate2, here and hereinafter for convenience of description becomes the second control signal) is an off signal, the first control signal Gate1 (i.e., the first Data scanning signal Gate1, here and hereinafter for convenience of description becomes the first control signal) and the third control signal Gate3 (i.e., the first sensing scanning signal Gate3, here and hereinafter for convenience of description becomes the third control signal) are both on signals, the first Data writing transistor T1 and the first sensing transistor T3 are both turned on, the first Data signal Data1 is transmitted to the Gate of the first driving transistor T2 via the first Data writing transistor T1, for example, the first reset signal SENSE1 is written to the intermediate electrode (e.g., the cathode of the first emitting sub-element EL11, EL 12) through the first sensing signal line SENSE1 and the first sensing transistor T3 by the analog-to-digital converter, the first driving transistor T2 is turned on and generates a driving current to charge the intermediate electrode of the first emitting sub-element EL11, EL 12. In the first light emission stage, the second control signal Gate2, the first control signal Gate1, and the third control signal Gate3 are all off signals, and due to the bootstrap effect of the first storage capacitor C1, the first driving transistor T2 is kept on and operated in a saturated state with a constant current, at this time, the first control voltage VDC1 is controlled such that the voltage difference VDC1-VN1 between the first electrode and the intermediate electrode > VEL1 (the lighting voltage of the first light emitting sub-elements EL11, EL 12), thereby driving the first light emitting sub-elements EL11, EL12 to emit light, and generating the first driving current CR1 through the first driving transistor T2 and the first light emitting sub-elements EL11, EL12, while, in the first light emission stage, the third control voltage VDC2 is controlled such that the voltage difference VN1-VDC2 between the intermediate electrode and the second electrode is < VEL2 (the lighting voltage of the second light emitting sub-elements EL21, EL 22), thereby making the second light emitting sub-elements EL21, EL22 not emit light. Thus, in the first light emitting stage, only the first light emitting sub-elements EL11, EL12 emit light, for example, the first light emitting sub-elements EL11, EL12 emit light of the first color, and the light emission of the first light emitting sub-elements EL11, EL12 is controlled by the first Data signal Data1, i.e., the gray scale of the first color is controlled by the first Data signal Data 1.
The display process of the second period includes a second data writing and resetting phase and a second light emitting phase. In the second Data writing and resetting stage, the first control signal Gate1 is an off signal, the second control signal Gate2 and the fourth control signal Gate4 are both on signals, the second Data writing transistor T5 and the second sensing transistor T6 are both turned on, the second Data signal Data2 is transmitted to the Gate of the second driving transistor T4 through the second Data writing transistor T5, for example, the first reset signal SENSE1 is written to the intermediate electrode (such as the anode of the second light emitting sub-element EL21, EL 22) through the second sensing signal line SENSE2 and the second sensing transistor T6 by the second external detection circuit.
In the second light emitting stage, the first control signal Gate1, the second control signal Gate2 and the fourth control signal Gate4 are all off signals, the second driving transistor T4 remains on due to the bootstrap effect of the second storage capacitor C2, at this time, the third control voltage VDC2 is controlled such that VN1-VDC2> VEL2, thereby causing the second light emitting sub-elements EL21, EL22 to emit light, and generating the second driving current through the second driving transistor T4 and the second light emitting sub-elements EL21, EL 22; for example, in the second light emitting stage, the second light emitting sub-elements EL21, EL22 emit light of a second color, which is different from the first color. Thus, in the second period, the light emission of the second light emitting sub-elements EL21, EL22 is controlled by the second Data signal Data2, i.e., the gray scale of the second color is controlled by the second Data signal Data 2.
In the second light-emitting stage, the light-emitting wavelength band of the second light-emitting subelements EL21, EL22 (e.g., quantum dot light-emitting diodes) is selected by controlling the third control voltage VDC2 to control the voltage differences VN1-VDC2 between the anode and the cathode of the quantum dot light-emitting diodes to be in the second range to control the second quantum dots to emit light of the second color; for example, in the second light-emitting phase, the wavelength band of the light of the second color of the quantum dot light-emitting diode is turned on so as to emit the light of the second color. For example, in the second lighting phase, the light of the second color is red light.
And a third period after the second period, the display process of the third period including a third data writing and resetting phase and a third light emitting phase. One operation (control method) of the pixel circuit 200 further includes the following steps. In the third Data writing and resetting stage, the first control signal Gate1 is an off signal, the second control signal Gate2 and the fourth control signal Gate4 are both on signals, the second Data writing transistor T5 and the second sensing transistor T6 are both turned on, the second Data signal Data2 is transmitted to the Gate of the second driving transistor T4 through the second Data writing transistor T5, for example, the first reset signal SENSE1 is written to the intermediate electrode (such as the anode of the second light emitting sub-element EL21, EL 22) through the second sensing signal line SENSE2 and the second sensing transistor T6 by the second external detection circuit.
In the third light emitting stage, the first control signal Gate1, the second control signal Gate2 and the fourth control signal Gate4 are all off signals, the second driving transistor T4 remains on due to the bootstrap effect of the second storage capacitor C2, at this time, the third control voltage VDC2 is controlled such that VN1-VDC2> VEL2, thereby causing the second light emitting sub-elements EL21, EL22 to emit light, and generating a third driving current through the second driving transistor T4 and the second light emitting sub-elements EL21, EL 22; for example, in the third light emission stage, the second light emitting sub-elements EL21, EL22 emit light of a third color, which is different from both the first color and the second color.
Thus, in the third period, the light emission of the second light emitting sub-elements EL21, EL22 is also controlled by the second Data signal Data2, i.e., the gray scale of the third color is also controlled by the second Data signal Data 2. In the third light-emitting stage, the second light-emitting subelements EL21, EL22, i.e. the light-emitting wavelength bands of the quantum dot light-emitting diodes, are selected by controlling the third control voltage VDC2, the voltage differences VN1-VDC2 between the anode and the cathode of the quantum dot light-emitting diodes being controlled in a third range for controlling the second quantum dots to emit light of a third color; for example, in the third light emission phase, the wavelength band of the light of the third color of the quantum dot light emitting diode is turned on to emit the light of the third color. For example, in the third lighting phase, the light of the third color is green light.
The first color, the second color, and the third color are not limited to the listed types, and the types of the three colors may be adjusted according to specific needs.
At this time, the first voltage control terminal and the third voltage control terminal may be the same voltage terminal, and the first control voltage and the third control voltage are voltage signals from the same voltage terminal. Since the first light emitting sub-element and the second light emitting sub-element are time-division light emitting, that is, the period of adjusting the voltage difference between the anode and the cathode of the first light emitting sub-element EL11, EL12 and the period of adjusting the voltage difference between the anode and the cathode of the second light emitting sub-element EL21, EL22 are different, the above-mentioned requirements for the two voltage differences can be achieved by adopting the same voltage control terminal, so as to simplify the structure of the pixel circuit 200 and simplify the control method.
In the following, a description will be given of a maintenance process when a Particle defect occurs in the stacked light emitting device, taking the light emitting device divided into the first light emitting region LA and the second light emitting region LB as an example.
For example, fig. 10 shows a schematic maintenance view of the second light emitting area LB in fig. 2 with Particle defects. As shown in fig. 10, when it is detected that the second light emitting area LB has a Particle (PT) defect, the first conductive path and the second conductive path connected to the second light emitting area LB may be cut by laser to disconnect from the normally displayed first light emitting area LA, so that the display of the first light emitting area LA is not affected, and then the light which cannot be emitted by the second light emitting area LB may be compensated by the first light emitting area LA through optical compensation, for example, the light emitting brightness of the first light emitting area LA may be adjusted to be consistent with the brightness of the preset reference pixel, so that the normal display is achieved, further the yield is improved, and technical support is provided for the ultra-high PPI product.
In some application scenarios, if a picture can be captured by the device to be positioned on a Particle generation layer such as a first light-emitting layer or a second light-emitting layer, abnormal light-emitting sub-elements in a light-emitting area with defects of particles can be more accurately isolated, the light-emitting area is not required to be completely isolated, and the aging speed of the light-emitting device is reduced while the maintenance time is saved.
For example, fig. 11 shows a schematic view of the first light emitting layer in fig. 7 having Particle defects, and fig. 12 shows a repair schematic view of the first light emitting layer in the second light emitting region LB in fig. 2 having Particle defects. Referring to fig. 11 and 12, when only the first light emitting layer of the second light emitting region LB has particles, the anode and cathode of the first light emitting layer are shorted, and thus light cannot be normally emitted, and the second light emitting layer may normally emit light. At this time, the normal display of the second light emitting layer and other light emitting areas of the second light emitting area LB may be achieved by cutting the first conductive path of the second light emitting area LB by laser. The light which cannot be emitted by the first light-emitting layer of the second light-emitting area LB is compensated by the first light-emitting area LA which is another light-emitting area capable of displaying normally through optical compensation.
For example, fig. 13 shows a schematic view of the second light emitting layer in fig. 7 having Particle defects, and fig. 14 shows a schematic maintenance view of the second light emitting layer in the second light emitting region LB in fig. 2 having Particle defects. Referring to fig. 13 and 14, when only the second light emitting layer has a Particle defect, the second light emitting layer is short-circuited with the anode and cathode, and cannot normally emit light, and the first light emitting layer can normally emit light. At this time, the normal display of the first light emitting layer and the other light emitting regions of the second light emitting region LB may be achieved by cutting the second conductive path of the second light emitting region LB by laser. The light which cannot be emitted by the second light emitting layer of the second light emitting area LB is compensated by the first light emitting area LA which is another light emitting area capable of displaying normally through optical compensation.
Fig. 15 is a schematic view of a display device according to some embodiments of the present disclosure. As shown in fig. 15, at least one embodiment of the present disclosure further provides a display device 20, where the display device 20 includes any one of the display substrates 10 provided in the embodiments of the present disclosure. The display device 20 may be, for example, a display panel, an OLED television, an electronic paper, a mobile phone, a tablet computer, a notebook computer, a digital photo frame, a navigator, or any other product or component having a display function. Of course, the display device 20 provided by the embodiments of the present disclosure is not limited to the above-listed types.
It should be further noted that the drawings of the embodiments of the present disclosure relate only to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design. The embodiments of the present disclosure and features in the embodiments may be combined with each other to arrive at a new embodiment without conflict.
While some embodiments of the present disclosure have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the disclosure.

Claims (12)

1. A display substrate, comprising:
a substrate base including a plurality of pixel regions;
a light emitting device layer disposed on one side of the substrate, the light emitting device layer including a plurality of light emitting devices, each of the light emitting devices being disposed in one of the pixel regions;
wherein each of the light emitting devices includes: at least two light emitting areas arranged at intervals, each light emitting area comprising: a first electrode, at least two light-emitting layers and a second electrode which are stacked on the substrate, wherein an intermediate electrode is arranged between adjacent light-emitting layers; for the same light-emitting device, the first electrodes of the light-emitting areas are separated from each other and are connected to the same first voltage control end through mutually independent first conductive channels, and the middle electrodes of the light-emitting areas are separated from each other and are connected to the same second voltage control end through mutually independent second conductive channels.
2. The display substrate of claim 1, further comprising: the first maintenance electrode and the second maintenance electrode are arranged in each pixel area, the first maintenance electrode is connected with the first voltage control end, and the second maintenance electrode is connected with the second voltage control end;
in the same light-emitting device, the first electrode of each light-emitting area is connected to the first maintenance electrode through mutually independent first conductive channels respectively; each light-emitting area is connected to the second maintenance electrode through a second conductive channel which is independent of the second conductive channel.
3. The display substrate of claim 2, wherein the first repair electrode, the first conductive via, and the first electrode are co-layered, and the second repair electrode, the second conductive via, and the intermediate electrode are co-layered.
4. The display substrate according to claim 2, wherein the first repair electrode and the second repair electrode are located at opposite sides in the pixel region, and an arrangement direction of the first repair electrode and the second repair electrode intersects an arrangement direction of at least two of the light emitting regions.
5. The display substrate of claim 2, wherein the light emitting device layer further comprises: a pixel defining layer disposed on a side of the first electrode remote from the substrate, the pixel defining layer comprising: a plurality of pixel openings and a blocking portion disposed within each of the pixel openings, the blocking portion separating the pixel opening into at least two pixel sub-openings, each of the pixel sub-openings configured to define one of the light emitting regions of the light emitting device, each of the pixel sub-openings exposing at least a portion of a region of a first electrode of the corresponding light emitting region.
6. The display substrate of claim 5, further comprising:
a connection metal layer provided on a side of the first electrode close to the substrate base plate, comprising: a first connection portion and a second connection portion;
the flat layer is arranged between the connecting metal layer and the first electrode, the flat layer is provided with a first opening and a second opening, the first opening exposes at least a part of the area of the first connecting part, and the first maintenance electrode is connected with the first voltage control end through the first connecting part exposed at the first opening; the pixel defining layer is further provided with a third opening, orthographic projections of the second connecting portion, the second opening and the third opening on the substrate are at least partially overlapped, so that at least a part of area of the second connecting portion is exposed from the third opening, and the second maintenance electrode is connected with the second voltage control end through the third opening and the second connecting portion exposed at the second opening.
7. The display substrate according to claim 6, wherein second electrodes of the respective light emitting devices are connected to each other, and a light emitting layer between the intermediate electrode and the second electrode covers the intermediate electrode and covers the second conductive path, the second repair electrode, and the third opening to prevent the second electrode from being shorted with the intermediate electrode.
8. The display substrate of claim 1, wherein at least two of the light emitting regions comprise: the first electrode of the first light-emitting area and the first electrode of the second light-emitting area are connected to the same first voltage control end through mutually independent first conductive channels, and the middle electrode of the first light-emitting area and the middle electrode of the second light-emitting area are connected to the same second voltage control end through mutually independent second conductive channels.
9. The display substrate of claim 1, wherein the at least two light emitting layers comprise: the intermediate electrode is arranged between the first light-emitting layer and the second light-emitting layer;
at least one of the first light emitting layer and the second light emitting layer is a quantum dot light emitting layer, the first light emitting layer emits light under the action of a first voltage difference between the first electrode and the intermediate electrode, and the second light emitting layer emits light under the action of a second voltage difference between the intermediate electrode and the second electrode.
10. The display substrate according to claim 9, wherein one of the first light-emitting layer and the second light-emitting layer is an organic light-emitting layer, and the other is a quantum dot light-emitting layer; the organic light emitting layer emits light of a first color; the quantum dot light emitting layer includes a first quantum dot that emits light of a second color and a second quantum dot that emits light of a third color.
11. The display substrate according to claim 9, wherein for each of the light-emitting regions, the first electrode, the first light-emitting layer, and the intermediate electrode constitute a first light-emitting sub-element, and the intermediate electrode, the second light-emitting layer, and the second electrode constitute a second light-emitting sub-element, the first light-emitting sub-element being connected in series with the second light-emitting sub-element;
the display substrate further includes: a pixel circuit provided on a side of the light emitting device layer close to the substrate, the pixel circuit including: a first driving sub-circuit and a second driving sub-circuit, the output terminals of the first and second driving sub-circuits being the second voltage control terminals, the first driving sub-circuit being configured to control the magnitude of the driving current flowing through the first light emitting sub-element of each of the light emitting regions, the second driving sub-circuit being configured to control the magnitude of the driving current flowing through the second light emitting sub-voltage of each of the light emitting regions.
12. A display device, comprising: the display substrate of any one of claims 1-11.
CN202311271339.0A 2023-09-27 2023-09-27 Display substrate and display device Pending CN117177599A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311271339.0A CN117177599A (en) 2023-09-27 2023-09-27 Display substrate and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311271339.0A CN117177599A (en) 2023-09-27 2023-09-27 Display substrate and display device

Publications (1)

Publication Number Publication Date
CN117177599A true CN117177599A (en) 2023-12-05

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CN202311271339.0A Pending CN117177599A (en) 2023-09-27 2023-09-27 Display substrate and display device

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CN (1) CN117177599A (en)

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