CN117177406A - Linear constant-current field effect transistor cooling and current equalizing circuit - Google Patents
Linear constant-current field effect transistor cooling and current equalizing circuit Download PDFInfo
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- 230000005669 field effect Effects 0.000 title claims abstract description 11
- 238000001816 cooling Methods 0.000 title claims description 6
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- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
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Abstract
A temperature-reducing and current-equalizing circuit of a linear constant-current field effect transistor is characterized by comprising a main control unit U1; the detection end of the main control unit U1 is respectively provided with a resistor R17, a resistor R70 and a resistor R71, the resistor R17 is connected with the source electrode of the MOS tube Q3, the grid electrode of the resistor R17 is connected with the output end of the main control unit U1 through a resistor R66, and the drain electrode of the resistor R17 is grounded through a capacitor C23 and is connected with the auxiliary winding of the inductor L2; the resistor R70 is connected with the source electrode of the MOS tube Q2, the grid electrode of the resistor R is connected with the output end of the main control unit U1 through a resistor R65, and the drain electrode of the resistor R is connected with the capacitor C23; the resistor R71 is connected with the source electrode of the MOS tube Q1, the grid electrode of the resistor R71 is connected with the output end of the main control unit U1 through a resistor R64, and the drain electrode of the resistor R71 is connected with the capacitor C23; the common connection ends of the resistor R64, the resistor R65 and the resistor R66 are grounded through a resistor R67.
Description
Technical Field
The application relates to the field of LED power supplies, in particular to a temperature-reducing and current-equalizing circuit of a linear constant-current field effect transistor.
Background
The LED-driven outdoor illumination power supply has been developed to date, and is widely applied in the power supply industry in the field of industrial and mining illumination and plant illumination due to the superior characteristics of high efficiency, low cost, high reliability and the like of non-isolated scheme application.
The non-isolation application of the current LED driving power supply mainly comprises a two-stage cudrania-bark structure: active PFC stage + BUCK stage. Compared with the isolated type, the isolated type AC-DC converter has the advantages that the circuit is simplified, and because the AC-DC converter is in non-isolated output, the isolated output of a transformer is not needed like an isolated type AC-DC converter, the loss of a power supply is greatly reduced, so that only two small-volume inductors (PFC inductor and BUCK inductor) can be used, and the large-volume inductor and the transformer are not needed like the isolated AC-DC converter. While other peripheral devices are correspondingly reduced.
Although two-stage non-isolated power supplies have a great cost and performance span compared with isolated power supplies, with further white-heating competing in the industry, people put higher demands on the LED power supplies, both in terms of cost and performance: the cost is about 1W 2 yuan before, and then about 1W 1 yuan later, and then 1W 0.5 yuan later is required, and the cost is more preferable to be 1W less than 1/4 yuan. In terms of performance, the two-stage non-isolation application scheme is difficult to achieve within 2% in terms of load adjustment rate and linearity, and the product efficiency is improved greatly compared with that of the isolation application, so that the power conversion efficiency can be improved by 95%, but the further improvement of the efficiency is difficult. Moreover, because there are two high frequency switching frequency noise sources inside, the design of electromagnetic compatibility and electromagnetic interference is complex, and the introduction of EMI/EMC components not only increases the cost of the product but also reduces the conversion efficiency of the product to some extent.
Along with the continuous development and progress of science and technology, a non-isolated one-stage half scheme is designed to replace a non-isolated two-stage scheme at present, wherein the one-stage half scheme consists of an active PFC circuit and a linear constant current circuit, the linear constant current circuit is very simple, the theory is that the one-stage is not achieved, and the one-stage half scheme is called a one-stage half power supply cudrania-bark structure. The first-stage half scheme overcomes all defects of the two-stage scheme, only one inductor is needed, one inductor is omitted compared with the two non-isolation schemes, and as the latter stage adopts linear constant current, the problem of EMI/EMC does not exist as the linear constant current is well known to have no high-frequency switching signal, and various operations of the first-stage EMI/EMC are omitted. Because the linear constant current has excellent load adjustment rate and linear adjustment rate, the efficiency can be within 1%, the efficiency can be more than 96%, and the cost can be controlled to be lower than 1/4 yuan when the weight is 1W. Therefore, the non-isolated first-order half scheme belongs to the current advanced power supply cudrania structure in the industry.
However, the first-stage half scheme has the technical bottle strength which needs to be overcome in the industry at present: the heat productivity of the linear constant current MOS tube is larger, and the MOS tube is in a semi-conductive state similar to the amplifying state of the triode instead of in a complete conductive state, so that the internal resistance of the MOS tube is larger, and the heat productivity is relatively strong. In the application occasions where the space is relatively tense, a large-volume radiator cannot be placed, the output power is relatively high (hundreds of W), and the output current is relatively high, people have to adopt a plurality of MOS tubes to be used in parallel or in series, so that the consumed power is spread on each MOS tube, and the thermal stress of a single MOS tube is reduced. Because the linear MOS tube is in a semi-conducting state similar to an amplifying state, the MOS tube with small current is not greatly different from the MOS tube with large current when in use, so that a plurality of low-current MOS tubes with lower unit price can be adopted to replace one high-current MOS tube with high unit price (for example, 3 MOS tubes with 4A650V can be used for replacing one MOS tube with 11A650V in parallel), the cost is the same, but the temperature rise of a single tube of a plurality of MOS tubes connected in parallel or in series is much less, and the temperature rise of the single tube can be controlled within an acceptable range. However, when a plurality of MOS tubes are used in parallel, the situation that the temperature of one MOS tube is high and the temperature of the other MOS tubes is low is encountered, and the current imbalance flowing through the plurality of MOS tubes in parallel is caused.
Disclosure of Invention
In order to solve the problems, the technical scheme provides a temperature-reducing and current-equalizing circuit of a linear constant flow field effect tube.
In order to achieve the above purpose, the technical scheme is as follows:
a temperature-reducing and current-equalizing circuit of a linear constant-current field effect transistor comprises a main control unit U1;
the detection end of the main control unit U1 is respectively provided with a resistor R17, a resistor R70 and a resistor R71, the resistor R17 is connected with the source electrode of the MOS tube Q3, the grid electrode of the resistor R17 is connected with the output end of the main control unit U1 through a resistor R66, and the drain electrode of the resistor R17 is grounded through a capacitor C23 and is connected with the auxiliary winding of the inductor L2;
the resistor R70 is connected with the source electrode of the MOS tube Q2, the grid electrode of the resistor R is connected with the output end of the main control unit U1 through a resistor R65, and the drain electrode of the resistor R is connected with the capacitor C23;
the resistor R71 is connected with the source electrode of the MOS tube Q1, the grid electrode of the resistor R71 is connected with the output end of the main control unit U1 through a resistor R64, and the drain electrode of the resistor R71 is connected with the capacitor C23;
the common connection ends of the resistor R64, the resistor R65 and the resistor R66 are grounded through a resistor R67;
the output end of the inductor L2 is used for outputting electric energy.
In some embodiments, the resistor R17 is grounded through a resistor R59 and a resistor R60, respectively;
the resistor R70 is grounded through a resistor R26 and a resistor R27 respectively;
resistor R71 is grounded through resistor R24 and resistor R25, respectively.
In some embodiments, the common terminals of the resistor R17, the resistor R70, and the resistor R71 are grounded through a capacitor C26.
The application has the beneficial effects that:
the circuit can equalize the current flowing through each MOS tube of the plurality of MOS tubes which are used in parallel, so that the temperature rise of each MOS tube is the same, the circuit has ingenious conception, overcomes the biggest defect of a linear circuit, solves the problem of large technical bottle strength in the power industry and the electronic industry, and ensures that a non-isolated power supply adopts a first-stage half scheme to output high power and high current.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the description of the embodiments will be briefly described below.
Fig. 1 is a schematic structural view of an embodiment of the present application.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects solved by the application more clear, the application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Referring to fig. 1, a temperature-reducing and current-equalizing circuit of a linear constant-current field effect transistor includes a main control unit U1;
the detection end of the main control unit U1 is respectively provided with a resistor R17, a resistor R70 and a resistor R71, the resistor R17 is connected with the source electrode of the MOS tube Q3, the grid electrode of the resistor R17 is connected with the output end of the main control unit U1 through a resistor R66, and the drain electrode of the resistor R17 is grounded through a capacitor C23 and is connected with the auxiliary winding of the inductor L2;
the resistor R70 is connected with the source electrode of the MOS tube Q2, the grid electrode of the resistor R is connected with the output end of the main control unit U1 through a resistor R65, and the drain electrode of the resistor R is connected with the capacitor C23;
the resistor R71 is connected with the source electrode of the MOS tube Q1, the grid electrode of the resistor R71 is connected with the output end of the main control unit U1 through a resistor R64, and the drain electrode of the resistor R71 is connected with the capacitor C23;
the common connection ends of the resistor R64, the resistor R65 and the resistor R66 are grounded through a resistor R67;
the output end of the inductor L2 is used for outputting electric energy.
In this embodiment, the resistor R17 is grounded through a resistor R59 and a resistor R60, respectively;
the resistor R70 is grounded through a resistor R26 and a resistor R27 respectively;
resistor R71 is grounded through resistor R24 and resistor R25, respectively.
In this embodiment, the common terminal of the resistor R17, the resistor R70 and the resistor R71 is grounded through the capacitor C26.
The working principle of the application is explained:
when the circuit works normally under load, the power supply current flows into the load LED lamp from the output end LED+ and flows back to the output end LED-after being loaded, and after passing through the EMI common mode filter, C23 provides a bypass for lightning surge, and the load current flows into the drain electrode and the source electrode of the three MOS tubes connected in parallel by Q1, Q2 and Q3; the sources of the three MOS tubes connected in parallel are respectively connected with current detection resistors with the same resistance value; the detection signals are respectively transmitted to PINs PIN5 of the linear control chip U1 through R17, R70 and R71, and the chip U1 adjusts the conduction depth of the linear MOS tubes Q1, Q2 and Q3 through the current limiting resistors R64, R65 and R66 and the lower bias resistor R67 respectively according to the detected current signals to adjust the driving level of the driving output PIN PIN6, so that the effect of constant current output is achieved.
The circuit current sharing principle of the application is deeply analyzed:
in order to realize perfect current sharing, the method comprises three steps:
the first method is as follows: the control poles (i.e., G poles) of the linear MOS transistors Q1, Q2, Q3 are respectively connected in series with resistors R64, R65, R66 for the purpose of: as is well known, copper-platinum wires on a PCB have a certain internal resistance, and the inconsistent length of each wire leads to different internal resistance values of each wire. Copper-platinum wires, while having a relatively small internal resistance (on the order of micro-ohms or milliohms), always tend to take the path of least internal resistance for the current flowing, so the greater the difference in internal resistance of each wire, the greater the difference in current flowing through it, sometimes amplified by a factor of tens or even hundreds. The circuit of the application is characterized in that a chip resistor with an ohm level or tens of ohm levels is connected in series with the control electrode of each linear MOS tube, and the difference between the resistance value of the chip resistor and the internal resistance of copper and platinum by the level of the 3 rd power of 10 is even larger, and the chip resistor is known according to the basic ohm law: the current controlled by each MOS tube is equal to the sum of the voltage dividing resistor and the copper-platinum internal resistance. Because the chip resistor is at ohm level and the copper-platinum internal resistance is at micro ohm or milliohm level, the obtained current difference of the linear MOS tube of each path is negligible. Therefore, current sharing of a plurality of MOS tubes is realized technically.
The second method is as follows: the source electrode of each linear MOS tube is connected with two current detection resistors with equal total resistance value in parallel: the source electrode of the Q1 is connected with R24 and R25; the source electrode of the Q2 is connected with R26 and R27; the source electrode of Q3 is connected with R59 and R60. The three groups of resistors are equal in parallel resistance, namely R24// R25=R26// R27=R59// R60; and the three groups of sources are not connected together and are relatively independent. Because the drains of the linear MOS tubes are connected, the potentials are the same, the brand and model of each MOS are the same, and the internal resistances of the conduction of each MOS tube are basically equal by the first method, so that the current flowing from the drain to the source of the MOS tube can also achieve basically equal effects.
The third method is as follows: in order to make up for the slight difference of the amplification characteristics of each path of linear MOS tube, the application designs a third method, namely, a current-limiting resistor is used for independently introducing a current detection signal into a current detection (CS) PIN (namely a PIN5 PIN) of a linear control chip U1 at the source electrode of each path of linear MOS tube: the Q1 source is introduced with R17; the Q2 source is introduced with R70; the Q3 source is introduced with R71. The purpose of this is that, because the linear MOS tube is the same in brand, model and electrical property, but the amplifying characteristic is still with a certain error range, in order to eliminate the flowing current error caused by the error, when the current of a certain path is overlarge, the detecting resistor connected with the source electrode detects the overcurrent signal, then the overcurrent signal is transmitted into the control chip U1 through the connected current limiting resistor, the level of the driving output PIN (PIN 6) is dynamically adjusted by the control chip, so that the current flowing through the MOS tube is dynamically and timely adjusted, the current flowing through each path of the multi-path linear MOS tube is basically equal, the consumed power consumption on each tube is equal, and the temperature rise of each tube is basically equal.
The circuit can realize the current equalizing effect of the first-stage half-scheme rear-stage linear multiple parallel MOS tubes, thereby achieving the purpose of cooling.
The utility model provides a linear constant current field effect transistor cooling current sharing circuit, includes master control unit U2 and transformer T1, the one end of master control unit U2 is connected with triode Q6's base, master control unit U2's one end still is connected with triode Q6's projecting pole through resistance R13, and the collector is grounded, resistance R13 still is through resistance R15 and resistance R18 ground, resistance R15 is connected with MOS pipe Q4's grid, and the source electrode is grounded, and the drain electrode is connected with magnetic bead BC1, magnetic bead BC1 with transformer T1's main winding output is connected, and its input is connected with the commercial power;
diodes D1 are arranged at two ends of the transformer T1, the output ends of the diodes D1 are grounded through electrolytic capacitors C4, and diodes D2 are arranged between the output ends of the transformer T1 and the electrolytic capacitors C4;
the auxiliary winding of the transformer T1 is connected to a diode D4 and a resistor R68. A capacitor C24 is arranged between the diode D4 and the resistor R68, the capacitor C24 is also connected with the auxiliary winding, one end of the resistor R68 is connected with the auxiliary winding through the diode ZD12, the resistor R68 is connected with the grid electrode of the MOS tube Q12, the drain electrode is connected with the diode D1, the source electrode is connected with the auxiliary winding, a resistor R69 is arranged between the grid electrode and the source electrode, and the source electrode of the MOS tube Q12 is also connected with the output end through the inductor L2.
In this embodiment, the magnetic bead BC1 is grounded through a capacitor C5.
In this embodiment, the drain electrode of the MOS transistor Q4 is sequentially connected to a capacitor C22 and a resistor R63, the resistor R63 is grounded through a diode ZD9, and the resistor R63 is connected to the VDD end of the main control unit U2 through a diode D3.
In this embodiment, the diode D3 is grounded through a capacitor C6 and a capacitor C7, respectively.
In this embodiment, the output end of the transformer T1 is provided with a resistor R1 and a resistor R2 that are arranged in parallel, the output ends of the two resistors are provided with a capacitor C1, the capacitor C1 is sequentially connected with a resistor R6, a resistor R9 and a resistor R14, and the resistor R14 is grounded through a resistor R23, a resistor R28 and a capacitor C11, respectively.
The working principle of the application is explained:
after power-up, PFC (power factor correction) circuit devices such as: u2, R13, Q6, R15, R18, Q4, BC1, C5, D2, T1, D1 and the like, the circuit starts to work, in a skip cycle intermittent conduction mode, the induced electromotive force on the PFC inductance is boosted by D2 to charge the large electrolytic capacitor C4 to 460-470VDC. The voltage on C4 passes through the output end LED+ of the Q12 back flow path, passes through the LED lamp load, flows back from the output end LED-, and reaches the linear constant current circuit (U1, Q2, Q3, R24, R25, R26, R27, R59, R60 and the like) after passing through the EMI common-mode inductor L2, and the linear MOS transistors Q1, Q2 and Q3 are controlled by the linear control chip to obtain the desired constant current effect. After load, the PFC auxiliary winding induces electromotive force to be increased, the voltage after D4 rectification and C24 filtering is about 22V, then the voltage is limited by R68, ZD12 is stabilized at 18V, and the limit voltage between the control electrode and the source electrode of the MOS tube Q12 is 30V, so that the voltage stabilizing value of 18V can ensure that the MOS tube Q12 cannot be damaged.
When the power supply is powered off for a few seconds, as the high-voltage charge stored on the large electrolytic capacitor C4 is not completely discharged, the linear control chip U1 loses control effect due to power failure, the driving output PIN PIN6 of the chip U1 is in an uncertain high-level state, the linear MOS tubes Q1, Q2 and Q3 are in a semi-conducting state, if the output ends LED+ and LED-are short-circuited at the moment, the circuit is not provided with the circuit (the auxiliary windings D4, C24, R68, ZD12, R69 and Q12 of the T1), the high-voltage charge stored in the electrolytic capacitor C4 can be instantly added to the linear MOS tubes Q1, Q2 and Q3, but the chip U1 loses control effect, the voltage of the control electrode of the MOS tubes cannot be instantly pulled down to disconnect the MOS tubes, even if the chip has weak control effect, the response speed is far lower than the speed of the high-voltage charge flowing through the MOS tubes, and thus the linear MOS tubes Q1, Q2 and Q3 burn out and breakdown occur; the serious frying phenomenon that MOS tube source current detection resistors R24, R25, R26, R27, R59 and R60 burn out and a linear control chip is damaged. The phenomenon is particularly remarkable when the capacitance of the electrolytic capacitor C4 used in high-power application is relatively large (more than 120 uF), and the electric power frying machine basically generates a short circuit if the protection circuit of the application is not present.
When the auxiliary windings D4, C24, R68, ZD12, R69 and Q12 of the protection circuit (T1) are connected into the circuit, the PFC circuit is immediately in a non-working state after the power supply is turned off, namely, two ends (CUT+, CUT-) of the auxiliary windings of the PFC do not generate induced electromotive force, at the moment, the patch capacitor C24 (1 uF) basically discharges trace charges along with the moment of power failure through the R68 and R69 due to small capacity, the space between GS (control electrode and source) of the MOS tube Q12 of the circuit is lower than the lowest opening level of the MOS tube, the MOS tube Q12 is in a CUT-off state instantly (nanosecond level), thereby blocking the passage between the large electrolytic capacitor C4 and the output LED+, and the high-voltage charges on the large electrolytic capacitor can not enter the linear constant current circuit through the output end, thereby effectively avoiding the damage to the subsequent circuit. Then, the charge of the large electrolytic capacitor C4 is slowly and safely discharged through R6, R9, R14, R23 and R28 which are connected in parallel at two ends of the large electrolytic capacitor C; on the other hand, the auxiliary power supply small plate connected with J1 is gradually discharged.
The foregoing description of the preferred embodiments of the present application is not intended to limit the scope of the application, but rather is presented in the claims.
Claims (3)
1. A temperature-reducing and current-equalizing circuit of a linear constant-current field effect transistor is characterized by comprising a main control unit U1;
the detection end of the main control unit U1 is respectively provided with a resistor R17, a resistor R70 and a resistor R71, the resistor R17 is connected with the source electrode of the MOS tube Q3, the grid electrode of the resistor R17 is connected with the output end of the main control unit U1 through a resistor R66, and the drain electrode of the resistor R17 is grounded through a capacitor C23 and is connected with the auxiliary winding of the inductor L2;
the resistor R70 is connected with the source electrode of the MOS tube Q2, the grid electrode of the resistor R is connected with the output end of the main control unit U1 through a resistor R65, and the drain electrode of the resistor R is connected with the capacitor C23;
the resistor R71 is connected with the source electrode of the MOS tube Q1, the grid electrode of the resistor R71 is connected with the output end of the main control unit U1 through a resistor R64, and the drain electrode of the resistor R71 is connected with the capacitor C23;
the common connection ends of the resistor R64, the resistor R65 and the resistor R66 are grounded through a resistor R67;
the output end of the inductor L2 is used for outputting electric energy.
2. The linear constant current field effect transistor cooling and current equalizing circuit according to claim 1, wherein: the resistor R17 is grounded through a resistor R59 and a resistor R60 respectively;
the resistor R70 is grounded through a resistor R26 and a resistor R27 respectively;
resistor R71 is grounded through resistor R24 and resistor R25, respectively.
3. The linear constant current field effect transistor cooling and current equalizing circuit according to claim 2, wherein: the common connection ends of the resistor R17, the resistor R70 and the resistor R71 are grounded through a capacitor C26.
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| CN202311445077.5A CN117177406A (en) | 2023-11-02 | 2023-11-02 | Linear constant-current field effect transistor cooling and current equalizing circuit |
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| CN202311445077.5A CN117177406A (en) | 2023-11-02 | 2023-11-02 | Linear constant-current field effect transistor cooling and current equalizing circuit |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110661403A (en) * | 2019-09-27 | 2020-01-07 | 福建星云电子股份有限公司 | Circuit for controlling parallel MOS (metal oxide semiconductor) tubes to be balanced |
| CN111478570A (en) * | 2020-05-08 | 2020-07-31 | 中国南方电网有限责任公司超高压输电公司天生桥局 | PMOS-based low-power-consumption redundant current-sharing circuit |
| CN111756222A (en) * | 2020-06-19 | 2020-10-09 | 红壹佰照明有限公司 | Parallel current-sharing control module and high-voltage linear power supply |
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2023
- 2023-11-02 CN CN202311445077.5A patent/CN117177406A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110661403A (en) * | 2019-09-27 | 2020-01-07 | 福建星云电子股份有限公司 | Circuit for controlling parallel MOS (metal oxide semiconductor) tubes to be balanced |
| CN111478570A (en) * | 2020-05-08 | 2020-07-31 | 中国南方电网有限责任公司超高压输电公司天生桥局 | PMOS-based low-power-consumption redundant current-sharing circuit |
| CN111756222A (en) * | 2020-06-19 | 2020-10-09 | 红壹佰照明有限公司 | Parallel current-sharing control module and high-voltage linear power supply |
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