CN117176651A - Network switching implementation method based on FPGA - Google Patents

Network switching implementation method based on FPGA Download PDF

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Publication number
CN117176651A
CN117176651A CN202311104965.0A CN202311104965A CN117176651A CN 117176651 A CN117176651 A CN 117176651A CN 202311104965 A CN202311104965 A CN 202311104965A CN 117176651 A CN117176651 A CN 117176651A
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network
module
fpga
message
layer
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刘金鹏
刘昊
刘天慧
裴富盟
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Beijing Institute of Computer Technology and Applications
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Beijing Institute of Computer Technology and Applications
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Abstract

The invention relates to a network switching implementation method based on an FPGA, and belongs to the technical field of computer network switching. The invention provides a method for realizing multi-port network forwarding and routing, which is mainly realized by a service network port logic module, a message keyword analysis module, an exchange module, an ARP table self-learning module and an MAC self-learning module; the business network port logic module realizes the buffer memory message and the integrity check, the message keyword analysis module completes the extraction of the keyword information, the exchange module realizes the two-layer forwarding and the three-layer routing, and the ARP table self-learning module and the MAC table self-learning module respectively complete the self-learning of the ARP table and the MAC table. The invention greatly reduces the dependence degree of the traditional routing function on software, improves the flexibility and portability of the network switching routing function, can be packaged into a module for repeated application, is suitable for occasions needing to realize high-speed two-layer and three-layer network switching, and can be applied to occasions of local area network internal forwarding and inter-network routing.

Description

Network switching implementation method based on FPGA
Technical Field
The invention belongs to the technical field of computer network switching, and particularly relates to a network switching implementation method based on an FPGA.
Background
In the network technology field, there are two switching modes, namely two-layer network forwarding and three-layer network routing, and the software implementation routing is usually operated on a general computing platform, such as a server or a general computer. These platforms have certain limitations for high performance network processing that do not provide performance comparable to specially designed hardware (e.g., FPGAs). Software-implemented routing typically introduces additional layers of processing, such as operating systems and drivers. These additional levels can result in increased packet processing delays, thereby affecting the efficiency and response time of the routing. Software-implemented routing typically requires running on a general-purpose operating system, meaning that its functionality and configuration is limited by the operating system. In contrast, the FPGA implementation routing can be flexibly customized and expanded according to specific requirements to accommodate various different network scenarios. Software-implemented routing typically runs on general-purpose computing platforms that often require more power consumption in order to meet a wide range of computing demands. In contrast, FPGA implementation routing can be optimized according to specific needs to reduce power consumption and improve energy efficiency. While the price of soft routing is relatively inexpensive, the price may increase if better network cards and hardware components such as processors are required. In contrast, some powerful hard routers may provide better performance and stability over the same price range.
Disclosure of Invention
First, the technical problem to be solved
The invention aims to solve the technical problems that: how to design a method for realizing link layer forwarding and network layer routing of an integrated high-speed network, which has low software dependence, low cost and high portability and can be embedded into small portable network equipment.
(II) technical scheme
In order to solve the technical problems, the invention provides a network exchange implementation method based on an FPGA, wherein an implementation system is implemented based on an FPGA chip, an MCU, the FPGA and a man-machine interaction device, the MCU receives user settings from the man-machine interaction device and converts the user settings into configuration parameters of each network port, and once the system starts to work, the MCU reads statistical information of each network port in the FPGA at regular time and sends the statistical information to the man-machine interaction device for display; the FPGA comprises a service network port logic module, a message keyword analysis module, a network switching module, an ARP table self-learning module, an MAC self-learning module and a statistical information module;
the method comprises the following steps:
step one, a user judges a working mode according to a network environment in which equipment works, wherein the working mode comprises a two-layer forwarding mode and a three-layer routing mode, MAC and IP of each network port, a static routing table, a static ARP table and the working mode are arranged in man-machine interaction equipment, an MCU receives the arranged network configuration parameters, and a configuration message is constructed through a configuration interface between the MCU and an FPGA by utilizing a custom protocol to send the network configuration parameters to a register of the FPGA;
step two: after receiving the configuration message through the configuration channel, the FPGA completes corresponding register read-write operation; in the initialization configuration process, the FPGA adds a static routing table item and a static ARP table item; meanwhile, a service network port logic module in the FPGA starts to receive a message sent from a network port and caches the message; in the receiving process, the business network port logic module simultaneously performs the integrity check of the message, and if the message is checked to have errors, the message is directly discarded; otherwise, entering the next step of processing;
step three: after receiving a complete and correct message, a message keyword analysis module in the FPGA analyzes a standard network protocol of the message, and extracts key information of a link layer and a network layer through analysis, wherein the key information comprises a source destination physical address, a source destination network address and an input network port; simultaneously, the key information of the analyzed message is sent to a network switching module, an ARP table self-learning module and an MAC self-learning module in the FPGA in parallel for processing;
step four, the network exchange module comprises a two-layer forwarding module and a three-layer routing module, if the input network port is configured to work at a link layer, key information of the link layer and the network layer is sent to the two-layer forwarding module, and if the input network port is configured to work at the network layer, key information of the link layer and the network layer is sent to the three-layer routing module; further, if the key word information is sent to the two-layer forwarding module, the destination physical address is obtained by the MAC self-learning module in the MAC table to be corresponding to the destination network port, if the forwarding network port information of the destination physical address is queried, the message is sent out after being combined with VLAN setting of the destination network port, and if the MAC table item is not available, the message is broadcast widely; if the key information is sent to the three-layer routing module, the destination physical address is utilized to search through the routing table and ARP table self-learning module to obtain the corresponding next hop network address, physical address and output network port, if the searching result is effective, the MAC table information is taken out, the two-layer header of the message is replaced, the FCS is recalculated and then sent to the corresponding network port, and if the searching result is not effective, the message is discarded;
step five: extracting a source and destination network address and a corresponding physical address from an ARP request/response message received by a network, and inputting the source and destination network address and the corresponding physical address into an ARP table self-learning module; based on this information, the ARP table self-learning module adds or updates the relevant entries in the ARP table.
And step six, inputting the source and destination physical addresses and the source network port numbers analyzed from the network message into the MAC table self-learning module through the input network port, and adding new MAC table items.
And step seven, the statistical information module stores the processing result statistics in a register for subsequent analysis.
The invention also provides a device for realizing the method.
Preferably, the device comprises an FPGA chip, an MCU, an FPGA and man-machine interaction equipment.
Preferably, the FPGA comprises a service network port logic module, a message keyword analysis module, a network switching module, an ARP table self-learning module, an MAC self-learning module and a statistical information module.
Preferably, the FPGA further includes a configuration interface logic module, where the configuration interface logic module is responsible for receiving network port parameters configured by the upper computer, including a working mode, a physical address, a network address, and a virtual local area network partition, and performing corresponding processing and setting.
Preferably, the FPGA further comprises a switching information storage module for storing network information including a routing table, an ARP table, and a MAC table.
Preferably, the MCU employs STM32F407.
Preferably, the FPGA uses XC7K160T.
Preferably, the communication interface of the MCU and the FPGA adopts a network interface and the communication interface of the MCU and the man-machine interaction equipment adopts a serial port.
The invention also provides an application of the method in computer network exchange.
(III) beneficial effects
The invention provides a method for realizing multi-port network forwarding and routing, which is mainly realized by a service network port logic module, a message keyword analysis module, an exchange module, an ARP table self-learning module and an MAC self-learning module; the business network port logic module realizes the buffer memory message and the integrity check, the message keyword analysis module completes the extraction of the keyword information, the exchange module realizes the two-layer forwarding and the three-layer routing, and the ARP table self-learning module and the MAC table self-learning module respectively complete the self-learning of the ARP table and the MAC table. The invention greatly reduces the dependence degree of the traditional routing function on software, improves the flexibility and portability of the network switching routing function, can be packaged into a module for repeated application, is suitable for occasions needing to realize high-speed two-layer and three-layer network switching, and can be applied to occasions of local area network internal forwarding and inter-network routing.
Drawings
FIG. 1 is a system block diagram of the present invention;
FIG. 2 is a flow chart of the method of the present invention;
FIG. 3 is a schematic block diagram of the FPGA logic design of the present invention.
Detailed Description
To make the objects, contents and advantages of the present invention more apparent, the following detailed description of the present invention will be given with reference to the accompanying drawings and examples.
Referring to fig. 1 to 3, the present invention provides a method for implementing forwarding and routing of a multiport network, particularly a method for implementing forwarding and routing of a link layer network applied to a network device, where an implementing system uses an FPGA chip as a core and includes components such as an MCU, an FPGA, a network PHY chip, a service network interface, a parameter configuration interface, a man-machine interaction device, and a power module. In the system, the MCU receives user settings from the man-machine interaction equipment and converts the user settings into configuration parameters of each network port. Once the system starts to work, the MCU reads the statistical information of each network port in the FPGA at regular time and sends the statistical information to the man-machine interaction equipment for display.
The key technology is concentrated on the FPGA logic design, and comprises a configuration interface logic module, an exchange information storage module, a service network interface logic module, a message keyword analysis module, a network exchange module, an ARP table self-learning module, an MAC self-learning module and a statistical information module.
Specifically, the configuration interface logic module can receive network port parameters configured by the upper computer, including working modes, physical addresses, network addresses and virtual local area network division, so that flexible configuration of the system is realized; the exchange information storage module is used for storing information including a routing table, an ARP table, an MAC table and the like; the business network port logic module is responsible for caching messages and checking the integrity of the messages; the message keyword analysis module is used for completing the extraction of the keyword information; the network exchange module completes two-layer forwarding and three-layer routing; the ARP table self-learning module and the MAC table self-learning module respectively complete the self-learning and updating of the ARP table and the MAC table, acquire the address mapping information of the network equipment in real time, and improve the flexibility of the exchange routing function; and the statistical information module completes the statistical storage of the exchange records.
Through the key technical means, the invention reduces the software dependency and improves the flexibility and portability of the network switching routing function. In addition, the system architecture is simplified and the system architecture is widely applicable to occasions of high-speed two-layer and three-layer network switching, including various scenes such as local area network internal forwarding and inter-network routing.
Through FPGA logic design, the programmability and parallel processing capability of an FPGA chip are fully utilized, core logic of a routing and forwarding function is realized in the FPGA, the degree of dependence on software is reduced, and the flexibility and portability of the system are improved.
The invention utilizes the high-performance FPGA logic design, and realizes the function of high-speed network exchange by configuring key technologies such as an interface logic module, an exchange information storage module, a service network port logic module, a message keyword analysis module, an exchange module, an ARP table self-learning module, an MAC self-learning module, a statistical information module and the like. The method has the characteristics of low software dependence, high portability and flexible and configurable property, is suitable for realizing high-speed two-layer and three-layer network switching, and is widely applied to various scenes such as local area network internal forwarding, inter-network routing and the like.
The invention provides a method for realizing high-speed network exchange realized by an FPGA, which comprises the following steps:
step one, a user judges a working mode according to a network environment in which equipment works, wherein the working mode comprises a two-layer forwarding mode and a three-layer routing mode, MAC and IP of each network port, a static routing table, a static ARP table and the working mode are arranged in man-machine interaction equipment, an MCU receives the arranged network configuration parameters, and a configuration message is constructed through a configuration interface between the MCU and an FPGA by utilizing a custom protocol to send the network configuration parameters to a register of the FPGA;
step two: after receiving the configuration message through the configuration channel, the FPGA completes the corresponding register read-write operation. In the initialization configuration process, the FPGA adds a static routing table item and a static ARP table item; meanwhile, a service network port logic module in the FPGA starts to receive a message sent from a network port and caches the message; in the receiving process, the business network port logic module simultaneously performs the integrity check of the message, and if the message is checked to have errors, the message is directly discarded; otherwise, entering the next step of processing;
step three: after receiving a complete and correct message, a message keyword analysis module in the FPGA analyzes a standard network protocol of the message, and extracts key information of a link layer and a network layer through analysis, wherein the key information comprises a source destination physical address, a source destination network address and an input network port; simultaneously, the key information of the analyzed message is sent to a network switching module, an ARP table self-learning module and an MAC self-learning module in the FPGA in parallel for processing;
step four, the network exchange module comprises a two-layer forwarding module and a three-layer routing module, if the input network port is configured to work at a link layer, key information of the link layer and the network layer is sent to the two-layer forwarding module, and if the input network port is configured to work at the network layer, key information of the link layer and the network layer is sent to the three-layer routing module; further, if the key word information is sent to the two-layer forwarding module, the destination physical address is obtained by the MAC self-learning module in the MAC table to be corresponding to the destination network port, if the forwarding network port information of the destination physical address is queried, the key word information is sent out after being combined with VLAN setting of the destination network port, and if the MAC table item (namely the forwarding network port information of the destination physical address) is not available, the message is broadcasted; if the key information is sent to the three-layer routing module, the destination physical address is utilized to search through the routing table and ARP table self-learning module to obtain the corresponding next hop network address, physical address and output network port, if the searching result is effective, the MAC table information is taken out, the two-layer header of the message is replaced, the FCS is recalculated and then sent to the corresponding network port, and if the searching result is not effective, the message is discarded;
step five: extracting a source and destination network address and a corresponding physical address from an ARP request/response message received by a network, and inputting the source and destination network address and the corresponding physical address into an ARP table self-learning module; based on this information, the ARP table self-learning module adds or updates the relevant entries in the ARP table.
And step six, inputting the source and destination physical address and the source network port number (namely the input network port) analyzed from the network message into a MAC table self-learning module to add a new MAC table item.
And step seven, the statistical information module stores the processing result statistics in a register for subsequent analysis.
The invention also provides a multi-port network forwarding and routing realization system taking the FPGA chip as a core, which comprises an MCU, an FPGA, a network PHY chip, a service network interface, a parameter configuration interface, man-machine interaction equipment and a power module. The components cooperate together, so that the system can realize high-efficiency data forwarding and routing functions and has flexible parameter configuration and man-machine interaction characteristics. The design of the system makes it suitable for various network environments, and provides rapid and reliable data transmission and routing service for network communication.
In the invention, the logic design of the FPGA covers a series of key technical modules, including a configuration interface logic module, an exchange information storage module, a service network port logic module, a message keyword analysis module, an exchange module, an ARP table self-learning module, an MAC self-learning module and a statistical information module. The modules act on the FPGA chip together, so that the core functions of the multi-port network forwarding and routing system are realized.
In the invention, the configuration interface logic module is responsible for receiving configuration parameters issued by the upper computer and carrying out corresponding processing and setting. It plays a role in receiving and analyzing configuration parameters, ensuring that the system is properly configured according to the needs of the user.
The exchange information storage module is used for storing important network information, including a routing table, an ARP table, a MAC table and the like. These tables record key information related to data forwarding and routing so that the system can be quickly looked up and used during operation.
The service portal logic module is responsible for caching and checking the integrity of the received data, ensuring that the received data frame is complete and error-free, and carrying out necessary processing to provide a reliable data source for the subsequent data forwarding operation.
The message keyword analysis module extracts the keyword information in the message, such as source destination physical address, source destination network address, input network port, etc. This critical information is critical to subsequent data forwarding and routing decisions.
The exchange module comprises two-layer forwarding and three-layer routing functions, and performs corresponding data forwarding operation according to system configuration. According to the information in the message, the data frame is sent to the target position by looking up a routing table or carrying out corresponding forwarding judgment.
The ARP table self-learning module and the MAC self-learning module are responsible for updating and maintaining the ARP table and the MAC table according to the information in the message. These self-learning modules dynamically update records in the table by observing the message traffic to accommodate network device changes and the addition of new devices.
The statistical information module records statistical data in the exchange process, including data packet forwarding condition, network flow and the like. These statistics are provided to the host computer for analysis and use to help monitor network performance and troubleshooting.
These functional modules cooperate with each other to jointly construct the core functional portion of the multi-port network forwarding and routing system of the present invention. Through the cooperative work of the technical components, the invention realizes high-speed network exchange and can conveniently carry out parameter configuration and statistical information display.
An exemplary circuit diagram is shown in the overall system diagram of the present invention in fig. 1, wherein the MCU may employ STM32F407, the FPGA may employ XC7K160T, and the network PHY chip may employ YT8521. The MCU and the communication interface of the FPGA adopt a network interface, the man-machine interaction equipment adopts a serial port, and the network PHY chip adopts an RGMII interface.
Referring to fig. 2, the workflow of the fpga portion is as follows:
the workflow of the FPGA is as follows:
configuration phase: the FPGA receives a configuration message from the parameter configuration interface through the configuration channel and completes corresponding register read-write operation. Meanwhile, after the initialization configuration is finished, the FPGA adds a static routing table entry and a static ARP table entry.
And a data processing stage: after the system starts to work, a service network interface logic module in the FPGA starts to receive data frames from a service network interface and performs caching operation. Meanwhile, integrity checking is carried out, and if a data frame error is detected, the data frame error is directly discarded; otherwise, the next processing is carried out.
Message analysis and key information extraction: after the integrity check and the correct data frame is received, the message keyword analysis module analyzes the data frame according to the standard network protocol. And extracting key information of the link layer and the network layer by analysis, wherein the key information comprises a source destination physical address, a source destination network address and an input network port.
And the parallel processing module is used for: and the analyzed key information is sent to a network switching module, an ARP table self-learning module and an MAC self-learning module for processing.
Network forwarding and routing: the network switching module determines a two-layer forwarding or three-layer routing mode according to the configuration. If the link layer working mode is configured, searching a destination network port corresponding to the destination physical address through the MAC self-learning module, and sending a data frame. If the network layer working mode is configured, the self-learning module of the routing table and the ARP table searches the next-hop network address, the physical address and the output network port, and the next-hop network address, the physical address and the output network port are sent after the head information of the data frame is replaced.
Self-learning update: the source network address and the physical address obtained by analysis are input into an ARP table self-learning module, and new ARP table items are added; the source physical address and the input network port number obtained by analysis are input into a MAC table self-learning module, and a new MAC table item is added.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.

Claims (10)

1. The network exchange implementation method based on the FPGA is characterized in that the implementation system is implemented based on an FPGA chip, an MCU, the FPGA and a man-machine interaction device, the MCU receives user settings from the man-machine interaction device and converts the user settings into configuration parameters of each network port, and once the system starts to work, the MCU reads statistical information of each network port in the FPGA at regular time and sends the statistical information to the man-machine interaction device for display; the FPGA comprises a service network port logic module, a message keyword analysis module, a network switching module, an ARP table self-learning module, an MAC self-learning module and a statistical information module;
the method comprises the following steps:
step one, a user judges a working mode according to a network environment in which equipment works, wherein the working mode comprises a two-layer forwarding mode and a three-layer routing mode, MAC and IP of each network port, a static routing table, a static ARP table and the working mode are arranged in man-machine interaction equipment, an MCU receives the arranged network configuration parameters, and a configuration message is constructed through a configuration interface between the MCU and an FPGA by utilizing a custom protocol to send the network configuration parameters to a register of the FPGA;
step two: after receiving the configuration message through the configuration channel, the FPGA completes corresponding register read-write operation; in the initialization configuration process, the FPGA adds a static routing table item and a static ARP table item; meanwhile, a service network port logic module in the FPGA starts to receive a message sent from a network port and caches the message; in the receiving process, the business network port logic module simultaneously performs the integrity check of the message, and if the message is checked to have errors, the message is directly discarded; otherwise, entering the next step of processing;
step three: after receiving a complete and correct message, a message keyword analysis module in the FPGA analyzes a standard network protocol of the message, and extracts key information of a link layer and a network layer through analysis, wherein the key information comprises a source destination physical address, a source destination network address and an input network port; simultaneously, the key information of the analyzed message is sent to a network switching module, an ARP table self-learning module and an MAC self-learning module in the FPGA in parallel for processing;
step four, the network exchange module comprises a two-layer forwarding module and a three-layer routing module, if the input network port is configured to work at a link layer, key information of the link layer and the network layer is sent to the two-layer forwarding module, and if the input network port is configured to work at the network layer, key information of the link layer and the network layer is sent to the three-layer routing module; further, if the key word information is sent to the two-layer forwarding module, the destination physical address is obtained by the MAC self-learning module in the MAC table to be corresponding to the destination network port, if the forwarding network port information of the destination physical address is queried, the message is sent out after being combined with VLAN setting of the destination network port, and if the MAC table item is not available, the message is broadcast widely; if the key information is sent to the three-layer routing module, the destination physical address is utilized to search through the routing table and ARP table self-learning module to obtain the corresponding next hop network address, physical address and output network port, if the searching result is effective, the MAC table information is taken out, the two-layer header of the message is replaced, the FCS is recalculated and then sent to the corresponding network port, and if the searching result is not effective, the message is discarded;
step five: extracting a source and destination network address and a corresponding physical address from an ARP request/response message received by a network, and inputting the source and destination network address and the corresponding physical address into an ARP table self-learning module; based on this information, the ARP table self-learning module adds or updates the relevant entries in the ARP table.
And step six, inputting the source and destination physical addresses and the source network port numbers analyzed from the network message into the MAC table self-learning module through the input network port, and adding new MAC table items.
And step seven, the statistical information module stores the processing result statistics in a register for subsequent analysis.
2. An apparatus for implementing the method of claim 1.
3. The apparatus of claim 2, wherein the apparatus comprises an FPGA chip, an MCU, an FPGA, a human-machine interaction device.
4. The apparatus of claim 2, wherein the FPGA comprises a service portal logic module, a message key parsing module, a network switching module, an ARP table self-learning module, a MAC self-learning module, and a statistics module.
5. The device of claim 2, wherein the FPGA further comprises a configuration interface logic module, and the configuration interface logic module is responsible for receiving network port parameters configured by the upper computer, including a working mode, a physical address, a network address, and a virtual local area network division, and performing corresponding processing and setting.
6. The apparatus of claim 2, wherein the FPGA further comprises a switch information storage module for storing network information including routing tables, ARP tables, MAC tables.
7. An apparatus as claimed in claim 2, wherein the MCU employs STM32F407.
8. The apparatus of claim 2, wherein the FPGA employs XC7K160T.
9. The apparatus of claim 2, wherein the communication interface between the MCU and the FPGA is a network interface and the serial interface is a man-machine interaction device.
10. Use of the method according to claim 1 in computer network exchanges.
CN202311104965.0A 2023-08-30 2023-08-30 Network switching implementation method based on FPGA Pending CN117176651A (en)

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