CN117171497B - Sparse matrix storage method, device, equipment and storage medium - Google Patents

Sparse matrix storage method, device, equipment and storage medium Download PDF

Info

Publication number
CN117171497B
CN117171497B CN202311445522.8A CN202311445522A CN117171497B CN 117171497 B CN117171497 B CN 117171497B CN 202311445522 A CN202311445522 A CN 202311445522A CN 117171497 B CN117171497 B CN 117171497B
Authority
CN
China
Prior art keywords
matrix
storage
array
target
stiffness matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311445522.8A
Other languages
Chinese (zh)
Other versions
CN117171497A (en
Inventor
丁桦
鞠国良
苑远
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Shifeng Technology Co ltd
Original Assignee
Shenzhen Shifeng Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Shifeng Technology Co ltd filed Critical Shenzhen Shifeng Technology Co ltd
Priority to CN202311445522.8A priority Critical patent/CN117171497B/en
Publication of CN117171497A publication Critical patent/CN117171497A/en
Application granted granted Critical
Publication of CN117171497B publication Critical patent/CN117171497B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Complex Calculations (AREA)

Abstract

The invention belongs to the technical field of Internet and discloses a sparse matrix storage method, a sparse matrix storage device, sparse matrix storage equipment and a sparse matrix storage medium. The invention constructs a target array structure body; defining a structure body according to the target array structure body to obtain a sparse matrix structure body; performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix; and storing the target stiffness matrix based on the structural body of the sparse matrix. The array structure body capable of freely stretching is constructed, the array structure body is defined, the structure body of the sparse matrix is obtained, the unit stiffness matrix is assembled to obtain the target stiffness matrix, and finally the target stiffness matrix is stored in the structure body of the sparse matrix, so that the storage space and the calculation amount of assembly are reduced, and the assembly and calculation efficiency of the matrix are improved.

Description

Sparse matrix storage method, device, equipment and storage medium
Technical Field
The present invention relates to the field of internet technologies, and in particular, to a sparse matrix storage method, apparatus, device, and storage medium.
Background
In numerical computation, a grid is a key for forming a stiffness matrix, and a main-stream numerical simulation method such as a finite element method and a finite volume method is to form the stiffness matrix based on the grid so as to solve the stiffness matrix. The scale of the overall stiffness matrix is related to the number of grid points and the degree of freedom of each grid point. In the process of forming the integral rigidity matrix, firstly, forming a unit rigidity matrix according to the characteristics of the grid unit and a physical equation, then traversing the unit, and accumulating the values of the same degree of freedom position on the unit rigidity matrix to form the integral rigidity matrix. Since the grid points are connected by cells, when two grid points are not in the same cell, they are not connected, and the value of the corresponding position on the overall stiffness matrix is 0. Obviously, the overall stiffness matrix is a sparse matrix, but the existing storage mode wastes storage space and cannot rapidly perform linear algebraic operation.
The foregoing is provided merely for the purpose of facilitating understanding of the technical solutions of the present invention and is not intended to represent an admission that the foregoing is prior art.
Disclosure of Invention
The invention mainly aims to provide a sparse matrix storage method, a sparse matrix storage device, sparse matrix storage equipment and a sparse matrix storage medium, and aims to solve the technical problem that an existing storage mode occupies a large storage space.
In order to achieve the above object, the present invention provides a sparse matrix storage method, which includes the steps of:
constructing a target array structure body;
defining a structure body according to the target array structure body to obtain a sparse matrix structure body;
performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix;
and storing the target stiffness matrix based on the structural body of the sparse matrix.
Optionally, the building the target array structure includes:
acquiring a plurality of data types;
constructing pointers according to a plurality of data types to obtain a plurality of array pointers;
and constructing a target array structure body according to the plurality of array pointers, the incremental data and the dimension.
Optionally, the defining the structure according to the target array structure to obtain a sparse matrix structure includes:
defining a storage array according to the target array structure body to obtain a column number storage array;
performing row and column value array definition according to the target array structure body to obtain a current row and column value array;
and storing an array and the current array of the row and column values based on the column numbers to obtain a structural body of the sparse matrix.
Optionally, the matrix assembling the unit stiffness matrix to obtain a target stiffness matrix includes:
determining a unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix;
when the unit degree of freedom is a preset degree of freedom, assigning a value to the unit stiffness matrix to obtain an assigned stiffness matrix;
and performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix.
Optionally, after determining the unit degrees of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix, the method further includes:
when the degree of freedom of the unit is not the preset degree of freedom, determining a storage position of a unit stiffness matrix;
and based on the storage position of the unit stiffness matrix, performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix.
Optionally, the storing the target stiffness matrix based on the sparse matrix structure includes:
initializing the structure body of the sparse matrix, and determining the bandwidth of the estimated matrix, the memory of the estimated matrix and the basic parameters of the matrix;
determining the total row number of the matrix, the dimension of the column number storage array and the increment of the column number storage array according to the matrix basic parameters;
and storing the target stiffness matrix according to the estimated matrix bandwidth, the estimated matrix memory, the matrix total number of rows, the dimension of the column number storage array and the column number storage array increment.
Optionally, after the storing the target stiffness matrix by the structure based on the sparse matrix, the method further includes:
sorting the target stiffness matrix based on a preset sequence to obtain a storage stiffness matrix;
determining the occupied space of the storage stiffness matrix according to the storage stiffness matrix;
and fixing the storage space according to the occupied space of the storage stiffness matrix.
In addition, in order to achieve the above object, the present invention also proposes a sparse matrix storage device comprising:
the construction module is used for constructing a target array structure body;
the definition module is used for defining the structure body according to the target array structure body to obtain a sparse matrix structure body;
the assembling module is used for assembling the matrix according to the structural body of the sparse matrix to obtain a target rigidity matrix;
and the storage module is used for carrying out block storage of the sparse matrix according to the target stiffness matrix.
In addition, to achieve the above object, the present invention also proposes a sparse matrix storage device including: a memory, a processor, and a sparse matrix storage program stored on the memory and executable on the processor, the sparse matrix storage program configured to implement the steps of the sparse matrix storage method as described above.
In addition, in order to achieve the above object, the present invention also proposes a storage medium having stored thereon a sparse matrix storage program which, when executed by a processor, implements the steps of the sparse matrix storage method as described above.
The invention constructs a target array structure body; defining a structure body according to the target array structure body to obtain a sparse matrix structure body; performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix; and storing the target stiffness matrix based on the structural body of the sparse matrix. The array structure body capable of freely stretching is constructed, the array structure body is defined, the structure body of the sparse matrix is obtained, the unit stiffness matrix is assembled to obtain the target stiffness matrix, and finally the target stiffness matrix is stored in the structure body of the sparse matrix, so that the storage space and the calculation amount of assembly are reduced, and the assembly and calculation efficiency of the matrix are improved.
Drawings
FIG. 1 is a schematic diagram of a sparse matrix storage device of a hardware runtime environment in accordance with an embodiment of the present invention;
FIG. 2 is a flowchart of a sparse matrix storage method according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram of a target array structure according to an embodiment of the sparse matrix storage method of the present invention;
FIG. 4 is a schematic diagram of a block memory structure in LILB format according to an embodiment of the sparse matrix storage method of the present invention;
FIG. 5 is a flowchart of a sparse matrix storage method according to a second embodiment of the present invention;
FIG. 6 is a diagram illustrating synchronization of number assembly in LIL format according to an embodiment of the sparse matrix storage method of the present invention;
FIG. 7 is a schematic diagram showing a definition of a matrix structure according to an embodiment of the sparse matrix storage method of the present invention;
FIG. 8 is a schematic diagram of a memory mode in LILB format according to an embodiment of the sparse matrix storage method of the present invention;
FIG. 9 is an illustration of an assembly process in LILB format according to an embodiment of the sparse matrix storage method of the present invention;
fig. 10 is a block diagram of a first embodiment of a sparse matrix storage device of the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a sparse matrix storage device of a hardware running environment according to an embodiment of the present invention.
As shown in fig. 1, the sparse matrix storage device may include: a processor 1001, such as a central processing unit (Central Processing Unit, CPU), a communication bus 1002, a user interface 1003, a network interface 1004, a memory 1005. Wherein the communication bus 1002 is used to enable connected communication between these components. The user interface 1003 may include a Display, an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a Wireless interface (e.g., a Wireless-Fidelity (Wi-Fi) interface). The Memory 1005 may be a high-speed random access Memory (Random Access Memory, RAM) Memory or a stable nonvolatile Memory (NVM), such as a disk Memory. The memory 1005 may also optionally be a storage device separate from the processor 1001 described above.
Those skilled in the art will appreciate that the structure shown in fig. 1 does not constitute a limitation of a sparse matrix storage device, and may include more or fewer components than shown, or may combine certain components, or may be a different arrangement of components.
As shown in fig. 1, an operating system, a network communication module, a user interface module, and a sparse matrix storage program may be included in the memory 1005 as one type of storage medium.
In the sparse matrix storage device shown in fig. 1, the network interface 1004 is mainly used for data communication with a network server; the user interface 1003 is mainly used for data interaction with a user; the processor 1001 and the memory 1005 in the sparse matrix storage device of the present invention may be disposed in the sparse matrix storage device, where the sparse matrix storage device invokes a sparse matrix storage program stored in the memory 1005 through the processor 1001, and executes the sparse matrix storage method provided by the embodiment of the present invention.
The embodiment of the invention provides a sparse matrix storage method, referring to fig. 2, fig. 2 is a schematic flow chart of a first embodiment of the sparse matrix storage method.
In this embodiment, the sparse matrix storage method includes the following steps:
step S10: and constructing a target array structure body.
It should be noted that, the execution body of the embodiment is a sparse matrix storage device, where the sparse matrix storage device has functions of data processing, data communication, program running, and the like, and the sparse matrix storage device may be an integrated controller, a control computer, and other devices with similar functions, and the embodiment is not limited to this.
It should be noted that, in order to improve the computing efficiency, many students have improved on the basis of the existing storage mode, and a series of other methods, such as RgCSR, QCSR, CSR5, etc., are derived. However, in any storage mode, in the assembly process of the numerical calculation stiffness matrix, firstly, units (or grid points) need to be traversed to finish numbering of the whole degrees of freedom of all the grid points, then, the units are traversed, and the values of the unit stiffness are assembled into the encoded degrees of freedom, so that sparse storage of the stiffness matrix is realized. Although the above-described assembly method is simple and easy to understand, this increases the amount of calculation of the overall stiffness matrix assembly, and reduces the calculation efficiency. In order to improve the calculation efficiency, based on the LIL storage format, the invention provides a brand-new sparse matrix assembly algorithm and a linked list type block sparse matrix (Linked List Block Matrix, recorded as LILB) storage mode.
It will be appreciated that the target array structure refers to a freely scalable array structure that is one-dimensional in the LIL memory format for storing the column number of each row of the matrix and the value of the matrix; in the LILB storage format, the structures corresponding to the row list and the value list are all one-dimensional, and each bit in the unique and different event value list array is a matrix structure. The structure is freely scalable, either in the LIL format or in the LILB format.
In order to obtain the target array structure, the method further includes: acquiring a plurality of data types; constructing pointers according to a plurality of data types to obtain a plurality of array pointers; and constructing a target array structure body according to the plurality of array pointers, the incremental data and the dimension.
It will be appreciated that a plurality of data types refers to data types corresponding to different lists, for example: the data type in the row list is INTEGRANATE), the data type in the value list is REAL, the plurality of data pointers refer to a plurality of pointers to the array, the delta data is an amount used to describe the change in the data, and the dimension refers to a column or field that describes a feature or attribute of the data.
In a specific implementation, as shown in fig. 3, in the LIL format, in order to implement automation of array expansion or reduction, three array pointers are constructed according to data types, where one of the pointers A, B is used for storing current data, and the other is used as a switch when the current pointer data overflows, val refers to a or B of the current stored data, and added with an increment, a dimension, and the like, which together form the structure of the sparse matrix array and the value storage. Also included in the module are: initialization (Init): for initializing the size of the number vector array and increasing the number of arrays each time, accumulate (Add): for accumulation of cell stiffness matrix, dimension increase (application): when the current pointed array overflows, the dimension of the array is increased, write out (WrtV): for writing out the column number or matrix value stored by the current vector, fix: when the overall stiffness matrix is assembled, the overall stiffness matrix is used for releasing redundant memory, and read-in (ReadV): in the LILB format, the column number stores the same structure type as the LIL format, and the matrix value stores the structure type in one dimension, but the vectettype in the array is a structure of the block matrix type, and the block storage structure in the LILB format is constructed in a manner similar to LIL, A, B, VAL, increment, dimension, and the like, and forms the structure together, as shown in fig. 4.
Step S20: and defining a structural body according to the target array structural body to obtain a structural body of a sparse matrix.
It can be understood that the column numbers and column values are defined for the constructed freely scalable array structure to obtain a sparse matrix structure.
Step S30: and performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix.
It is understood that the cell stiffness matrix refers to a matrix of local stiffness relationships within a finite element cell, and the target stiffness matrix refers to the overall stiffness matrix.
In the implementation, in the process of each unit cycle, firstly assembling a unit stiffness matrix, then numbering the whole degree of freedom of each grid point according to the degree of freedom of each grid point, and finally assembling the grid point into the whole stiffness matrix to complete the assembly of the whole stiffness matrix. In the assembly of the partitioned sparse matrix, the matrix blocks formed by each node are assembled to obtain the overall rigidity matrix.
Step S40: and storing the target stiffness matrix based on the structural body of the sparse matrix.
In a specific implementation, the overall rigidity matrix obtained by assembling the unit rigidity matrix is stored in a structural body of the sparse matrix, and the storage space can be reduced based on a storage mode of a linked list type block sparse matrix (LILB for short).
In order to fix the target stiffness matrix, further, after the structural body based on the sparse matrix stores the target stiffness matrix, the method further includes: sorting the target stiffness matrix based on a preset sequence to obtain a storage stiffness matrix; determining the occupied space of the storage stiffness matrix according to the storage stiffness matrix; and fixing the storage space according to the occupied space of the storage stiffness matrix.
It can be understood that the preset sequence refers to a sequence from small to large, the storage stiffness matrix refers to a stiffness matrix obtained by ordering the target stiffness matrix in the sequence from small to large, the occupied space of the storage stiffness matrix refers to an occupied space corresponding to the size of the storage stiffness matrix, and the storage space refers to the size of the storage space estimated according to the bandwidth.
In a specific implementation, the target stiffness matrixes are ordered according to the order from small to large to obtain ordered stiffness matrixes, namely storage stiffness matrixes, the storage space actually occupied is determined according to the storage stiffness matrixes, and finally the estimated storage space is fixed according to the storage space actually occupied, namely in the process of matrix assembly, in order to avoid frequent space opening, a relatively reasonable length is usually opened up, and if the stiffness matrixes are not increased enough, the redundant storage space cannot be avoided. Meanwhile, the linked list is assembled unordered, so that the aim of this step is to release redundant space and arrange the linked list in a sequence from small to large.
The embodiment constructs the target array structure body; defining a structure body according to the target array structure body to obtain a sparse matrix structure body; performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix; and storing the target stiffness matrix based on the structural body of the sparse matrix. The array structure body capable of freely stretching is constructed, the array structure body is defined, the structure body of the sparse matrix is obtained, the unit stiffness matrix is assembled to obtain the target stiffness matrix, and finally the target stiffness matrix is stored in the structure body of the sparse matrix, so that the storage space and the calculation amount of assembly are reduced, and the assembly and calculation efficiency of the matrix are improved.
Referring to fig. 5, fig. 5 is a flowchart of a sparse matrix storage method according to a second embodiment of the present invention.
Based on the above first embodiment, the sparse matrix storage method of this embodiment includes, at step S30:
step S31: and determining the unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix.
It should be noted that the unit cycle assembly of the overall stiffness matrix is achieved by calling AddMat. In the process of each unit circulation, firstly assembling a unit stiffness matrix, then numbering the whole degree of freedom of each grid point according to the degree of freedom of each grid point, and then assembling the grid points into the whole stiffness matrix to complete the assembly of the whole stiffness matrix. In the assembly of the partitioned sparse matrix, only the matrix blocks formed by each node are required to be assembled.
It is understood that the degree of freedom of a unit refers to the number of degrees of freedom in a finite element unit, which determines the size and structure of a unit stiffness matrix, and performs degree of freedom calculation according to the unit stiffness matrix to obtain a unit degree of freedom corresponding to the unit stiffness matrix.
In order to obtain the target stiffness matrix, further, after determining the unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix, the method further includes: when the degree of freedom of the unit is not the preset degree of freedom, determining a storage position of a unit stiffness matrix; and based on the storage position of the unit stiffness matrix, performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix.
It is understood that the preset degree of freedom refers to a degree of freedom in which the original number is preset to 0, and the storage position refers to a position of the storage unit stiffness matrix.
In specific implementation, judging whether the degree of freedom of the unit stiffness matrix is 0, when the degree of freedom of the unit is not 0, determining the storage position of the unit stiffness matrix according to the actual number of the unit degree of freedom, and finally assembling the unit stiffness matrix and storing the unit stiffness matrix in the corresponding position to obtain the target stiffness matrix.
Step S32: and when the unit degree of freedom is a preset degree of freedom, assigning the unit stiffness matrix to obtain an assigned stiffness matrix.
In addition, as shown in fig. 6, the number assembly synchronization is performed based on the LIL format, the degrees of freedom are not numbered before the matrix assembly, the original number is 0, and the total degrees of freedom are accumulated at this time, and the numbers are assigned to the memory items of the degrees of freedom. When the matrix is assembled, if the original number is found to be 0, the index is never generated in the matrix assembling process, and only assignment is needed; if the original number is not 0, the corresponding storage position is searched for and accumulated. In this way, the degree of freedom numbering and the assembly can be performed simultaneously without the precondition of the degree of freedom pre-numbering. Meanwhile, according to the assembling process, when the original number value is 0, the matrix can be directly assembled, the searching link is reduced, and the assembling efficiency can be improved to a certain extent.
It can be understood that the assigned stiffness matrix refers to a stiffness matrix obtained by assigning degrees of freedom of the unit stiffness matrix, whether the degrees of freedom of the unit stiffness matrix are 0 is judged, and when the degrees of freedom of the unit are 0 is determined, the degrees of freedom of the unit are assigned, so that the assigned stiffness matrix is obtained.
Step S33: and performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix.
In a specific implementation, after the assigned stiffness matrix is obtained, the assigned stiffness matrix is assembled to obtain the overall stiffness matrix.
In order to obtain a sparse matrix structure, the method further includes defining a structure based on the target array structure to obtain a sparse matrix structure, including: defining a storage array according to the target array structure body to obtain a column number storage array; performing row and column value array definition according to the target array structure body to obtain a current row and column value array; and storing an array and the current array of the row and column values based on the column numbers to obtain a structural body of the sparse matrix.
It will be understood that a column number storage array refers to an array in which non-zero elements of a sparse matrix are stored in columns, and that a current array of column and row values refers to a data array for storing a sparse matrix.
In a specific implementation, as shown in fig. 7, the definition of the matrix structure body is based on the constructed freely stretchable array structure body, and the structure body of the sparse matrix is defined, which includes two items, namely a column number storage array and an array of current row and column values of the matrix, and finally the structure body of the sparse matrix is obtained by storing the array and the array of current row and column values according to the column number.
In order to further store the target stiffness matrix in the sparse matrix-based structure, the method further includes: initializing the structure body of the sparse matrix, and determining the bandwidth of the estimated matrix, the memory of the estimated matrix and the basic parameters of the matrix; determining the total row number of the matrix, the dimension of the column number storage array and the increment of the column number storage array according to the matrix basic parameters; and storing the target stiffness matrix according to the estimated matrix bandwidth, the estimated matrix memory, the matrix total number of rows, the dimension of the column number storage array and the column number storage array increment.
It will be appreciated that the matrix base parameters include, but are not limited to, any of the total number of rows of the matrix, the dimension of the column number array, and the column number array increment.
In specific implementation, initializing a structure body of a sparse matrix, predicting the bandwidth and the matrix memory of the matrix, determining the dimension of a matrix total line number storage array and a column number storage array increment, storing a target rigidity matrix according to the predicted matrix bandwidth, the predicted matrix memory, the dimension of the matrix total line number storage array and the column number storage array increment, initializing the structure body after the definition of the matrix structure body is completed, and respectively giving the dimension of the matrix total line number storage array and the column number storage array increment. Meanwhile, the module further comprises: initialization (InitMat): the method is used for initializing the matrix before assembling, and comprises the steps of estimating the bandwidth of the matrix, distributing the initial memory of the matrix and the like; matrix assembly (AddMat): the method is used for assembling the matrix, and SysEMat is used for assembling a symmetrical rigidity matrix; matrix ordering/fixing (sortfix): after the matrix is assembled, arranging the column numbers in each row in a sequence from small to large, and deleting redundant memory space; write out (wrtmax): the matrix is output to a designated file.
In the LILB format, the number of the grid is determined at the time of splitting, and the matrix on the grid is simply accumulated according to the grid point. The storage mode of the LILB format is shown in fig. 8, and the assembly process of the LILB format is shown in fig. 9. Obviously, since the list numbering structure of the LILB format only stores the information of grid points, the list of the rows is far less than the LIL format in storage quantity, and each sub-block is assembled at the same time without circulation, so that the assembly efficiency is greatly improved.
The embodiment determines the unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix; when the unit degree of freedom is a preset degree of freedom, assigning a value to the unit stiffness matrix to obtain an assigned stiffness matrix; and performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix. The corresponding unit degree of freedom is obtained through the unit stiffness matrix, when the unit degree of freedom is determined to be the preset degree of freedom, assignment is carried out to obtain an assigned stiffness matrix, and matrix assembly is carried out to obtain a target stiffness matrix, so that simultaneous degree of freedom numbering and assembly are realized, and the calculated amount is reduced.
In addition, the embodiment of the invention also provides a storage medium, wherein a sparse matrix storage program is stored on the storage medium, and the sparse matrix storage program realizes the steps of the sparse matrix storage method when being executed by a processor.
Referring to fig. 10, fig. 10 is a block diagram illustrating a first embodiment of a sparse matrix storage device according to the present invention.
As shown in fig. 10, the sparse matrix storage device according to the embodiment of the present invention includes:
a construction module 10 for constructing a target array structure.
The definition module 20 is configured to perform definition of a structure according to the target array structure, so as to obtain a sparse matrix structure.
And the assembling module 30 is used for performing matrix assembling according to the structural body of the sparse matrix to obtain a target rigidity matrix.
And the storage module 40 is used for carrying out block storage of the sparse matrix according to the target stiffness matrix.
The embodiment constructs the target array structure body; defining a structure body according to the target array structure body to obtain a sparse matrix structure body; performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix; and storing the target stiffness matrix based on the structural body of the sparse matrix. The array structure body capable of freely stretching is constructed, the array structure body is defined, the structure body of the sparse matrix is obtained, the unit stiffness matrix is assembled to obtain the target stiffness matrix, and finally the target stiffness matrix is stored in the structure body of the sparse matrix, so that the storage space and the calculation amount of assembly are reduced, and the assembly and calculation efficiency of the matrix are improved.
In an embodiment, the construction module 10 is further configured to obtain a plurality of data types;
constructing pointers according to a plurality of data types to obtain a plurality of array pointers;
and constructing a target array structure body according to the plurality of array pointers, the incremental data and the dimension.
In an embodiment, the definition module 20 is further configured to perform storage array definition according to the target array structure to obtain a column number storage array;
performing row and column value array definition according to the target array structure body to obtain a current row and column value array;
and storing an array and the current array of the row and column values based on the column numbers to obtain a structural body of the sparse matrix.
In an embodiment, the assembly module 30 is further configured to determine a unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix;
when the unit degree of freedom is a preset degree of freedom, assigning a value to the unit stiffness matrix to obtain an assigned stiffness matrix;
and performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix.
In an embodiment, the assembling module 30 is further configured to determine a storage location of the unit stiffness matrix when the unit degree of freedom is not a preset degree of freedom;
and based on the storage position of the unit stiffness matrix, performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix.
In one embodiment, the storage module 40 is further configured to initialize the structure of the sparse matrix to determine a predicted matrix bandwidth, a predicted matrix memory, and matrix basic parameters;
determining the total row number of the matrix, the dimension of the column number storage array and the increment of the column number storage array according to the matrix basic parameters;
and storing the target stiffness matrix according to the estimated matrix bandwidth, the estimated matrix memory, the matrix total number of rows, the dimension of the column number storage array and the column number storage array increment.
In an embodiment, the storage module 40 is further configured to sort the target stiffness matrix based on a preset order, to obtain a storage stiffness matrix;
determining the occupied space of the storage stiffness matrix according to the storage stiffness matrix;
and fixing the storage space according to the occupied space of the storage stiffness matrix.
It should be understood that the foregoing is illustrative only and is not limiting, and that in specific applications, those skilled in the art may set the invention as desired, and the invention is not limited thereto.
It should be understood that, although the steps in the flowcharts in the embodiments of the present application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited in order and may be performed in other orders, unless explicitly stated herein. Moreover, at least some of the steps in the figures may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order of their execution not necessarily occurring in sequence, but may be performed alternately or alternately with other steps or at least a portion of the other steps or stages.
It should be noted that the above-described working procedure is merely illustrative, and does not limit the scope of the present invention, and in practical application, a person skilled in the art may select part or all of them according to actual needs to achieve the purpose of the embodiment, which is not limited herein.
Furthermore, it should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
From the above description of embodiments, it will be clear to a person skilled in the art that the above embodiment method may be implemented by means of software plus a necessary general hardware platform, but may of course also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. Read Only Memory (ROM)/RAM, magnetic disk, optical disk) and comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present invention.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.

Claims (5)

1. The sparse matrix storage method is characterized by comprising the following steps of:
constructing a target array structure body;
defining a structure body according to the target array structure body to obtain a sparse matrix structure body;
performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix;
storing the target stiffness matrix based on the structure of the sparse matrix;
wherein, the construction target array structure body comprises:
acquiring a plurality of data types;
constructing pointers according to a plurality of data types to obtain a plurality of array pointers;
constructing a target array structure body according to the plurality of array pointers, the incremental data and the dimensions;
the defining of the structure body according to the target array structure body to obtain a sparse matrix structure body comprises the following steps:
defining a storage array according to the target array structure body to obtain a column number storage array;
performing row and column value array definition according to a target array structure body to obtain a current row and column value array, wherein each bit in the current row and column value array is a matrix structure body;
based on the column number storage array and the current row and column value array, obtaining a structure body of a sparse matrix;
the matrix assembly is performed on the unit stiffness matrix to obtain a target stiffness matrix, and the method comprises the following steps:
determining a unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix;
when the unit degree of freedom is a preset degree of freedom, assigning a value to the unit stiffness matrix to obtain an assigned stiffness matrix;
performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix;
wherein after determining the unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix, the method further comprises:
when the degree of freedom of the unit is not the preset degree of freedom, determining a storage position of a unit stiffness matrix;
based on the storage position of the unit stiffness matrix, performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix;
wherein after the structural body based on the sparse matrix stores the target stiffness matrix, the method further comprises:
sorting the target stiffness matrix based on a preset sequence to obtain a storage stiffness matrix;
determining the occupied space of the storage stiffness matrix according to the storage stiffness matrix;
and fixing the storage space according to the occupied space of the storage stiffness matrix.
2. The method of claim 1, wherein the storing the target stiffness matrix based structure comprises:
initializing the structure body of the sparse matrix, and determining the bandwidth of the estimated matrix, the memory of the estimated matrix and the basic parameters of the matrix;
determining the total row number of the matrix, the dimension of the column number storage array and the increment of the column number storage array according to the matrix basic parameters;
and storing the target stiffness matrix according to the estimated matrix bandwidth, the estimated matrix memory, the matrix total number of rows, the dimension of the column number storage array and the column number storage array increment.
3. A sparse matrix storage device, the sparse matrix storage device comprising:
the construction module is used for constructing a target array structure body;
the definition module is used for defining the structure body according to the target array structure body to obtain a sparse matrix structure body;
the assembling module is used for carrying out matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix;
the storage module is used for storing the target stiffness matrix based on the structural body of the sparse matrix;
the construction module is further used for acquiring a plurality of data types;
constructing pointers according to a plurality of data types to obtain a plurality of array pointers;
constructing a target array structure body according to the plurality of array pointers, the incremental data and the dimensions;
the definition module is further used for defining a storage array according to the target array structure body to obtain a column number storage array;
performing row and column value array definition according to a target array structure body to obtain a current row and column value array, wherein each bit in the current row and column value array is a matrix structure body;
based on the column number storage array and the current row and column value array, obtaining a structure body of a sparse matrix;
the assembly module is further used for determining the unit degree of freedom corresponding to the unit stiffness matrix according to the unit stiffness matrix;
when the unit degree of freedom is a preset degree of freedom, assigning a value to the unit stiffness matrix to obtain an assigned stiffness matrix;
performing matrix assembly according to the assigned stiffness matrix to obtain a target stiffness matrix;
the assembly module is further used for determining a storage position of the unit stiffness matrix when the unit degree of freedom is not a preset degree of freedom;
based on the storage position of the unit stiffness matrix, performing matrix assembly on the unit stiffness matrix to obtain a target stiffness matrix;
the storage module is further used for sorting the target stiffness matrixes based on a preset sequence to obtain storage stiffness matrixes;
determining the occupied space of the storage stiffness matrix according to the storage stiffness matrix;
and fixing the storage space according to the occupied space of the storage stiffness matrix.
4. A sparse matrix storage device, the device comprising: a memory, a processor, and a sparse matrix storage program stored on the memory and executable on the processor, the sparse matrix storage program configured to implement the sparse matrix storage method of any one of claims 1 to 2.
5. A storage medium having stored thereon a sparse matrix storage program which when executed by a processor implements the sparse matrix storage method of any one of claims 1 to 2.
CN202311445522.8A 2023-11-02 2023-11-02 Sparse matrix storage method, device, equipment and storage medium Active CN117171497B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311445522.8A CN117171497B (en) 2023-11-02 2023-11-02 Sparse matrix storage method, device, equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311445522.8A CN117171497B (en) 2023-11-02 2023-11-02 Sparse matrix storage method, device, equipment and storage medium

Publications (2)

Publication Number Publication Date
CN117171497A CN117171497A (en) 2023-12-05
CN117171497B true CN117171497B (en) 2024-02-06

Family

ID=88930129

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311445522.8A Active CN117171497B (en) 2023-11-02 2023-11-02 Sparse matrix storage method, device, equipment and storage medium

Country Status (1)

Country Link
CN (1) CN117171497B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111523960A (en) * 2020-03-16 2020-08-11 平安国际智慧城市科技股份有限公司 Product pushing method and device based on sparse matrix, computer equipment and medium
CN116186045A (en) * 2023-02-21 2023-05-30 北京大学 Sparse matrix adjustment method and device, electronic equipment and storage medium

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11488147B2 (en) * 2015-07-14 2022-11-01 Fmr Llc Computationally efficient transfer processing and auditing apparatuses, methods and systems
CN111796796B (en) * 2020-06-12 2022-11-11 杭州云象网络技术有限公司 FPGA storage method, calculation method, module and FPGA board based on sparse matrix multiplication

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111523960A (en) * 2020-03-16 2020-08-11 平安国际智慧城市科技股份有限公司 Product pushing method and device based on sparse matrix, computer equipment and medium
CN116186045A (en) * 2023-02-21 2023-05-30 北京大学 Sparse matrix adjustment method and device, electronic equipment and storage medium

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
姚松 等.有限元刚度矩阵的压缩存贮及组集.中南大学学报(自然科学版).2006,第37卷(第4期),第826-830页. *
有限元刚度矩阵的压缩存贮及组集;姚松 等;中南大学学报(自然科学版);第37卷(第4期);第826-830页 *

Also Published As

Publication number Publication date
CN117171497A (en) 2023-12-05

Similar Documents

Publication Publication Date Title
CN106023015B (en) Course learning path recommendation method and device
Shahvari et al. Hybrid flow shop batching and scheduling with a bi-criteria objective
JP7053995B2 (en) Optimization device and control method of optimization device
US20200090051A1 (en) Optimization problem operation method and apparatus
Balis et al. Towards an operational database for real-time environmental monitoring and early warning systems
CN110968585B (en) Storage method, device, equipment and computer readable storage medium for alignment
CN105677755A (en) Method and device for processing graph data
CN111640296B (en) Traffic flow prediction method, system, storage medium and terminal
JP2001290796A (en) Method and device for reordering matrix, and method and device for simulating electronic circuit
CN117171497B (en) Sparse matrix storage method, device, equipment and storage medium
Verstraete et al. Consistent iterative algorithm for stochastic dynamic traffic assignment with a stable route set
US7734456B2 (en) Method and apparatus for priority based data processing
Lin et al. A two-stage approach for a multi-objective component assignment problem for a stochastic-flow network
Mirzaei et al. Fast construction of near parsimonious hybridization networks for multiple phylogenetic trees
US20060085173A1 (en) Science and engineering simulator using numerical analysis of simultaneous linear equations
CN113656437B (en) Model construction method for predicting execution cost stability of reference
Zambuk et al. Evaluation of iterative pagerank algorithm for web page ranking
Adan et al. Analysis of structured Markov processes
KR102372869B1 (en) Matrix operator and matrix operation method for artificial neural network
CN110147804B (en) Unbalanced data processing method, terminal and computer readable storage medium
JP6663875B2 (en) Problem solving apparatus, method, and program
CN112000673A (en) Method and device for inquiring transaction elements by using quantum line
CN112132614A (en) Method and device for performing preference prediction demonstration by using quantum circuit
Dimri et al. Algorithms: Design and Analysis
CN110928253A (en) Dynamic weighting heuristic scheduling method of automatic manufacturing system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant