CN117170279A - Design method based on dual-multi-core PSOC redundant flight control system - Google Patents

Abstract

A design method based on a dual multi-core PSOC redundant flight control system belongs to the field of aircraft control and is characterized by comprising the following steps: redundant frameworks of double flight control boards are adopted; the flight control board adopts a PSOC chip with double CPU cores; each CPU in the PSOC chip performs comparison and verification on the data stored in the shared RAM by the other CPU, and judges whether the work is abnormal or not according to the verification result; and if the control panel is in the main control state, the control right is switched and the control panel is electrified and started again if the control panel is abnormal. The system has simple structure, the judging circuit is realized in the PSOC through programmable logic, and compared with the traditional method, the system greatly reduces the number of boards and devices and reduces the weight and the cost. The cost and the complexity of the system are similar to those of a dual redundancy mode, but the reliability of the system reaches the level of three redundancy to four redundancy without a separate judging circuit commonly used in the multi-redundancy mode; the distinguishing method is simple, reliable and easy to realize.

Description

Design method based on dual-multi-core PSOC redundant flight control system

Technical Field

The invention belongs to the field of aircraft control, and particularly relates to a design method based on a dual-multi-core PSOC redundant flight control system.

Background

Generally, flight control systems with high reliability basically adopt a multi-redundancy mode, namely a plurality of flight control boards, and each flight control board is provided with a CPU and a corresponding memory and interface circuit. And the flight control boards synchronously perform flight control operation.

However, in the conventional dual redundancy method, the host machine and the backup machine may have faults, and when the calculation results of the two are inconsistent, it is unable to accurately determine which party is the fault party, so the mechanism has logic defects, and in the occasion with high reliability requirement, in order to accurately determine the correctness of the operation of each CPU, three, two voting or five, three voting methods are generally adopted, so three or five flight control boards are generally required to be equipped. The mechanism basis is that the faults are small probability events, the faults are caused by various types of failures and interferences of devices, and the faults which cause the same error calculation result to appear on 2 flight control modules are very unlikely to occur at the same moment, so that the identical flight control modules can be determined to work normally when two or more flight control modules have the same calculation result and identical self-checking state at the same moment. The system with multiple redundancy modes is complex in structure, large in number of boards, high in cost, and large in weight and size.

A PSOC (programmable system on a chip) is a chip that integrates an FPGA and a plurality of CPUs. The flight control system adopting the dual-multicore PSOC can realize the voting and switching functions of a plurality of flight control boards by only two flight control boards on the premise of not reducing the system performance, thereby remarkably simplifying the system constitution, reducing the number of boards and components, reducing the system cost and weight and improving the system reliability.

Disclosure of Invention

The invention aims to provide a design method of a redundant flight control system of a dual-multicore PSOC, which determines the kernel operation correctness of the PSOC by comparing different operation results of different CPUs in each flight control board PSOC; the correctness of the output interface is judged through the loop comparison of the output interface, and the correctness of the input interface is judged through the input interface double-way input different comparison, so that the judgment of the working state of each flight control board and the switching work of the fault flight control board are realized.

The technical scheme of the invention is as follows:

a design method based on a dual-multi-core PSOC redundant flight control system comprises the following steps:

the flight control system 1 consists of 2 flight control boards containing multi-core PSOC chips, wherein the two flight control boards are identical and are respectively positioned in a No. 1 slot position and a No. 2 slot position. Each flight control board consists of PSOC, FLASH, DDR, an independent interface and a power circuit;

each PSOC chip comprises 2 synchronously operated CPUs (CPU 1 and CPU 2), each CPU is provided with a multi-port shared RAM for storing acquisition and operation results of the CPU, and meanwhile, the multi-port shared RAM of the other CPU can be read;

when the operation is correct, the multi-port shared RAM of the CPU1 in the PSOC in the flight control board in the main control state is used for outputting and controlling external execution equipment;

the 2 CPUs in each PSOC synchronously and independently perform data acquisition and operation flight control calculation under the common flight control beat, the acquisition and operation results are stored in a multi-port shared RAM of the PSOC, and are compared with the acquisition data and operation results in the multi-port shared RAM of the other PSOC, if the difference is within the threshold range, the operation is correct, otherwise, the fault is indicated;

the power-on is initiated, the flight control board in the slot number 1 is in a main control state, and the flight control board in the slot number 2 is in a backup state;

when the execution results of 2 CPUs in the PSOC of the flight control board in the master control state are inconsistent (the difference exceeds a threshold value) and the flight control board in the backup state is in a normal state, the control right is switched to the flight control board in the backup state, and meanwhile the flight control board in the original master control state is electrified again;

when the execution results of 2 CPUs in the PSOC of the flight control board in the backup state are inconsistent, only the power is needed to be turned on again, and the control right is kept unchanged;

and 8, powering up the 2 CPU execution results in the PSOC of the flight control board again, if the execution results are consistent, the flight control board is in a backup state, and if the execution results are inconsistent, indicating that an unrecoverable fault occurs, giving an alarm to prompt the return of the flight.

The invention has the advantages that:

1. software and hardware faults and fault board replacement can be accurately judged;

2. the system has simple structure, the judging circuit is realized in the PSOC through programmable logic, and compared with the traditional method, the number of the board cards and devices is greatly reduced, and the weight and the cost are reduced. The cost and the complexity of the system are similar to those of a dual redundancy mode, but the reliability of the system reaches the level of three redundancy to four redundancy without a separate judging circuit commonly used in the multi-redundancy mode;

3. the distinguishing method is simple, reliable and easy to realize;

4. the flight control board with soft fault enters the backup state again after being powered on and restarted, and the reliability of the system is improved.

Drawings

Fig. 1 is a schematic block diagram of a flight control system based on dual-multi-core PSOC redundancy according to an embodiment of the present invention.

Detailed Description

The design method of the dual-multi-core PSOC-based redundant flight control system is described in detail below through the drawings and the embodiments.

As shown in fig. 1, the design method based on the dual-multi-core PSOC redundant flight control system according to the present embodiment includes:

the system 1 consists of 2 identical flight control boards (flight control board 1 and flight control board 2) which are respectively positioned at the slot position 1 and the slot position 2, and each flight control board can obtain the position of the flight control board by reading the slot position pin so as to execute different program branches;

each flight control board consists of a dual core PSOC, DDR, FLASH, a power supply circuit and various interface circuits, each flight control board is provided with independent output and input channels to an execution and detection mechanism, and each execution and detection mechanism is also provided with 2 groups of redundant input and output signals which are respectively connected with 2 flight control boards; in the disclosed embodiment, an input signal 1, an input signal 2, an output signal 1, and an output signal 2;

the switching signals of the 2 flight control boards are combined and output to each executing mechanism in an open collector way, and the executing mechanism is indicated to execute which flight control board outputs a signal group through high and low levels;

the flight control board 1 is in a main control state after the system is electrified, the flight control board 2 is in a backup state, the switching signal outputs a high level, and the execution mechanism is instructed to adopt a control signal output by the flight control board 1;

each PSOC includes 2 CPUs (CPU 1, CPU 2), each CPU includes a shared RAM (in the embodiment of the present disclosure, CPU1 corresponds to shared RAM1, CPU2 corresponds to shared RAM 2), each CPU collects input data and performs calculation under a common flight control beat, and then writes the collected data, calculation result, and output data into the shared RAM corresponding to the collected data and calculation result. Each CPU can read the shared RAM for storing the data collected by the other CPU and the operation result and compare the shared RAM with the result;

and 6, the output data in the shared RAM storing the operation result of the CPU1 in each PSOC is read by the output interface logic and output to each executing mechanism. Meanwhile, the output quantity of the output interface circuit is collected by the loop detection circuit, and the CPU1 and the CPU2 can read the loop detection data for checking the correctness of the channel;

in each flight control beat, each CPU in the PSOC compares the acquired data and operation results of the other CPU, and if the acquired data and operation results are inconsistent, the input interface circuit or the program operation fault is illustrated; meanwhile, each CPU checks and outputs a control result according to the input signal, and if the control result does not meet the expectation, the transmission channel fault possibly occurs is indicated. When all the checks are correct, the CPU outputs a check correct signal, otherwise, outputs a check error signal;

when the judging switching and resetting control logic detects that the check result of the CPU is output as an error, if the flight control board is in a main control state and the other flight control board works normally, switching signals are changed, control right is given to the other flight control board, the flight control board is restarted, and if the flight control board is in a backup state, only the restarting is performed;

and 9, switching to a backup state if the verification output of 2 CPUs in the PSOC is correct, otherwise, indicating that an unrecoverable hard fault exists, and sending an alarm suggestion for returning.

Claims (2)

1. A design method based on a dual-multi-core PSOC redundant flight control system is characterized by comprising the following steps:

1, adopting a redundant framework of double flight control boards, wherein each flight control board is provided with an independent input and output channel;

the flight control board adopts a PSOC chip with double CPU cores as a core control device, each CPU independently runs a flight control algorithm, and stores acquisition and output results into a shared RAM;

each CPU in the PSOC chip performs comparison and verification on the data stored in the shared RAM by the other CPU, and judges whether the work is abnormal or not according to the verification result;

and 4, the flight control board in the main control state switches the control right if the flight control board is abnormal, and re-electrifies and starts the flight control board.

2. The design method of the dual-multi-core PSOC-based redundant flight control system as claimed in claim 1, wherein the design method comprises the following steps: judging whether the work is abnormal or not by the 2 CPUs in the PSOC chip through the verification result comprises the following conditions:

when the difference of the verification results of 2 CPUs in the PSOC chip of the flight control board in the master control state is not in the threshold range and the flight control board in the backup state is in the normal state, the control right is switched to the flight control board in the backup state, and meanwhile the flight control board in the original master control state is electrified again;

when the difference of the verification results of 2 CPUs in the PSOC chip of the flight control board in the backup state is not in the threshold range, only the power is needed to be turned on again, and the control right is kept unchanged.