CN117153233A - Method, device and equipment for generating redundancy repair scheme of memory chip based on genetic algorithm and storage medium - Google Patents
Method, device and equipment for generating redundancy repair scheme of memory chip based on genetic algorithm and storage medium Download PDFInfo
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Abstract
The invention discloses a method, a device, equipment and a storage medium for generating a storage chip redundancy repair scheme based on a genetic algorithm, and relates to the technical field of semiconductor chips. The method comprises the steps of firstly configuring genetic parameters and custom population individual fitness calculation modes according to basic parameters and basic repair requirements of a memory chip to be repaired, and then starting an operation flow based on a genetic algorithm according to the basic parameters, the genetic parameters and the fitness calculation modes: calculating fitness value- > saving population individuals- > iterative updating of population individuals with the largest fitness value of each population individual- > sequentially circulating until reaching target evolution times, and finally selecting the population individuals with the largest fitness value from all saved population individuals as a final memory chip redundancy repair scheme, so that all possible solutions can be traversed by utilizing strong randomness of a genetic algorithm and a search mechanism taking the population as a unit, and finally, the best repair scheme is quickly and accurately sought from all the possibilities.
Description
Technical Field
The invention belongs to the technical field of semiconductor chips, and particularly relates to a method, a device, equipment and a storage medium for generating a memory chip redundancy repair scheme based on a genetic algorithm.
Background
With the continuous development of ultra-large-scale integrated circuit technology, the volume of a memory chip is continuously reduced, and the memory capacity is continuously increased, so that the number of fault units is continuously increased, and therefore, the self-repairing research of the memory chip is particularly important. In order to ensure that the memory chip can be used normally, redundancy analysis and redundancy repair techniques are now widely used and pass verification. Namely, the memory chip design comprises redundant units, and addresses of fault units can be mapped and replaced by the redundant units so as to achieve the purpose of mass production of qualified chips. In the redundancy repair process, all modules are not affected by each other, and only if faults are found, the whole rows or the whole columns are directly replaced.
The existing whole redundancy repair process mainly comprises the following three steps:
(1) Repairability judgment: determining whether the chip can be repaired or not according to the acquired fault information (namely the number of fault units obtained through chip test) and the repair configuration information; the maximum repairable fault unit number is determined by the repairable unit number of one spare line and the total number of the spare lines;
(2) Repair Must (Must Repair) algorithm: searching a fault unit which must be repaired first according to the number of spare rows and columns which are actually available and the address condition of the fault unit; for example, if column repair is not addressed, only row repair is possible;
(3) Repairable algorithm (Repairable Memory): after the above-described repair-necessary algorithm is performed, the remaining faulty cells are analyzed to find all possible solutions; if both the spare row and the spare column can repair one faulty cell, this means that there are two or even more analysis solutions available, so that the best solution needs to be sought from all possibilities.
Thus, how to quickly and accurately seek the best memory chip redundancy repair scheme from all the possibilities for the third step in the redundancy repair process is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a method, a device, computer equipment and a computer readable storage medium for generating a memory chip redundancy repair scheme based on a genetic algorithm, which are used for quickly and accurately searching for the optimal memory chip redundancy repair scheme from all possibilities.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
in a first aspect, a method for generating a redundancy repair scheme for a memory chip based on a genetic algorithm is provided, including:
the method comprises the steps of obtaining basic parameters and basic repair requirements of a memory chip to be repaired, wherein the basic parameters comprise the number SR of spare rows for redundancy repair of the memory chip, the number SC of spare columns for redundancy repair of the memory chip, the total number FN of fault units and a two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N M represents the total number of the abscissa of the fault unit, N represents the total number of the ordinate of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Representing the nth faulty cell ordinate;
configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise evolution times g, population scale p and genetic modes;
customizing an adaptability calculation mode of population individuals according to the basic restoration requirement;
according to the basic parameters, the genetic parameters and the fitness calculation mode, starting an operation flow based on a genetic algorithm according to the following steps S40-S43:
S40, randomly creating an initial population G according to the basic parameters and the population scale p 0 Then, step S41 is performed with the initial population as the current population, wherein the initial populationRepresents a positive integer less than or equal to p, < >>Indicate->Individuals of individual population and have->Represents the firstThe abscissa set of the fault units to be repaired of individuals in each group is +.>Representing the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +.>The total number of elements is less than or equal to the number of spare columns SC, the ordinate set of the fault units to be repaired +.>The total number of elements of (2) is less than or equal to the spare row number SR;
s41, regarding each population individual in the current population as a given memory chip redundancy repair scheme, calculating the fitness value of each population individual by applying the fitness calculation mode, and then executing step S42;
s42, selecting population individuals with the maximum fitness value from the current population, storing the population individuals, and then executing step S43;
s43, carrying out iterative updating on the current population by applying the genetic mode to obtain a new current population, and returning to the step S41 until the iterative times are equal to the evolution times g;
And selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
Based on the above summary of the invention, a new scheme for rapidly and accurately generating an optimal memory chip redundancy repair scheme is provided, namely, a genetic parameter and a custom population individual fitness calculation mode are configured according to basic parameters and basic repair requirements of a memory chip to be repaired, and then an operation flow based on a genetic algorithm is started according to the basic parameters, the genetic parameters and the fitness calculation mode: calculating fitness value- > saving population individuals- > iterative updating of population individuals with the largest fitness value of each population individual- > sequentially circulating until reaching target evolution times, and finally selecting the population individuals with the largest fitness value from all saved population individuals as a final memory chip redundancy repair scheme, so that all possible solutions can be traversed by utilizing strong randomness of a genetic algorithm and a search mechanism taking the population as a unit, and finally, the optimal memory chip redundancy repair scheme is quickly and accurately sought from all the possibilities, thereby being convenient for practical application and popularization.
In one possible design, the method for calculating the fitness of the population individuals according to the basic repair requirement comprises the following steps:
Establishing a corresponding mathematical model aiming at the basic repair requirement, wherein the mathematical model refers to a simulation model for performing repair operation for meeting the basic repair requirement on a fault unit in a storage chip based on a given storage chip redundancy repair scheme;
based on the mathematical model, customizing the following fitness calculation mode of population individuals:
wherein F is ind Representing the fitness value s corresponding to the redundancy repair scheme of the given memory chip ind Representing the ratio of the number of successful repair of the fault units to the total number of the fault units, u, which are obtained based on the mathematical model and correspond to the redundancy repair scheme of the given memory chip ind Representing the sum of the number of abscissas of the fault units to be repaired and the number of ordinates of the fault units to be repaired in the redundancy repair scheme of the given memory chip, c ind Representing the product of the number of abscissas of the faulty cells to be repaired and the number of ordinates of the faulty cells to be repaired in the given memory chip redundancy repair scheme, eta 1 、η 2 And eta 3 Respectively representing the adjustable coefficients.
In one possible design, η 1 Take the value of 10, eta 2 Take the value of 40, eta 3 The value is 1.
In one possible design, the primary repair requirements include a row repair priority requirement, a column repair priority requirement, a spare row number requirement for row repair, a spare column number requirement for column repair, and/or a repair generated cross point number requirement.
In one possible design, the genetic patterns include selective patterns, crossover patterns, and/or mutation patterns.
In one possible design, when the genetic patterns include a selection pattern, a crossover pattern, and a mutation pattern, the selection pattern employs a roulette selection pattern, the crossover pattern employs a single point crossover pattern, and the mutation pattern employs a single point mutation pattern.
In one possible design, the genetic algorithm-based operational flow includes:
and opening an operation flow based on a genetic algorithm in a multithreaded parallel mode.
In a second aspect, a generating device of a redundancy repair scheme of a memory chip based on a genetic algorithm is provided, which comprises a data acquisition module, a parameter configuration module, a calculation and customization module, an algorithm starting module and an optimal scheme determining module;
the data acquisition module is used for acquiring basic parameters and basic repair requirements of a memory chip to be repaired, wherein the basic parameters comprise the number SR of spare rows for redundancy repair of the memory chip, the number SC of spare columns for redundancy repair of the memory chip, the total number FN of fault units and a two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N M represents the total number of the abscissa of the fault unit, N represents the total number of the ordinate of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Representing the nth faulty cell ordinate;
the parameter configuration module is in communication connection with the data acquisition module and is used for configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise evolution times g, population scale p and genetic modes;
the calculation customization module is in communication connection with the data acquisition module and is used for customizing the fitness calculation mode of the population individuals according to the basic repair requirement;
the algorithm starting module is respectively in communication connection with the parameter configuration module and the calculation customization module, is used for starting an operation flow based on a genetic algorithm according to the basic parameters, the genetic parameters and the fitness calculation mode, and specifically comprises a population initial creation sub-module, a fitness calculation sub-module, a population individual storage sub-module and a population iteration update sub-module;
the population initial creation submodule is in communication connection with the fitness calculation submodule and is used for randomly creating an initial population G according to the basic parameters and the population scale p 0 Then taking the initial population as the current population, and starting the fitness calculation submodule, wherein the initial populationRepresents a positive integer less than or equal to p, < >>Indicate->Individuals of individual population and have->Representing the->The abscissa set of the fault units to be repaired of individuals in each group is +.>Representing the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +.>The total number of elements is less than or equal to the number of spare columns SC, the to-be-repairedComplex failure cell ordinate set->The total number of elements of (2) is less than or equal to the spare row number SR;
the fitness computing sub-module is in communication connection with the population individual storage sub-module and is used for regarding each population individual in the current population as a given memory chip redundancy repair scheme, computing the fitness value of each population individual by applying the fitness computing mode, and then starting the population individual storage sub-module;
the population individual preservation submodule is in communication connection with the population iteration updating submodule and is used for selecting the population individual with the maximum fitness value from the current population, preserving the population individual and then starting the population iteration updating submodule;
The population iteration updating sub-module is in communication connection with the fitness computing sub-module and is used for carrying out iteration updating on the current population by applying the genetic mode to obtain a new current population, and starting the fitness computing sub-module again until the iteration times are equal to the evolution times g;
the optimal scheme determining module is in communication connection with the algorithm starting module and is used for selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
In a third aspect, the present invention provides a computer device, including a memory, a processor and a transceiver, which are connected in communication in sequence, where the memory is configured to store a computer program, the transceiver is configured to send and receive a message, and the processor is configured to read the computer program, and execute the method for generating a redundancy repair scheme for a memory chip according to the first aspect or any possible design in the first aspect.
In a fourth aspect, the present invention provides a computer readable storage medium having instructions stored thereon which, when executed on a computer, perform a method of generating a redundancy repair scheme for a memory chip as described in the first aspect or any of the possible designs of the first aspect.
In a fifth aspect, the present invention provides a computer program product comprising instructions which, when run on a computer, cause the computer to perform the memory chip redundancy repair scheme generation method as described in the first aspect or any of the possible designs of the first aspect.
The beneficial effect of above-mentioned scheme:
(1) The invention creatively provides a new scheme for rapidly and accurately generating an optimal memory chip redundancy repair scheme, namely, a genetic parameter and custom population individual fitness calculation mode are configured according to basic parameters and basic repair requirements of a memory chip to be repaired, and then an operation flow based on a genetic algorithm is started according to the basic parameters, the genetic parameters and the fitness calculation mode: calculating fitness values of individuals of each population- > saving the individuals of the population with the largest fitness value- > iterative population updating, sequentially cycling until reaching the target evolution times, and finally selecting the individuals of the population with the largest fitness value from all the saved individuals of the population as a final memory chip redundancy repair scheme, so that all possible solutions can be traversed by utilizing strong randomness of a genetic algorithm and a search mechanism taking the population as a unit, and finally, quickly and accurately searching the best memory chip redundancy repair scheme from all the possibilities;
(2) The method also provides a set of accurate and customizable fitness computing mode, which can be adjusted according to the specific conditions of specific memory chips, namely the algorithm framework is universal, the design of the fitness computing mode has diversity and customizable, when facing different types of memory chips, if the requirements of target solutions are changed, only the computing components of the fitness computing formula need to be modified, for example: the method is designed with the aim of minimum number of rows and columns and minimum number of crossing points, so that the solution space is effectively converged according to the artificial design direction, and the optimal repair strategy is efficiently, quickly and accurately found out from various repair schemes;
(3) The algorithm can jump out the local optimum through continuous iterative search in the form of probability and mutation operation;
(4) The speed is high: because the genetic algorithm is a search taking the population as a unit, the parallelization is simpler to realize than other optimization algorithms, and the search efficiency is higher, so that the parallelization is very easy to realize in programming, the algorithm running time can be greatly shortened, the repair efficiency is improved, and the practical application and popularization are facilitated.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for generating a redundancy repair scheme of a memory chip based on a genetic algorithm according to an embodiment of the present application.
Fig. 2 is a schematic diagram of an operation flow based on a genetic algorithm according to an embodiment of the present application.
Fig. 3 is an exemplary diagram of iteration of a single point crossover in a genetic algorithm according to an embodiment of the present application.
Fig. 4 is an exemplary diagram of iteration of a single point mutation mode in a genetic algorithm according to an embodiment of the present application.
Fig. 5 is a schematic structural diagram of a memory chip redundancy repair scheme generating device based on a genetic algorithm according to an embodiment of the present application.
Fig. 6 is a schematic structural diagram of a computer device according to an embodiment of the present application.
Detailed Description
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the present application will be briefly described below with reference to the accompanying drawings and the description of the embodiments or the prior art, and it is obvious that the following description of the structure of the drawings is only some embodiments of the present application, and other drawings can be obtained according to these drawings without inventive effort to a person skilled in the art. It should be noted that the description of these examples is for aiding in understanding the present application, but is not intended to limit the present application.
It should be understood that although the terms first and second, etc. may be used herein to describe various objects, these objects should not be limited by these terms. These terms are only used to distinguish one object from another. For example, a first object may be referred to as a second object, and similarly a second object may be referred to as a first object, without departing from the scope of example embodiments of the invention.
It should be understood that for the term "and/or" that may appear herein, it is merely one association relationship that describes an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: three cases of A alone, B alone or both A and B exist; as another example, A, B and/or C, can represent the presence of any one of A, B and C or any combination thereof; for the term "/and" that may appear herein, which is descriptive of another associative object relationship, it means that there may be two relationships, e.g., a/and B, it may be expressed that: the two cases of A and B exist independently or simultaneously; in addition, for the character "/" that may appear herein, it is generally indicated that the context associated object is an "or" relationship.
Examples:
as shown in fig. 1, the method for generating a redundancy repair scheme for a memory chip provided in the first aspect of the present embodiment and based on a genetic algorithm may be performed by, but not limited to, a computer device with a certain computing resource, for example, a platform server, a personal computer (Personal Computer, PC, refer to a multipurpose computer with a size, price and performance suitable for personal use, a desktop computer, a notebook computer, a small notebook computer, a tablet computer, an ultrabook, etc. all belong to a personal computer), a smart phone, a personal digital assistant (Personal Digital Assistant, PDA) or an electronic device such as a wearable device. As shown in fig. 1, the method for generating the redundancy repair scheme of the memory chip may include, but is not limited to, the following steps S1 to S5.
S1, acquiring basic parameters and basic repair requirements of a memory chip to be repaired, wherein the basic parameters comprise, but are not limited to, the number of standby rows SR for redundant repair of the memory chip, the number of standby columns SC for redundant repair of the memory chip, the total number of fault units FN and a two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N And the like, M represents the total number of the abscissas of the fault unit, N represents the total number of the ordinates of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Indicating the nth faulty cell ordinate.
In the step S1, the memory chip to be repaired is the target memory chip of the first step and the second step in the redundant repair process, so that the basic parameters can be obtained in a conventional manner. The basic repair requirements are used for reflecting the user policy of the redundancy repair, and specifically include, but are not limited to, a row repair priority requirement, a column repair priority requirement, a spare line number requirement for row repair, a spare column number requirement for column repair, and/or a cross point number requirement generated by repair, which can be edited by a conventional man-machine interaction mode.
S2, configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise, but are not limited to, evolution times g, population scale p, genetic modes and the like.
In the step S2, the specific configuration rule of the genetic parameter may be a preset artificial rule, for example, according to the total number of fault units FN, the total number of fault units abscissa M, the total number of fault units ordinate N, etc., the suitable evolutionary number g (FN, M, N), the population size p (FN, M, N), or the genetic manner may be determined based on a preset function with variables FN, M, and N. In particular, the genetic means include, but are not limited to, a selection means, a crossover means, and/or a mutation means, wherein the selection means may be, but are not limited to, a roulette selection means, the crossover means may be, but are not limited to, a single point crossover means, and the mutation means may be, but are not limited to, a single point mutation means. The roulette selection mode, the single-point crossing mode and the single-point mutation mode are all common genetic iterative operators in the existing genetic algorithm.
S3, customizing an adaptability calculation mode of the population individuals according to the basic repair requirement.
In the step S3, the fitness is used to reflect the quality of the repair policy when the individuals of the corresponding population are used as the redundancy repair scheme of the given memory chip, and the larger the fitness value is, the better the repair policy is, and the worse the repair policy is, otherwise. Specifically, according to the basic repair requirement, the fitness calculation mode of the population individuals is customized, including but not limited to: firstly, establishing a corresponding mathematical model aiming at the basic repair requirement, wherein the mathematical model is a simulation model for performing repair operation for meeting the basic repair requirement on a fault unit in a storage chip based on a given storage chip redundancy repair scheme; and then customizing the following fitness calculation modes of population individuals based on the mathematical model:
wherein F is ind Representing the fitness value s corresponding to the redundancy repair scheme of the given memory chip ind Representing a ratio of a number of successful repair of the failed cells to a total number of failed cells (the ratio to F ind Positive correlation to agree: the more the number of successful repair of the fault unit is, the larger the ratio is, the larger the fitness value is, the more excellent the repair strategy is, and the worse the repair strategy is, u ind Representing the number of abscissas of faulty cells to be repaired (which is directly equal to the number of spare columns used for repair) and the number of faulty cells to be repaired in the given memory chip redundancy repair schemeThe sum of the ordinate numbers of the fault units (which is directly equal to the spare line data for repair) (the sum value is equal to F) ind Negative correlation to agree: the smaller the total number of spare ranks used for repair, the fewer the number of redundant resources used, the smaller the sum value, the greater the fitness value, the more excellent the repair strategy, and vice versa), c ind Representing the product of the number of the abscissas of the fault units to be repaired and the number of the ordinates of the fault units to be repaired (the product value is equal to F ind Negative correlation to agree: the smaller the spare line product used for repairing is, the fewer the generated line crossing points are, the smaller the product value is, the larger the fitness value is, the more excellent the repairing strategy is, and otherwise, the worse the repairing strategy is; for example, when the total number of spare rows and spare columns used in the two schemes is equal, the smaller the number of intersections generated, the larger the fitness value, the more excellent the repair strategy), η 1 、η 2 And eta 3 Respectively representing the adjustable coefficients. The aforementioned adjustable coefficient eta 1 、η 2 And eta 3 The fitness ratio of each part is convenient to adjust and can be set manually in advance; preferably, eta 1 Take the value of 10, eta 2 Take the value of 40, eta 3 The value is 1. In addition, the establishment details of the mathematical model can be derived by referring to the conventional mathematical modeling mode, and corresponding mathematical models (the ratio s at the moment) can be respectively established according to different basic repair requirements ind Taking the minimum of the ratios corresponding to these models).
S4, starting an operation flow based on a genetic algorithm according to the basic parameters, the genetic parameters and the fitness calculation mode and the following steps S40-S43.
S40, randomly creating an initial population G according to the basic parameters and the population scale p 0 Then, step S41 is performed with the initial population as the current population, wherein the initial populationRepresents a positive integer less than or equal to p, < >>Indicate->Individuals of individual population and have->Representing the->The abscissa set of the fault units to be repaired of individuals in each population is provided withRepresenting the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +.>The total number of elements is less than or equal to the number of spare columns SC, the ordinate set of the fault units to be repaired +.>The total number of elements of (2) is equal to or less than the spare row number SR.
In the step S40, the initial population G 0 May include, but is not limited to: from said set of fault unit abscissas F x ＝{x 1 ,x 2 ,…,x m ,…,x M Randomly selecting p different sets of abscissas (these sets are used as the sets of abscissas of the faulty unit to be repaired), and from the sets of abscissas of the faulty unit F y ＝{y 1 ,y 2 ,…,y n ,…,y N Randomly choose p different sets of ordinate from each other (thisThe subsets are used as ordinate sets of fault units to be repaired, and finally the p abscissa subsets and the p ordinate subsets are in one-to-one correspondence to form the initial population
S41, regarding each individual in the current population as a given memory chip redundancy repair scheme, calculating the fitness value of each individual in the current population by applying the fitness calculation mode, and then executing step S42.
S42, selecting population individuals with the maximum fitness value from the current population, storing the population individuals, and then executing step S43.
S43, carrying out iterative updating on the current population by applying the genetic mode to obtain a new current population, and returning to the step S41 until the iterative times are equal to the evolution times g.
In the step S43, when the genetic means includes a selection means, a crossover means and a mutation means, the genetic means is applied to iteratively update the current population to obtain a new current population, which specifically includes the following means (a) - (C).
(A) Roulette selection mode: firstly, calculating the weight of the sum of all fitness values occupied by the fitness values of the individuals in each population:in (1) the->Representation and said->The weight corresponding to each individual population is that,representing the->Fitness value of individual population, j represents a positive integer less than or equal to p, ++>The fitness value of the individuals of the jth population is represented; then taking the weight as the probability of the corresponding population individuals to be inherited to the next generation, and calculating the cumulative probability according to the following formula: />In (1) the->Representation and said->Cumulative probability corresponding to individual population, k represents +.sub.f or less>Positive integer of>Representing weights corresponding to the kth population of individuals; and then in interval [0,1 ]]Generating a random number r therein, if +.>Then select population individuals +.>And (5) inheriting the plant to the next generation population, otherwise, selecting to meet the condition:is->Genetic transmission into the next generation population (++>Represents more than 1 and less than or equal to- >Positive integers of (a).
(B) Single point crossing mode: and randomly selecting two population individuals, and carrying out partial exchange on the row repair and column repair schemes adopted in the two population individuals to obtain two brand-new population individuals and inherit the two brand-new population individuals into the next generation population. As shown in fig. 3, the two populations of individuals are: ind 1 ＝{{x 1 ,x 3 ,x 4 },{y 1 ,y 2 ,y 4 } and ind 2 ＝{{x 1 ,x 2 ,x 3 ,x 4 },{y 2 ,y 4 Randomly selecting position points in the abscissa and ordinate sets for cutting and exchanging the right part, for example, selecting a second element, and obtaining new population individuals after exchanging as follows: ind' 1 ＝{{x 1 ,x 2 ,x 3 ,x 4 },{y 1 ,y 4 } and ind' 2 ＝{{x 1 ,x 3 ,x 4 },{y 2 ,y 4 }}。
(C) Single point mutation mode: randomly selecting individuals of a population, partially modifying a repair scheme used in the individuals of the population, obtaining a brand-new population of individuals and inheriting the individuals of the brand-new population into a next generation population. As shown in FIG. 4, ind for the population of individuals 1 ＝{{x 1 ,x 3 ,x 4 },{y 1 ,y 2 ,y 4 Randomly selecting a position in the abscissa set and the ordinate set to mutate to obtain a new population of individuals: ind' 1 ＝{{x 1 ,x′ 3 ,x 4 },{y 1 ,y′ 2 ,y 4 }|x′ 3 ∈F x ,y′ 2 ∈F y }。
In the step S4, in order to further shorten the algorithm running time and improve the scheme iteration efficiency, preferably, the operation flow based on the genetic algorithm includes, but is not limited to: and starting an operation flow based on a genetic algorithm in a multithreading parallel mode, wherein the corresponding relation between the multithreading and all individuals in the population is one-to-many relation.
S5, selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
In the step S5, since the population iteration is performed once every time the population individuals are saved in the operation flow based on the genetic algorithm, g population individuals can be saved, and then the population individuals with the largest fitness value are selected from the g population individuals as the final redundancy repair scheme of the memory chip.
The method for generating the redundancy repair scheme of the memory chip based on the genetic algorithm described in the steps S1 to S5 provides a new scheme for quickly and accurately generating the redundancy repair scheme of the optimal memory chip, namely, a genetic parameter and a custom population individual fitness calculation mode are configured according to basic parameters and basic repair requirements of the memory chip to be repaired, and then an operation flow based on the genetic algorithm is started according to the basic parameters, the genetic parameters and the fitness calculation mode: calculating fitness value- > saving population individuals- > iterative updating of population individuals with the largest fitness value of each population individual- > sequentially circulating until reaching target evolution times, and finally selecting the population individuals with the largest fitness value from all saved population individuals as a final memory chip redundancy repair scheme, so that all possible solutions can be traversed by utilizing strong randomness of a genetic algorithm and a search mechanism taking the population as a unit, and finally, the optimal memory chip redundancy repair scheme is quickly and accurately sought from all the possibilities, thereby being convenient for practical application and popularization.
As shown in fig. 5, in a second aspect of the present embodiment, a virtual device for implementing the method for generating a redundancy repair scheme of a memory chip according to the first aspect is provided, where the virtual device includes a data acquisition module, a parameter configuration module, a calculation customization module, an algorithm opening module, and an optimal scheme determination module;
the data acquisition module is used for acquiring basic parameters and basic repair requirements of the memory chip to be repaired, wherein the basic parameters compriseThe number of spare rows SR for redundancy repair of the memory chip, the number of spare columns SC for redundancy repair of the memory chip, the total number of fault units FN and the two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N M represents the total number of the abscissa of the fault unit, N represents the total number of the ordinate of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Representing the nth faulty cell ordinate;
the parameter configuration module is in communication connection with the data acquisition module and is used for configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise evolution times g, population scale p and genetic modes;
The calculation customization module is in communication connection with the data acquisition module and is used for customizing the fitness calculation mode of the population individuals according to the basic repair requirement;
the algorithm starting module is respectively in communication connection with the parameter configuration module and the calculation customization module, is used for starting an operation flow based on a genetic algorithm according to the basic parameters, the genetic parameters and the fitness calculation mode, and specifically comprises a population initial creation sub-module, a fitness calculation sub-module, a population individual storage sub-module and a population iteration update sub-module;
the population initial creation submodule is in communication connection with the fitness calculation submodule and is used for randomly creating an initial population G according to the basic parameters and the population scale p 0 Then taking the initial population as the current population, and starting the fitness calculation submodule, wherein the initial populationRepresenting p or lessPositive integer>Indicate->Individuals of individual population and have->Representing the->The abscissa set of the fault units to be repaired of individuals in each group is +.>Representing the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +. >The total number of elements is less than or equal to the number of spare columns SC, the ordinate set of the fault units to be repaired +.>The total number of elements of (2) is less than or equal to the spare row number SR;
the fitness computing sub-module is in communication connection with the population individual storage sub-module and is used for regarding each population individual in the current population as a given memory chip redundancy repair scheme, computing the fitness value of each population individual by applying the fitness computing mode, and then starting the population individual storage sub-module;
the population individual preservation submodule is in communication connection with the population iteration updating submodule and is used for selecting the population individual with the maximum fitness value from the current population, preserving the population individual and then starting the population iteration updating submodule;
the population iteration updating sub-module is in communication connection with the fitness computing sub-module and is used for carrying out iteration updating on the current population by applying the genetic mode to obtain a new current population, and starting the fitness computing sub-module again until the iteration times are equal to the evolution times g;
the optimal scheme determining module is in communication connection with the algorithm starting module and is used for selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
The working process, working details and technical effects of the foregoing device provided in the second aspect of the present embodiment may refer to the method for generating a redundancy repair scheme for a memory chip described in the first aspect, which are not described herein again.
As shown in fig. 6, a third aspect of the present embodiment provides a computer device for executing the method for generating a redundancy repair scheme of a memory chip according to the first aspect, which includes a memory, a processor, and a transceiver that are sequentially communicatively connected, where the memory is configured to store a computer program, the transceiver is configured to send and receive a message, and the processor is configured to read the computer program, and execute the method for generating a redundancy repair scheme of a memory chip according to the first aspect. By way of specific example, the Memory may include, but is not limited to, random-Access Memory (RAM), read-Only Memory (ROM), flash Memory (Flash Memory), first-in first-out Memory (First Input First Output, FIFO), and/or first-in last-out Memory (First Input Last Output, FILO), etc.; the processor may be, but is not limited to, a microprocessor of the type STM32F105 family. In addition, the computer device may include, but is not limited to, a power module, a display screen, and other necessary components.
The working process, working details and technical effects of the foregoing computer device provided in the third aspect of the present embodiment may refer to the method for generating a redundancy repair scheme for a memory chip described in the first aspect, which are not described herein again.
A fourth aspect of the present embodiment provides a computer-readable storage medium storing instructions containing the method for generating a redundancy repair scheme for a memory chip according to the first aspect, i.e. the computer-readable storage medium has instructions stored thereon, which when executed on a computer, perform the method for generating a redundancy repair scheme for a memory chip according to the first aspect. The computer readable storage medium refers to a carrier for storing data, and may include, but is not limited to, a floppy disk, an optical disk, a hard disk, a flash Memory, and/or a Memory Stick (Memory Stick), where the computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable devices.
The working process, working details and technical effects of the foregoing computer readable storage medium provided in the fourth aspect of the present embodiment may refer to the method for generating a redundancy repair scheme for a memory chip as described in the first aspect, which are not described herein again.
A fifth aspect of the present embodiment provides a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of generating a memory chip redundancy repair scheme according to the first aspect. Wherein the computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus.
Finally, it should be noted that: the foregoing description is only of the preferred embodiments of the invention and is not intended to limit the scope of the invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A method for generating a memory chip redundancy repair scheme based on a genetic algorithm is characterized by comprising the following steps:
obtaining basic parameters and basic repair requirements of a memory chip to be repaired, wherein the basic parameters comprise a memory module for storingThe number of spare rows SR of the chip redundancy repair, the number of spare columns SC for the memory chip redundancy repair, the total number of fault units FN, and the two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N M represents the total number of the abscissa of the fault unit, N represents the total number of the ordinate of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Representing the nth faulty cell ordinate;
configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise evolution times g, population scale p and genetic modes;
customizing an adaptability calculation mode of population individuals according to the basic restoration requirement;
according to the basic parameters, the genetic parameters and the fitness calculation mode, starting an operation flow based on a genetic algorithm according to the following steps S40-S43:
s40, randomly creating an initial population G according to the basic parameters and the population scale p 0 Then, step S41 is performed with the initial population as the current population, wherein the initial population Represents a positive integer less than or equal to p, < >>Indicate->Individual groupIndividuals and have-> Representing the->The abscissa set of the fault units to be repaired of individuals in each group is +.> Representing the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +. >The total number of elements is less than or equal to the number of spare columns SC, the ordinate set of the fault units to be repaired +.>The total number of elements of (2) is less than or equal to the spare row number SR;
s41, regarding each population individual in the current population as a given memory chip redundancy repair scheme, calculating the fitness value of each population individual by applying the fitness calculation mode, and then executing step S42;
s42, selecting population individuals with the maximum fitness value from the current population, storing the population individuals, and then executing step S43;
s43, carrying out iterative updating on the current population by applying the genetic mode to obtain a new current population, and returning to the step S41 until the iterative times are equal to the evolution times g;
and selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
2. The method for generating a redundant repair scheme for a memory chip according to claim 1, wherein customizing the fitness calculation mode of the population individuals according to the basic repair requirement comprises:
establishing a corresponding mathematical model aiming at the basic repair requirement, wherein the mathematical model refers to a simulation model for performing repair operation for meeting the basic repair requirement on a fault unit in a storage chip based on a given storage chip redundancy repair scheme;
Based on the mathematical model, customizing the following fitness calculation mode of population individuals:
wherein F is ind Representing the fitness value s corresponding to the redundancy repair scheme of the given memory chip ind Representing the ratio of the number of successful repair of the fault units to the total number of the fault units, u, which are obtained based on the mathematical model and correspond to the redundancy repair scheme of the given memory chip ind Representing the sum of the number of abscissas of the fault units to be repaired and the number of ordinates of the fault units to be repaired in the redundancy repair scheme of the given memory chip, c ind Representing the product of the number of abscissas of the faulty cells to be repaired and the number of ordinates of the faulty cells to be repaired in the given memory chip redundancy repair scheme, eta 1 、η 2 And eta 3 Respectively representing the adjustable coefficients.
3. The method for generating a redundancy repair scheme for a memory chip as claimed in claim 2, wherein η is 1 Take the value of 10, eta 2 Take the value of 40, eta 3 The value is 1.
4. The method according to claim 1, wherein the basic repair requirement includes a row repair priority requirement, a column repair priority requirement, a spare line number requirement for row repair, a spare column number requirement for column repair, and/or a number of crossing points requirement generated by repair.
5. The method of claim 1, wherein the genetic patterns include a selective pattern, a crossover pattern, and/or a mutation pattern.
6. The method of claim 5, wherein when the genetic patterns include a selection pattern, a crossing pattern and a mutation pattern, the selection pattern is a roulette selection pattern, the crossing pattern is a single-point crossing pattern, and the mutation pattern is a single-point mutation pattern.
7. The method for generating a redundancy repair scheme for a memory chip according to claim 1, wherein the operation flow based on the genetic algorithm comprises:
and opening an operation flow based on a genetic algorithm in a multithreaded parallel mode.
8. The device for generating the redundancy repair scheme of the memory chip based on the genetic algorithm is characterized by comprising a data acquisition module, a parameter configuration module, a calculation customization module, an algorithm starting module and an optimal scheme determining module;
the data acquisition module is used for acquiring basic parameters and basic repair requirements of the memory chip to be repaired, wherein the basic parameters comprise redundancy repair of the memory chip The number of spare rows SR, the number of spare columns SC for redundancy repair of the memory chip, the total number of fault units FN and the two-dimensional coordinate set F of the fault units xy ＝{(x 1 ,y 1 ),(x 2 ,y 2 ),…,(x m ,y n ) …, fault unit abscissa set F x ＝{x 1 ,x 2 ,…,x m ,…,x M Sum of fault units ordinate set F y ＝{y 1 ,y 2 ,…,y n ,…,y N M represents the total number of the abscissa of the fault unit, N represents the total number of the ordinate of the fault unit, M represents a positive integer less than or equal to M, and x m Represents the m-th fault unit abscissa, N represents a positive integer less than or equal to N, y n Representing the nth faulty cell ordinate;
the parameter configuration module is in communication connection with the data acquisition module and is used for configuring genetic parameters according to the basic parameters, wherein the genetic parameters comprise evolution times g, population scale p and genetic modes;
the calculation customization module is in communication connection with the data acquisition module and is used for customizing the fitness calculation mode of the population individuals according to the basic repair requirement;
the algorithm starting module is respectively in communication connection with the parameter configuration module and the calculation customization module, is used for starting an operation flow based on a genetic algorithm according to the basic parameters, the genetic parameters and the fitness calculation mode, and specifically comprises a population initial creation sub-module, a fitness calculation sub-module, a population individual storage sub-module and a population iteration update sub-module;
The population initial creation submodule is in communication connection with the fitness calculation submodule and is used for randomly creating an initial population G according to the basic parameters and the population scale p 0 Then taking the initial population as the current population, and starting the fitness calculation submodule, wherein the initial population Represents a positive integer less than or equal to p, < >>Indicate->Individuals of individual population and have-> Representing the->The abscissa set of the fault units to be repaired of individuals in each group is +.> Representing the->The ordinate sets of the fault units to be repaired of individuals in the individual groups are +.>The abscissa set of the fault unit to be repaired is +.>The total number of elements is less than or equal to the number of spare columns SC, the ordinate set of the fault units to be repaired +.>The total number of elements of (2) is less than or equal to the spare row number SR;
the fitness computing sub-module is in communication connection with the population individual storage sub-module and is used for regarding each population individual in the current population as a given memory chip redundancy repair scheme, computing the fitness value of each population individual by applying the fitness computing mode, and then starting the population individual storage sub-module;
The population individual preservation submodule is in communication connection with the population iteration updating submodule and is used for selecting the population individual with the maximum fitness value from the current population, preserving the population individual and then starting the population iteration updating submodule;
the population iteration updating sub-module is in communication connection with the fitness computing sub-module and is used for carrying out iteration updating on the current population by applying the genetic mode to obtain a new current population, and starting the fitness computing sub-module again until the iteration times are equal to the evolution times g;
the optimal scheme determining module is in communication connection with the algorithm starting module and is used for selecting the population individuals with the largest fitness value from all the stored population individuals as a final memory chip redundancy repair scheme.
9. A computer device comprising a memory, a processor and a transceiver in communication connection in sequence, wherein the memory is configured to store a computer program, the transceiver is configured to send and receive messages, and the processor is configured to read the computer program and execute the method for generating a redundancy repair scheme for a memory chip according to any one of claims 1 to 7.
10. A computer-readable storage medium having instructions stored thereon that, when executed on a computer, perform the method of generating a memory chip redundancy repair scheme according to any one of claims 1 to 7.
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| CN117831596A (en) * | 2024-03-05 | 2024-04-05 | 悦芯科技股份有限公司 | Repairing method of sparse failure unit circuit of memory chip |
| CN118335161A (en) * | 2024-06-17 | 2024-07-12 | 悦芯科技股份有限公司 | Memory chip redundant circuit repairing method based on genetic algorithm |
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| CN117831596A (en) * | 2024-03-05 | 2024-04-05 | 悦芯科技股份有限公司 | Repairing method of sparse failure unit circuit of memory chip |
| CN117831596B (en) * | 2024-03-05 | 2024-05-24 | 悦芯科技股份有限公司 | Repairing method of sparse failure unit circuit of memory chip |
| CN118335161A (en) * | 2024-06-17 | 2024-07-12 | 悦芯科技股份有限公司 | Memory chip redundant circuit repairing method based on genetic algorithm |
| CN118335161B (en) * | 2024-06-17 | 2024-09-03 | 悦芯科技股份有限公司 | Memory chip redundant circuit repairing method based on genetic algorithm |
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