CN117152149A - Edge smoothness detection method and system for wafer dicing - Google Patents
Edge smoothness detection method and system for wafer dicing Download PDFInfo
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Abstract
The invention provides an edge smoothness detection method and system for wafer cutting, which relate to the technical field of semiconductors and comprise the following steps: collecting wafer images, performing binarization processing to obtain binarized images, performing matching fitting on a plurality of characteristic points in the binarized images to obtain fitting edges, performing cutting edge smoothness recognition to obtain first smoothness parameters, collecting surface morphology parameters, performing three-dimensional modeling, performing multi-level division to obtain a plurality of wafer section images, obtaining a plurality of broken areas, performing cutting edge smoothness recognition to obtain second smoothness parameters, performing cutting dimension smoothness recognition and calculation in combination with the designed section images to obtain third smoothness parameters, and combining the first smoothness parameters and the second smoothness parameters to obtain smoothness detection results. The invention solves the technical problems that the prior art cannot accurately evaluate the smoothness of the edge of the wafer after cutting, so that the cutting quality cannot be effectively controlled and the production efficiency is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an edge smoothness detection method and system for wafer dicing.
Background
The edge smoothness detection method for wafer dicing has important significance in the semiconductor industry, and with the continuous development of semiconductor technology, the edge smoothness of wafer dicing is particularly important for improving the performance and stability of chips. The traditional method mainly relies on visual judgment and simple rules, has more manual intervention, has strong subjectivity and low accuracy, and cannot accurately evaluate the smoothness of the edge of the cut wafer, so that the technical problems of incapability of effectively controlling the cutting quality and improving the production efficiency are caused.
Therefore, a new detection method is needed, and analysis and evaluation can be automatically performed on the wafer profile image, so that the detection efficiency is improved, the human error is reduced, and an effective technical means is provided for optimizing the cutting process and improving the product quality.
Disclosure of Invention
The application provides an edge smoothness detection method and an edge smoothness detection system for wafer cutting, and aims to solve the technical problems that the smoothness of the edge of a wafer after cutting cannot be accurately estimated, so that the cutting quality cannot be effectively controlled and the production efficiency is improved in the prior art.
In view of the above, the present application provides an edge smoothness detection method and system for wafer dicing.
In a first aspect of the present disclosure, an edge smoothness detection method for wafer dicing is provided, the method comprising: collecting a wafer image of a target wafer subjected to detection and subjected to cutting, and performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points; matching and fitting a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge; carrying out cutting edge smoothness identification according to the number of a plurality of deviated noise points to obtain a first smoothness parameter; collecting surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer section images; carrying out breaking area identification on the wafer section images to obtain a plurality of breaking areas, wherein each breaking area comprises breaking area size information; carrying out cutting edge smoothness identification according to the number of the plurality of deviated noise points and the plurality of broken areas to obtain a second smoothness parameter; and combining the plurality of wafer section images with the design section image of the target wafer, carrying out cutting size smoothness identification and calculation to obtain a third smoothness parameter, and combining the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
In another aspect of the present disclosure, there is provided an edge smoothness detection system for wafer dicing, the system being used in the above method, the system comprising: the wafer image acquisition module is used for acquiring a wafer image of a cut target wafer to be detected, performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points; the fitting edge acquisition module is used for carrying out matching fitting on a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge; the first smoothness acquisition module is used for carrying out cutting edge smoothness identification according to the number of a plurality of deviated noise points to obtain a first smoothness parameter; the profile image acquisition module is used for acquiring surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer profile images; the device comprises a breaking area acquisition module, a breaking area detection module and a breaking area detection module, wherein the breaking area acquisition module is used for carrying out breaking area identification on a plurality of wafer section images to obtain a plurality of breaking areas, and each breaking area comprises breaking area size information; the second smoothness acquisition module is used for carrying out cutting edge smoothness identification according to the number of the plurality of deviated noise points and the plurality of broken areas to obtain a second smoothness parameter; the detection result acquisition module is used for carrying out cutting size smoothness identification and calculation by combining the plurality of wafer section images with the design section image of the target wafer to obtain a third smoothness parameter, and combining the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
One or more technical schemes provided by the application have at least the following technical effects or advantages:
the method comprises the steps of collecting wafer images of a target wafer, fitting, counting the number of deviated noise points to identify smoothness of a cutting edge, obtaining a first smoothness parameter, dividing a wafer three-dimensional model and identifying a broken area through multiple layers, combining a second smoothness parameter, carrying out cutting size smoothness identification by combining the second smoothness parameter with a design section image, obtaining a third smoothness parameter, combining the first smoothness parameter, the second smoothness parameter and the third smoothness parameter to serve as a comprehensive smoothness detection result, realizing accurate assessment of the smoothness of the cutting edge of the wafer, providing effective monitoring and control means for the wafer cutting process, and achieving the technical effects of improving production efficiency and product quality.
The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.
Drawings
Fig. 1 is a schematic flow chart of an edge smoothness detection method for wafer dicing according to an embodiment of the present application;
Fig. 2 is a schematic diagram of an edge smoothness detection system for wafer dicing according to an embodiment of the present application.
Reference numerals illustrate: the device comprises a wafer image acquisition module 10, a fitting edge acquisition module 20, a first smoothness acquisition module 30, a section image acquisition module 40, a broken area acquisition module 50, a second smoothness acquisition module 60 and a detection result acquisition module 70.
Detailed Description
The embodiment of the application solves the technical problems that the prior art cannot accurately evaluate the smoothness of the edge after the wafer is cut, so that the cutting quality cannot be effectively controlled and the production efficiency is improved.
Having described the basic principles of the present application, various non-limiting embodiments of the present application will now be described in detail with reference to the accompanying drawings.
Example 1
As shown in fig. 1, an embodiment of the present application provides an edge smoothness detection method for wafer dicing, including:
collecting a wafer image of a target wafer subjected to detection and subjected to cutting, and performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points;
The cut target wafer is a rectangular wafer, the edge is a straight line, an image acquisition device, such as a high-resolution camera or a microscope camera, is used for image acquisition of the cut target wafer to be detected, and the acquired wafer image comprises a wafer and a background. The method comprises the steps of converting an acquired wafer image into a gray image by using a gray conversion method, adaptively selecting a threshold according to local characteristics of the image, classifying pixel values in the gray image by using the selected threshold to generate a binary image, wherein a wafer main body and a background are black points, and edges of wafer cutting form a plurality of characteristic points by taking chips, dust and the like generated by cutting as white points.
Matching and fitting a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge;
a plurality of feature points within the binarized image are matched fit using a RANSAC (Random Sample Consensus ) algorithm to obtain fit edges. The RANSAC algorithm can fit data robustly because it can eliminate the effect of outliers by the number of inliers, and in edge detection, a suitable fitting model can be estimated from feature points in the binarized image using the RANSAC algorithm to obtain the fitted edges.
The deviating noise points are characteristic points deviating from the fitted edge, and can be regarded as points generated by chips and dust generated by cutting, and the smaller the number is, the smaller the variance is, the smoother the cutting is.
Further, the method comprises the steps of:
randomly selecting two characteristic points from the plurality of characteristic points, and connecting the two characteristic points to serve as a first fitting edge line;
compensating the first fitting edge line by adopting an error range to obtain a first fitting edge range, and obtaining the number of characteristic points falling into the first fitting edge range to obtain a first number;
continuously randomly selecting two characteristic points, connecting the two characteristic points as second fitting edge lines, and obtaining a second number;
continuing iterative fitting until the preset fitting times are reached, and taking the fitting edge line corresponding to the maximum number as the fitting edge;
obtaining a fitting edge range of the fitting edge line, and dividing the fitting edge range to obtain a plurality of edge areas;
the number of feature points in the vicinity of the plurality of edge regions, which do not fall within the plurality of edge regions, is acquired as a plurality of offset noise point numbers, respectively, wherein the offset noise points are formed by chips generated during cutting.
And determining the position information of the characteristic points according to the acquired binarized image, recording the coordinates of the characteristic points, and randomly selecting two characteristic points from the characteristic point data set as a characteristic point data set, and connecting the two characteristic points through straight line segments to form a first fitting edge line.
An error range is defined according to the actual situation and the requirements, in which the feature points are considered to fall within the range of the first fitted edge line, and the first fitted edge line is compensated using the defined error range, which means that the first fitted edge line is enlarged to contain the feature points within the error range. And determining the range of the first fitting edge line according to the compensated first fitting edge line, namely judging whether the characteristic points fall into the edge area or not. Traversing the characteristic point data set, counting the number of the positions of the characteristic points in a first fitting edge range, and taking the number of the characteristic points falling in the edge range as a first number for a subsequent edge smoothness identification process.
Through the step, according to the distribution condition of the characteristic points and the quantity of the characteristic points falling in the edge range, whether the first fitting edge line is close to the edge of the real wafer or not can be estimated, and further analysis and processing can be carried out on the first fitting edge line.
And randomly selecting the characteristic points from the characteristic point data set again, selecting two characteristic points as new candidate points, connecting the two selected characteristic points through straight line segments to form a second fitting edge line, and defining an error range based on the second fitting edge line to obtain a second fitting edge range. And traversing the characteristic point data set, and counting how many characteristic point positions are located in the second fitting edge range. The number of feature points falling within the edge range is regarded as a second number. In this way, the fitting edge lines can be generated for many times and the corresponding number of the characteristic points is counted, so that the quality and the accuracy of different fitting edge lines can be judged.
And (3) presetting a value as preset fitting times according to requirements, repeating the operations of randomly selecting two characteristic points, connecting to form a fitting edge line, counting the number of the characteristic points positioned in the fitting edge range and the like according to the method described in the previous steps, generating a new fitting edge line in each iteration, and calculating the number of the corresponding characteristic points. In the iterative process, the number of the feature points obtained by each fitting is compared with the maximum number recorded before, if the current fitting number is larger, the maximum number is updated, and the corresponding fitting edge line is recorded. And stopping the iterative process when the iterative times reach the preset fitting times. And selecting a fitting edge line corresponding to the maximum number of feature points, and taking the fitting edge line as a final fitting edge. Such edge lines are typically closer to the real wafer edge, while other edge lines may be due to data noise or other factors.
Using the calculated fitted edge line, its edge extent, i.e. the set of points on the straight line on which the fitted edge line lies, is determined. And (3) making equidistant cuts from the starting point to the end point of the fitted edge line by using a straight line perpendicular to the fitted edge line, so as to divide the fitted edge line into a plurality of small line segments, and dividing each small line segment into different parts by a perpendicular line intersecting the fitted edge line to form a plurality of edge areas.
And determining the range of each edge area according to the obtained plurality of edge areas. For each edge region, the feature point dataset is traversed and feature points located in the region but not falling within the edge region are screened out, primarily from debris and other noise generated during the cutting process. The number of these feature points is counted and taken as the number of offset noise points of the edge region.
Carrying out cutting edge smoothness identification according to the number of a plurality of deviated noise points to obtain a first smoothness parameter;
further, the method comprises the steps of:
calculating a variance of the number of the plurality of offset noise points;
processing and obtaining a sample noise point variance record based on the edge detection data record of the wafer cutting, and evaluating and obtaining a first smoothness parameter record of the sample;
constructing a mapping table of a sample noise point variance record and a sample first smoothness parameter record to obtain a first smoothness detector;
and identifying the variance of the number of the deviated noise points by adopting a first smoothing detector to obtain a first smoothness parameter.
For a plurality of offset noise point numbers, an average value thereof is calculated, and for each offset noise point number, a difference value between it and the average value is obtained by subtracting the average value calculation. For each difference value, it is squared to eliminate signs and emphasize the importance of the difference value. And summing the squared differences, dividing the result by the number of the number to obtain the variance of the number of the plurality of deviated noise points.
The variance provides a measure of the degree of variation in the distribution of the number of offset noise points, indicating that there is a significant difference in the number of offset noise points for each edge region if the variance is large, as compared to relatively more consistent number of offset noise points for each edge region if the variance is small.
Based on the edge detection data record of the wafer cutting, the number of the deviated noise points is collected around each edge area, the variance of the number of the deviated noise points in each edge area is calculated, and the variance value is recorded as a sample noise point variance record.
And smoothing the first fitting edge line by using the first fitting edge line as an initial edge line, for example, smoothing the first fitting edge line by using a curve fitting or filtering algorithm, calculating indexes such as fitting error, curvature and the like according to the smoothed edge line, obtaining a first smoothness parameter, recording the first smoothness parameter, and obtaining a first smoothness parameter record of a sample.
A series of data samples having different sample noise point variances and sample first smoothness parameter values are collected,
and creates a corresponding mapping table which can be represented as a table structure with the sample noise point variance as input and the sample first smoothness parameter record as the corresponding output. Using the constructed mapping table, a corresponding sample first smoothness parameter record may be looked up based on a given sample noise point variance value, obtaining a first smoothness detector that may infer a sample first smoothness parameter based on the sample noise point variance.
For each edge region, the variance of the number of its offset noise points is calculated. And taking the deviation noise number variance of each edge area as input, identifying by a first smoothing detector, and inquiring a corresponding sample first smoothness parameter record according to the constructed mapping table to serve as a first smoothness parameter of each edge area, wherein the parameters represent the smoothness degree of the edge area.
Collecting surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer section images;
the surface of the target wafer is inspected and measured using a measuring instrument, such as an optical microscope, a scanning electron microscope, etc., to obtain surface topography parameters, such as height data or topology information. And processing and converting the acquired surface morphology data by a point cloud registration method, a triangular mesh reconstruction method and the like, and generating a three-dimensional model of the wafer.
And determining the cutting position of each layer of the generated wafer three-dimensional model according to the thickness direction and the required layer number, for example, uniformly cutting, so as to divide the wafer into a plurality of layers, wherein each layer is rectangular, and a plurality of rectangular wafer section images are formed.
Carrying out breaking area identification on the wafer section images to obtain a plurality of breaking areas, wherein each breaking area comprises breaking area size information;
further, the method comprises the steps of:
processing to obtain a sample wafer profile image set based on the dicing detection record of the wafer;
identifying and identifying the broken areas in the sample wafer section image set to obtain a sample broken area identification result set;
based on semantic segmentation, constructing an encoder and a decoder, and training by adopting the sample wafer section image set and the sample shatter region identification result set to obtain a shatter region identifier;
and identifying and acquiring a plurality of broken areas, wherein the plurality of broken areas are obtained by identifying a plurality of wafer section images by adopting a broken area identifier.
And acquiring relevant records from the historical wafer cutting detection process, wherein the records comprise cutting parameters, cutting positions, cutting layer numbers and the like, randomly selecting a preset number of cutting layers on the cutting positions to serve as samples, cutting the wafer out on the selected cutting layers by using corresponding tools to form corresponding sample wafer section images, and integrating to form a data set containing a plurality of samples.
Identifying and marking broken areas in the cross-section images of the sample wafer through an image segmentation algorithm and an edge detection method, measuring the size of each area in the identified broken areas by using pixel counting, connected area analysis and the like, and sorting the broken area marks and the size results in the cross-section images of each sample wafer into a data set, wherein each sample in the data set comprises position information of the broken areas and corresponding size marks.
And constructing an encoder-decoder neural network architecture for realizing a semantic segmentation task, wherein the encoder is responsible for extracting and compressing characteristics of an input wafer profile image, and the decoder restores the characteristic image output by the encoder into a prediction image with the same size as the input image. The sample wafer profile image set is used as the input of training data, and the sample broken area recognition result set is combined as a corresponding label, wherein the label can be a binary mask image, broken areas are represented by white pixels, and the rest areas are represented by black pixels.
The appropriate loss function is selected to measure the difference between the predicted result and the real label, such as cross entropy loss function, dice loss function, etc., which can help network optimization to approach the accurate identification of the sample collapse region gradually during training.
Training the model using the constructed encoder-decoder structure and defined loss function, taking the sample wafer profile image set as input and the sample crumbling region identification result set as supervisory signal to guide the learning of the model during the training process, and adjusting parameters in the neural network to minimize the loss function by back propagation and optimization algorithms, such as random gradient descent.
The performance of the trained crumble region identifier is evaluated using a separate validation data set until a crumble region identifier that meets the requirements is obtained. The identifier is used for automatically detecting the broken areas in the wafer section images, so that the identification accuracy is improved, and the cost of manual marking is saved.
And inputting a plurality of wafer section images to be identified into a broken area identifier, and predicting each image by the identifier through forward propagation to obtain an identification result. For each wafer sectional image, post-processing such as thresholding operation, connected region analysis, etc. is performed based on the recognition result to extract each broken region. And combining the plurality of extracted crumbling areas to form a final crumbling area result set, wherein the result set contains the position information, the size information or other relevant attributes of each crumbling area.
Carrying out cutting edge smoothness identification according to the number of the plurality of deviated noise points and the plurality of broken areas to obtain a second smoothness parameter;
further, the method comprises the steps of:
calculating the ratio of the size of the plurality of shattered areas to the allowable smooth error size to obtain a plurality of ratios;
calculating to obtain the number of the crushing areas by adopting a plurality of ratios and combining the number of the crushing areas;
calculating the sum of the number of the plurality of deviated noise points to obtain the number of the noise points;
processing and obtaining a sample breaking area quantity set, a sample noise point quantity set and a sample second smoothness parameter set based on the cutting detection data record of the wafer;
training a second smooth detector by adopting the sample breaking area quantity set, the sample noise point quantity set and the sample second smoothness parameter set as training data;
and identifying the number of the broken areas and the number of the noise points by adopting the second smoothness detector to obtain a second smoothness parameter.
A criterion for measuring smoothness is set according to the requirement as a permissible smoothness error size. For each collapsed region, its size is determined by calculating its area or number of pixels. Dividing the size by the allowable smoothing error size yields a ratio that indicates how many times the size of the crumbling area corresponds to the smoothing error given the allowable smoothing error. Traversing the plurality of crumbling areas to obtain a data set containing a plurality of ratios.
Based on the weights of the different ratios, the multiple ratios and the number of the breaking areas are combined and calculated to obtain the final number of the breaking areas, and the number is used for describing the breaking degree in the sample wafer profile image set.
And carrying out summation operation on the plurality of deviated noise point numbers to obtain the sum of the noise point numbers, namely accumulating the deviated noise point numbers contained in all the crumbling areas, wherein the sum is used for measuring the surface quality problem in the sample wafer profile image set.
Preparing a data record of wafer cutting detection, wherein the data record comprises a wafer section image, breaking area information, noise point information, a second smoothness parameter and the like, and extracting and obtaining a sample breaking area quantity set, a sample noise point quantity set and a sample second smoothness parameter set from the data record.
And taking the sample breaking area number set, the sample noise point number set and the sample second smoothness parameter set as training data, wherein each sample corresponds to the related characteristic data (the breaking area number and the noise point number) and the target data (the second smoothness parameter), constructing a network structure of the second smooth detector based on a neural network, training by using the training data and a selected model, optimizing model parameters, predicting the second smoothness parameter best according to the breaking area number and the noise point number, evaluating the performance of the trained model by using a verification set, performing necessary model tuning, and acquiring the second smooth detector meeting the requirements after training is completed. The training process enables the model to learn the relation between the number of the crumbling areas and the noise points and the second smoothness parameter from the data, and can predict and judge on a new sample.
And inputting the number of the broken areas and the number of the noise points into a trained second smooth detector model, and performing prediction operation, wherein the result output by the model is the second smoothness parameter obtained by recognition. This parameter is used to characterize the smoothness of the cut edge, providing information about the wafer surface quality and topography.
And combining the plurality of wafer section images with the design section image of the target wafer, carrying out cutting size smoothness identification and calculation to obtain a third smoothness parameter, and combining the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
Further, the method comprises the steps of:
obtaining a design section image of the target wafer according to the design size of the target wafer;
processing to obtain a sample wafer profile image set based on the dicing inspection data record of the wafer;
combining a plurality of sample wafer section images in the sample wafer section image set and the design section image, and identifying the smoothness of the wafer cutting size to obtain a sample third smoothness parameter set;
training a third smoothing detector by adopting a sample wafer profile image set, a design profile image and a sample third smoothness parameter set;
Adopting a third smoothness detector to carry out smoothness identification on the plurality of wafer section images, and calculating the average value of a plurality of identification results to obtain a third smoothness parameter;
and combining the first smoothness parameter, the second smoothness parameter and the third smoothness parameter to serve as a smoothness detection result of the target wafer.
The design profile image of the target wafer is obtained by matching in a library of design profile images by known wafer design specifications or by obtaining the design dimensions of the target wafer, including diameter, thickness, and other critical dimension parameters from related documents.
A wafer dicing inspection data record including chipping area information, noise point information, and the like of the wafer is prepared, the data record including information about each position of the target wafer and dicing area. And analyzing the cutting detection data record, and extracting the position of the wafer, the coordinates of the cutting area and other necessary information. And positioning and marking the corresponding cutting area on the whole wafer according to the extracted position and coordinate information. And cutting out corresponding cutting area image fragments from the original wafer image by using the extracted cutting area position and coordinate information, and combining the image fragments to form a sample wafer section image set.
A set of sample wafer profile images is prepared, including a plurality of sample wafer profile images, and a design profile image of a target wafer is prepared as a reference. And (3) aligning each wafer image in the sample wafer profile image set with the design profile image by using an image registration algorithm, such as matching based on characteristic points, phase correlation and the like, and acquiring a sample third smoothness parameter set according to difference comparison after alignment.
Preparing a sample wafer profile image set, a design profile image and a corresponding sample third smoothness parameter set as training data, wherein each sample wafer profile image corresponds to the corresponding design profile image and the corresponding third smoothness parameter. The network architecture of the third smoothing detector is built based on a twin network, which is a special neural network structure and consists of two similar sub-networks, wherein one sub-network is used as a main branch for processing input data, the other sub-network is used as an auxiliary branch for processing reference data, and the main sub-network and the auxiliary branch sub-network share the same network architecture and weight parameters so as to learn the relevance between the input data and the reference data.
The sample wafer profile image set is used as the input of the main sub-network, and the design profile image is used as the input of the auxiliary sub-network. In the main sub-network, the characteristics of the cross-section image of the sample wafer are extracted through operations of a convolution layer, a pooling layer, a full connection layer and the like. In the auxiliary sub-network, the same operation is used to extract the features of the design profile image. And fusing the characteristics of the main sub-network and the auxiliary sub-network through methods such as a connection layer, splicing and the like, and predicting the fused characteristics by using an activation function at an output layer of the network to obtain an estimation result of the third smoothness parameter. By using a twin network, the similarity between the input data and the reference data can be better captured and the third smoothness parameter predicted therefrom.
Preparing a plurality of wafer section images as input data, carrying out smoothness identification on each wafer section image by using a trained third smoothness detector, summing the numerical values of the plurality of smoothness identification results, and dividing the numerical values by the number of samples to obtain a third smoothness parameter. The main purpose of using the average is to comprehensively consider the smoothness of a plurality of wafers, so as to obtain a comprehensive evaluation of the smoothness of the whole sample.
The first smoothness parameter, the second smoothness parameter, and the third smoothness parameter are obtained, and these parameters are normalized to ensure that they are within the same dimension, such as scaling them to the [0, 1] interval. The importance of each parameter to smoothness is set based on expert knowledge or by data analysis, giving each parameter a weight. And multiplying each parameter by a corresponding weight by using a weighted summation method, and summing to obtain a smoothness detection result of the target wafer.
Further, the training of the third smoothing detector includes:
constructing a third smooth detector based on a twin network, wherein the third smooth detector comprises two section image analysis channels and a full-connection layer, the weight of the two section image analysis channels is shared, and the input is a wafer section image and a design section image respectively;
And taking the sample wafer profile image set, the design profile image and the sample third smoothness parameter set as training input and output, and performing supervision training on the third smooth detector until convergence requirements are met, so as to obtain the third smooth detector.
Two identical profile image analysis channels are created, having identical network structures and parameters, which process the incoming wafer profile image and design profile image, respectively. And the two section image analysis channels use a weight sharing mode to ensure that parameters of the two channels are consistent so as to achieve alignment of features. And fusing the features extracted from the two section image analysis channels by using a splicing and adding mode, and adding a full-connection layer on the fused features for further processing the comprehensive features. The final output is connected to an activation function to obtain a prediction of the third smoothness parameter.
The third smoothing detector is based on a twin network architecture, a wafer profile image and a design profile image are processed and feature extracted through a profile image analysis channel with shared weight, then features extracted by the two channels are combined, and a final prediction result is generated through a full connection layer. Such a design enables the network to capture correlations between input data while reducing the amount of parameters and improving the efficiency and generalization ability of the model.
Preparing a sample wafer profile image set as input data, a corresponding design profile image set as auxiliary input of a network, and a corresponding sample third smoothness parameter set as target output of a model. A loss function is defined for supervised training, such as selecting a Mean Square Error (MSE), and in each training iteration, a third smoothness parameter of the model prediction is compared to the target output to calculate a loss value. And inputting the sample wafer profile image and the design profile image into a third smoothing detector, updating the weight and parameters of the network through optimization algorithms such as gradient descent and the like according to the calculated loss value, and repeating the training for a plurality of times until the training error meets the convergence requirement or reaches the preset training round number.
And evaluating the trained third smooth detector by using a verification set, performing model tuning, super-parameter adjustment or other improvement measures according to the evaluation result, and gradually learning the association between input data and target output by the model through an iterative training process so as to obtain the detector capable of accurately predicting the third smooth parameter.
In summary, the edge smoothness detection method for wafer dicing provided by the embodiment of the application has the following technical effects:
The method comprises the steps of collecting wafer images of a target wafer, fitting, counting the number of deviated noise points to identify smoothness of a cutting edge, obtaining a first smoothness parameter, dividing a wafer three-dimensional model and identifying a broken area through multiple layers, combining a second smoothness parameter, carrying out cutting size smoothness identification by combining the second smoothness parameter with a design section image, obtaining a third smoothness parameter, combining the first smoothness parameter, the second smoothness parameter and the third smoothness parameter to serve as a comprehensive smoothness detection result, realizing accurate assessment of the smoothness of the cutting edge of the wafer, providing effective monitoring and control means for the wafer cutting process, and achieving the technical effects of improving production efficiency and product quality.
Example two
Based on the same inventive concept as the edge smoothness detection method for wafer dicing in the foregoing embodiments, as shown in fig. 2, the present application provides an edge smoothness detection system for wafer dicing, the system comprising:
the wafer image acquisition module 10 is used for acquiring a wafer image of a cut target wafer to be detected, performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points;
The fitting edge acquisition module 20 is used for carrying out matching fitting on a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge;
the first smoothness obtaining module 30 is configured to identify smoothness of a cutting edge according to the number of a plurality of offset noise points, so as to obtain a first smoothness parameter;
the profile image acquisition module 40 is used for acquiring surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer profile images;
the breaking area acquisition module 50 is used for carrying out breaking area identification on the plurality of wafer section images to obtain a plurality of breaking areas, and each breaking area comprises breaking area size information;
the second smoothness obtaining module 60 is configured to identify smoothness of the cutting edge according to the number of the plurality of deviated noise points and the plurality of crumbling areas, and obtain a second smoothness parameter;
The detection result obtaining module 70 is configured to identify and calculate the cut size smoothness by combining the plurality of wafer section images with the design section image of the target wafer, obtain a third smoothness parameter, and combine the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
Further, the system also comprises a deviation noise point quantity acquisition module for executing the following operation steps:
randomly selecting two characteristic points from the plurality of characteristic points, and connecting the two characteristic points to serve as a first fitting edge line;
compensating the first fitting edge line by adopting an error range to obtain a first fitting edge range, and obtaining the number of characteristic points falling into the first fitting edge range to obtain a first number;
continuously randomly selecting two characteristic points, connecting the two characteristic points as second fitting edge lines, and obtaining a second number;
continuing iterative fitting until the preset fitting times are reached, and taking the fitting edge line corresponding to the maximum number as the fitting edge;
obtaining a fitting edge range of the fitting edge line, and dividing the fitting edge range to obtain a plurality of edge areas;
The number of feature points in the vicinity of the plurality of edge regions, which do not fall within the plurality of edge regions, is acquired as a plurality of offset noise point numbers, respectively, wherein the offset noise points are formed by chips generated during cutting.
Further, the system further comprises a first smoothness parameter obtaining module, so as to execute the following operation steps:
calculating a variance of the number of the plurality of offset noise points;
processing and obtaining a sample noise point variance record based on the edge detection data record of the wafer cutting, and evaluating and obtaining a first smoothness parameter record of the sample;
constructing a mapping table of a sample noise point variance record and a sample first smoothness parameter record to obtain a first smoothness detector;
and identifying the variance of the number of the deviated noise points by adopting a first smoothing detector to obtain a first smoothness parameter.
Further, the system further comprises a plurality of shatter region acquisition modules for executing the following operation steps:
processing to obtain a sample wafer profile image set based on the dicing detection record of the wafer;
identifying and identifying the broken areas in the sample wafer section image set to obtain a sample broken area identification result set;
based on semantic segmentation, constructing an encoder and a decoder, and training by adopting the sample wafer section image set and the sample shatter region identification result set to obtain a shatter region identifier;
And identifying and acquiring a plurality of broken areas, wherein the plurality of broken areas are obtained by identifying a plurality of wafer section images by adopting a broken area identifier.
Further, the system further comprises a second smoothness parameter obtaining module, so as to execute the following operation steps:
calculating the ratio of the size of the plurality of shattered areas to the allowable smooth error size to obtain a plurality of ratios;
calculating to obtain the number of the crushing areas by adopting a plurality of ratios and combining the number of the crushing areas;
calculating the sum of the number of the plurality of deviated noise points to obtain the number of the noise points;
processing and obtaining a sample breaking area quantity set, a sample noise point quantity set and a sample second smoothness parameter set based on the cutting detection data record of the wafer;
training a second smooth detector by adopting the sample breaking area quantity set, the sample noise point quantity set and the sample second smoothness parameter set as training data;
and identifying the number of the broken areas and the number of the noise points by adopting the second smoothness detector to obtain a second smoothness parameter.
Further, the system further comprises a smoothness detection result acquisition module, so as to execute the following operation steps:
obtaining a design section image of the target wafer according to the design size of the target wafer;
Processing to obtain a sample wafer profile image set based on the dicing inspection data record of the wafer;
combining a plurality of sample wafer section images in the sample wafer section image set and the design section image, and identifying the smoothness of the wafer cutting size to obtain a sample third smoothness parameter set;
training a third smoothing detector by adopting a sample wafer profile image set, a design profile image and a sample third smoothness parameter set;
adopting a third smoothness detector to carry out smoothness identification on the plurality of wafer section images, and calculating the average value of a plurality of identification results to obtain a third smoothness parameter;
and combining the first smoothness parameter, the second smoothness parameter and the third smoothness parameter to serve as a smoothness detection result of the target wafer.
Further, the system further comprises a third smoothing detector acquisition module to perform the following operation steps:
constructing a third smooth detector based on a twin network, wherein the third smooth detector comprises two section image analysis channels and a full-connection layer, the weight of the two section image analysis channels is shared, and the input is a wafer section image and a design section image respectively;
and taking the sample wafer profile image set, the design profile image and the sample third smoothness parameter set as training input and output, and performing supervision training on the third smooth detector until convergence requirements are met, so as to obtain the third smooth detector.
The foregoing detailed description of the method for detecting edge smoothness for wafer dicing will be clear to those skilled in the art, and the method and system for detecting edge smoothness for wafer dicing in this embodiment are relatively simple for the device disclosed in the embodiments, and the relevant points refer to the description of the method section.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. An edge smoothness detection method for wafer dicing, the method comprising:
collecting a wafer image of a target wafer subjected to detection and subjected to cutting, and performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points;
Matching and fitting a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge;
carrying out cutting edge smoothness identification according to the number of a plurality of deviated noise points to obtain a first smoothness parameter;
collecting surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer section images;
carrying out breaking area identification on the wafer section images to obtain a plurality of breaking areas, wherein each breaking area comprises breaking area size information;
carrying out cutting edge smoothness identification according to the number of the plurality of deviated noise points and the plurality of broken areas to obtain a second smoothness parameter;
and combining the plurality of wafer section images with the design section image of the target wafer, carrying out cutting size smoothness identification and calculation to obtain a third smoothness parameter, and combining the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
2. The method according to claim 1, characterized in that the method comprises:
randomly selecting two characteristic points from the plurality of characteristic points, and connecting the two characteristic points to serve as a first fitting edge line;
Compensating the first fitting edge line by adopting an error range to obtain a first fitting edge range, and obtaining the number of characteristic points falling into the first fitting edge range to obtain a first number;
continuously randomly selecting two characteristic points, connecting the two characteristic points as second fitting edge lines, and obtaining a second number;
continuing iterative fitting until the preset fitting times are reached, and taking the fitting edge line corresponding to the maximum number as the fitting edge;
obtaining a fitting edge range of the fitting edge line, and dividing the fitting edge range to obtain a plurality of edge areas;
the number of feature points in the vicinity of the plurality of edge regions, which do not fall within the plurality of edge regions, is acquired as a plurality of offset noise point numbers, respectively, wherein the offset noise points are formed by chips generated during cutting.
3. The method according to claim 1, characterized in that the method comprises:
calculating a variance of the number of the plurality of offset noise points;
processing and obtaining a sample noise point variance record based on the edge detection data record of the wafer cutting, and evaluating and obtaining a first smoothness parameter record of the sample;
constructing a mapping table of a sample noise point variance record and a sample first smoothness parameter record to obtain a first smoothness detector;
And identifying the variance of the number of the deviated noise points by adopting a first smoothing detector to obtain a first smoothness parameter.
4. The method according to claim 1, characterized in that the method comprises:
processing to obtain a sample wafer profile image set based on the dicing detection record of the wafer;
identifying and identifying the broken areas in the sample wafer section image set to obtain a sample broken area identification result set;
based on semantic segmentation, constructing an encoder and a decoder, and training by adopting the sample wafer section image set and the sample shatter region identification result set to obtain a shatter region identifier;
and identifying and acquiring a plurality of broken areas, wherein the plurality of broken areas are obtained by identifying a plurality of wafer section images by adopting a broken area identifier.
5. The method according to claim 1, characterized in that the method comprises:
calculating the ratio of the size of the plurality of shattered areas to the allowable smooth error size to obtain a plurality of ratios;
calculating to obtain the number of the crushing areas by adopting a plurality of ratios and combining the number of the crushing areas;
calculating the sum of the number of the plurality of deviated noise points to obtain the number of the noise points;
processing and obtaining a sample breaking area quantity set, a sample noise point quantity set and a sample second smoothness parameter set based on the cutting detection data record of the wafer;
Training a second smooth detector by adopting the sample breaking area quantity set, the sample noise point quantity set and the sample second smoothness parameter set as training data;
and identifying the number of the broken areas and the number of the noise points by adopting the second smoothness detector to obtain a second smoothness parameter.
6. The method according to claim 1, characterized in that the method comprises:
obtaining a design section image of the target wafer according to the design size of the target wafer;
processing to obtain a sample wafer profile image set based on the dicing inspection data record of the wafer;
combining a plurality of sample wafer section images in the sample wafer section image set and the design section image, and identifying the smoothness of the wafer cutting size to obtain a sample third smoothness parameter set;
training a third smoothing detector by adopting a sample wafer profile image set, a design profile image and a sample third smoothness parameter set;
adopting a third smoothness detector to carry out smoothness identification on the plurality of wafer section images, and calculating the average value of a plurality of identification results to obtain a third smoothness parameter;
and combining the first smoothness parameter, the second smoothness parameter and the third smoothness parameter to serve as a smoothness detection result of the target wafer.
7. The method of claim 6, wherein training the third smoothing detector comprises:
constructing a third smooth detector based on a twin network, wherein the third smooth detector comprises two section image analysis channels and a full-connection layer, the weight of the two section image analysis channels is shared, and the input is a wafer section image and a design section image respectively;
and taking the sample wafer profile image set, the design profile image and the sample third smoothness parameter set as training input and output, and performing supervision training on the third smooth detector until convergence requirements are met, so as to obtain the third smooth detector.
8. An edge smoothness detection system for wafer dicing, for implementing the edge smoothness detection method for wafer dicing according to any one of claims 1 to 7, comprising:
the wafer image acquisition module is used for acquiring a wafer image of a cut target wafer to be detected, performing binarization processing to obtain a binarized image, wherein the wafer image comprises a wafer and a background, and the binarized image comprises a plurality of characteristic points;
the fitting edge acquisition module is used for carrying out matching fitting on a plurality of characteristic points in the binarized image to obtain a fitting edge, and counting the number of a plurality of deviated noise points near a plurality of areas in the fitting edge;
The first smoothness acquisition module is used for carrying out cutting edge smoothness identification according to the number of a plurality of deviated noise points to obtain a first smoothness parameter;
the profile image acquisition module is used for acquiring surface morphology parameters of a target wafer, performing three-dimensional modeling to obtain a wafer three-dimensional model, and performing multi-level division on the wafer three-dimensional model to obtain a plurality of wafer profile images;
the device comprises a breaking area acquisition module, a breaking area detection module and a breaking area detection module, wherein the breaking area acquisition module is used for carrying out breaking area identification on a plurality of wafer section images to obtain a plurality of breaking areas, and each breaking area comprises breaking area size information;
the second smoothness acquisition module is used for carrying out cutting edge smoothness identification according to the number of the plurality of deviated noise points and the plurality of broken areas to obtain a second smoothness parameter;
the detection result acquisition module is used for carrying out cutting size smoothness identification and calculation by combining the plurality of wafer section images with the design section image of the target wafer to obtain a third smoothness parameter, and combining the first smoothness parameter and the second smoothness parameter to obtain a smoothness detection result of the target wafer.
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| JP2008227732A (en) * | 2007-03-09 | 2008-09-25 | Ricoh Co Ltd | Unit and method for image processing, program, and recording medium |
| CN116452588A (en) * | 2023-06-15 | 2023-07-18 | 苏州松德激光科技有限公司 | Welding quality assessment method and system |
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