CN117135841A - Manufacturing method of multilayer electronic circuit - Google Patents

Manufacturing method of multilayer electronic circuit Download PDF

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Publication number
CN117135841A
CN117135841A CN202311028670.XA CN202311028670A CN117135841A CN 117135841 A CN117135841 A CN 117135841A CN 202311028670 A CN202311028670 A CN 202311028670A CN 117135841 A CN117135841 A CN 117135841A
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China
Prior art keywords
layer
liquid
prefabricated
component
deposition
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CN202311028670.XA
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Chinese (zh)
Inventor
江山
克劳斯·安德斯·尤特
周赟磊
王备
保宏
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Hangzhou Research Institute Of Xi'an University Of Electronic Science And Technology
Xidian University
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Hangzhou Research Institute Of Xi'an University Of Electronic Science And Technology
Xidian University
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Priority to CN202311028670.XA priority Critical patent/CN117135841A/en
Publication of CN117135841A publication Critical patent/CN117135841A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The application provides a method for manufacturing a multilayer electronic circuit. The application provides a method for manufacturing a multilayer electronic circuit, which comprises the following steps: placing the first component on a first liquid pre-formed layer formed on the support, and packaging the first component with a second liquid pre-formed layer; forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid prefabricated layer, forming a first liquid metal circuit in the first deposition hole and the first deposition groove, removing the first mask layer, and packaging the first component and the first liquid metal circuit by using the third liquid prefabricated layer; forming a second liquid metal line according to the second mask layer and the third liquid pre-fabricated layer; and removing the second mask layer, placing the second component on the pins of the second liquid metal circuit, and packaging the second component and the second liquid metal circuit by using the fourth liquid prefabricated layer. The method for manufacturing the multilayer electronic circuit can manufacture the multilayer electronic circuit which is highly stretchable and highly integrated.

Description

Manufacturing method of multilayer electronic circuit
Technical Field
The application relates to the technical field of circuits, in particular to a manufacturing method of a multilayer electronic circuit.
Background
At present, flexible and stretchable electronic devices are being used in a variety of emerging electronic device fields including soft robots, wearable electronics, biomedical devices, and human-machine interfaces. New materials and stretchable sensor architectures, displays, heaters, energy storage devices, integrated circuits, and the like are the basis for implementation of such applications. However, these electronics fields still lack highly stretchable and highly integrated multilayer electronic circuits for achieving data processing, efficient data transmission, and for fabricating micro devices.
Disclosure of Invention
The application aims to provide a manufacturing method of a multilayer electronic circuit, which aims to solve the technical problem that a highly stretchable and highly integrated multilayer electronic circuit is lacking in the prior art.
The technical scheme of the application is as follows, and provides a manufacturing method of a multilayer electronic circuit, which comprises the following steps: placing a first component on a first liquid pre-formed layer formed on a support, and packaging the first component by using a second liquid pre-formed layer;
paving a first mask layer on the second liquid prefabricated layer, forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid prefabricated layer, forming a first liquid metal circuit in the first deposition hole and the first deposition groove, removing the first mask layer, and packaging the first component and the first liquid metal circuit by using a third liquid prefabricated layer;
paving a second mask layer on the third liquid prefabricated layer, forming a second deposition hole and a second deposition groove according to the second mask layer and the third liquid prefabricated layer, and forming a second liquid metal circuit in the second deposition hole and the second deposition groove;
and removing the second mask layer, placing a second component on the pin of the second liquid metal circuit, and packaging the second component and the second liquid metal circuit by using a fourth liquid prefabricated layer.
Further, the placing the first component on the first liquid pre-formed layer formed on the support, and packaging the first component with the second liquid pre-formed layer, includes:
coating a first layer of prefabricated liquid on a support body to form a first liquid prefabricated layer, placing the first component on the first liquid prefabricated layer, and coating a second layer of prefabricated liquid on the first component and the first liquid prefabricated layer to form a second liquid prefabricated layer so as to encapsulate the first component.
Further, the first layer of prefabricated liquid is coated on the support body to form the first liquid prefabricated layer, and the first layer of silica gel is coated on the support body to form the first liquid prefabricated layer; the second layer of preformed liquid is coated on the first component and the first preformed liquid layer to form a second preformed liquid layer, including coating a second layer of silicone gel on the first component and the first preformed liquid layer to form a second preformed liquid layer.
Further, the applying a second layer of preformed liquid over the first component and the first liquid preformed layer to form a second liquid preformed layer to encapsulate the first component, comprising:
and coating the second layer of prefabricated liquid on the first component and the first layer of prefabricated liquid to form a second liquid prefabricated layer, so that the second liquid prefabricated layer and the first liquid prefabricated layer encapsulate the first component.
Further, forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid pre-fabricated layer, forming a first liquid metal line in the first deposition hole and the first deposition groove, removing the first mask layer, and packaging the first component and the first liquid metal line by using a third liquid pre-fabricated layer, including:
after the first mask layer and the second liquid prefabricated layer are solidified, the first mask layer and the second liquid prefabricated layer are processed to form a first deposition hole and a first deposition groove, liquid metal is deposited in the first deposition hole and the first deposition groove to form a first liquid metal circuit, the first mask layer is removed, and the third liquid prefabricated layer is coated on the second liquid prefabricated layer and the first liquid metal circuit to encapsulate the first component and the first liquid metal circuit.
Further, coating the third liquid pre-formed layer on the second liquid pre-formed layer and the first liquid metal line to encapsulate the first component and the first liquid metal line, including:
and coating a third liquid prefabricated layer on the second liquid prefabricated layer and the first liquid metal circuit, and packaging the first component and the first liquid metal circuit by using the first liquid prefabricated layer, the second liquid prefabricated layer and the third liquid prefabricated layer.
Further, forming a second deposition hole and a second deposition groove according to the second mask layer and the third liquid prefabricated layer, and forming a second liquid metal line in the second deposition hole and the second deposition groove, including:
and after the second mask layer and the third liquid prefabricated layer are solidified, processing the second mask layer and the third liquid prefabricated layer to form the second deposition holes and the second deposition grooves, and depositing liquid metal in the second deposition holes and the second deposition grooves to form a second liquid metal circuit.
Further, the packaging the second component and the second liquid metal line with a fourth liquid pre-formed layer includes:
and coating a fourth liquid preparation layer on the third liquid preparation layer and the second liquid metal circuit so as to encapsulate the second component and the second liquid metal circuit.
Further, paving a first mask layer on the second liquid prefabricated layer, wherein the first mask layer with the thickness of 10-50 mu m is paved on the second liquid prefabricated layer; and paving a second mask layer on the third liquid prefabricated layer, wherein the second mask layer with the thickness of 10-50 mu m is paved on the third liquid prefabricated layer.
Further, the depth of the first deposition hole and the second deposition hole is 10-200 μm.
The application has the beneficial effects that: placing a first component on a first liquid pre-formed layer formed on a support, and packaging the first component by using a second liquid pre-formed layer; paving a first mask layer on the second liquid prefabricated layer, forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid prefabricated layer, forming a first liquid metal circuit in the first deposition hole and the first deposition groove, removing the first mask layer, and packaging the first component and the first liquid metal circuit by using a third liquid prefabricated layer; paving a second mask layer on the third liquid prefabricated layer, forming a second deposition hole and a second deposition groove according to the second mask layer and the third liquid prefabricated layer, and forming a second liquid metal circuit in the second deposition hole and the second deposition groove; removing the second mask layer, placing a second component on a pin of the second liquid metal circuit, and packaging the second component and the second liquid metal circuit by using a fourth liquid prefabricated layer; by the technical scheme, the multilayer electronic circuit which is highly stretchable and highly integrated can be manufactured.
Drawings
FIG. 1 is a schematic flow chart of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a first process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a second process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a third process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a fourth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a fifth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a sixth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
fig. 8 is a schematic diagram of a seventh process structure of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 9 is a schematic diagram of an eighth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
fig. 10 is a schematic view of a ninth process structure of a method for manufacturing a multilayer electronic circuit according to an embodiment of the present application;
fig. 11 is a schematic view of a tenth process structure of a method for manufacturing a multilayer electronic circuit according to an embodiment of the present application;
FIG. 12 is a schematic view of an eleventh process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 13 is a schematic view of a twelfth process structure of the method for fabricating a multi-layer electronic circuit according to the embodiment of the application;
FIG. 14 is a schematic view of a thirteenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 15 is a schematic view of a fourteenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 16 is a schematic view of a fifteenth process in a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 17 is a schematic view of a sixteenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 18 is a schematic diagram of a seventeenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 19 is a schematic view of an eighteenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 20 is a schematic diagram of a nineteenth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 21 is a schematic diagram of a twentieth process in a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 22 is a schematic diagram of a twenty-first process of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
fig. 23 is a schematic diagram of a twenty-second process structure of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
fig. 24 is a schematic diagram of a twenty-third process structure of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 25 is a twenty-fourth process schematic diagram of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
fig. 26 is a schematic diagram of a twenty-fifth process structure of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
fig. 27 is a schematic view of a twenty-sixth process structure of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
fig. 28 is a twenty-seventh process structure schematic diagram of a method for manufacturing a multi-layer electronic circuit according to an embodiment of the present application;
fig. 29 is a schematic diagram of a twenty-eighth process structure of a method for fabricating a multi-layer electronic circuit according to an embodiment of the present application;
fig. 30 is a schematic structural diagram of a multi-layer electronic circuit according to an embodiment of the present application;
FIG. 31 is an enlarged view of a portion of FIG. 30 at A, provided in accordance with an embodiment of the present application;
fig. 32 is a partial enlarged view at B in fig. 30 provided by an embodiment of the present application.
Reference numerals: 1-a support; 2-a first liquid pre-formed layer; 3-a first component; 4-a second liquid pre-formed layer; 5-a first mask layer; 6-a first deposition aperture; 7-a first deposition bath; 8-a first liquid metal circuit; 9-a first liquid metal; 10-a third liquid pre-formed layer; 11-a second mask layer; 12-a second deposition aperture; 13-a second deposition tank; 14-a second liquid metal; 15-a second liquid metal circuit; 16-a second component; 17-a fourth liquid pre-formed layer; 18-a control chip; 19-a first welding point; 20-LED pins; 21-LEDs; 22-second welding points; 23-junction of two layers of liquid metal lines.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Fig. 1 is a flow chart of a method for manufacturing a multilayer electronic circuit according to an embodiment of the application. It should be noted that, if the same result is substantially achieved, the method for manufacturing a multi-layer electronic circuit according to the present application is not limited to the flow sequence shown in fig. 1. As shown in fig. 1, the method for manufacturing the multilayer electronic circuit mainly comprises the following steps:
s1, placing a first component 3 on a first liquid preparation layer 2 formed on a support body 1, and packaging the first component 3 by using a second liquid preparation layer 4;
s2, paving a first mask layer 5 on the second liquid prefabricated layer 4, forming a first deposition hole 6 and a first deposition groove 7 according to the first mask layer 5 and the second liquid prefabricated layer 4, forming a first liquid metal circuit 8 in the first deposition hole 6 and the first deposition groove 7, removing the first mask layer 5, and packaging the first component 3 and the first liquid metal circuit 8 by using a third liquid prefabricated layer 10;
s3, paving a second mask layer 11 on the third liquid prefabricated layer 10, forming a second deposition hole 12 and a second deposition groove 13 according to the second mask layer 11 and the third liquid prefabricated layer 10, and forming a second liquid metal line 15 in the second deposition hole 12 and the second deposition groove 13;
and S4, removing the second mask layer 11, placing a second component 16 on the pins of the second liquid metal circuit 15, and packaging the second component 16 and the second liquid metal circuit 15 by using a fourth liquid preparation layer 17.
In the embodiment of the application, a first component 3 is placed on a first liquid preparation layer 2 formed on a support body 1, and the first component 3 is packaged by a second liquid preparation layer 4; paving a first mask layer 5 on the second liquid prefabricated layer 4, forming a first deposition hole 6 and a first deposition groove 7 according to the first mask layer 5 and the second liquid prefabricated layer 4, forming a first liquid metal line 8 in the first deposition hole 6 and the first deposition groove 7, removing the first mask layer 5, and packaging the first component 3 and the first liquid metal line 8 by using a third liquid prefabricated layer 10; paving a second mask layer 11 on the third liquid prefabricated layer 10, forming a second deposition hole 12 and a second deposition groove 13 according to the second mask layer 11 and the third liquid prefabricated layer 10, and forming a second liquid metal line 15 in the second deposition hole 12 and the second deposition groove 13; the second mask layer 11 is removed, the second component 16 is placed on the pin of the second liquid metal line 15, and the second component 16 and the second liquid metal line 15 are encapsulated by using the fourth liquid pre-fabricated layer 17, so that a highly stretchable and highly integrated multilayer electronic circuit can be manufactured.
By laying a third mask layer on the fourth liquid pre-fabricated layer 17, forming a third deposition hole and a third deposition groove according to the third mask layer and the fourth liquid pre-fabricated layer 17, and forming a third liquid metal line in the third deposition hole and the third deposition groove; and removing the third layer of mask, placing a third component on the pin of the third liquid metal circuit, packaging the third component and the third liquid metal circuit by using a fifth liquid prefabricated layer, and so on, so as to manufacture a three-layer electronic circuit, and further obtaining more layers of electronic circuits.
In some embodiments, the placing the first component 3 on the first liquid pre-formed layer 2 formed on the support 1, encapsulating the first component 3 with the second liquid pre-formed layer 4, includes:
coating a first layer of prefabricated liquid on a support body 1 to form a first liquid prefabricated layer 2, placing the first component 3 on the first liquid prefabricated layer 2, and coating a second layer of prefabricated liquid on the first component 3 and the first liquid prefabricated layer 2 to form a second liquid prefabricated layer 4 so as to encapsulate the first component 3.
In one embodiment, a first layer of prefabricated liquid is coated on the support 1 to form the first liquid prefabricated layer 2, which corresponds to a first process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 2, and a second process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 3, wherein the two schematic diagrams correspond to each other, and the former is a front view, and the latter is a top view. The first component 3 is placed on the first liquid prefabricated layer 2, and corresponds to a third process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 4, and a fourth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 5, where the two diagrams correspond to each other, the former is a front view, and the latter is a top view. A second layer of prefabricated liquid is coated on the first component 3 and the first liquid prefabricated layer 2 to form a second liquid prefabricated layer 4, so that the first component 3 is packaged, and the second liquid prefabricated layer corresponds to a fifth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 6, and a sixth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 7, wherein the first two diagrams correspond to each other, and the second liquid prefabricated layer is a front view, and the third liquid prefabricated layer is a top view.
In some embodiments, the first layer of preformed liquid is coated on the support 1 to form the first preformed liquid layer 2, including coating a first layer of silica gel on the support 1 to form the first preformed liquid layer 2; the second layer of preformed liquid is applied to the first component 3 and the first preformed liquid layer 2 to form a second preformed liquid layer 4, which comprises applying a second layer of silicone gel to the first component 3 and the first preformed liquid layer 2 to form a second preformed liquid layer 4.
In a specific embodiment, a second layer of silica gel is coated on the first component 3 and the first liquid prefabricated layer 2 to form a second liquid prefabricated layer 4, which corresponds to a seventh process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 8, and an eighth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 9, where the former two diagrams correspond to each other, and the latter is a front view and the latter is a top view. The support 1 may be semi-cured by scraping a first layer of a preformed liquid (an elastomer preformed liquid, such as silicone) with a doctor blade or spin coating. The first component 3 (e.g. a resistive patch) is rotated by a machine to a predetermined position, which has been pre-calibrated, and the adhesive force is provided by the semi-cured substrate (i.e. the first liquid pre-formed layer 2) to fix the first component 3.
In some embodiments, the applying a second layer of preformed liquid over the first component 3 and the first preformed liquid layer 2 to form a second preformed liquid layer 4 to encapsulate the first component 3 includes:
and coating the second layer of prefabricated liquid on the first component 3 and the first layer of prefabricated liquid to form a second liquid prefabricated layer 4, so that the second liquid prefabricated layer 4 and the first liquid prefabricated layer 2 encapsulate the first component 3.
In one embodiment, the second liquid preform layer 4 is formed by scraping the second liquid preform layer with a doctor blade or spin coating, etc., to encapsulate the whole.
In some embodiments, forming a first deposition hole 6 and a first deposition groove 7 according to the first mask layer 5 and the second liquid pre-formed layer 4, forming a first liquid metal line 8 in the first deposition hole 6 and the first deposition groove 7, removing the first mask layer 5, and packaging the first component 3 and the first liquid metal line 8 with a third liquid pre-formed layer 10, including:
after the first mask layer 5 and the second liquid pre-fabricated layer 4 are cured, the first mask layer 5 and the second liquid pre-fabricated layer 4 are processed to form a first deposition hole 6 and a first deposition groove 7, liquid metal (first liquid metal 9) is deposited in the first deposition hole 6 and the first deposition groove 7 to form a first liquid metal line 8, the first mask layer 5 is removed, and the third liquid pre-fabricated layer 10 is coated on the second liquid pre-fabricated layer 4 and the first liquid metal line 8 to encapsulate the first component 3 and the first liquid metal line 8.
In a specific embodiment, after the first mask layer 5 and the second liquid pre-fabricated layer 4 are cured, the first mask layer 5 and the second liquid pre-fabricated layer 4 are processed to form a first deposition hole 6 and a first deposition groove 7, which correspond to a ninth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 10, and correspond to a tenth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 11, wherein the first two schematic diagrams are front views and the second schematic diagram is a top view. Liquid metal (first liquid metal 9) is deposited in the first deposition hole 6 and the first deposition groove 7 to form a first liquid metal line 8, which corresponds to an eleventh process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 12, and a twelfth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 13, wherein the first liquid metal line is a front view, and the second liquid metal line is a top view. After the first mask layer 5 is removed, a thirteenth process structure diagram corresponding to the method for manufacturing a multi-layer electronic circuit is shown in fig. 14, and a fourteenth process structure diagram corresponding to the method for manufacturing a multi-layer electronic circuit is shown in fig. 15, where the first two diagrams correspond to each other, and the second is a front view and the third is a top view. The second liquid pre-fabricated layer 4 and the first liquid metal circuit 8 are coated with the third liquid pre-fabricated layer 10, which corresponds to a fifteenth schematic process structure of the multilayer electronic circuit manufacturing method, as shown in fig. 16, and corresponds to a sixteenth schematic process structure of the multilayer electronic circuit manufacturing method, as shown in fig. 17, wherein the first liquid pre-fabricated layer is a front view, and the second liquid pre-fabricated layer is a top view. Wherein, when the first liquid metal line 8 is formed in the first deposition hole 6 and the first deposition groove 7, a first deposition through hole may be formed, and the first deposition through hole is in a shape formed in the first deposition hole 6 by the first liquid metal line 8.
The first mask layer 5 and the second liquid preform layer 4 may be processed with a laser to form a first deposition hole 6 and a first deposition groove 7. Not only can the liquid metal be deposited in the first deposition holes 6 and the first deposition grooves 7, but also the liquid metal can be deposited on the surface of the first mask layer 5 for convenience of operation, i.e. the deposited liquid metal can uniformly cover all the surfaces, and the first mask layer 5 needs to be removed in the subsequent manufacturing process. The first liquid metal line 8 in the second deposition groove 13 is connected to the first component 3, and the thickness of the deposited liquid metal in the first deposition hole 6 and the first deposition groove 7 may be 10 to 50 μm.
In some embodiments, coating the third liquid pre-formed layer 10 on the second liquid pre-formed layer 4 and the first liquid metal line 8 to encapsulate the first component 3 and the first liquid metal line 8 includes:
a third liquid pre-formed layer 10 is applied to the second liquid pre-formed layer 4 and the first liquid metal line 8, and the first component 3 and the first liquid metal line 8 are encapsulated by the first liquid pre-formed layer 2, the second liquid pre-formed layer 4 and the third liquid pre-formed layer 10.
In a specific embodiment, the first masking layer 5 has been removed before the third liquid preparation layer 10 is applied on the second liquid preparation layer 4 and the first liquid metal route, and the first masking layer 5 may be peeled off by dissolving with water or directly by using a tool; a third liquid preform layer 10 is coated on the second liquid preform layer 4 and the first liquid metal line 8 by a doctor blade or spin coating, and the whole is sealed.
In some embodiments, forming the second deposition hole 12 and the second deposition groove 13 according to the second mask layer 11 and the third liquid pre-formed layer 10, forming the second liquid metal line 15 in the second deposition hole 12 and the second deposition groove 13, includes:
after the second mask layer 11 and the third liquid pre-formed layer 10 are cured, the second mask layer 11 and the third liquid pre-formed layer 10 are processed to form the second deposition holes 12 and the second deposition grooves 13, and a liquid metal (second liquid metal 14) is deposited in the second deposition holes 12 and the second deposition grooves 13 to form second liquid metal lines 15.
In one embodiment, a second mask layer 11 is laid on the third liquid prefabricated layer 10, which corresponds to a seventeenth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 18, and an eighteenth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 19, where the two diagrams correspond to each other, and the former is a front view, and the latter is a top view. The second mask layer 11 and the third liquid prefabricated layer 10 are processed to form the second deposition hole 12 and the second deposition groove 13, which correspond to a nineteenth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 20, and a twentieth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 21, where the first two diagrams correspond to each other, and the second deposition hole is a front view and the second deposition groove is a top view. Liquid metal is deposited in the second deposition holes 12 and the second deposition grooves 13 to form second liquid metal lines 15, which correspond to a twenty-first process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 22, and a twenty-second process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 23, wherein the two diagrams correspond to each other, and the former is a front view, and the latter is a top view. In forming the second liquid metal line 15 in the second deposition hole 12 and the second deposition groove 13, a second deposition through hole may be formed, which is a shape formed in the second deposition hole 12 by the first liquid metal line 8.
Not only the liquid metal is deposited in the second deposition holes 12 and the second deposition grooves 13, but also the liquid metal can be deposited on the surface of the second mask layer 11 for convenience of operation, i.e. the deposited liquid metal can uniformly cover all the surfaces, and the second mask layer 11 needs to be removed in the subsequent manufacturing process. The second liquid metal line 15 may be connected to the first component 3 and the second component 16, and the thickness of the deposited liquid metal in the second deposition hole 12 and the second deposition bath 13 may be 10 to 50 μm. The second component 16 may be rotated by a machine onto the pin locations of the second liquid metal lines that have been patterned. After the second mask layer 11 is removed, a twenty-third process structure diagram corresponding to the method for manufacturing a multi-layer electronic circuit is shown in fig. 24, and a twenty-fourth process structure diagram corresponding to the method for manufacturing a multi-layer electronic circuit is shown in fig. 25, wherein the former is a front view, and the latter is a top view.
In some embodiments, the encapsulating the second component 16 and the second liquid metal line 15 with the fourth liquid pre-formed layer 17 includes:
a fourth liquid pre-formed layer 17 is applied over the third liquid pre-formed layer 10 and the second liquid metal lines 15 to encapsulate the second component 16 and the second liquid metal lines 15.
Wherein the fourth liquid preparation layer 17 may be an elastomer preparation liquid, such as silica gel.
In one embodiment, the second component 16 is placed on the pin of the second liquid metal circuit 15, which corresponds to a twenty-fifth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 26, and a twenty-sixth process structure diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 27, where the two diagrams correspond to each other, and the former is a front view, and the latter is a top view. Wherein, the second component 16 is placed on the pin of the second liquid metal line 15, and the second component 16 can be fixed and communicated with the second liquid metal line 15 for conduction; wherein the second liquid metal line 15 below the second component 16 in fig. 14 is in an open state. A fourth liquid pre-fabricated layer 17 is coated on the third liquid pre-fabricated layer 10 and the second liquid metal line 15 to encapsulate the second component 16 and the second liquid metal line 15, which corresponds to a twenty-seventh process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 28, and corresponds to a twenty-eighth process structure schematic diagram of the multilayer electronic circuit manufacturing method, as shown in fig. 29, in which the former is a front view, and the latter is a top view.
In some embodiments, the first mask layer 5 is laid on the second liquid prefabricated layer 4, including, laying the first mask layer 5 with a thickness of 10-50 μm on the second liquid prefabricated layer 4; a second mask layer 11 is laid on the third liquid pre-formed layer 10, comprising: a second mask layer 11 having a thickness of 10 to 50 μm is laid on the third liquid pre-formed layer 10. Wherein the first mask layer 5 may include a dyed polyvinyl alcohol film, and the second mask layer 11 may include a dyed polyvinyl alcohol film.
In some embodiments, the first deposition hole and the second deposition hole have a depth of 10 to 200 μm.
By the multilayer electronic circuit manufacturing method in the above-described embodiment, a multilayer electronic circuit can be formed, the structure of which is schematically shown in fig. 30, and the control chip 18 is included in fig. 30. Fig. 31 is a partial enlarged view at a in fig. 30, and fig. 32 is a partial enlarged view at B in fig. 30.
In the method for manufacturing the multilayer electronic circuit provided by the embodiment of the application, the first component 3 is placed on the first liquid prefabricated layer 2 formed on the support body 1, and the first component 3 is packaged by the second liquid prefabricated layer 4; paving a first mask layer 5 on the second liquid prefabricated layer 4, forming a first deposition hole 6 and a first deposition groove 7 according to the first mask layer 5 and the second liquid prefabricated layer 4, forming a first liquid metal line 8 in the first deposition hole 6 and the first deposition groove 7, removing the first mask layer 5, and packaging the first component 3 and the first liquid metal line 8 by using a third liquid prefabricated layer 10; paving a second mask layer 11 on the third liquid prefabricated layer 10, forming a second deposition hole 12 and a second deposition groove 13 according to the second mask layer 11 and the third liquid prefabricated layer 10, and forming a second liquid metal line 15 in the second deposition hole 12 and the second deposition groove 13; the second mask layer 11 is removed, the second component 16 is placed on the pin of the second liquid metal line 15, and the second component 16 and the second liquid metal line 15 are encapsulated by using the fourth liquid pre-fabricated layer 17, so that a highly stretchable and highly integrated multilayer electronic circuit can be manufactured. The multilayer electronic circuit manufacturing method provided by the embodiment of the application can print the high-density integrated multilayer circuit while processing the high-resolution circuit. Due to laser processing, the density of pins of the electronic circuit manufactured by the multilayer electronic circuit manufacturing method provided by the embodiment of the application can be very high, and the ultra-regular deposition of the embodiment of the application ensures that liquid metal can be uniformly deposited on all complex and high-resolution surfaces; the components may be two-sided, with both the bottom and top.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples only represent preferred embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (10)

1. A method of making a multilayer electronic circuit comprising:
placing a first component on a first liquid pre-formed layer formed on a support, and packaging the first component by using a second liquid pre-formed layer;
paving a first mask layer on the second liquid prefabricated layer, forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid prefabricated layer, forming a first liquid metal circuit in the first deposition hole and the first deposition groove, removing the first mask layer, and packaging the first component and the first liquid metal circuit by using a third liquid prefabricated layer;
paving a second mask layer on the third liquid prefabricated layer, forming a second deposition hole and a second deposition groove according to the second mask layer and the third liquid prefabricated layer, and forming a second liquid metal circuit in the second deposition hole and the second deposition groove;
and removing the second mask layer, placing a second component on the pin of the second liquid metal circuit, and packaging the second component and the second liquid metal circuit by using a fourth liquid prefabricated layer.
2. The method of manufacturing a multilayer electronic circuit according to claim 1, wherein the placing the first component on the first liquid pre-formed layer formed on the support and encapsulating the first component with the second liquid pre-formed layer comprises:
coating a first layer of prefabricated liquid on a support body to form a first liquid prefabricated layer, placing the first component on the first liquid prefabricated layer, and coating a second layer of prefabricated liquid on the first component and the first liquid prefabricated layer to form a second liquid prefabricated layer so as to encapsulate the first component.
3. The method of manufacturing a multilayer electronic circuit according to claim 2, wherein the coating a first layer of preformed liquid on the support to form the first preformed liquid layer comprises coating a first layer of silicone on the support to form the first preformed liquid layer; the second layer of preformed liquid is coated on the first component and the first preformed liquid layer to form a second preformed liquid layer, including coating a second layer of silicone gel on the first component and the first preformed liquid layer to form a second preformed liquid layer.
4. The method of manufacturing a multilayer electronic circuit according to claim 2, wherein the applying a second layer of preformed liquid over the first component and the first liquid preformed layer to form a second liquid preformed layer to encapsulate the first component comprises:
and coating the second layer of prefabricated liquid on the first component and the first layer of prefabricated liquid to form a second liquid prefabricated layer, so that the second liquid prefabricated layer and the first liquid prefabricated layer encapsulate the first component.
5. The method of claim 1, wherein forming a first deposition hole and a first deposition groove according to the first mask layer and the second liquid pre-formed layer, forming a first liquid metal line in the first deposition hole and the first deposition groove, removing the first mask layer, and encapsulating the first component and the first liquid metal line with a third liquid pre-formed layer, comprises:
after the first mask layer and the second liquid prefabricated layer are solidified, the first mask layer and the second liquid prefabricated layer are processed to form a first deposition hole and a first deposition groove, liquid metal is deposited in the first deposition hole and the first deposition groove to form a first liquid metal circuit, the first mask layer is removed, and the third liquid prefabricated layer is coated on the second liquid prefabricated layer and the first liquid metal circuit to encapsulate the first component and the first liquid metal circuit.
6. The method of manufacturing a multilayer electronic circuit of claim 5, wherein coating the third liquid pre-formed layer over the second liquid pre-formed layer and the first liquid metal line to encapsulate the first component and the first liquid metal line comprises:
and coating a third liquid prefabricated layer on the second liquid prefabricated layer and the first liquid metal circuit, and packaging the first component and the first liquid metal circuit by using the first liquid prefabricated layer, the second liquid prefabricated layer and the third liquid prefabricated layer.
7. The method of manufacturing a multilayer electronic circuit according to claim 1, wherein forming a second deposition hole and a second deposition groove according to the second mask layer and the third liquid pre-formed layer, forming a second liquid metal line in the second deposition hole and the second deposition groove, comprises:
and after the second mask layer and the third liquid prefabricated layer are solidified, processing the second mask layer and the third liquid prefabricated layer to form the second deposition holes and the second deposition grooves, and depositing liquid metal in the second deposition holes and the second deposition grooves to form a second liquid metal circuit.
8. The method of claim 1, wherein encapsulating the second component and the second liquid metal line with a fourth liquid pre-formed layer comprises:
and coating a fourth liquid preparation layer on the third liquid preparation layer and the second liquid metal circuit so as to encapsulate the second component and the second liquid metal circuit.
9. The method of manufacturing a multilayer electronic circuit according to claim 1, wherein laying a first mask layer on the second liquid pre-formed layer comprises laying a first mask layer having a thickness of 10 to 50 μm on the second liquid pre-formed layer; and paving a second mask layer on the third liquid prefabricated layer, wherein the second mask layer with the thickness of 10-50 mu m is paved on the third liquid prefabricated layer.
10. The method of claim 1, wherein the first deposition holes and the second deposition holes have a depth of 10 to 200 μm.
CN202311028670.XA 2023-08-16 2023-08-16 Manufacturing method of multilayer electronic circuit Pending CN117135841A (en)

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Application Number Priority Date Filing Date Title
CN202311028670.XA CN117135841A (en) 2023-08-16 2023-08-16 Manufacturing method of multilayer electronic circuit

Publications (1)

Publication Number Publication Date
CN117135841A true CN117135841A (en) 2023-11-28

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