CN117134720B - Dual-frequency power amplifier with reconfigurable output matching network - Google Patents
Dual-frequency power amplifier with reconfigurable output matching network Download PDFInfo
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- CN117134720B CN117134720B CN202311387193.6A CN202311387193A CN117134720B CN 117134720 B CN117134720 B CN 117134720B CN 202311387193 A CN202311387193 A CN 202311387193A CN 117134720 B CN117134720 B CN 117134720B
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- 230000005540 biological transmission Effects 0.000 claims abstract description 83
- 239000003990 capacitor Substances 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims abstract description 9
- 230000009977 dual effect Effects 0.000 claims 11
- 230000000694 effects Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 10
- 238000004891 communication Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000009466 transformation Effects 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
Abstract
The invention discloses a double-frequency power amplifier with a reconfigurable output matching network, which comprises: the method comprises the steps of inputting a matching network, a first MOS tube, a second MOS tube, a first transmission line, a second transmission line, a third transmission line, a first capacitor and a multilayer board; the second MOS tube is controlled to be opened through a control voltage signal, an output matching network is formed by the second MOS tube, the first transmission line, the second transmission line, the third transmission line and the first capacitor, and output impedance matching of an FR2 frequency band is achieved; the second MOS tube is controlled to be closed by a control voltage signal, and an output matching network is formed by the second MOS tube, the first transmission line, the second transmission line, the third transmission line, the first capacitor and the multilayer board, so that output impedance matching of the FR1 frequency band is realized; the dual-frequency power amplifier can meet the output matching impedance requirements of the FR1 frequency band and the FR2 frequency band, and has low design cost and good performance effect.
Description
Technical Field
The invention relates to the technical field of radio frequency integrated circuits, in particular to a double-frequency power amplifier with a reconfigurable output matching network.
Background
The fifth generation mobile communication (5G) is commercially available in 2020 as a communication technology with large bandwidth, low latency and large connection, and the 5G can provide users with more diversified advanced applications and better service experience, and promote digital transformation processes in many industries. According to the 3GPP protocol, 5G NR (New Radio) mainly uses the FR1 band (450 MHz-6 GHz, sub-6 GHz) and the FR2 band (24.25 GHz-52.6 GHz, millimeter wave). Because the wavelengths are different, the Sub-6GHz is a basic coverage frequency band of 5G, the millimeter wave is an important hot spot blind compensation frequency band of 5G, and the high frequency band and the low frequency band complement each other to jointly release the full potential of 5G. At present, a communication network is in a networking state with multiple systems and multiple communication standards coexisting for a long time, so that a transceiver capable of operating in any one band is designed to be of great concern, and as a key component of a transceiver system, it is difficult for a radio frequency power amplifier to achieve optimal performance in multiple bands simultaneously.
Currently, there are two conventional solutions to the above problems:
the first is to design a power amplifier that covers multiple frequency bands simultaneously using broadband technology, where the key is the design of a broadband matching network, but broadband technology is theoretically a method that sacrifices performance such as gain and efficiency, which means that the larger the bandwidth, the lower the gain or efficiency of the rf power amplifier.
The second is to use multiple chips working in different frequency bands, and to work in a time-sharing manner, however, if two chips are used, one of which works in the FR1 frequency band and the other works in the FR2 frequency band, the cost is high for high chip manufacturing cost.
Accordingly, there is a need to provide a low cost, high performance rf power amplifier that meets the FR1 band and the FR2 band.
Disclosure of Invention
The invention provides a double-frequency power amplifier with a reconfigurable output matching network, which solves the technical problem that the existing radio-frequency power amplifier which has low cost and high performance and meets the requirements of FR1 frequency bands and FR2 frequency bands cannot be provided.
The invention provides a double-frequency power amplifier with a reconfigurable output matching network, which comprises the following components: the method comprises the steps of inputting a matching network, a first MOS tube, a second MOS tube, a first transmission line, a second transmission line, a third transmission line, a first capacitor and a multilayer board;
the first end of the input matching network is connected with a signal input port, and the second end of the input matching network is connected with the first end of the first MOS tube;
the second end of the first MOS tube is connected with the first end of the first transmission line, and the third end of the first MOS tube is grounded;
the second end of the first transmission line is connected with the first end of the second transmission line and the first end of the third transmission line respectively;
the first end of the second transmission line is connected with the first end of the third transmission line;
the second end of the second MOS tube is connected with the second end of the second transmission line, and the third end of the second MOS tube is connected with the first end of the first capacitor;
the second end of the first capacitor is grounded;
when the second end of the third transmission line is connected with the signal output port, the second end of the third transmission line is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR2 frequency band;
when the second end of the third transmission line is connected with the first end of the multi-layer board through a gold wire bonding wire, and the second end of the multi-layer board is connected with a signal output port, the second end of the multi-layer board is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR1 frequency band;
the first end of the second MOS tube is used for inputting a control voltage signal.
Optionally, the method further comprises: a first inductor and a second inductor;
the second end of the first inductor is respectively connected with the second end of the input matching network and the first end of the first MOS tube;
the second end of the second inductor is respectively connected with the second end of the second transmission line and the second end of the second MOS tube;
the first end of the first inductor is used for inputting a first bias voltage signal;
the first end of the second inductor is used for inputting a second bias voltage signal.
Optionally, the multilayer board includes a second capacitor, a third capacitor, and a third inductor;
the first end of the second capacitor is connected with the second end of the third transmission line through a gold wire bonding wire;
the second end of the second capacitor is respectively connected with the first end of the third capacitor and the first end of the third inductor;
the first end of the third inductor is connected with the first end of the third capacitor, and the second end of the third inductor is grounded;
and the second end of the third capacitor is connected with the signal output port.
Optionally, the first MOS transistor is a power tube core of the dual-frequency power amplifier, and the second MOS transistor is a switching transistor.
Optionally, the first capacitor is a bypass capacitor.
Optionally, the first end, the second end and the third end of the first MOS transistor are respectively a gate, a drain and a source, and the first end, the second end and the third end of the second MOS transistor are respectively a gate, a drain and a source.
Optionally, the first inductor and the second inductor are choke inductors.
Optionally, the control voltage signal is a gate control voltage signal of the second MOS transistor.
Optionally, the first bias voltage signal is a gate bias voltage signal of the first MOS transistor.
Optionally, the second bias voltage signal is a drain bias voltage signal of the first MOS transistor.
From the above technical scheme, the application has the following advantages:
the invention provides a double-frequency power amplifier with a reconfigurable output matching network, which comprises the following components: the method comprises the steps of inputting a matching network, a first MOS tube, a second MOS tube, a first transmission line, a second transmission line, a third transmission line, a first capacitor and a multilayer board; when the dual-frequency power amplifier needs to work in an FR2 frequency band, the second MOS tube is controlled to be opened by a control voltage signal, and an output matching network is formed by the second MOS tube, the first transmission line, the second transmission line, the third transmission line and the first capacitor; when the dual-frequency power amplifier needs to work in an FR1 frequency band, the second MOS tube is controlled to be closed by a control voltage signal, and an output matching network is formed by the second MOS tube, the first transmission line, the second transmission line, the third transmission line, the first capacitor and the multilayer board; therefore, the dual-frequency power amplifier with the reconfigurable output matching network solves the technical problem that the existing radio-frequency power amplifier meeting the FR1 frequency band and the FR2 frequency band cannot be provided with low cost and high performance.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from these drawings without inventive faculty for a person skilled in the art.
Fig. 1 is a first circuit diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention;
fig. 2 is a second circuit diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention;
fig. 3 is a first effect diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention;
fig. 4 is a second effect diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides a dual-frequency power amplifier with a reconfigurable output matching network and a use method thereof, which are used for solving the technical problem that the existing radio-frequency power amplifier meeting the FR1 frequency band and the FR2 frequency band cannot be provided with low cost and high performance.
In order to make the objects, features and advantages of the present invention more comprehensible, the technical solutions in the embodiments of the present invention are described in detail below with reference to the accompanying drawings, and it is apparent that the embodiments described below are only some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-4, fig. 1 is a first circuit diagram of a dual-frequency power amplifier with reconfigurable output matching network according to an embodiment of the present invention; fig. 2 is a second circuit diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention; fig. 3 is a first effect diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention; fig. 4 is a second effect diagram of a dual-frequency power amplifier with a reconfigurable output matching network according to an embodiment of the present invention.
The application provides a reconfigurable dual-frequency power amplifier of output matching network, including: the method comprises the steps of inputting a matching network IMN, a first MOS tube M1, a second MOS tube M2, a first transmission line T1, a second transmission line T2, a third transmission line T3, a first capacitor C1 and a multilayer board;
the first end of the input matching network IMN is connected with the signal input port RFIN, and the second end of the input matching network IMN is connected with the first end of the first MOS tube M1;
the second end of the first MOS tube M1 is connected with the first end of the first transmission line T1, and the third end of the first MOS tube M1 is grounded;
the second end of the first transmission line T1 is respectively connected with the first end of the second transmission line T2 and the first end of the third transmission line T3;
the first end of the second transmission line T2 is connected with the first end of the third transmission line T3;
the second end of the second MOS tube M2 is connected with the second end of the second transmission line T2, and the third end of the second MOS tube M2 is connected with the first end of the first capacitor C1;
the second end of the first capacitor C1 is grounded;
when the second end of the third transmission line T3 is connected with the signal output port RFOUT, the second end of the third transmission line T3 is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR2 frequency band;
when the second end of the third transmission line T3 is connected with the first end of the multi-layer board through the gold wire bonding wire BW and the second end of the multi-layer board is connected with the signal output port RFOUT, the second end of the multi-layer board is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR1 frequency band;
the first end of the second MOS transistor M2 is used for inputting the control voltage signal EN.
The control voltage signal EN is used for controlling the on-off of the second MOS transistor M2.
In the embodiment of the application, when the dual-frequency power amplifier needs to work in the FR2 frequency band, the second MOS transistor M2 is controlled to be turned on by the control voltage signal EN, and an output matching network is formed by the second MOS transistor M2, the first transmission line T1, the second transmission line T2, the third transmission line T3 and the first capacitor C1 to complete the impedance transformation function of the FR2 frequency band; when the dual-frequency power amplifier needs to work in the FR1 frequency band, the second MOS tube M2 is controlled to be closed by the control voltage signal EN, and an output matching network is formed by the second MOS tube M2, the first transmission line T1, the second transmission line T2, the third transmission line T3, the first capacitor C1 and the multi-layer board so as to complete the impedance transformation function of the FR1 frequency band.
Further, the dual-frequency power amplifier further comprises a first inductor L1 and a second inductor L2;
the second end of the first inductor L1 is respectively connected with the second end of the input matching network IMN and the first end of the first MOS tube M1;
the second end of the second inductor L2 is respectively connected with the second end of the second transmission line T2 and the second end of the second MOS tube M2;
the first end of the first inductor L1 is used for inputting a first bias voltage signal VG;
the first end of the second inductor L2 is used for inputting the second bias voltage signal VD.
In an embodiment, under the feeding action of the first bias voltage signal VG, an input signal enters from the signal input port RFIN, drives the first end of the first MOS transistor M1 through the input matching network IMN, and the first MOS transistor M1 amplifies the signal and transmits the signal to the output matching network.
Further, the multilayer board comprises a second capacitor C2, a third capacitor C3 and a third inductor L3;
the first end of the second capacitor C2 is connected with the second end of the third transmission line T3 through a gold wire bonding wire BW;
the second end of the second capacitor C2 is respectively connected with the first end of the third capacitor C3 and the first end of the third inductor L3;
the first end of the third inductor L3 is connected with the first end of the third capacitor C3, and the second end of the third inductor L3 is grounded;
the second end of the third capacitor C3 is connected to the signal output port RFOUT.
It should be noted that, compared with the FR1 frequency band, the frequency corresponding to the FR2 frequency band is higher, please refer to fig. 1, when the dual-frequency power amplifier needs to work in the FR2 frequency band, the control voltage signal EN controls the second MOS transistor M2 to be turned on, the application adopts the distributed parameter circuit theory analysis, the output matching network is formed by the first transmission line T1, the second transmission line T2, the third transmission line T3, the second MOS transistor M2, the first capacitor C1 and the second inductor L2, and at this time, the output matching network is equivalent to a T-shaped network formed by 3 segments of transmission lines, thereby ensuring stable transmission of signals and realizing the output impedance matching function of the FR2 frequency band.
Compared with the FR2 frequency band, the frequency corresponding to the FR1 frequency band is lower, referring to fig. 2, when the dual-frequency power amplifier works in the FR1 frequency band, the application adopts the lumped parameter circuit theory analysis, and an output matching network is formed by a first transmission line T1, a second transmission line T2, a third transmission line T3, a second MOS tube M2, a first capacitor C1, a gold wire bonding wire BW and a multi-layer board, wherein the multi-layer board comprises a second capacitor C2, a third capacitor C3 and a third inductor L3; when the control voltage signal EN controls the second MOS transistor M2 to be turned off, the first capacitor C1 will not function at this time, that is, the branch where the second transmission line T2 is located does not participate in output impedance matching, and the output matching network is equivalent to a T-type network formed by 4 elements to complete the output matching impedance function of the FR1 frequency band, where the fourth inductor L4 in the T-type network is formed by serial connection and equivalent of the first transmission line T1, the third transmission line T3 and the gold wire bonding wire BW.
Further, the first MOS transistor M1 is a power tube core of the dual-frequency power amplifier, and the second MOS transistor M2 is a switching transistor.
Further, the first capacitor C1 is a bypass capacitor.
Further, the first end, the second end and the third end of the first MOS transistor M1 are respectively a gate, a drain and a source, and the first end, the second end and the third end of the second MOS transistor M2 are respectively a gate, a drain and a source.
Further, the first inductor L1 and the second inductor L2 are choke inductors.
Wherein the choke inductance is used for isolating alternating current signals and direct current signals.
Further, the control voltage signal EN is a gate control voltage signal of the second MOS transistor M2.
Further, the first bias voltage signal VG is a gate bias voltage signal of the first MOS transistor M1.
Further, the second bias voltage signal VD is a drain bias voltage of the first MOS transistor M1.
In the embodiment of the application, the dual-frequency power amplifier works in an FR2 frequency band by adopting a transmission line to participate in matching, works in an FR1 frequency band by adopting a lumped parameter device to participate in matching, designs a reconfigurable topological structure, combines an electric control switch tube M2, a gold wire bonding wire BW and a multi-layer board to achieve the reconfigurable function of output matching, and further completes the design of the dual-frequency power amplifier.
Referring to fig. 3 and fig. 4, fig. 3 is an effect diagram of the dual-frequency power amplifier provided in the embodiment of the present application operating in the FR2 frequency band, and fig. 4 is an effect diagram of the dual-frequency power amplifier provided in the embodiment of the present application operating in the FR1 frequency band, which indicates that the dual-frequency power amplifier provided in the present application can meet the operating requirements of the FR1 frequency band and the FR2 frequency band, and has good gain performance.
In a specific embodiment, the dual-frequency power amplifier provided by the application can be compatible with different implementation modes of an FR1 frequency band and an FR2 frequency band, and when the dual-frequency power amplifier works in the FR2 frequency band, a main chip consisting of an input matching network IMN, a first MOS transistor M1, a second MOS transistor M2, a first inductor L1, a second inductor L2, a first transmission line T1, a second transmission line T2, a third transmission line T3 and a first capacitor C1 realizes a circuit function of the FR2 frequency band; when working in the FR1 frequency band, in order to obtain better gain performance and convenient debugging, the functions of the main circuit are realized by the main chip, the functions of part of the circuits are realized by the multi-layer board, and the connection between the main chip and the multi-layer board is realized by the gold wire bonding wire BW, so that output matching network parameters corresponding to the FR1 frequency band and the FR2 frequency band are not affected mutually, and the robustness of the realization of the impedance conversion function of the dual-frequency power amplifier in the FR1 frequency band and the FR2 frequency band is improved; meanwhile, the dual-frequency power amplifier designed by the application can meet the output impedance matching function of two frequency bands far apart only by using one main chip and a multi-layer board, and is low in design cost.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A dual frequency power amplifier with a reconfigurable output matching network, comprising: the method comprises the steps of inputting a matching network, a first MOS tube, a second MOS tube, a first transmission line, a second transmission line, a third transmission line, a first capacitor, a second inductor and a multilayer board;
the first end of the input matching network is connected with a signal input port, and the second end of the input matching network is connected with the first end of the first MOS tube;
the second end of the first MOS tube is connected with the first end of the first transmission line, and the third end of the first MOS tube is grounded;
the second end of the first transmission line is connected with the first end of the second transmission line and the first end of the third transmission line respectively;
the first end of the second transmission line is connected with the first end of the third transmission line;
the second end of the second MOS tube is connected with the second end of the second transmission line, and the third end of the second MOS tube is connected with the first end of the first capacitor;
the second end of the first capacitor is grounded;
the second end of the second inductor is respectively connected with the second end of the second transmission line and the second end of the second MOS tube;
the first end of the second inductor is used for inputting a second bias voltage signal;
when the second end of the third transmission line is connected with the signal output port, the second end of the third transmission line is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR2 frequency band;
when the second end of the third transmission line is connected with the first end of the multi-layer board through a gold wire bonding wire, and the second end of the multi-layer board is connected with a signal output port, the second end of the multi-layer board is used for adjusting the working frequency band of the dual-frequency power amplifier to be an FR1 frequency band;
the first end of the second MOS tube is used for inputting a control voltage signal.
2. The dual frequency power amplifier of claim 1, further comprising: a first inductance;
the second end of the first inductor is respectively connected with the second end of the input matching network and the first end of the first MOS tube;
the first end of the first inductor is used for inputting a first bias voltage signal.
3. The dual frequency power amplifier of claim 1, wherein the multi-layer board comprises a second capacitor, a third capacitor, and a third inductor;
the first end of the second capacitor is connected with the second end of the third transmission line through a gold wire bonding wire;
the second end of the second capacitor is respectively connected with the first end of the third capacitor and the first end of the third inductor;
the first end of the third inductor is connected with the first end of the third capacitor, and the second end of the third inductor is grounded;
and the second end of the third capacitor is connected with the signal output port.
4. The dual frequency power amplifier of claim 1, wherein the first MOS transistor is a power die of the dual frequency power amplifier and the second MOS transistor is a switching transistor.
5. The dual frequency power amplifier of claim 1, wherein the first capacitance is a bypass capacitance.
6. The dual frequency power amplifier of claim 1, wherein the first, second and third ends of the first MOS transistor are gate, drain and source, respectively, and the first, second and third ends of the second MOS transistor are gate, drain and source, respectively.
7. The dual frequency power amplifier of claim 2, wherein the first inductance and the second inductance are choke inductances.
8. The dual frequency power amplifier of claim 1, wherein the control voltage signal is a gate control voltage signal of the second MOS transistor.
9. The dual frequency power amplifier of claim 2, wherein the first bias voltage signal is a gate bias voltage signal of the first MOS transistor.
10. The dual frequency power amplifier of claim 2, wherein the second bias voltage signal is a drain bias voltage signal of the first MOS transistor.
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| CN202311387193.6A CN117134720B (en) | 2023-10-25 | 2023-10-25 | Dual-frequency power amplifier with reconfigurable output matching network |
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| CN202311387193.6A CN117134720B (en) | 2023-10-25 | 2023-10-25 | Dual-frequency power amplifier with reconfigurable output matching network |
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| CN117134720B true CN117134720B (en) | 2024-01-16 |
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