CN117133232A

CN117133232A - Display method, chip and electronic equipment

Info

Publication number: CN117133232A
Application number: CN202310404741.5A
Authority: CN
Inventors: 唐洁华; 马磊; 周健; 李时进
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2023-04-12
Filing date: 2023-04-12
Publication date: 2023-11-28

Abstract

The application provides a display method, a chip and electronic equipment, and relates to the technical field of terminals, wherein the method comprises the following steps: in the image display process, the DDIC outputs TE signals with a first frequency to the AP, wherein the first frequency is higher than a corresponding frame rate when the electronic equipment displays frame images; then, the electronic equipment draws, renders and synthesizes the Mth frame image in the first frame period; after the Mth frame image is synthesized, the first rising edge pulse of the TE signal in the first frame period after the Mth frame image is synthesized can be responded in time, so that the time of the Mth frame synthesis is matched with the time of the Mth frame display, and the problems of repeated frame brushing, clamping and the like can be effectively solved.

Description

Display method, chip and electronic equipment

Technical Field

The present application relates to the field of terminal technologies, and in particular, to a display method, a chip, and an electronic device.

Background

With the continuous development of display technology, display screens of electronic devices such as mobile phones and tablet computers can support multiple frame rates. Wherein the frame rate is the number of refreshes per second of the display screen.

In order to enable a user to have better visual experience and reduce unnecessary power consumption of the electronic device, the electronic device can switch frame rates according to different display scenes. At present, in the existing frame rate switching scheme, if the frame synthesis time is not synchronous with the frame display time, the frame synthesized by the electronic equipment is inconsistent with the displayed frame, and display problems such as repeated frame brushing, clamping and the like occur.

Disclosure of Invention

The embodiment of the application provides a display method, a chip and electronic equipment, which are used for solving the display problems of repeated frame brushing, clamping and the like caused by the fact that the frame synthesized by the electronic equipment is inconsistent with the displayed frame due to the fact that the frame synthesized time and the frame displayed time are not synchronous in the related technology.

In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:

in a first aspect, a display method is provided and applied to an electronic device, where the electronic device includes a display driving chip DDIC and an application processor AP; the method comprises the following steps: in the image display process, the DDIC of the electronic device outputs TE signals, namely Vsync-HW signals, to the AP; the TE signal has a frequency that is higher than a corresponding frame rate at which the electronic device displays the frame image.

For an Mth frame image, rendering and synthesizing the Mth frame image in a first frame period; after the M-th frame image is synthesized, the M-th frame image is displayed in response to a first rising edge pulse (i.e., a first rising edge) of the TE signal after the M-th frame image is synthesized in a first frame period; m is more than or equal to 2, and M is an integer.

Based on the scheme of the application, the frequency of the TE signal output by the DDIC of the electronic equipment to the AP is higher than the corresponding frame rate when the electronic equipment displays the frame image, namely, the frequency of the TE signal is higher, and the signal period of the corresponding TE signal is smaller. On the basis, because the electronic equipment draws, renders and synthesizes the Mth frame image in the first frame period, after the electronic equipment synthesizes the Mth frame image, the Mth frame image can be displayed in response to the latest rising edge of the TE signal in the first frame period, and the rising edge of the TE signal in the next frame period is not required to be waited, so that the time for synthesizing the Mth frame is matched with the time for displaying the Mth frame, and the display problems of repeated frame brushing, clamping and the like are solved.

Alternatively, the frequency of the TE signal may be 240Hz, 480Hz, 1920Hz, 3860Hz, etc., for example.

In an implementation manner of the first aspect, the frame rate corresponding to the display of the mth frame image by the electronic device is a first frame rate, where the first frame rate is related to an interval duration of the first rising edge and the second rising edge, and the second rising edge is a first rising edge pulse of the TE signal after the synthesis of the mth-1 frame image.

Thus, according to the scheme of the application, the frame rate corresponding to the display of the Mth frame image by the electronic equipment is related to the interval duration of the first rising edge and the second rising edge of the TE signal, so that the electronic equipment can realize the self-adaptive switching of the frame rate based on the interval duration of the first rising edge and the second rising edge.

In one implementation manner of the first aspect, for the (m+1) th frame image, rendering and synthesizing the (m+1) th frame image in a third frame period; the electronic device displays the m+1st frame image in response to a third rising edge of the TE signal in a third frame period after synthesizing the m+1st frame image.

And the first rising edge pulse of the TE signal after the M+1st frame image is synthesized at the third rising edge.

The electronic equipment displays the frame rate corresponding to the M+1st frame image as a second frame rate, wherein the second frame rate is related to the interval duration of the third rising edge and the first rising edge; the first frame rate and the second frame rate are different.

Thus, the electronic device can display each frame image in response to the last rising edge in the corresponding frame period of the TE signal after the synthesis of the corresponding frame image; and, every time the electronic device displays a frame of image, the corresponding frame rate can be obtained by the interval duration between the rising edge of the TE signal responded by the current frame and the rising edge responded by the previous frame, thereby realizing the self-adaptive switching frame rate.

In one implementation manner of the first aspect, the method further includes: the electronic device does not respond to the fourth rising edge prior to the composition of the mth frame image.

The fourth rising edge is the rising edge pulse of the TE signal after the image of the M-1 frame is displayed.

Thus, the rising edge of the TE signal frequently responded by the electronic equipment can be avoided, and the power consumption of the electronic equipment is reduced.

In one implementation of the first aspect, before the synthesis of the mth frame image, not responding to the fourth rising edge includes: after the M-1 frame image is displayed, the TE signal response switch is turned off.

The TE signal response switch is used for triggering whether the AP responds to the rising edge of the TE signal; the fourth rising edge is not responded to before the M-th frame image is synthesized.

Thus, by providing the TE signal response switch, the reliability of the AP in response to the rising edge of the TE signal can be ensured.

In one implementation of the first aspect, an electronic device includes a display screen including a plurality of subpixels; generating a TE signal at a first frequency, comprising: and outputting the TE signal of the first frequency according to the first control signal of the second frequency.

The first control signal is used for controlling the plurality of sub-pixels to emit light, the first frequency is equal to 1/N times of the second frequency, and N is a positive integer.

Alternatively, the first control signal may be an EM signal, for example.

Thus, the application can generate TE signals with the first frequency based on the EM signals with the second frequency, and can realize self-adaptive adjustment of the frame rate based on the frequencies of the EM signals when the frame images are updated.

In one implementation manner of the first aspect, outputting the TE signal of the first frequency according to the first control signal of the second frequency includes: the electronic equipment outputs TE signals of the first frequency according to the n scanning period durations of the first control signals of the second frequency; or the electronic equipment outputs the TE signal with the first frequency according to the m pulse numbers of the first control signal with the second frequency.

Thus, the electronic device can output a rising edge of the TE signal every n scanning period durations of the first control signal, thereby obtaining the TE signal of the first frequency; or the electronic device can output a rising edge of the TE signal every m pulses of the first control signal, so as to obtain the TE signal with the first frequency, namely the electronic device adaptively switches the frame rate when updating the frame image based on the scanning period duration or the pulse number of the EM signal.

In one implementation manner of the first aspect, outputting the TE signal of the first frequency according to the first control signal of the second frequency includes: if the brightness of the display screen is smaller than the first brightness threshold value, outputting a TE signal with a first frequency according to a first control signal with a second frequency.

If the brightness of the display screen is larger than the first brightness threshold value, outputting a TE signal of a first frequency according to a first control signal of a third frequency; the third frequency is less than the second frequency.

It can be appreciated that the electronic device can adopt different PWM dimming technologies under different scenes by combining the low-frequency PWM dimming technology and the high-frequency PWM dimming technology, thereby achieving the purposes of endurance, color accuracy and eye protection. For example, in a high brightness scene (i.e., the brightness of the display screen is greater than the first brightness threshold), a low frequency PWM dimming technique is employed; in low brightness scenes (i.e., the brightness of the display screen is less than the first brightness threshold), high frequency PWM dimming techniques are employed.

And the timing of the EM signal is controlled by the PWM signal, i.e., the timing of the PWM signal is the same as the timing of the EM signal.

Thus, in the present application, if the brightness of the display screen is smaller than the first brightness threshold, the TE signal of the first frequency may be output according to the high-frequency EM signal; if the brightness of the display screen is greater than the first brightness threshold, the TE signal with the first frequency can be output according to the low-frequency EM signal, which is beneficial to improving the reliability of the generated TE signal.

Alternatively, the first luminance threshold may be 90nit (nit).

In one implementation of the first aspect, each frame of image includes a scan phase and a wait phase; each of the plurality of sub-pixels includes a pixel circuit including a driving transistor; outputting the TE signal of the first frequency according to the first control signal of the second frequency, comprising: the electronic equipment outputs a second control signal of the first frequency in a waiting stage according to the first control signal of the second frequency; the second control signal is used for resetting and compensating the voltage of the driving transistor in the waiting stage; then, the electronic device outputs a TE signal of the first frequency according to the second control signal of the first frequency.

Alternatively, the second control signal of the first frequency may be, for example, a Reset signal.

In this way, the electronic device outputs the TE signal based on the Reset signal in the waiting stage of each frame, namely, controls the TE signal output in the waiting stage of each frame, so that the electronic device switches the frame rate in the waiting stage, and the problem of screen flashing when the frame rate is switched can be effectively solved.

In a second aspect, a chip is provided, applied to an electronic device, the chip including: a memory, one or more processors; the memory is coupled to the processor; wherein the memory is for storing computer program code comprising computer instructions which, when executed by the processor, cause the chip to perform the method of any of the above first aspects.

Alternatively, the chip may be a DDIC as described in the first aspect above.

In a third aspect, an electronic device is provided, which has a function of implementing the method described in the first aspect. The functions can be realized by hardware, and can also be realized by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the functions described above.

In a fourth aspect, there is provided an electronic device comprising: a processor and a memory; the memory is configured to store computer-executable instructions that, when executed by the electronic device, cause the electronic device to perform the method of any of the first aspects.

In a fifth aspect, there is provided an electronic device comprising: a processor; the processor is configured to perform the method according to any of the first aspects above according to instructions in a memory after being coupled to the memory and reading the instructions in the memory.

In a sixth aspect, there is provided a computer readable storage medium having instructions stored therein which, when run on a computer, cause the computer to perform the method of any of the first aspects above.

In a seventh aspect, there is provided a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of any of the first aspects above.

The technical effects caused by any implementation manner of the second aspect to the seventh aspect may refer to the technical effects caused by different implementation manners of the first aspect, and are not repeated here.

Drawings

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

fig. 2 is a schematic diagram of a software framework of an electronic device according to an embodiment of the present application;

FIG. 3 is a schematic diagram showing an interface display process flow of an electronic device according to an embodiment of the present application;

FIG. 4 is a second schematic diagram of an electronic device interface display process flow according to an embodiment of the present application;

fig. 5 is a schematic diagram III of an electronic device interface display processing flow provided in an embodiment of the present application;

fig. 6 is a schematic diagram IV of an electronic device interface display processing flow provided in an embodiment of the present application;

fig. 7 is a schematic diagram fifth embodiment of an electronic device interface display processing flow provided in the present application;

fig. 8 is a schematic diagram sixth of an electronic device interface display processing flow provided in an embodiment of the present application;

Fig. 9 is a schematic diagram seventh of an electronic device interface display processing flow provided in an embodiment of the present application;

fig. 10 is a schematic flow chart of a display method according to an embodiment of the present application;

FIG. 11 is a diagram illustrating a relationship between an EM signal and a TE signal according to an embodiment of the present application;

FIG. 12 is a diagram showing a relationship between an EM signal and a TE signal according to an embodiment of the present application;

FIG. 13 is a diagram showing a relationship between an EM signal and a TE signal according to an embodiment of the present application;

FIG. 14 is a diagram illustrating a relationship between an EM signal and a TE signal with different frequencies according to an embodiment of the present application;

FIG. 15 is a second diagram illustrating a relationship between an EM signal and a TE signal with different frequencies according to an embodiment of the present application;

FIG. 16 is a schematic diagram showing the relationship between an EM signal, a Reset signal and a TE signal according to an embodiment of the present application;

fig. 17 is a schematic structural diagram of a display device according to an embodiment of the present application;

fig. 18 is a schematic hardware structure of a display device according to an embodiment of the present application;

Detailed Description

In order that those skilled in the art will better understand the solution of the present embodiment of the present application, the technical solution of the present embodiment of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiment of the present application, and it is apparent that the described embodiment is only a part of the embodiment of the present application, not all the embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, shall fall within the scope of the application.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

It should be noted that, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of the word "exemplary" or "e.g." is intended to present related concepts in a concrete implementation.

For ease of understanding, a description of some of the concepts related to the embodiments of the application are given by way of example for reference.

1. A Tearing Effect (TE) signal: a signal output by a timing controller of an electronic device is used for preventing tearing problems during refreshing of a picture during image display. Illustratively, when the electronic device is ready to refresh the next frame of image, the electronic device generates a TE signal; when the electronic device monitors the rising edge (i.e. high level) of the TE signal, the electronic device outputs the next frame of image to the display screen of the electronic device.

2. Emission control (EM) signal: a switching signal output by a timing controller of an electronic device is used for controlling a plurality of sub-pixels in a display screen of the electronic device to emit light.

3. The compensation signal (Reset), a signal outputted from the timing controller of the electronic device, is used for resetting and compensating the driving transistor of the pixel circuit in each sub-pixel, and can compensate the uneven brightness caused by the long-time light emission of the sub-pixel, thereby being beneficial to improving the flicker effect.

4. Frame: refers to a single picture of the minimum unit in the interface display. A frame is understood to mean a still picture, and displaying a plurality of successive frames in rapid succession may create the illusion of object motion. The frame rate refers to the number of times a picture is refreshed per second and can also be understood as the screen refresh rate of the electronic device. A high frame rate may result in a smoother and more realistic animation. The more frames per second, the smoother the displayed motion.

It should be noted that, before the frame is displayed on the interface, the process of drawing, rendering, synthesizing, etc. is usually required. In the embodiment of the present application, a frame may be understood as a frame image, for example, frame 1 may be understood as a 1 st frame image, frame 2 may be understood as a 2 nd frame image, and so on.

5. And (3) frame drawing: refers to image rendering of a display interface. The display interface may be composed of one or more views, each of which may be drawn by a visual control of the view system, each of which is composed of sub-views, one of which corresponds to one of the widgets in the view. For example, one of the sub-views corresponds to one of the symbols in the image view.

6. And (3) frame rendering: the rendered view is subjected to a shading operation or a 3D effect is added. For example, the 3D effect may be a light effect, a shadow effect, a texture effect, and the like.

7. And (3) frame synthesis: is a process of combining a plurality of the one or more rendered views into a display interface.

The display method provided by the embodiment of the application can be applied to the electronic equipment with the display function.

The electronic device may be a mobile phone, a tablet computer, a desktop, a laptop, a handheld computer, a notebook, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a netbook, a cellular phone, a personal digital assistant (personal digital assistant, PDA), an augmented reality (augmented reality, AR) \virtual reality (VR) device, etc., and the embodiment of the present application does not limit the specific form of the electronic device.

As shown in fig. 1, the electronic device 100 may specifically include: a processing device 110, a display driver device 120, an external memory interface 130, an internal memory 140, a universal serial bus (universal serial bus, USB) interface 150, an antenna 1, an antenna 2, a mobile communication module 160, a wireless communication module 170, a display screen 180, and the like.

The processing device 110 is a control center of the electronic apparatus 100, and may control the electronic apparatus 100 to perform various functions and data processing. By way of example, the processing device 110 may be a chip with memory, such as a system on chip (SoC).

By way of example, the processing device 110 may include a processor. Wherein the processor may be a central processing unit (central processing unit, CPU), the processor may comprise one or more processing units, such as: the processors may include application processors (application processor, AP), modem processors, graphics processors (graphics processing unit, GPU), image signal processors (image signal processor, ISP), controllers, memories, video codecs, digital signal processors (digital signal processor, DSP), baseband processors, and/or neural network processors (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

A memory may be provided in the processor for storing instructions and data. In some embodiments, the memory in the processor is a cache memory. The memory may hold instructions or data that the processor has just used or recycled. If the processor needs to reuse the instruction or data, it can be called directly from memory. Repeated access is avoided, and the waiting time of the processor is reduced, so that the efficiency of the system is improved.

In some embodiments, the processor may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.

It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present application is only illustrative, and is not meant to limit the structure of the electronic device 100. In other embodiments, the electronic device 100 may also employ different interfaces in the above embodiments, or a combination of interfaces.

The display driving device 120 is a control center of the display screen 180, and may control the display screen 180 to display various image data (e.g., display each frame of image). The display driving device 120 may be a chip with a memory, for example, the display driving device 120 may be a display driving chip (display driver integrated circuit, DDIC). The display driving chip functions to provide information of various display screens to the display screen 180 after power is applied.

In some embodiments, the display driver chip includes a Timing Controller (TCON) that can output TE signals to the processor device 110 (e.g., AP) to control the AP to output each frame synthesized to the display screen. Accordingly, the timing controller may also output an EM signal to the display 180 to control the subpixels of the display to emit light. Alternatively, the timing controller may also output a compensation signal (Reset) for applying a bias opposite to the EM signal to the driving transistor of the pixel circuit in each sub-pixel to the display screen 180.

The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 160, the wireless communication module 170, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed into a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 160 may provide a solution for applications on the electronic device 100 including 2G/3G/4G/5G wireless communication. The mobile communication module 160 may include at least one filter, switch, power amplifier, low noise amplifier (low noise amplifier, LNA), etc. The mobile communication module 160 may receive electromagnetic waves from the antenna 1, perform processes such as filtering, amplifying, and the like on the received electromagnetic waves, and transmit the processed electromagnetic waves to the modem processor for demodulation. The mobile communication module 160 may amplify the signal modulated by the modem processor, and convert the signal into electromagnetic waves through the antenna 1 to radiate the electromagnetic waves. In some embodiments, at least some of the functional modules of the mobile communication module 160 may be disposed in a processor. In some embodiments, at least some of the functional modules of the mobile communication module 160 may be disposed in the same device as at least some of the modules of the processor.

The wireless communication module 170 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., applied to the electronic device 100. The wireless communication module 170 may be one or more devices integrating at least one communication processing module. The wireless communication module 170 receives electromagnetic waves via the antenna 2, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor. The wireless communication module 170 may also receive a signal to be transmitted from the processor, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2.

In some embodiments, antenna 1 and mobile communication module 160 of electronic device 100 are coupled, and antenna 2 and wireless communication module 160 are coupled, such that electronic device 100 may communicate with a network and other devices via wireless communication technology. The wireless communication techniques may include the Global System for Mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (global positioning system, GPS), a global navigation satellite system (global navigation satellite system, GLONASS), a beidou satellite navigation system (beidou navigation satellite system, BDS), a quasi zenith satellite system (quasi-zenith satellite system, QZSS) and/or a satellite based augmentation system (satellite based augmentation systems, SBAS).

The external memory interface 130 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the electronic device 100. The external memory card communicates with the processor through an external memory interface 130 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.

The internal memory 140 may be used to store computer executable program code that includes instructions. The processor executes instructions stored in the internal memory 140 to thereby perform various functional applications and data processing of the electronic device 100. The internal memory 140 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 140 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like.

The display 180 is used to display images, videos, and the like. The display screen includes a display panel. The display panel may employ an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (flex light-emitting diode), a Mini-LED, a Micro-OLED, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED), or the like. The embodiment of the present application is not limited thereto.

The software system of the electronic device 100 may employ a layered architecture, an event driven architecture, a microkernel architecture, a microservice architecture, a cloud architecture, or the like. In the embodiment of the application, taking an Android system with a layered architecture as an example, a software structure of the electronic device 100 is illustrated by way of example.

Fig. 2 is a software configuration block diagram of an electronic device according to an embodiment of the present application.

The layered architecture divides the software into several layers, each with distinct roles and branches. The layers communicate with each other through a software interface. In some embodiments, the Android system is divided into five layers, from top to bottom, an application layer, an application framework layer, an Zhuoyun row (Android run) and system libraries, and a kernel layer, respectively.

The application layer may include a series of application packages.

As shown in fig. 2, the application package may include telephone, mailbox, calendar, camera, and like applications.

The application framework layer provides an application programming interface (application programming interface, API) and programming framework for application layer applications. The application framework layer includes a number of predefined functions.

As shown in fig. 2, the application framework layer may include a window manager, an image composition System (SF), a view system, a package manager, an input manager, an activity manager, a resource manager, and the like.

The window manager is used for managing window programs. The window manager can acquire the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.

The image composition system is used to control image composition and generate vertical synchronization (vetical synchronization, vsync) signals.

The view system includes visual controls, such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, a display interface including a text message notification icon may include a view displaying text and a view displaying a picture.

The packet manager is used for program management within the system, for example: application installation, uninstallation, and upgrades, etc.

The input manager is used for managing programs of the input device. For example, the input system may determine input operations such as a mouse click operation, a keyboard input operation, and a touch swipe.

The activity manager is used for managing the life cycle of each application program and the navigation rollback function. And the main thread creation of the Android is responsible for maintaining the life cycle of each application program.

The resource manager provides various resources for the application program, such as localization strings, icons, pictures, layout files, video files, and the like.

The android runtime includes a core library and virtual machines. And the android running time is responsible for scheduling and managing an android system.

The core library consists of two parts: one part is a function which needs to be called by java voice, and the other part is a core library of android.

The application layer and the application framework layer run in virtual machines. The virtual machine executes java files of the application layer and the application framework layer as binary files. The virtual machine is used for executing the functions of object life cycle management, stack management, thread management, security and exception management, garbage collection and the like.

The system library may include a plurality of functional modules. For example: an image rendering library, an image synthesis library, a function library, a media library, an input processing library and the like.

The image rendering library is used for rendering two-dimensional or three-dimensional images. The image composition library is used for composition of two-dimensional or three-dimensional images.

In a possible implementation manner, the application renders the image through the image rendering library, and then the application sends the rendered image to a cache queue of the image composition system. Every time the Vsync signal arrives, the image composition system sequentially acquires one frame of image to be composed from the buffer queue, and then performs image composition through the image composition library.

The function library provides macros, type definitions, string operation functions, mathematical computation functions, input-output functions, and the like used in C-speech.

Media libraries support a variety of commonly used audio, video format playback and recording, still image files, and the like. The media library may support a variety of audio video encoding formats, such as: MPEG4, h.264, MP3, AAC, AMR, JPG, PNG, etc.

The input processing library is used for processing the library of the input device, and can realize mouse, keyboard, touch input processing and the like.

The kernel layer is a layer between hardware and software. The kernel layer at least comprises a display driver, a Bluetooth driver, a Wi-Fi driver, a camera driver and the like.

The hardware may include the display driver device 120 (e.g., DDIC) and the display screen 180 shown in fig. 1, etc.

In order to improve the smoothness of display and reduce the occurrence of display blocking, electronic devices generally display based on Vsync signals to synchronize the processes of drawing, rendering, synthesizing, refreshing, and displaying images.

It will be appreciated that the Vsync signal is a periodic signal, and the Vsync signal period may be set according to a frame rate, for example, when the frame rate is 120Hz, the Vsync signal period may be 8.3ms, i.e., the electronic device generates a control signal every 8.3ms to trigger the Vsync signal period.

The Vsync signal may be divided into a software Vsync signal and a hardware Vsync signal. The software Vsync signal includes Vsync-APP and Vsync-SF. Vsync-APP is used to trigger the draw rendering process. Vsync-SF is used to trigger the composition process. The hardware Vsync signal (Vsync-HW) is used to trigger the display flow.

Typically, the software Vsync signal and the hardware Vsync signal remain periodically synchronized. Taking 120Hz to 60Hz change as an example, if Vsync-HW is switched from 120Hz to 60Hz, vsync-APP and Vsync-SF change synchronously, the Vsync-HW is switched from 120Hz to 60Hz.

The following describes a display process of an interface of the electronic device 100 in combination with software and hardware.

Fig. 3 is a schematic diagram of an electronic device interface display process flow in a possible implementation. Illustratively, as shown in FIG. 3, when the frame rate is 120Hz, the DDIC outputs a 120Hz TE signal to the AP, which, upon receiving the TE signal, converts the TE signal to Vsync-HW by the AP's board level support packet (board support package, BSP). Since the TE signal is 120Hz, the signal period of the Vsync-HW is 8.3ms, and correspondingly, the signal periods of the Vsync-APP and the Vsync-SF are 8.3ms.

That is, the electronic device generates a TE signal to trigger the Vsync-HW signal period every 8.3ms, and generates a control signal to trigger the Vsync-APP and Vsync-SF signal periods every 8.3ms.

Taking the display of frame 1 (which can be understood as a frame image) as an example, as shown in fig. 3, the Vsync-APP triggers the application of the electronic device to render frame 1 by drawing through the view system of the application framework layer. After the rendering of the frame 1 is completed, the application of the electronic device sends the rendered frame 1 to an image synthesis system (such as SF). The Vsync-SF triggers the image composition system to compose the rendered frame 1. After the frame 1 is synthesized, the Vsync-HW triggers the display driver to send the synthesized frame 1 to the DDIC, and the DDIC sends the frame 1 to the display screen so that the display screen displays the content corresponding to the frame 1.

It should be noted that, when the system load is high, the electronic device may decrease the frame rate to reduce the jamming, or increase the frame rate when the system load is low to increase the smoothness of the display. That is, in different scenarios, the electronic device needs to perform frame rate switching to adapt to the load performance of the electronic device.

In the related art, the signal period of the TE signal is set according to the frame rate. Illustratively, when the frame rate switches from 120Hz to 60Hz, the signal period of the TE signal switches from 8.3ms to 16.7ms, i.e., the electronic device generates one TE signal every 16.7ms to trigger the Vsync-HW signal period. Accordingly, the electronic device generates a control signal every 16.7ms to trigger the Vsync-APP and Vsync-SF signal periods (or frame periods).

In addition, the related art generally performs frame rate switching based on an integer multiple of a preset frame rate (e.g., 120 Hz), for example, switching to 60Hz, 40Hz, 30Hz, 20Hz, 10Hz, etc., with poor flexibility.

Fig. 4 is a schematic diagram illustrating an electronic device interface display process flow in one possible implementation. The content displayed by the electronic device corresponds to frame 1, frame 2, frame 3, and frame 4 in sequence in time order.

As shown in fig. 4, when the frame rate is 120Hz, the signal period of the TE signal is 8.3ms, and correspondingly, the signal periods of Vsync-HW, vsync-APP, and Vsync-SF are also 8.3ms. Taking the display of frame 1 as an example, vsync-APP triggers an application of the electronic device to render and draw frame 1 through the view system of the application framework layer. After the rendering of the frame 1 is completed, the application of the electronic device sends the rendered frame 1 to the image synthesis system. The Vsync-SF triggers the image composition system to compose the rendered frame 1. After frame 1 is synthesized, vsync-HW triggers the display driver to send frame 1 to the display screen to cause the display screen to display the content of frame 1. The processes of frame 2, frame 3, and frame 4 similar to that of frame 2 are also synthesized and displayed, and will not be repeated here.

When frame 3 draws the rendering, the electronic device switches from 120Hz to 60Hz, and the signal period of the te signal switches from 8.3ms to 16.7ms. Accordingly, the signal periods of Vsync-HW, vsync-APP and Vsync-SF are switched from 8.3ms to 16.7ms. Specifically, the signal period of the corresponding Vsync-APP becomes longer when the frame 3 is drawn and rendered, and the frame rate switching is completed.

Based on the above scheme, if the signal period of the software Vsync signal (e.g., vsync-SF) is not synchronous with the signal period of the hardware Vsync signal (e.g., vsync-HW), the frame synthesized by the image synthesizing system of the electronic device is inconsistent with the frame displayed on the display screen, and display problems such as frame repetition, and clamping occur.

Illustratively, in connection with fig. 4, as shown in fig. 5, after the rendering of the frame 3 is completed, the application of the electronic device sends the rendered frame 3 to the image composition system. The Vsync-SF triggers the image composition system to compose the rendered frame 3. On this basis, the image composition system does not complete the composition of the frame 3 within 16.7ms due to the fact that the load of the electronic equipment is too large, the temperature of the electronic equipment is high, or the frame rate is unstable. Since frame 3 is not synthesized, when Vsync-HW arrives, the display driver will send frame 2 to the display screen, which causes the display screen to repeatedly display the content of frame 2, and display problems such as swiping repeated frames and jamming occur, resulting in "jamming" in the user's vision.

In view of this, an embodiment of the present application provides a display method, in which an electronic device outputs a TE signal with a high frequency (i.e., a signal period is smaller) during an image display process, and implements adaptive switching of a frame rate according to a period of frame synthesis (which may also be understood as an image update period). Specifically, since the signal period of the TE signal is smaller, after the frame is synthesized, the frame can be displayed in response to the nearest rising edge of the TE signal in the current frame, without waiting for the rising edge of the TE signal in the next frame to display the frame; and the corresponding frame rate when each frame is displayed can be obtained based on the interval duration of the rising edge of the current frame synthesized response and the rising edge of the last frame synthesized response, so that the self-adaptive switching frame rate can be realized.

In addition, because the signal period of the high-frequency TE signal is smaller, the frame rate of more gears (such as 96Hz, 80Hz, 60Hz, 48Hz, 24Hz and the like) can be generated, so that the frame rate switching is more flexible. After the frame is synthesized, the electronic device can timely respond to the latest rising edge of the TE signal in the current frame to display the frame, so that the frame synthesis time is matched with the frame display time, and the display problems of repeated frames, blocking and the like can be avoided.

It should be noted that, the high-frequency TE signal refers to a TE signal having a frequency (or first frequency) greater than or equal to a preset frequency threshold. The preset frequency threshold may be 240Hz, 480Hz, or the like, for example, without limitation, and is set in practice. Alternatively, the high frequency TE signal means that the frequency of the TE signal is greater than the corresponding frame rate when the display screen displays the frame image. The frequency of the TE signal is not limited, for example, 240Hz or 480 Hz.

The technical scheme provided by the embodiment of the application is described below with reference to the accompanying drawings.

Taking the TE signal with a frequency of 480Hz (the signal period is 2.08 ms) as an example, fig. 6 is a schematic diagram of an interface display process flow of an electronic device in a possible implementation. The content displayed by the electronic device corresponds to frame 1, frame 2, and frame 3 in sequence in time order.

Exemplary, as shown in FIG. 6, an application of the electronic device passes through a view of the application framework layerAnd the system performs drawing rendering on the frame 1. After the rendering of the frame 1 is completed, the application of the electronic device sends the rendered frame 1 to the image synthesis system. The image composition system composes the rendered frame 1. After synthesizing frame 1, the image synthesizing system sends the synthesized frame 1 to the display driver, which receives TE in response to the TE signal after receiving frame 1 ₁ The rising edge sends frame 1 to the display screen to cause the display screen to display the content of frame 1.

As shown in fig. 6, after the display driver receives frame 1, the corresponding TE ₁ The rising edge is the fourth rising edge after the initial rising edge (i.e. the first rising edge) of the TE signal, and since the signal period of the TE signal is 2.08ms, TE is ₁ The rising edge is spaced from the initial rising edge by 8.32ms (the signal period of TE signal and TE ₁ The product of the number of pulses between the rising edge and the initial rising edge). The electronic device may be based on TE ₁ The duration of the interval between the rising edge and the initial rising edge (i.e. 8.32 ms) results in a frame rate of 120Hz for display frame 1 of the display screen.

For another example, an application of the electronic device renders frame 2 by drawing through a view system of an application framework layer. After the frame 2 is drawn and rendered, the application of the electronic equipment sends the drawn and rendered frame 2 to the image synthesis system. The image composition system composes the rendered frame 2. After synthesizing frame 2, the image synthesizing system sends the synthesized frame 2 to the display driver, which receives frame 2 and responds to TE ₂ The rising edge sends frame 2 to the display to cause the display to display the content of frame 2.

As shown in fig. 6, after the display driver receives frame 2, the corresponding TE ₂ The rising edge is TE ₁ The sixth rising edge after the rising edge is TE because the signal period of TE signal is 2.08ms ₂ Rising edge and TE ₁ The rising edge interval is 12.48ms long. The electronic device may be based on TE ₂ Rising edge and TE ₁ The interval duration of the rising edge (i.e. 12.48 ms) is adaptively switched from the frame rate to 80Hz, i.e. the frame rate corresponding to the display frame 2 of the display screen is 80Hz.

For another example, an application of an electronic device passes through an application frameworkAnd the layer view system is used for drawing and rendering the frame 3. After the frame 3 is drawn and rendered, the application of the electronic equipment sends the drawn and rendered frame 3 to the image synthesis system. The image composition system composes the rendered frame 3. After synthesizing frame 3, the image synthesizing system sends the synthesized frame 3 to the display driver, which receives frame 3 and responds to TE ₃ The rising edge sends frame 3 to the display to cause the display to display the content of frame 3.

After driving the received frame 3, the corresponding TE is displayed as shown in FIG. 6 ₃ The rising edge is TE ₂ The eighth rising edge after the rising edge is TE because the signal period of TE signal is 2.08ms ₃ Rising edge and TE ₂ The rising edge interval is 16.64ms long. The electronic device may be based on TE ₃ Rising edge and TE ₂ The interval duration of the rising edge (i.e. 16.64 ms) is adaptively switched from the frame rate to 60Hz, i.e. the frame rate corresponding to display frame 3 of the display screen is 60Hz.

Taking the TE signal with a frequency of 240Hz (the signal period is 4.17 ms) as an example, fig. 7 is a schematic diagram of an interface display process flow of an electronic device in a possible implementation. The content displayed by the electronic device corresponds to frame 1, frame 2, and frame 3 in sequence in time order.

Exemplary, as shown in FIG. 7, after synthesizing frame 1, the image synthesis system sends the synthesized frame 1 to the display driver, which receives frame 1, and responds to TE ₁ The rising edge sends frame 1 to the display screen to cause the display screen to display the content of frame 1. As also shown in FIG. 7, after the display driver receives frame 1, the corresponding TE ₁ The rising edge is the second rising edge number after the initial rising edge of the TE signal, and the signal period of the TE signal is 4.17ms, so the TE ₁ The rising edge is spaced 8.34ms from the initial rising edge. The electronic device may be based on TE ₁ The duration of the interval between the rising edge and the initial rising edge (i.e., 8.34 ms) results in a frame rate of 120Hz for display frame 1 of the display screen.

For another example, after synthesizing frame 2, the image synthesizing system sends the synthesized frame 2 to the display driver, which receives frame 2 and responds to TE ₂ The rising edge sends frame 2 to the display screen toCausing the display to display the content of frame 2. As shown in fig. 7, after the display driver receives frame 2, the corresponding TE ₂ The rising edge is TE ₁ The third rising edge after the rising edge, TE is because the signal period of TE signal is 4.17ms ₂ Rising edge and TE ₁ The rising edge interval is 12.51ms long. The electronic device may be based on TE ₂ Rising edge and TE ₁ The interval duration of the rising edge (i.e. 12.51 ms) results in a frame rate of 80Hz for display frame 2 of the display screen.

For another example, after synthesizing frame 3, the image synthesizing system sends the synthesized frame 2 to the display driver, which receives frame 3 and responds to TE ₃ The rising edge sends frame 3 to the display to cause the display to display the content of frame 3. As shown in fig. 7, after the display driver receives frame 3, the corresponding TE ₃ The rising edge is TE ₂ The sixth rising edge after the rising edge is TE because the signal period of TE signal is 4.17ms ₃ Rising edge and TE ₂ The rising edge interval is 25.02ms long. The electronic device may be based on TE ₃ Rising edge and TE ₂ The interval duration of the rising edge (i.e. 25.02 ms) results in a frame rate of 40Hz for display frame 3 of the display screen.

Taking the TE signal frequency of 360Hz (the signal period of 2.8 ms) as an example, fig. 8 is a schematic diagram of an electronic device interface display process in one possible implementation. The content displayed by the electronic device corresponds to frame 1, frame 2, and frame 3 in sequence in time order.

Exemplary, as shown in FIG. 8, after synthesizing frame 1, the image synthesis system sends the synthesized frame 1 to the display driver, which receives frame 1, and responds to TE ₁ The rising edge sends frame 1 to the display screen to cause the display screen to display the content of frame 1. As also shown in FIG. 8, after the display driver receives frame 1, the corresponding TE ₁ The rising edge is the third rising edge after the initial rising edge of the TE signal, and the signal period of the TE signal is 2.8ms, so TE ₁ The rising edge is spaced 8.4ms from the initial rising edge. The electronic device may be based on TE ₁ The duration of the interval between the rising edge and the initial rising edge (i.e. 8.4 ms) results in a frame rate of 120Hz for display frame 1 of the display screen.

For another example, after synthesizing frame 2, the image synthesizing system sends the synthesized frame 2 to the display driver, which receives frame 2 and responds to TE ₂ The rising edge sends frame 2 to the display to cause the display to display the content of frame 2. As shown in fig. 8, after the display driver receives frame 2, the corresponding TE ₂ The rising edge is TE ₁ The fourth rising edge after the rising edge, TE is generated because the signal period of TE signal is 2.8ms ₂ Rising edge and TE ₁ The rising edge interval is 11.2ms long. The electronic device may be based on TE ₂ Rising edge and TE ₁ The interval duration of the rising edge (i.e. 11.2 ms) results in a frame rate of 90Hz for display frame 2 of the display screen.

For another example, after synthesizing frame 3, the image synthesizing system sends the synthesized frame 3 to the display driver, which receives frame 3 and responds to TE ₃ The rising edge sends frame 2 to the display to cause the display to display the content of frame 3. As shown in fig. 8, after the display driver receives frame 3, the corresponding TE ₃ The rising edge is TE ₂ The sixth rising edge after the rising edge is TE because the signal period of TE signal is 2.8ms ₃ Rising edge and TE ₂ The rising edge interval is 16.8ms long. The electronic device may be based on TE ₃ Rising edge and TE ₂ The interval duration of the rising edge (i.e. 16.8 ms) results in a frame rate of 60Hz for the display frame 3 of the display screen.

It should be noted that, in the embodiment of the present application, the frame 1 can be understood as an M-1 frame image, TE ₁ The rising edge may be understood as a second rising edge. The above frame 2 can be understood as the Mth frame image, TE ₂ The rising edge may be understood as a first rising edge and the corresponding frame rate may be understood as a first frame rate. The above frame 3 can be understood as the M+1st frame image, TE ₃ The rising edge may be understood as a third rising edge and the corresponding frame rate may be understood as a second frame rate.

Further, the Vsync signal period may be understood as a frame period; wherein, the frame 1 draws the second frame period that the corresponding Vsync signal period can understand when rendering and synthesizing; the frame 2 draws a first frame period which is understandable in the corresponding Vsync signal period during rendering and synthesizing; frame 3 depicts a third frame period that is understandable for the corresponding Vsync signal period at the time of rendering and compositing.

In summary, with the scheme of the present application, since the signal period of the TE signal is smaller, after the frame is synthesized, the frame can be displayed in response to the nearest rising edge in the TE signal, without waiting for the rising edge of the TE signal corresponding to the next frame, and the corresponding frame rate when each frame is displayed can be obtained based on the interval duration between the rising edge of the response after the current frame is synthesized and the rising edge of the response after the previous frame is synthesized, so that the adaptive switching of the frame rate can be realized.

In addition, because the signal period of the TE signal is smaller, the frame rate of more gears (such as 96Hz, 80Hz, 60Hz, 48Hz, 24Hz and the like) can be generated, so that the frame rate switching is more flexible. And after the frame is synthesized, the electronic equipment can timely respond to the last rising edge of the TE signal to display the frame, so that the frame synthesis time is matched with the frame display time, and the display problems of repeated frames, clamping and the like can be avoided.

As shown in connection with fig. 6-8, in some embodiments, a counter may be provided in the electronic device for counting the number of pulses of the TE signal. Illustratively, after the display driver sends frame 1 to the display screen, the counter begins counting the number of pulses of the TE signal, i.e., the counter counts the number of pulses of the TE signal from TE ₁ The rising edge starts counting. When the display driver receives frame 2, respond to TE ₂ After the rising edge, the counter finishes counting and determines TE ₁ Rising edge to TE ₂ The number of pulses between rising edges. On the basis, the electronic equipment is according to TE ₁ Rising edge to TE ₂ The number of pulses between rising edges and the signal period of TE signal to obtain TE ₁ Rising edge and TE ₂ The interval duration of the rising edge is based on TE ₁ Rising edge and TE ₂ The interval duration of the rising edge determines the frame rate (which can be understood as the first frame rate).

It will be appreciated that in embodiments of the present application, the frame rate is related to the duration of the interval. In some embodiments, due to the error of the timing controller, low process accuracy, and other problems, there may be some fluctuation in the corresponding frame rate during actual display. By way of example, when the interval duration is 16.8ms, the corresponding frame rate is approximately 60Hz, and the corresponding frame rate may be 59Hz when actually displayed. Also by way of example, when the interval duration is 11.2ms, the corresponding frame rate is approximately 90Hz, and the corresponding frame rate may be 89Hz when actually displayed.

In some embodiments of the application, the electronic device outputs a TE signal to the AP (i.e., display driver) via the DDIC, and the display driver responds to the rising edge of the TE signal each time a rising edge of the TE signal is received. Illustratively, if the image compositing system sends the composited frame to the display driver, the display driver sends the frame to the display screen in response to the rising edge of the TE signal to cause the display screen to display the frame. Accordingly, if the image composition does not compose a frame, the display driver does not send a frame to the display screen even in response to the rising edge of the TE signal.

Because the signal period of the TE signal is smaller, the display drive frequently responds to the rising edge of the TE signal, and the power consumption of the electronic equipment is higher; and, the larger the frequency of the TE signal (i.e., the smaller the signal period), the higher the power consumption of the electronic device. Based thereon, in some embodiments, the electronic device may be responsive to a rising edge of the TE signal after frame synthesis; the rising edge of the TE signal is not responded to before the frame synthesis.

For example, the electronic device may set a TE signal responsive switch that is turned on after frame composition, receives and responds to a rising edge of the TE signal. The TE signal response switch is turned off before frame synthesis, and the rising edge of the TE signal is not responded.

The above-described embodiment is specifically exemplified below with reference to fig. 9.

Fig. 9 is a schematic diagram of an electronic device interface display process flow in one possible implementation. The content displayed by the electronic device corresponds to frame 1, frame 2, and frame 3 in sequence in time order.

Exemplary, as shown in FIG. 9, after frame 1 is synthesized, the image synthesis system sends the synthesized frame 1 to the display driver, which turns on the TE signal response switch after receiving frame 1, receives and responds to TE ₁ Rising edge frames1 to the display screen so that the display screen displays the content of frame 1. After the display driver sends frame 1 to the display screen, the display driver turns off the TE signal response switch, and does not respond to the rising edge of the TE signal until frame 2 is received (i.e., before frame 2 is synthesized).

After synthesizing frame 2, the image synthesizing system sends the synthesized frame 2 to the display driver, and after the display driver receives frame 2, the TE signal response switch is turned on to receive and respond to TE ₂ The rising edge sends frame 2 to the display to cause the display to display the content of frame 2. After the display driver sends frame 2 to the display screen, the display driver turns off the TE signal response switch, and does not respond to the rising edge of the TE signal until frame 3 is received (i.e., before frame 3 is synthesized). The process of frame 3, which is similar to that of frames 1 and 2, is also synthesized and displayed, and will not be described again here.

In the embodiment shown in fig. 9, the frame 2 or the frame 3 may be understood as an mth frame, and the rising edge of the TE signal that is not responded to by the display drive may be understood as a fourth rising edge.

Fig. 10 is a flow chart of a display method in a possible implementation. By way of example, an electronic device comprising a DDIC, an AP and a display screen, as shown in fig. 10, the method may comprise the following steps.

S201, the DDIC outputs a TE signal of the first frequency to the AP.

By way of example, the first frequency may be 240Hz, and the signal period of the TE signal is 4.17ms.

S202, the AP judges whether the synthesis of the frame is completed or not.

Illustratively, the AP includes an application, an image composition system, and a display driver. For example, the application renders the frame through a view system of the application framework layer. After the frame drawing rendering is completed, the application sends the drawn and rendered frame to the image synthesis system. The image composition system composes the rendered frames. After the frame is synthesized, the image synthesis system sends the frame to the display driver.

Illustratively, if the display driver receives an updated frame, the AP determines that the composition of the frame has been completed. If the display driver does not receive the updated frame, the AP determines that the composition of the frame is complete.

For example, if the display driver does not receive an updated frame, the AP turns off the TE signal response switch by the display driver, and does not respond to the rising edge of the TE signal. If the display driver receives the updated frame, the AP turns on the TE signal response switch by the display driver, and continues the following steps in response to the rising edge of the TE signal.

S203, the AP sends the synthesized frame to the DDIC.

S204, the DDIC controls the display screen to refresh the display frame.

Thus, the display driver turns on the TE signal response switch after receiving the synthesized frame, receives and responds to the rising edge of the TE signal, and sends the synthesized frame to the display screen. After the display driver sends the synthesized frame to the display screen, the TE signal response switch is turned off, and before the synthesized frame is received (i.e. before the frame is synthesized), even if the DDIC reports the TE signal, the display driver can not respond to the rising edge of the TE signal, so that the problem of higher power consumption of the electronic equipment caused by frequently responding to the rising edge of the TE signal can be effectively reduced.

It should be noted that, in the scheme provided by the embodiment of the application, the frequency of the TE signal of the electronic device can be flexibly set based on different scenes and requirements in actual implementation.

In some embodiments of the present application, the timing of the TE signal and the timing of the EM signal (which may also be referred to as a first control signal) may be combined, and the frequency of the corresponding TE signal may be reasonably set based on the frequency of the EM signal (or referred to as a second frequency). Illustratively, the frequency of the EM signal (i.e., the second frequency) is equal to the frequency of the TE signal (i.e., the first frequency), which is equal to 1/N times the second frequency, N being a positive integer.

Illustratively, the correspondence between the frequency of the TE signal and the frequency of the EM signal is shown in table 1 below.

TABLE 1

Frequency of EM signal	Frequency of TE signal	1/N
			240	240	1
360	360	1
			480	240/480	1 or 1/2
1800	360	1/5
			1920	240/480	1/8 or 1/4
2160	360/720	1/6 or 1/3
			2880	360/720	1/8 or 1/4
3240	360	1/9
			3600	360/720	1/10 or 1/5
3840	240/480	1/16 or 1/8

The correspondence relationship shown in table 1 is only an example of the present application, and does not limit the present application. Of course, the frequencies of the TE signal and the EM signal may have other correspondence relationships, which are not listed here.

It can be seen that for high frequency EM signals (e.g., 1800Hz to 3840 Hz), if the frequency of the TE signal is equal to the frequency of the EM signal, the frequency of the TE signal will be higher, and the signal period will be smaller, which will result in higher power consumption of the electronic device. Therefore, in the embodiment of the application, the frequency of the TE signal is set to be 1/N times of the frequency of the EM signal, and even if the frequency of the EM signal is high, the frequency of the TE signal is kept within a certain range, so that the problem of high power consumption of electronic equipment can be avoided.

In some embodiments, the electronic device may output the TE signal at the first frequency according to the n scan period durations of the EM signal at the second frequency; n is a positive integer.

Illustratively, the sweep period duration of the EM signal is 0.26ms when the second frequency is 3840 Hz. Taking n=8 as an example, the electronic device may output one rising edge of the TE signal every 2.08ms, i.e., the signal period of the TE signal is 2.08ms. Thus, a TE signal of 480Hz may be output according to the 8 scan period duration of the EM signal of 3840 Hz.

For example, the electronic device may set a timer for counting the duration of n scan periods of the EM signal. Illustratively, the timer begins to count when the electronic device begins to output the 3840Hz EM signal, and the electronic device outputs the first rising edge of the TE signal when the duration of the timer reaches 2.08 ms; when the duration of the timer reaches 4.16ms, the electronic device outputs the second rising edge of the TE signal, and so on.

Alternatively, the timer starts counting when the electronic device starts outputting the EM signal of 3840Hz, and the electronic device outputs the first rising edge of the TE signal when the duration of the timer reaches 2.08ms. After the electronic device outputs the first rising edge of the TE signal, the timer restarts counting, and when the duration of the timer reaches 2.08ms, the electronic device outputs the second rising edge of the TE signal, and so on.

In other embodiments, the electronic device may output the TE signal at the first frequency based on the m pulses of the EM signal at the second frequency; m is a positive integer.

For example, when the second frequency is 3840Hz, taking m=8 as an example, the electronic device may output one rising edge of the TE signal every 8 pulses of the EM signal. Since the frequency of the EM signal is 3840Hz, the scanning period duration of the EM signal is 0.26ms and the duration of the 8 pulses of the EM signal is 2.08ms. Thus, according to the 8 pulses of the EM signal of 3840Hz, a TE signal with a signal period of 2.08ms can be output, i.e., a TE signal of 480Hz can be output.

For example, the electronics may set a counter for counting the number of m pulses of the EM signal. Illustratively, the counter begins to count when the electronic device begins to output the 3840Hz EM signal, and the electronic device outputs the first rising edge of the TE signal when the value of the counter reaches 8; when the duration of the counter reaches 16, the electronic device outputs a second rising edge of the TE signal, and so on.

Alternatively, the counter starts counting when the electronic device starts outputting the EM signal of 3840Hz, and the electronic device outputs the first rising edge of the TE signal when the value of the counter reaches 8. After the electronic device outputs the first rising edge of the TE signal, the counter restarts counting, and when the value of the counter reaches 8, the electronic device outputs the second rising edge of the TE signal, and so on.

It should be noted that the foregoing is merely some examples of the electronic device outputting the TE signal of the first frequency according to the EM signal of the second frequency according to the embodiment of the present application, and is not meant to limit the present application. It is understood that other implementations capable of outputting the TE signal of the first frequency based on the EM signal of the second frequency are also within the scope of the present application.

The following is a schematic diagram of the relationship between the EM signal of the second frequency and the TE signal of the first frequency, which is shown in fig. 11-13, and illustrates the technical solution of the embodiment of the present application. In the following examples, the electronic device outputs a TE signal of 480Hz according to the number of m pulses of the EM signal of the second frequency.

Illustratively, as shown in FIG. 11, when the frequency of the EM signal is 3840Hz, the electronic device outputs one rising edge of the TE signal every 8 pulses of the EM signal. Since the frequency of the EM signal is 3840Hz, the signal period of the EM signal is 0.26ms. The duration of the 8 pulses of the EM signal is 2.08ms. Thus, the electronic device outputs a rising edge of the TE signal every 8 pulses of the EM signal, i.e. a TE signal of 480 Hz.

For another example, as shown in fig. 12, when the frequency of the EM signal is 1920Hz, the electronic device outputs one rising edge of the TE signal every 4 pulses of the EM signal. Since the frequency of the EM signal is 1920Hz, the signal period of the EM signal is 0.52ms. The duration of the 4 pulses of the EM signal is 2.08ms. Thus, the electronic device outputs a rising edge of the TE signal every 4 pulses of the EM signal, i.e. a TE signal of 480 Hz.

For another example, as shown in fig. 13, when the frequency of the EM signal is 480Hz, the electronic device outputs one rising edge of the TE signal every 1 pulse number of the EM signal. Since the frequency of the EM signal is 480Hz, the signal period of the EM signal is 2.08ms. Thus, the electronic device outputs a rising edge of the TE signal every 1 pulse of the EM signal, i.e. a TE signal of 480 Hz.

In summary, in the embodiment of the present application, the frequency of the TE signal may be output according to the frequency of the EM signal, and since the frequencies of the EM signals of different electronic devices are different, the TE signal of the first frequency is output according to the frequency of the EM signal, so that different scenes and requirements of the electronic devices can be satisfied.

It will be appreciated that the EM signal provided by the DDIC of the electronic device to each sub-pixel in the display screen is pulse width modulated (pulse width modulation, PWM) at a duty cycle to control the brightness of the corresponding sub-pixel. That is, the timing of the EM signal is controlled by PWM, and the timing of the EM signal is the same as that of PWM. In the present embodiment, the frequency of the EM signal may also be understood as the frequency of PWM.

In some embodiments, the electronic device may use different PWM dimming technologies in different scenes by combining the low-frequency PWM dimming technology and the high-frequency PWM dimming technology, so as to achieve the purposes of cruising, color calibration and eye protection.

Illustratively, in high brightness scenes (i.e., the screen brightness of the display screen is high), the brightness of each subpixel is controlled using a low frequency PWM dimming technique. In a low-brightness scene (i.e., the screen brightness of the display screen is high), the brightness of each subpixel is controlled by using a high-frequency PWM dimming technique.

The high-frequency PWM dimming technology refers to the following steps: according to the temporary characteristics of human eye vision, continuous effects of human eyes on screen contents are created by continuous brightness alternation of bright screen and off screen, seamless connection of picture contents is achieved, and the problem of screen flashing under a low-brightness scene can be effectively solved.

Therefore, the low-frequency PWM dimming technology has the power saving function, so that the purpose of cruising can be achieved by adopting the low-frequency PWM dimming technology in a high-brightness scene; in addition, under a high-brightness scene, the screen brightness of the display screen is higher, and the human eye perception capability is weaker, so that the visual experience of a user is not influenced by adopting a low-frequency PWM dimming technology.

In addition, because the high-frequency PWM dimming technology can effectively solve the problem of screen flashing in a low-brightness scene, the high-frequency PWM dimming technology can solve the problem of screen flashing in the low-brightness scene, and the color standard and the eye protection effect are achieved. Therefore, in the embodiment of the application, different PWM dimming technologies are adopted, so that the low power consumption and the eye protection function can be simultaneously considered.

In some embodiments of the present application, if the brightness of the display screen is less than the first brightness threshold, the electronic device outputs a TE signal of the first frequency according to the EM signal of the second frequency. If the brightness of the display screen is greater than the first brightness threshold, the electronic device outputs a TE signal of the first frequency according to the EM signal of the third frequency.

Of course, the electronic device may output the TE signal of the first frequency according to the EM signal of the second frequency all the time; or to output the TE signal of the first frequency based on the EM signal of the third frequency all the time, which is not limited in the embodiment of the present application.

Note that the first luminance threshold value is not particularly limited, and is set in practice. The first luminance threshold may be, for example, 90nit (nit).

It will be appreciated that the brightness of the display screen is less than the first brightness threshold, indicating that the display screen is in the low brightness scene described above. At this time, the electronic device may perform dimming using a high frequency PWM technique and output an EM signal of a second frequency. The second frequency may be, for example, 1920Hz, 3840Hz, etc., without limitation.

Correspondingly, the brightness of the display screen is larger than the first brightness threshold value, which indicates that the display screen is in the high-brightness scene. At this time, the electronic device may perform dimming using a low frequency PWM technique and output an EM signal of a third frequency. The third frequency may be, for example, 240Hz, 360Hz, etc., without limitation. It can be seen that in the embodiment of the present application, the third frequency is smaller than the second frequency.

The above-described embodiment is exemplified below with reference to fig. 14 and 15.

For example, as shown in fig. 14, if the brightness of the display screen is greater than the first brightness threshold, the electronic device outputs an EM signal at 240Hz, that is, the scan period duration of the EM signal is 4.17ms. On this basis, the electronic device may output one rising edge of the TE signal every 1 scanning period duration, i.e. the signal period of the TE signal is 4.17ms. Thus, the electronic device may output a 240Hz TE signal based on the 1 scan period duration of the 240Hz EM signal.

Accordingly, as shown in fig. 14, if the brightness of the display screen is less than the first brightness threshold, the electronic device outputs an EM signal of 1920Hz, that is, the scanning period duration of the EM signal is 0.52ms. On this basis, the electronic device may output one rising edge of the TE signal every 8 scan period durations, i.e. the signal period of the TE signal is 4.16ms. Thus, the electronic device may output a TE signal of 240Hz based on the 8 scan period duration of the 1920Hz EM signal.

As also shown in fig. 14, after synthesizing frame 1, the image synthesis system sends the synthesized frame 1 to the display driver, which receives frame 1 and responds to TE ₁ The rising edge sends frame 1 to the display screen to cause the display screen to display the content of frame 1. As can be seen from fig. 14, after the display driver receives frame 1, the corresponding TE ₁ The rising edge is the second rising edge after the initial rising edge, and TE is generated because the signal period of TE signal is 4.17ms ₁ The rising edge is spaced 8.34ms from the initial rising edge. The electronic device may be based on TE ₁ The duration of the interval between the rising edge and the initial rising edge (i.e. 8.34 ms) gives a corresponding frame rate of 120Hz for display frame 1. The process of frame 2, which is similar to that of frame 1, is also synthesized and displayed and will not be described again here.

As another example, as shown in fig. 15, if the brightness of the display screen is greater than the first brightness threshold, the electronic device outputs an EM signal of 360Hz, that is, the scanning period duration of the EM signal is 2.8ms. On this basis, the electronic device may output one TE rising edge of the TE signal every 1 scanning period duration, i.e. the signal period of the TE signal is 2.8ms. Thus, the electronic device may output a 360Hz TE signal based on a 1 scan period duration of the 360Hz EM signal.

Accordingly, as shown in fig. 15, if the brightness of the display screen is smaller than the first brightness threshold, the electronic device outputs an EM signal of 2160Hz, that is, the scanning period of the EM signal is 0.46ms. On this basis, the electronic device may output one rising edge of the TE signal every 6 scan period durations, i.e. the signal period of the TE signal is 2.76ms. Thus, the electronics can output a TE signal of 360Hz based on the 6 scan period duration of the 2160Hz EM signal.

As also shown in fig. 15, after synthesizing frame 1, the image synthesis system sends the synthesized frame 1 to the display driver, which receives frame 1 and responds to TE ₁ The rising edge sends frame 1 to the display screen to cause the display screen to display the content of frame 1. As can be seen from fig. 15, after the display driver receives frame 1, the corresponding TE ₁ The rising edge is the third rising edge after the initial rising edge, and TE is generated because the signal period of TE signal is 2.76ms ₁ The rising edge is spaced from the initial rising edge by 8.28ms. The electronic device may be based on TE ₁ The duration of the interval between the rising edge and the initial rising edge (i.e., 8.28 ms) results in a frame rate of 120Hz for frame 1 displayed by the display screen. The process of frame 2, which is similar to that of frame 1, is also synthesized and displayed and will not be described again here.

As shown in fig. 14 and 15, the electronic device adaptively switches the frame rate based on the interval length of the rising edge of the current frame post-synthesis response and the rising edge of the previous frame post-synthesis response at the time of image update. Since the interval duration is related to the signal period of the TE signal and the number of pulses of the spaced TE signal, and the signal period of the TE signal and the number of pulses of the spaced TE signal are related to the number of pulses of the EM signal, it can also be understood that the present application is based on adaptively switching the frame rate of the number of pulses (or scanning period) of the EM signal at the second frequency.

Illustratively, the correspondence between the number of pulses of the EM signal and the frame rate at different frequencies is shown in table 2 below.

TABLE 2

The correspondence relationship shown in table 2 is only an example of the present application, and does not limit the present application. Of course, the EM signal may have other frequencies, and accordingly, the number of pulses of the EM signal and the frame rate may have other correspondence, which is not listed here.

As can be seen from table 2 above, when the frequency of the EM signal is 240Hz, the electronic device can adaptively switch the frame rate to 120Hz based on the number of 2 pulses of the 240Hz EM signal. Correspondingly, the electronic device can adaptively switch the frame rate to 60Hz based on the number of 4 pulses of the 240Hz EM signal. Where "/" indicates that the electronic device cannot switch to 90Hz when the frequency of the EM signal is 240 Hz. The EM signal adaptive switching frame rate of other frequencies is similar to the 240Hz EM signal and will not be described in detail here.

In the image display process, in order to improve the flicker effect, the electronic device may have a blank area (i.e., a pore area) in each frame display process, or may be referred to as a black insertion area (blanking area), or may be referred to as a waiting (vporch) stage (or hold stage). And the black insertion region corresponds to a shutdown region of the EM signal. The off interval of the EM signal may be understood as an inactive level interval (e.g., a falling edge interval in an embodiment of the present application).

In the embodiment of the application, the electronic device can output the second control signal (or Reset signal) with the first frequency in each frame black insertion area (namely the falling edge area of the EM signal) for resetting and compensating the voltage of the driving transistor so as to compensate the phenomenon of uneven brightness caused by long-time luminescence of the sub-pixels, thereby being beneficial to improving the flicker effect.

In an exemplary manner, the electronic device outputs an active level of the Reset signal in the black insertion area of each frame according to the EM signal of the second frequency in the off interval of the EM signal, thereby enabling to output the Reset signal of the first frequency such that the frequency of the TE signal is equal to the frequency of the Reset signal.

It should be noted that the active level of the Reset signal is related to the corresponding transistor type. For example, when the transistor type corresponding to the EM signal is the same as the transistor type corresponding to the Reset signal, one low level (i.e., active level) of the Reset signal is output in each off interval (e.g., high level interval) of the EM signal. However, when the transistor type corresponding to the EM signal is different from the transistor type corresponding to the Reset signal, one high level (i.e., active level) of the Reset signal is output in each off interval (e.g., high level interval) of the EM signal.

That is, whether the timing of the Reset signal is opposite to or the same as the timing of the EM signal depends on the type of transistor corresponding to the EM signal and the type of transistor corresponding to the Reset signal, and the embodiment of the present application is not limited thereto, specifically, based on the actual setting. The following embodiment illustrates an example in which the active level of the Reset signal is low, that is, one low level (or falling edge) of the Reset signal is output in the black insertion area of each frame and in the off interval of the EM signal.

For example, as shown in fig. 16, when the frequency of the EM signal is 240Hz, the electronic device outputs one falling edge of the Reset signal, i.e., outputs the Reset signal of 240Hz, according to the EM signal of 240Hz in a waiting period (i.e., black insertion area) of each frame. Then, the electronic device outputs a rising edge of the TE signal in a waiting phase of each frame according to the output 240Hz Reset signal, i.e., outputs the 240Hz TE signal.

When the frequency of the EM signal is 1920Hz, the electronic device outputs one falling edge of the Reset signal, i.e., outputs a 240Hz Reset signal, in the waiting phase of each frame according to the 1920Hz EM signal. Then, the electronic device outputs a rising edge of the TE signal in a waiting phase of each frame according to the output 240Hz Reset signal, i.e., outputs the 240Hz TE signal.

In this way, the electronic device can output a rising edge of the TE signal in the waiting stage of each frame, so that the electronic device adaptively switches the frame rate based on the rising edge of the TE signal in the waiting stage, thereby avoiding the problem of screen flicker caused by switching the frame rate in the display stage.

The display method according to the embodiment of the present application has been described above, and the electronic device for executing the display method according to the embodiment of the present application is described below. It will be appreciated by those skilled in the art that the methods and apparatuses may be combined and referred to each other, and that the electronic device provided in the embodiments of the present application may perform the steps in the foregoing display method.

As shown in fig. 17, fig. 17 shows a schematic structural diagram of a display device according to an embodiment of the present application. The display device may be an electronic apparatus in an embodiment of the present application. The display device includes: a display 1101 for displaying an image (i.e., displaying the content of a frame); one or more processors 1102; a memory 1103 and one or more computer programs, wherein the processor 1102 and the memory 1103 are coupled; one or more computer programs are stored in the memory 1103, the one or more computer programs comprising instructions, which when executed by the display device, cause the display device to perform the steps of the display methods described above.

Fig. 18 is a schematic hardware structure of a display device according to an embodiment of the present application. Referring to fig. 18, the apparatus includes: a memory 1201, a processor 1202 and an interface circuit 1203. The apparatus may also include a display 1204. Wherein the memory 1201, the processor 1202, the interface circuit 1203, and the display 1204 may communicate. The memory 1201, the processor 1202, the interface circuit 1203 and the display screen 1204 may communicate through a communication bus, and the memory 1201 is used for storing computer execution instructions, which are controlled to be executed by the processor 1202, and the interface circuit 1203 performs communication, thereby implementing the display method provided by the embodiment of the present application.

Optionally, the interface circuit 1203 may also include a transmitter and/or a receiver. Alternatively, the processor 1202 may include one or more CPUs, but may be other general purpose processors, digital signal processors (digital signal processor, DSPs), application specific integrated circuits (application specific integrated circuit, ASICs), etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in a processor for execution.

In a possible implementation manner, the computer instructions in the embodiment of the present application may also be referred to as application program code, which is not limited in particular by the embodiment of the present application.

The data processing device provided in the embodiment of the present application is configured to execute the display method in the above embodiment, and the technical principle and the technical effect are similar, and are not repeated herein.

The embodiment of the application provides electronic equipment, and the structure is shown in fig. 1. The memory of the electronic device may be configured to store at least one program instruction, and the processor is configured to execute the at least one program instruction, so as to implement the technical solution of the method embodiment described above. The implementation principle and technical effects are similar to those of the related embodiments of the method, and are not repeated here.

The embodiment of the application provides a chip. The chip comprises a processor for invoking a computer program in a memory to perform the technical solutions in the above embodiments. The implementation principle and technical effects are similar to those of the related embodiments of the method, and are not repeated here.

In alternative implementations, the chip may be a DDIC in the above embodiments.

An embodiment of the present application provides a computer program product, which when run on an electronic device, causes the electronic device to execute the technical solution in the above embodiment. The implementation principle and technical effects are similar to those of the related embodiments of the method, and are not repeated here.

An embodiment of the present application provides a computer readable storage medium, on which program instructions are stored, which when executed by an electronic device, cause the electronic device to execute the technical solution of the above embodiment. The implementation principle and technical effects are similar to those of the related embodiments of the method, and are not repeated here.

It will be apparent to those skilled in the art from this description that, for convenience and brevity of description, only the above-described division of the functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to perform all or part of the functions described above.

In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another apparatus, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and the parts displayed as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be essentially or a part contributing to the prior art or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions for causing a device (may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely illustrative of specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. The display method is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a display driving chip DDIC and an application processor AP; the method comprises the following steps:

generating a tearing effect TE signal with a first frequency in the image display process; the TE signal is a Vsync-HW signal output by the DDIC to the AP, and the first frequency is higher than a frame rate corresponding to the frame image displayed by the electronic equipment;

for an Mth frame image, rendering and synthesizing the Mth frame image in a first frame period; after synthesizing the mth frame image, displaying the mth frame image in response to a first rising edge of the TE signal within the first frame period; the first rising edge is the first rising edge pulse of the TE signal after the M-th frame image is synthesized; m is more than or equal to 2, and M is an integer.

2. The method of claim 1, wherein the step of determining the position of the substrate comprises,

the frame rate corresponding to the Mth frame image is displayed as a first frame rate, the first frame rate is related to the interval duration of the first rising edge and the second rising edge, and the second rising edge is the first rising edge pulse of the TE signal after the synthesis of the Mth-1 frame image in the second frame period; the second frame period is a frame period for rendering and synthesizing the M-1 frame image.

3. The method according to claim 1 or 2, characterized in that the method further comprises:

for the (M+1) th frame image, drawing, rendering and synthesizing the (M+1) th frame image in a third frame period; after synthesizing the m+1th frame image, displaying the m+1th frame image in response to a third rising edge of the TE signal in the third frame period; the third rising edge is the first rising edge pulse of the TE signal after the M+1st frame image is synthesized; the frame rate corresponding to the M+1st frame image is displayed as a second frame rate, and the second frame rate is related to the interval duration of the third rising edge and the first rising edge; the first frame rate and the second frame rate are different.

4. A method according to any one of claims 1-3, characterized in that the method further comprises:

before the synthesis of the Mth frame image, the fourth rising edge is not responded; the fourth rising edge is a rising edge pulse of the TE signal after the M-1 frame image is displayed.

5. The method of claim 4, wherein the failing to respond to the fourth rising edge prior to the mth frame image synthesis comprises:

after the M-1 frame image is displayed, closing a TE signal response switch; the TE signal response switch is used for triggering whether the AP responds to the rising edge of the TE signal or not;

the fourth rising edge is not responded to before the M-th frame image is synthesized.

6. The method of any of claims 1-5, wherein the electronic device comprises a display screen comprising a plurality of subpixels; the generating a TE signal at a first frequency includes:

outputting a TE signal of a first frequency according to a first control signal of a second frequency;

the first control signal is used for controlling the plurality of sub-pixels to emit light, and the first frequency is equal to 1/N times of the second frequency; n is a positive integer.

7. The method of claim 6, wherein outputting the TE signal at the first frequency based on the first control signal at the second frequency comprises:

outputting TE signals of the first frequency according to n scanning period durations of the first control signals of the second frequency; or,

outputting TE signals of the first frequency according to the m pulse numbers of the first control signals of the second frequency; n and m are positive integers.

8. The method according to claim 6 or 7, wherein outputting the TE signal of the first frequency according to the first control signal of the second frequency comprises:

and if the brightness of the display screen is smaller than a first brightness threshold value, outputting the TE signal of the first frequency according to the first control signal of the second frequency.

9. The method of claim 8, wherein the method further comprises:

if the brightness of the display screen is greater than the first brightness threshold, generating a TE signal of a first frequency according to the first control signal of a third frequency;

wherein the third frequency is less than the second frequency.

10. The method according to any one of claims 6-9, wherein each frame of image comprises a scan phase and a wait phase; each subpixel of the plurality of subpixels includes a pixel circuit including a drive transistor; the outputting the TE signal of the first frequency according to the first control signal of the second frequency comprises:

Outputting a second control signal of the first frequency in the waiting phase according to the first control signal of the second frequency; wherein the second control signal is used for resetting and compensating the voltage of the driving transistor in the waiting stage;

and outputting the TE signal of the first frequency according to the second control signal of the first frequency.

11. A chip for use in an electronic device, the chip comprising:

a memory;

one or more of the processors of the present invention,

the memory is coupled to the processor;

wherein the memory is for storing computer program code, the computer program code comprising computer instructions; the computer instructions, when executed by the processor, cause the chip to perform the method of any of claims 1-10.

12. An electronic device, comprising:

a memory;

one or more processors;

the memory is coupled to the processor;

wherein the memory is for storing computer program code, the computer program code comprising computer instructions; the computer instructions, when executed by the processor, cause the electronic device to perform the method of any of claims 1-10.

13. A computer-readable storage medium, comprising: computer instructions which, when run on an electronic device, cause the electronic device to perform the method of any of claims 1-10.