CN117118553A - A clock synchronization method and communication device - Google Patents

Abstract

A clock synchronization method and a communication device, the method comprising: the first equipment receives a plurality of first messages sent by the second equipment, and determines deviation between a clock of the first equipment and a reference clock of the second equipment according to a plurality of first times and a plurality of second times corresponding to the plurality of first messages, so that the clock of the first equipment is calibrated based on the deviation. The first messages and the first times are in one-to-one correspondence, and the first times are the sending times of the corresponding first messages. The first times and the second times are in one-to-one correspondence, and one second time in the second times is the receiving time of the first message corresponding to one first time in the first times. By the method provided by the embodiment of the application, the first equipment does not need to feed back the message to the second equipment, so that the second equipment does not need to deploy related protocols of PTP, more equipment can be deployed in the network, and the problem of limited quantity of equipment in the network can be solved.

Description

A clock synchronization method and communication device

Technical field

The present application relates to the field of synchronization technology, and in particular, to a clock synchronization method and communication device.

Background technique

Clock synchronization can synchronize the time, frequency, phase, etc. of each node in the network, so that each node can interact normally. For example, take node A that needs to synchronize node B as an example. Both node A and node B are equipped with clock modules and processing modules. The processing module can process related messages and collect timestamps, and send the obtained messages and timestamp information. The clock module can obtain clock information, such as time deviation, frequency deviation, etc., based on the received timestamp information, thereby adjusting the local real-time clock. , to achieve clock synchronization of each node. However, this process requires the node to be synchronized (such as node B) to send a message to the node that needs to be synchronized (such as node A). This requires deploying the precision time protocol (PTP) on node A, which requires node A to have The PTP function limits the number of nodes in the network.

Contents of the invention

This application provides a clock synchronization method and communication device to solve the problem of limited number of nodes in the network.

In a first aspect, embodiments of the present application provide a clock synchronization method, which can be executed by a first communication device. The first communication device can be a communication device or a communication device that can support the communication device to implement the functions required by the method, such as a chip. system. The following description takes the communication device as the first device as an example. Illustratively, the first communication device is a first device, or a chip provided in the first device, or other components used to implement the functions of the first device. The method includes:

The first device receives multiple first messages sent by the second device, and determines the clock of the first device and the reference clock of the second device based on multiple first times and multiple second times corresponding to the multiple first messages. deviation between them, thereby calibrating the clock of the first device based on the deviation. Wherein, multiple first messages correspond to multiple first times one-to-one, and the first time is the sending time of the corresponding first message. A plurality of first times and a plurality of second times correspond one to one, and a second time among the plurality of second times is the reception time of the first message corresponding to a first time among the plurality of first times.

The first device and the second device are located on the same network. The first device can be considered as a device that requires clock synchronization, and the second device can be considered as a reference clock source. In this embodiment of the present application, the second device may be any device in the network except the first device. That is, the embodiment of the present application can use any clock in the network as a reference clock, thereby eliminating the need for an external clock source and reducing equipment deployment costs and management costs. The second device sends the message carrying the sending time to the first device. The first device can calculate the clock compared to the second device (ie, the reference clock) based on the sending time of the first message and the time of receiving the first message. Deviation, frequency offset, or phase difference, etc., to achieve clock synchronization between the first device and the second device. Through the method provided by the embodiments of this application, the first device does not need to feed back a message to the second device. Therefore, the second device does not need to deploy PTP-related protocols, which allows the network to deploy more devices and solve the problem of devices within the network. Limited number of questions.

In a possible implementation, the method further includes: the first device receiving at least one second message sent by the third device, each second message including the first time; the first device according to at least one At least one first time and at least one third time corresponding to the second message determine the deviation between the clock of the first device and the reference clock of the second device. At least one first time corresponds to at least one third time, and one of the at least one third time is the reception time of the second message corresponding to the third time.

The third device is a device located on the same network as the first device and the second device. The second message sent by the third device includes the first time, which can be understood as the third device receives the first message sent by the second device and forwards the first message to other devices in the network. In this way, even if the first device does not receive the first message broadcast or multicast by the second device, it can still receive the second message carrying the first time from the third device. Therefore, the first device can determine the deviation between the clock of the first device and the clock of the second device based on the first time in the second message received from the third device and the third time of receiving the second message. That is, the success rate of the first device in determining the deviation between the clock of the first device and the clock of the second device is improved.

In a possible implementation, the deviation includes a frequency deviation, and the first device determines the deviation between the clock of the first device and the reference clock of the second device based on a plurality of first times and a plurality of second times, including:

The first device maps multiple sets of time stamps to a two-dimensional coordinate system and determines a first straight line based on the objective function. Wherein, one set of timestamps among the multiple sets of timestamps includes a first time and a corresponding fourth time. The two-dimensional coordinates use the first time as the abscissa, the fourth time as the ordinate, and the fourth time is the difference between the second time and the first time. The slope of the first straight line is the frequency difference between the clock of the first device and the reference clock of the second device. The objective function makes multiple sets of timestamps in the two-dimensional coordinate system lie on the same side of the first straight line. It can be understood that a set of timestamps includes the sending time of a message and the corresponding time difference between the receiving time and the sending time of the message. Multiple sets of timestamps are mapped with the sending time as the abscissa and the time difference as the ordinate. to a two-dimensional coordinate system. The overall tilt trend of the multiple sets of time stamps in the two-dimensional coordinate system can represent the frequency difference between the clock of the first device and the reference clock of the second device. Through the objective function, multiple sets of time stamps in the two-dimensional coordinate system are located on the same side of the first straight line, thereby obtaining a more accurate frequency difference.

Among possible implementations, the objective function satisfies: stax _i +by _i ≤ε, where, x _i =t _1,i , y _i =t _2,i -t _1,i , ε is the preset parameter, t _1,i and t _2,i -t _{1, i} is the i-th group of timestamps. Through this objective function, a in the first straight line ax+b tends to a stable value, thereby obtaining a more accurate frequency deviation.

In a possible implementation, the method further includes: the first device determines that the value of the first straight line on a set of timestamps with the largest abscissa among the multiple sets of timestamps is the phase deviation. Using the value of the first straight line on the time stamp with the largest abscissa among multiple sets of timestamps as the phase deviation can filter out noise during packet transmission, thus supporting end-to-end deployment of equipment.

In a possible implementation, the phase deviation determined for the first time by the first device is a reference value for phase adjustment. This can maintain the clock phase deviation and avoid clock synchronization failure due to accumulation of phase deviation or jump of phase deviation.

In a possible implementation, the first device calibrates the clock of the first device based on the deviation, including:

The first device determines a frequency compensation value, and calibrates the frequency of the clock of the first device according to the frequency compensation value. The frequency compensation value is the ratio of the frequency difference to the clock frequency. Since the ratio of the frequency difference to the clock frequency, that is, the frequency compensation value, will affect the time increment of the clock after each pulse signal is received, therefore, the clock of the first device can be calibrated based on the frequency compensation value. And there is no need to lock the digital phase-locked loop, which can reduce the requirements for the stability of the crystal oscillator, thereby reducing the crystal oscillator cost of the first device.

In a possible implementation manner, the first message is sent in a broadcast mode or a multicast mode. In this way, any device in the network where the second device is located uses the clock of the second device as a reference clock, thereby achieving clock synchronization of each device in the network.

In a possible implementation, the first message is generated on the control plane and sent through the data plane port. It is understandable that compared to the control plane, generating timestamps on the data plane is more accurate and reliable. Therefore, sending the first message through the data plane port can improve the accuracy of clock synchronization.

In a possible implementation, it is determined on the control plane or data plane at the first time. The first time, that is, the sending time of the first message can be generated on the control plane or on the data plane, which is more flexible.

In a possible implementation, the first device and the second device communicate directly, that is, point-to-point deployment of the devices is supported. Of course, other devices can also be deployed between the first device and the second device, with a wider scope of application.

In the second aspect, embodiments of the present application provide a communication device, which has the function of implementing the behavior in the method embodiment of the first aspect. For beneficial effects, please refer to the description of the first aspect, and will not be described again here. The communication device may be the first device in the first aspect, or the communication device may be a device capable of implementing the method provided in the first aspect, such as a chip or a chip system.

In a possible design, the communication device includes corresponding means or modules for performing the method of the first aspect. For example, the communication device includes a processing unit (sometimes also called a processing module or processor) and/or a transceiver unit (sometimes also called a transceiver module or transceiver). These units (modules) can perform the corresponding functions in the above-mentioned method examples of the first aspect. For details, please refer to the detailed description in the method examples, which will not be described again here.

In a third aspect, embodiments of the present application provide a communication device. The communication device may be the communication device in the first aspect of the above embodiments, or a chip or chip system provided in the communication device in the first aspect. The communication device includes a communication interface and a processor, and optionally, a memory. The memory is used to store computer programs, and the processor is coupled to the memory and the communication interface. When the processor reads the computer program or instructions, the communication device causes the communication device to execute the method executed by the first device in the above method embodiment.

In a fourth aspect, embodiments of the present application provide a communication device, which includes an input-output interface and a logic circuit. Input and output interfaces are used to input and/or output information. Logic circuitry is used to perform the method described in the first aspect.

In a fifth aspect, embodiments of the present application provide a chip system, which includes a processor and may also include a memory and/or a communication interface for implementing the method described in the first aspect. In a possible implementation, the chip system further includes a memory for storing a computer program. The chip system can be composed of chips or include chips and other discrete devices.

In a sixth aspect, embodiments of the present application provide a communication system, which includes a first device and a second device, wherein the first device is configured to perform the method performed by the first device in the first aspect, The second device is configured to perform the method performed by the second device in the above first aspect. Alternatively, the communication system may also include more first devices and/or more second devices.

In a seventh aspect, the present application provides a computer-readable storage medium that stores a computer program. When the computer program is run, the method in the first aspect is implemented.

In an eighth aspect, a computer program product is provided. The computer program product includes: computer program code. When the computer program code is run, the method in the first aspect is executed.

For the beneficial effects of the above second to eighth aspects and their implementation, reference can be made to the description of the beneficial effects of the first aspect and their implementation.

Description of drawings

Figure 1 is a schematic diagram of the principle of synchronous Ethernet provided by the embodiment of the present application;

Figure 2 is a schematic diagram of the principle of achieving clock synchronization of two devices based on timestamps provided by an embodiment of the present application;

Figure 3 is an application scenario of the embodiment of the present application;

Figure 4 is a schematic flow chart of a clock synchronization method according to an embodiment of the present application;

Figure 5 is a schematic diagram of generating timestamps on the data plane according to an embodiment of the present application;

Figure 6 is a schematic diagram of generating timestamps on the control plane according to an embodiment of the present application;

Figure 7 is a schematic diagram of a broadcast scenario applicable to the embodiment of the present application;

Figure 8 is a schematic diagram of a multicast scenario applicable to the embodiment of this application;

Figure 9 is a schematic diagram of clock synchronization of two devices provided by an embodiment of the present application;

Figure 10 is a schematic structural diagram of a communication device provided by an embodiment of the present application;

Figure 11 is another schematic structural diagram of a communication device provided by an embodiment of the present application.

Detailed ways

First, some terms or concepts involved in the embodiments of the present application are introduced to facilitate those skilled in the art to understand the solutions provided by the embodiments of the present application.

1) Clock synchronization, including three types: time synchronization, frequency synchronization and phase synchronization. Among them, time synchronization means that the coordinated universal time (universal time coordinated, UTC) of different clocks is absolutely consistent. For example, if the UTC of clock A is the same as the UTC of clock B, then the times of clock A and clock B are synchronized. The UTC of the two clocks is different, and it can also be considered that there is a clock offset in the two clocks. It should be understood that clock offset is the relative difference between two clocks. For example, at the same moment, the UTC of clock 1 is 12:00, the UTC of clock 2 is 12:01, the clock offset of clock 1 relative to clock 2 is -1 second, and the clock offset of clock 2 relative to clock 1 The clock offset is 1 second.

Frequency synchronization means that the frequency of the signal remains unchanged. For example, starting from the starting moment, after a period of time, the frequency of the signal tracks to the reference frequency. It should be noted that frequency synchronization does not require the frequency of the signal to be consistent with the reference frequency at the starting moment. For example, the frequency of signal A at the first moment is f1, and the frequency of signal B at the second moment is f2. After the first duration, f1 becomes f, and after the second duration, f2 becomes f. If f1 and f2 are different, the first moment and the second moment can be different, and the first duration and the second duration can also be different. If the frequency of the signal is not synchronized, it can also be considered that the signal has a frequency deviation at different times, which is also called drift. It should be understood that the offset speed refers to the rate at which the offset between the two clocks changes with time, and represents the size of the clock offset change after unit time. The unit time can be seconds or microseconds, etc.

Phase synchronization is based on frequency synchronization, and the two time differences of the signal remain unchanged. It can also be understood that on the basis of frequency synchronization, the phase is adjusted so that the phase tracks the reference phase. Similar to frequency synchronization, phase synchronization does not require the phase of the signal to be consistent with the reference phase at the starting moment. For example, the phase of signal A at the first moment is θ1, and the phase of signal B at the second moment is θ2. After the first duration, θ1 becomes θ, and after the second duration, θ2 becomes θ. If θ1 and θ2 are different, the first moment and the second moment can be different.

2) Synchronization ethernet (SyncE) is a clock synchronization technology. SyncE means that the receiving end recovers the clock of the transmitting end from the serial data stream through the Ethernet physical layer (PHY) chip, thereby achieving clock synchronization. For easy understanding, please refer to Figure 1, which is a schematic diagram of the principle of synchronous Ethernet. Figure 1 takes the network as an example including device 1 and device 2. Device 1 is the sender and device 2 is the receiver. As can be seen from Figure 1, both the sending end and the receiving end include physical layer chips. The sending end also includes clock 1 and is connected to clock source 1; the receiving end also includes a phase-locked loop and is connected to clock source 2. It should be understood that since SyncE has the defect of large signal noise, the noise needs to be processed through a phase-locked loop.

The sending end sends a serial data code stream to the receiving end through the physical layer chip, and the receiving end recovers the clock of the sending end based on the serial data code stream. It should be understood that the external clock source 1 can provide the reference time for the sending end. In the same way, the external clock source 2 provides the reference time for the receiving end. The receiving end can adjust the local clock according to the clock of the transmitting end and the external clock source 2. The adjusted local clock can be considered as the system clock of the receiving end, and the receiving end can perform service transmission according to the system clock. For example, the service module at the receiving end can obtain the system clock and transmit services based on the system clock. For another example, the physical layer chip at the receiving end can obtain the system clock and send a serial data stream to the transmitting end based on the system clock.

3) Time stamp-based clock synchronization method, that is, the device that needs to be synchronized can send the first message and the first sending time of the first message to the device to be synchronized, and the device to be synchronized records the first reception time of receiving the first message. , and sends the second message, the first receiving time and the second sending time of the second message to the device that needs to be synchronized. The device that needs to be synchronized receives the second message and records the second reception time of the second message. The device that needs to be synchronized can calculate the clock information based on the first sending time, the first receiving time, the second sending time and the second receiving time, and then adjust the local clock. The first sending time and the first receiving time can be considered as a set of one-way timestamps. Similarly, the second sending time and the second receiving time are also a set of one-way timestamps. That is, the one-way timestamp includes the sending timestamp of the message recorded by the sending end to the receiving end, and the receiving timestamp of the receiving end receiving the message.

For ease of understanding, please refer to Figure 2. The device that needs to be synchronized is device 1, the device to be synchronized is device 2, the first sending time is TXa, the first receiving time is RXb, the second sending time is txb, and the second receiving time is rxa. Assume that the reference clock is t, the offset of device 1 compared to t is Δt _a , and the offset of device 2 compared to t is Δt _b . Then it can be seen that the clock of device 1 is t _a =t+Δt _a , and the clock of device 2 is Δt a t _b =t + Δt _b , the clock offset between device 1 and device 2 is offset = Δt _b −Δt _a . Assuming that the One Way Delay (OWD) of the packet sent by device 1 to device 2 and the packet sent by device 2 to device 1 are the same, then device 1 can calculate:

Device 1 can adjust the local clock based on OWD and offset. For example, t _a can be adjusted to t _b +offset-OWD, or t _b +offset-OWD, thereby achieving clock synchronization between device 1 and device 2.

4) In the embodiments of this application, the number of nouns, unless otherwise specified, means "singular noun or plural noun", that is, "one or more". "At least one" means one or more, and "plurality" means two or more. "And/or" describes the association of associated objects, indicating that there can be three relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. The character "/" generally indicates that the related objects are in an "or" relationship. For example, A/B means: A or B. "At least one of the following" or similar expressions thereof refers to any combination of these items, including any combination of a single item (items) or a plurality of items (items). For example, at least one of a, b, or c means: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, c Can be single or multiple.

The ordinal words such as "first" and "second" mentioned in the embodiment of this application are used to distinguish multiple objects and are not used to limit the size, content, order, timing, priority or importance of multiple objects. For example, the first message and the second message can be the same message or different messages, and this name does not indicate the content, priority or importance of the two messages. s difference. In addition, the numbering of steps in the various embodiments introduced in this application is only to distinguish different steps and is not used to limit the order between steps.

In a distributed network, in order to ensure the normal interaction of each node, each node needs clock synchronization. For example, any node can achieve clock synchronization with other nodes based on SyncE technology, or it can also achieve clock synchronization with other nodes based on a timestamp-based clock synchronization method. However, as can be seen from Figure 1, clock synchronization based on SyncE technology requires both the sender and the receiver to connect external clock sources to maximize the accuracy of clock synchronization, which will obviously increase deployment costs. In addition, the receiving end needs to set up a phase-locked loop to handle noise, which requires the receiving end to be equipped with a crystal oscillator with higher stability, thus increasing the hardware cost of the receiving end. Moreover, SyncE needs to deploy devices hop by hop. From this perspective, it will also increase the cost of deployment and the cost of managing the deployed devices. Figure 2 The clock synchronization method based on timestamp requires the receiving end to feed back a message to the sending end. This requires deploying PTP on the device that needs to be synchronized, which means that the device that needs to be synchronized is required to have PTP functionality. Nodes without PTP deployed cannot achieve clock synchronization, thus limiting the number of nodes in the network.

In view of this, technical solutions of embodiments of the present application are provided. In this solution, any clock in the network can be used as the reference clock, eliminating the need for an external clock source and reducing equipment deployment and management costs. The device selected as the reference clock (also called the clocked device) can send a message carrying the sending time to the device that needs clock synchronization. The device that needs clock synchronization can realize the clock synchronization method based on the timestamp with the clocked device. Synchronize the device's clock synchronization. For example, the clock-synchronized device sends the first message carrying the sending time to multiple devices. Any device among the multiple devices can calculate the comparison based on the time of receiving the first message and the sending time of the first message. The clock deviation, frequency offset, phase difference, etc. of the device being clocked to be synchronized can be realized to achieve clock synchronization with the device being clocked to be synchronized. Since any node in the network can be used as a reference clock, this method can achieve clock synchronization of each node in the network. And devices that do not need clock synchronization feed back packets to the devices being clocked synchronized. Therefore, devices that require clock synchronization do not need to deploy PTP, which means that the functional requirements of the devices that require clock synchronization are lower, which allows the network to deploy more nodes.

In order to make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

The technical solutions provided by the embodiments of the present application can be applied to systems that require clock synchronization, such as distributed networks (hereinafter, this is used as an example). Please refer to Figure 3, which is an application scenario of an embodiment of the present application. Figure 3 includes n+1 clients, and the clock of any one of the n+1 clients is selected as the reference clock. For ease of distinction, the client selected as the reference clock is called client S, and the remaining clients are, for example, client 1-client n. It can also be understood that client S is a device synchronized by a clock, and any client from client 1 to client n can achieve clock synchronization based on the clock of client S. The following uses the scenario shown in Figure 3 to introduce the solution provided by the embodiment of the present application. Each client in Figure 3 can exchange information through the network. The network here can be a media access control (media access control, MAC) layer or a radio link control (radio link control, RLC) layer, or it can be a radio resource control (radioresources control, RRC) layer. Among them, the MCA layer/RLC layer may also be called the L2 layer, and the RRC layer may also be called the L3 layer.

An embodiment of the present application provides a clock synchronization method. Please refer to Figure 4, which is a flow chart of the method. In the following introduction process, this method is applied to the network architecture shown in Figure 3 as an example. The first device described below is, for example, any one of client 1 to client n shown in FIG. 3 , and the second device described below is, for example, client S shown in FIG. 3 .

S401. The second device sends multiple first messages, where each first message carries a first time, and the first time is the sending time of the corresponding first message.

The second device serving as the reference clock source can send multiple first messages to enable a device that requires clock synchronization (the first device is taken as an example in this article) to achieve clock synchronization with the second device. The first message carries the sending time of the first message. The first device receives the plurality of first messages and can determine the clock deviation, phase deviation, frequency deviation, etc. between the first device and the second device based on the sending time and receiving time of each first message, thereby achieving communication with The clock of the second device is synchronized. It can be understood that the sending time and receiving time of a first message are a set of one-way timestamps. From this perspective, it can also be considered that the first device can achieve clock synchronization with the second device based on multiple sets of one-way timestamps with the second device. For convenience of description, the following takes an example in which the plurality of first messages are M first messages, where M is an integer greater than or equal to 2. The time when the first message is sent is called the first time, and the time when the first device receives the first message is called the second time. It can be understood that M first messages correspond to M first times and M second times, where the M first times and M second times correspond one to one. A set of one-way timestamps includes a first time and a second time corresponding to the first time.

The second device may determine the first time on the control plane or may determine the first time on the data plane. It can also be understood that when the second device sends the first message, it may generate a sending timestamp (first time) on the control plane, or it may generate a sending timestamp (first time) on the data plane. For ease of understanding, the process of the second device determining the first time is introduced below with reference to the accompanying drawings.

Please refer to Figure 5, which is a schematic diagram of generating timestamps on the data plane. In Figure 5, the time on the digital surface is the real time clock (RTC) provided by the clock board, for example, RTC1 in Figure 5. The time of the control plane is the RTC provided by the crystal oscillator, for example, RTC2. The second device can identify the first packet. When the first packet arrives at the physical port, a timestamp is generated by a PTP hardware clock (PHC), that is, the first time (RTC1). The RTC1 can be stored in a register or placed in the payload field of the first message. It can be understood that the first time of each first message can be stored in the register, and the first time of any first message is read before overwriting.

Please refer to Figure 6, which is a schematic diagram of generating timestamps on the control plane. In Figure 6, the time of the control plane is the RTC provided by the crystal oscillator, for example, RTC2. Before sending the first message, the second device can obtain the first time from the user state through the system call function "clock_gettime", and then place the first time in the payload field of the first message. It should be understood that the user mode can run user-level programs in the operating system.

The embodiment of the present application does not limit whether the control plane is generated first or the data plane is generated first. Specifically, the first time can be generated on the control plane or the data plane according to the synchronization accuracy. For example, if synchronization accuracy requires nanosecond level, you can choose to generate the first time on the data plane. Synchronization accuracy requires microsecond level, so you can choose to generate the first time on the control plane.

Compared with the control plane, generating timestamps on the data plane is more accurate and reliable. Therefore, in this embodiment of the present application, the second device can generate the first message on the control plane and send the first message through the data plane port, thereby improving the accuracy of clock synchronization.

In a possible implementation manner, the second device may broadcast the first message or multicast the first message. That is, the first message is sent in broadcast mode or multicast mode. In this way, any device in the network where the second device is located can use the clock of the second device as a reference clock, thereby achieving clock synchronization of each device in the network. The second device can be any device in the network. From this perspective, any device in the network can broadcast or multicast the first message. For the device that receives the first message, the clock of any device is used as a reference. Clock, thus eliminating the need for an external reference clock source and enabling clock synchronization of various devices within the network.

For example, please refer to Figure 7, which is a schematic diagram of an application scenario according to an embodiment of the present application. Figure 7 takes the second device broadcasting the first message as an example. The second device in Figure 7 is the reference clock, and any client from client 1 to client n can be directly or indirectly connected to the second device. The first device is any one of client 1 to client n. For example, the second device can obtain the first time on the control plane, encapsulate the first message carrying the first time, and then send the first message to the broadcast address through the data plane port. Any client among client 1-client n can receive the first message. If the second device broadcasts multiple first messages, the second device can periodically obtain the first time on the control plane and encapsulate the first message carrying the first time. The second device can broadcast locally, that is, it does not broadcast across routes, and the broadcast address can be a local URL, for example, 255.255.255.255. Alternatively, the second device can also broadcast across routes, for example, the broadcast address can be a subnet address, for example, 192.168.2.255. Alternatively, the broadcast address can be a full-subnet address, such as 192.168.0.0. Specifically, as shown in Figure 7, the second device can use a broadcast Internet protocol (IP) address and a broadcast MAC destination address to broadcast the first message carrying the first time to client 1-client n in the network. . As shown in Figure 7, the broadcast address, that is, the destination IP is 192.168.1.255.

Please refer to Figure 8, which is a schematic diagram of another application scenario according to the embodiment of the present application. Figure 8 takes the second device multicasting the first message as an example. The second device in Figure 8 is the reference clock, and some of the clients from client 1 to client n can be directly or indirectly connected to the second device as a group. The second device can obtain the first time on the control plane, encapsulate the first message carrying the first time, and then send the first message to the multicast address through the data plane port. A group of clients identified by the multicast address can receive the first message. The multicast address may be set in advance for a group of clients. For example, the multicast address may range from 224.0.0.0 to 239.255.255.255.

Specifically, the second device may use the IP address and the broadcast MAC destination address to multicast the first message carrying the first time to a group of clients. As shown in Figure 8, the multicast address, that is, the destination IP is 224.0.0.10. The second device may use a multicast routing algorithm to send the first message to the multicast address to realize delivery of the first message in the wide area network. For example, the multicast routing algorithm can be based on protocol independent multicast (PIM) or bit index explicit replication (BIER). It can be understood that PIM multicast refers to establishing a multicast distribution tree, using unicast routing tables to perform reverse path forwarding (RPF) checks on multicast packets, and generating multicast routing tables for forwarding multicasts. message. BIER multicast refers to a bit-index-based explicit replication routing protocol, which is divided into three layers: Overlay, BIER, and Underlay. It does not require the establishment of a multicast distribution tree, nor does it require intermediate nodes to save any multicast flow status.

S402. The first device determines the deviation between the clock of the first device and the clock of the second device based on multiple first times and multiple second times corresponding to the multiple first messages.

When the first device receives each first message sent by the second device, it generates a reception timestamp (herein referred to as the second time) based on the first device's own clock. Taking the second device sending M first messages as an example, for the first device, M first times in the M first messages can be obtained, and M first times corresponding to the M first times can be obtained The second time. That is, the first device can obtain M sets of timestamps, and one set of timestamps includes the sending time when the second device sends a first message and the receiving time when the first device receives the first message.

The first device may determine a deviation between the clock of the first device and the clock of the second device based on the M sets of timestamps. The deviation may be a clock deviation, a frequency deviation, or a phase deviation, or the deviation may be at least two of the above three deviations. That is to say, the first device may determine at least one of clock deviation, frequency deviation, or phase deviation between the clock of the first device and the clock of the second device according to the M sets of time stamps. In a possible implementation, the first device may periodically determine the deviation from the clock of the second device based on the sending time and receiving time of the multiple received first messages. Alternatively, the first device may also determine the deviation from the clock of the second device based on the sending time and receiving time of the multiple received first messages under passive triggering.

The following describes how the first device determines the deviation between the clock of the first device and the clock of the second device.

The first device can map M sets of timestamps to a two-dimensional coordinate system, where one set of timestamps in the multiple sets of timestamps includes a first time and a corresponding fourth time, and the fourth time is a message The time difference between the second time and the first time. The two-dimensional coordinates take the first time as the abscissa and the fourth time as the ordinate. It can be understood that the M sets of timestamps are discrete in the two-dimensional coordinate system, and the overall tilt trend of the M sets of timestamps can represent the frequency deviation drift between the clock of the first device and the clock of the second device. Therefore, a straight line can be determined among the M sets of timestamps, and the slope of the straight line is the frequency deviation drift between the clock of the first device and the clock of the second device. For convenience of description, this straight line is called the first straight line in this article. The first device determines the frequency deviation drift between the clock of the first device and the clock of the second device, which is essentially solving the first straight line.

The first device may determine the first straight line based on an objective function, which may be considered as a function that enables M sets of time stamps in the two-dimensional coordinate system to be located on the same side of the first straight line. For example, the objective function satisfies:

stax _i +by _i ≤ε, where, x _i =t _1,i , y _i =t _2,i -t _1,i , ε is the preset parameter, t _1,i and t _2,i -t _{1, i} is the i-th group of timestamps. Solving a and b can get the first straight line, that is, the first straight line y=ax+b.

In order to obtain better a and b, that is, to determine the optimal first straight line, when solving the first straight line, M sets of timestamps can also be denoised. For example, the distance from each time stamp point (t _1,i ,t _2,i -t _1,i ) to the calculated first straight line can be calculated to obtain a distance sequence (that is, including M distances). The median absolute deviation discrimination method can be used to screen and clear the noise points in the distance sequence until a tends to a stable value and the optimal first straight line is obtained. It can be understood that the median absolute deviation discrimination method, that is, for the sequence x ₁ ,...,x _n , remember: MAD:=median(x _i -median(x)), if |x _i -median(x)| >4.4478×MAD, then x _i is regarded as noise point.

Further, the first device may determine that the value of the first straight line on a set of timestamps with the largest abscissa among the M sets of timestamps is the phase deviation offset. Using the value of the first straight line on the time stamp with the largest abscissa among multiple sets of timestamps as the phase deviation offset can filter out noise during packet transmission, thus supporting end-to-end deployment of equipment. That is to say, there is no need to deploy other devices between the first device and the second device, that is, the first device and the second device can communicate directly. In addition, the first device can use the phase offset offset0 determined for the first time by the first device as the reference value for phase adjustment. This can maintain the clock phase deviation and avoid clock synchronization failure due to the accumulation of phase deviation offset or the occurrence of a jump in the phase deviation. .

S403. The first device calibrates the clock of the first device based on the deviation between the clock of the first device and the clock of the second device.

The first device can compensate the frequency of the clock of the first device according to the frequency deviation drift, thereby achieving frequency synchronization with the clock of the second device. In this embodiment of the present application, the first device may compensate the frequency of the clock of the first device according to the ratio of the frequency deviation drift to the clock frequency. For convenience of description, this article calls the ratio of frequency deviation drift to clock frequency the frequency compensation value. It can be understood that the frequency compensation value will affect the time increment value after each time the clock receives a pulse signal, that is, the value increased by the first device each time after the clock receives a pulse signal is 1/clock frequency + frequency compensation value. Therefore, the clock of the first device can be calibrated based on the frequency compensation value. Moreover, by using the frequency compensation value to calibrate the frequency of the clock of the first device, there is no need to lock the digital phase-locked loop, which can reduce the requirements for the stability of the crystal oscillator, thereby reducing the cost of the crystal oscillator of the first device. The first device uses the phase deviation offset0 calculated for the first time as the reference value for phase adjustment, that is, the phase difference between the first device and the clock of the second device is stabilized at offset0.

For example, please refer to Figure 9, which is a schematic diagram of clock synchronization of the first device and the second device. The second device broadcasts the first message carrying the sending time. The second device receives the first message, generates a timestamp (first time and second time) on the data plane, and sends the generated timestamp to the control plane. The control plane may determine the offset between the clock of the first device and the clock of the second device based on the timestamp and send the offset to the data plane. Figure 9 takes the deviation as the frequency compensation value as an example. The data plane can compensate the frequency of the clock of the first device according to the frequency compensation value, thereby achieving synchronization with the clock of the second device.

In this embodiment of the present application, a device that requires clock synchronization can achieve clock synchronization with a clock-synchronized device based on multiple sets of one-way timestamps with the clock-synchronized device. Compared with the current clock synchronization method shown in Figure 2, PTP is deployed on devices that do not require clock synchronization, that is, the functional requirements of the devices that require clock synchronization are lower, which allows the network to deploy more nodes. In addition, the device to be clock synchronized can be any device in the network, that is, any node in the network can be used as a reference clock. Therefore, there is no need to connect an external reference clock source, which can reduce deployment costs.

Considering that the second device broadcasts or multicasts M first messages, the first device may receive some of the M first messages, resulting in the first device being unable to determine based on the received first messages. The offset between the clock of the first device and the clock of the second device. For example, if the second device broadcasts two first messages and the first device receives one first message, the deviation between the clock of the first device and the clock of the second device cannot be determined.

To this end, in this embodiment of the present application, after receiving the first message, any device in the network can broadcast or multicast the first message to other devices in the network. After receiving the first message broadcast by the second device, the third device in the network may broadcast or multicast the first message. For convenience of description, below the third device forwards the first message broadcast by the second device, which is called the third device sending the second message. If the first device receives multiple second messages from the third device, based on the first time and the third time respectively corresponding to the multiple second messages, the clock of the first device and the clock of the second device can also be determined. Deviation between clocks. In this way, even if the first device does not receive multiple first messages from the second device, it can still determine the deviation between the clock of the first device and the clock of the second device based on the multiple second messages received from the third device. , to try to avoid the first device being unable to determine the deviation between the clock of the first device and the clock of the second device.

S404. The third device sends multiple second messages, and correspondingly, the first device receives the multiple second messages.

The third device may be located on the same network as the first device and the second device. The second device broadcasts or multicasts the first message, and the third device can receive the first message from the second device. Similar to the first device, the third device may also determine the clock of the third device and the second time according to the first time respectively corresponding to the plurality of first messages received from the second device and the time when the third device receives the first message. Difference between device clocks. For details, reference may be made to the related content of the first device determining the deviation between the clock of the first device and the clock of the second device, which will not be described again here. It can be understood that, after the third device determines the deviation between the clock of the third device and the clock of the second device, it can also achieve clock synchronization with the second device based on the deviation. Therefore, the third device can also be used as the reference clock source in the network, and by analogy, any device in the network can be used as the reference clock, eliminating the need for an external reference clock.

In this embodiment of the present application, the third device can also forward the first message. For example, the third device may broadcast or multicast a second message, and the second message carries the first time. Therefore, the first device in the network may also receive the second message from the third device. Since the third device forwards the first message broadcast or multicast by the second device, even if the first device cannot receive the first message broadcast by the second device, the first device can receive the second message from the third device. Knowing the first time and determining the deviation between the clock of the first device and the clock of the second device based on the first time corresponding to the second message and the third time of receiving the second message can avoid the failure of the first device. A deviation between the first device's clock and the second device's clock is determined.

It should be noted that if the first device receives multiple first messages from the second device, then based on the first time and the second time respectively corresponding to the multiple first messages, the clock of the first device and The deviation between the clocks of the second device. If the first device receives multiple second messages from the third device, based on the first time and the third time respectively corresponding to the multiple second messages, the clock of the first device and the clock of the second device can also be determined. Deviation between clocks. In addition, for the first device, when receiving the latest message, the first device can combine the one-way timestamp (also called historical time) corresponding to the message received in history according to the sending time and receiving time of the message. Stamp) determines the offset between the first device's clock and the second device's clock. Multiple first messages or multiple second messages can be received within a period of time. The first device may determine the deviation between the clock of the first device and the clock of the second device based on the first time and the second time respectively corresponding to part of the first messages among the received plurality of first messages, or may The deviation between the clock of the first device and the clock of the second device is determined based on the first time and the second time respectively corresponding to all the received first messages. Similarly, the first device may determine the deviation between the clock of the first device and the clock of the second device based on the first time and the third time respectively corresponding to some of the second messages among the received plurality of second messages. , the deviation between the clock of the first device and the clock of the second device may also be determined based on the first time and the third time respectively corresponding to all the second messages received.

It should be noted that S404 can be executed before S403 or before S402. And S404 is not a step that must be performed, that is, it is an optional step, so it is shown with a dotted line in Figure 4 .

Through experiments, it can be seen that through the method provided by the embodiment of the present application, the deviation between each device and the reference clock is relatively stable. For example, please refer to Table 1, which shows the comparison results between the frequency deviation determined based on the method provided by the embodiment of the present application and the frequency deviation determined based on the two-way timestamp in Figure 2. The larger the linear regression coefficient in Table 1 is, the more stable the deviation between each device and the reference clock is. Table 1 takes two devices as an example. Table 1 takes the two devices as devices on the intranet as an example, that is, the timestamps involved are physical timestamps. Among them, the equipment of " IP address " is arranged in the same location, such as city A; the equipment of " IP address " is arranged in the same location, such as city B; The equipment is laid out in the same location, such as City C.

Table 1

In Table 1, the average frequency deviation calculated by the one-way timestamp is also the average frequency deviation calculated by the method provided in the embodiment of this application, and the average frequency deviation calculated by the two-way time stamp is the frequency deviation calculated by the method shown in Figure 2 mean. It can be seen from Table 1 that the frequency deviation calculated by the method provided in the embodiment of the present application is more stable.

For another example, please refer to Table 2, which also shows the comparison results between the frequency deviation determined based on the method provided by the embodiment of the present application and the frequency deviation determined based on the two-way timestamp in Figure 2. The difference between Table 2 and Table 1 is that the devices in Table 2 are devices in the virtual network, that is, the timestamps involved are virtual timestamps in user mode. Among them, the equipment of " IP address " is laid out in the same location, such as city B; The equipment is laid out in the same location, such as City C.

Table 2

In Table 2, the average frequency deviation calculated by the one-way timestamp is also the average frequency deviation calculated by the method provided in the embodiment of this application, and the average frequency deviation calculated by the two-way timestamp is also the frequency deviation calculated by the method shown in Figure 2 mean. It can be seen from Table 2 that the frequency deviation calculated by the method provided in the embodiment of the present application is more stable.

In the embodiments provided by the present application, the present application is implemented from the perspective of the device that requires clock synchronization (i.e., the first device) and the device that is clock synchronized (i.e., the second device), and sets up interactions between more devices in the network. The method provided by the example is introduced. In order to implement each function in the method provided by the above embodiments of the present application, the first device and the second device may include a hardware structure and/or a software module to implement the above-mentioned functions in the form of a hardware structure, a software module, or a hardware structure plus a software module. Each function. Whether one of the above functions is performed as a hardware structure, a software module, or a hardware structure plus a software module depends on the specific application and design constraints of the technical solution.

The communication device used to implement the above method in the embodiment of the present application will be introduced below with reference to the accompanying drawings.

Figure 10 is a schematic block diagram of a communication device 1000 provided by an embodiment of the present application. The communication device 1000 may include a processing module 1010 and a transceiver module 1020. Optionally, a storage unit may also be included, which may be used to store instructions (code or programs) and/or data. The processing module 1010 and the transceiver module 1020 can be coupled with the storage unit. For example, the processing module 1010 can read the instructions (code or program) and/or data in the storage unit to implement the corresponding method. Each of the above modules can be set up independently or partially or fully integrated.

In some possible implementations, the communication device 1000 can correspondingly implement the behaviors and functions of the first device in the above method embodiments. The communication device 1000 can be the first device, or can be a component (such as a chip or a device) used in the first device. circuit), or it may be a chip or a chipset in the first device or a part of the chip used to perform related method functions.

For example, the communication device 1000 implements the method executed by the first device in the embodiment of the present application. The transceiver module 1020 is configured to receive multiple first messages sent by the second device. Each first message carries a first time, and the first time is the sending time of the corresponding first message. The processing module 1010 is configured to determine a deviation between the clock of the communication device 1000 and the clock of the second device based on the multiple first times and the multiple second times corresponding to the multiple first messages, and calibrate the communication device 1000 based on the deviation. A clock, wherein multiple first times and multiple second times correspond one to one, and one second time among the multiple second times is the first message corresponding to one first time among the multiple first times. Receive time.

As an optional implementation manner, the transceiving module 1020 is also configured to receive at least one second message sent by the third device, where each second message includes the first time of the first message from the second device. The processing module 1010 is further configured to determine the deviation between the clock of the communication device 1000 and the reference clock of the second device based on at least one first time and at least one third time corresponding to at least one second message. Wherein, at least one first time and at least one third time correspond one to one, and a third time in the at least one third time is a reception time of the second message corresponding to the third time.

As an optional implementation manner, the deviation includes a frequency deviation, and the processing module 1010 determines the difference between the clock of the communication device 1000 and the clock of the second device based on the plurality of first times and the plurality of second times corresponding to the plurality of first messages. Deviation between clocks, including:

Multiple sets of timestamps are mapped to the second coordinate system. One timestamp in the multiple sets of timestamps includes a first time and a corresponding fourth time. The two-dimensional coordinates take the first time as the abscissa and the fourth time as On the ordinate, the fourth time is the difference between the second time and the first time;

A first straight line is determined based on an objective function, the slope of which is the frequency difference between the clock of the communication device 1000 and the clock of the second device. The objective function is such that multiple sets of time stamps in the two-dimensional coordinate system are located at the first same side of a line.

As an optional implementation method, the objective function satisfies:

stax _i +by _i ≤ε, where, x _i =t _1,i , y _i =t _2,i -t _1,i , ε is the preset parameter, t _1,i and t _2,i -t _{1, i} is the i-th group of timestamps.

As an optional implementation manner, the processing module 1010 is also configured to determine that the value of the first straight line on a set of timestamps with the largest abscissa among the multiple sets of timestamps is the phase deviation.

As an optional implementation manner, the phase deviation determined for the first time by the processing module 1010 is the reference value for phase adjustment.

As an optional implementation method, the processing module 1010 is specifically used to:

A frequency deviation value is determined, and the deviation of the clock is calibrated according to the frequency compensation value. The frequency deviation value is the ratio of the frequency difference to the time frequency.

As an optional implementation manner, the first message is sent in broadcast mode or multicast mode.

As an optional implementation method, the first message is generated on the control plane and sent through the data plane port.

As an optional implementation method, it is determined on the control plane or data plane at the first time.

As an optional implementation manner, the communication device 1000 communicates directly with the second device.

It should be understood that the processing module 1010 in the embodiment of the present application can be implemented by a processor or processor-related circuit components, and the transceiver module 1020 can be implemented by a transceiver or transceiver-related circuit components or a communication interface.

Figure 11 is a schematic block diagram of a communication device 1100 provided by an embodiment of the present application. The communication device 1100 may be a first device, capable of realizing the functions of the first device in the method provided by the embodiments of the present application. The communication device 1100 may also be a device that can support the first device to implement the corresponding function in the method provided by the embodiment of the present application, wherein the communication device 1100 may be a chip system. In the embodiments of this application, the chip system may be composed of chips, or may include chips and other discrete devices. For specific functions, please refer to the description in the above method embodiment.

The communication device 1100 includes one or more processors 1101, which can be used to implement or support the communication device 1100 to implement the function of the first device in the method provided by the embodiment of the present application. For details, please refer to the detailed description in the method example and will not be repeated here. The processor 1101 can also be called a processing unit or processing module, and can implement certain control functions. The processor 1101 may be a general-purpose processor or a special-purpose processor, or the like. For example, include: central processing unit, application processor, modem processor, graphics processor, image signal processor, digital signal processor, video codec processor, controller, memory, and/or neural network processor wait. The central processing unit may be used to control the communication device 1100, execute software programs and/or process data. Different processors may be independent devices, or may be integrated in one or more processors, for example, integrated on one or more application specific integrated circuits.

Optionally, the communication device 1100 includes one or more memories 1102 to store instructions 1104, which can be executed on the processor 1101, so that the communication device 1100 executes the method described in the above method embodiment. The memory 1102 and the processor 1101 may be provided separately or integrated together, or the memory 1102 and the processor 1101 may be considered coupled. The coupling in the embodiment of this application is an indirect coupling or communication connection between devices, units or modules, which may be in electrical, mechanical or other forms, and is used for information interaction between devices, units or modules. Processor 1101 may cooperate with memory 1102. At least one of the at least one memory may be included in the processor. It should be noted that the memory 1102 is not necessary, so it is illustrated with a dotted line in FIG. 11 .

Optionally, the memory 1102 may also store data. The processor and memory can be provided separately or integrated together. In this embodiment of the present application, the memory 1102 may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), etc., or it may be a volatile memory (volatile memory). For example, random-access memory (RAM). Memory is, but is not limited to, any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. The memory in the embodiment of the present application can also be a circuit or any other device capable of realizing a storage function, used to store program instructions and/or data.

Optionally, the communication device 1100 may include instructions 1103 (sometimes also referred to as codes or programs), and the instructions 1103 may be executed on the processor, causing the communication device 1100 to perform the methods described in the above embodiments. . Data may be stored in processor 1101.

Optionally, the communication device 1100 may also include a transceiver 1105 and an antenna 1106. The transceiver 1105 may be called a transceiver unit, transceiver module, transceiver, transceiver circuit, transceiver, input/output interface, etc., and is used to realize the transceiver function of the communication device 1100 through the antenna 1106.

The processor 1101 and the transceiver 1105 described in this application can be implemented in an integrated circuit (IC), an analog IC, a radio frequency identification (RFID), a mixed signal IC, an ASIC, or a printed circuit board (printed circuit board). , PCB), or electronic equipment, etc. The communication device that implements the communication described in this article can be an independent device (for example, an independent integrated circuit, a mobile phone, etc.), or it can be a part of a larger device (for example, a module that can be embedded in other devices). For details, please refer to the above-mentioned information. The description of terminal equipment and network equipment will not be repeated here.

Optionally, the communication device 1100 may also include one or more of the following components: a wireless communication module, an audio module, an external memory interface, an internal memory, a universal serial bus (USB) interface, a power management module, and an antenna. Speakers, microphones, input and output modules, sensor modules, motors, cameras, or displays, etc. It can be understood that in some embodiments, the communication device 1100 may include more or fewer components, or some components may be integrated, or some components may be separated. These components may be implemented in hardware, software, or a combination of software and hardware.

It should be noted that the communication device in the above embodiments may be a first device or a circuit, or may be a chip used in the first device or other combined devices or components having the functions of the first device. When the communication device is the first device, the transceiver module may be a transceiver, which may include an antenna, a radio frequency circuit, etc., and the processing module may be a processor, such as a central processing unit (CPU). When the communication device is a component with the above-mentioned first device function, the transceiver module may be a radio frequency unit, and the processing module may be a processor. When the communication device is a chip system, the communication device may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a system on chip (system on chip). , SoC), it can also be a CPU, it can be a network processor (network processor, NP), it can also be a digital signal processing circuit (digital signal processor, DSP), or it can be a microcontroller (micro controller unit, MCU), It can also be a programmable logic device (PLD) or other integrated chip. The processing module may be a processor of a chip system. The transceiver module or communication interface may be the input/output interface or interface circuit of the chip system. For example, the interface circuit may be a code/data read and write interface circuit. The interface circuit can be used to receive code instructions (code instructions are stored in the memory and can be read directly from the memory, or can also be read from the memory through other devices) and transmitted to the processor; the processor can be used to run all The code instructions are used to execute the methods in the above method embodiments. For another example, the interface circuit may also be a signal transmission interface circuit between the communication processor and the transceiver.

When the communication device is a chip-like device or circuit, the device may include a transceiver unit and a processing unit. The transceiver unit may be an input-output circuit and/or a communication interface; the processing unit may be an integrated processor or microprocessor or an integrated circuit.

An embodiment of the present application also provides a communication system. Specifically, the communication system includes at least one first device and at least one second device. Exemplarily, the communication system includes a first device and a second device for implementing the related functions of Figure 4 mentioned above. For details, please refer to the relevant descriptions in the above method embodiments, which will not be described again here.

An embodiment of the present application also provides a computer-readable storage medium, which includes instructions that, when run on a computer, cause the computer to execute the method executed by the first device in Figure 4 .

An embodiment of the present application also provides a computer program product, which includes instructions that, when run on a computer, cause the computer to execute the method executed by the first device in Figure 4 .

Embodiments of the present application provide a chip system. The chip system includes a processor and may also include a memory for realizing the functions of the first device in the foregoing method; or for realizing the functions of the second device in the foregoing method. The chip system can be composed of chips or include chips and other discrete devices.

It should be understood that in the various embodiments of the present application, the size of the sequence numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its functions and internal logic, and should not be used in the embodiments of the present application. The implementation process constitutes any limitation.

Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, or a combination of computer software and electronic hardware. accomplish. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each specific application, but such implementations should not be considered beyond the scope of this application.

Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be described again here.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the part that essentially contributes to the technical solution of the present application or the part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions to enable a A computer device (which may be a personal computer, a server, or a network device, etc.) executes all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), RAM, magnetic disk or optical disk and other media that can store program codes.

Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the scope of the present application. In this way, if these modifications and variations of the present application fall within the scope of the claims of the present application and equivalent technologies, the present application is also intended to include these modifications and variations.

Claims (25)

1. A method of clock synchronization, comprising:

the method comprises the steps that first equipment receives a plurality of first messages sent by second equipment, wherein each first message carries a first time, and the first time is the sending time of the corresponding first message;

the first device determines deviation between clocks of the first device and the second device according to a plurality of first times and a plurality of second times corresponding to the plurality of first messages, wherein the plurality of first times and the plurality of second times are in one-to-one correspondence, and one second time in the plurality of second times is the receiving time of the first message corresponding to one first time in the plurality of first times;

the first device calibrates a clock of the first device based on the offset.

2. The method of claim 1, wherein the method further comprises:

The first device receives at least one second message sent by a third device, wherein each second message comprises the first time of the first message from the second device;

the first device determines deviation between a clock of the first device and a reference clock of the second device according to at least one first time and at least one third time corresponding to the at least one second message, wherein the at least one first time and the at least one third time are in one-to-one correspondence, and one third time in the at least one third time is the receiving time of the second message corresponding to the one third time.

3. The method of claim 1 or 2, wherein the deviation comprises a frequency deviation, the first device determining a deviation between a clock of the first device and a reference clock of the second device from the plurality of first times and the plurality of second times, comprising:

the first device maps a plurality of sets of time stamps to a two-dimensional coordinate system, wherein one set of time stamps in the plurality of sets of time stamps comprises a first time and a corresponding fourth time, the two-dimensional coordinate takes the first time as an abscissa, the fourth time as an ordinate, and the fourth time is a difference value between the second time and the first time;

The first device determines a first straight line based on an objective function, wherein a slope of the first straight line is a frequency difference between a clock of the first device and a clock of the second device, and the objective function enables the plurality of groups of time stamps in the two-dimensional coordinate system to be located on the same side of the first straight line.

4. A method according to claim 3, wherein the objective function satisfies:

s.t.ax _i +b-y _i epsilon is less than or equal to epsilon, wherein x _i ＝t _1,i ，y _i ＝t _2,i -t _1,i Epsilon is a preset parameter, t _1,i And t _2,i -t _1,i Is the i-th group timestamp.

5. The method of claim 3 or 4, wherein the method further comprises: the first device determines that a value of the first straight line on a group of time stamps with the largest abscissa among the plurality of groups of time stamps is a phase deviation.

6. The method of claim 5, wherein the first device first determines the phase offset as a reference value for phase adjustment.

7. The method of any of claims 3-6, wherein the first device calibrating a clock of the first device based on the bias comprises:

the first device determines a frequency compensation value, wherein the frequency compensation value is the ratio of the frequency difference value to the time frequency;

The first device calibrates the frequency of the clock according to the frequency compensation value.

8. The method according to any of claims 1-7, wherein the first message is sent in a broadcast manner or in a multicast manner.

9. The method according to any of claims 1-8, wherein the first message is generated at a control plane and sent through a data plane port.

10. The method of any of claims 1-9, wherein the first time is determined at a control plane or a data plane.

11. The method of any of claims 1-10, wherein the first device and the second device communicate directly.

12. A communication device, comprising a processing module and a transceiver module;

the receiving and transmitting module is used for receiving a plurality of first messages sent by the second equipment, wherein each first message carries a first time, and the first time is the sending time of the corresponding first message;

the processing module is configured to determine a deviation between a clock of the communication device and a clock of the second device according to a plurality of first times and a plurality of second times corresponding to the plurality of first messages, and calibrate the clock of the communication device based on the deviation, where the plurality of first times and the plurality of second times are in one-to-one correspondence, and one of the plurality of second times is a receiving time of the first message corresponding to one of the plurality of first times.

13. The communications apparatus of claim 12, wherein the transceiver module is further configured to receive at least one second message sent by a third device, each second message comprising the first time of the first message from the second device;

the processing module is further configured to determine a deviation between a clock of the communication device and a reference clock of the second device according to at least one first time and at least one third time corresponding to the at least one second message, where the at least one first time and the at least one third time are in one-to-one correspondence, and one third time in the at least one third time is a receiving time of the second message corresponding to the one third time.

14. The communication apparatus according to claim 12 or 13, wherein the deviation comprises a frequency deviation, and the processing module determines the deviation between the clock of the communication apparatus and the clock of the second device according to a plurality of first times and a plurality of second times corresponding to the plurality of first messages, comprising:

mapping a plurality of sets of time stamps to a second coordinate system, wherein one time stamp in the plurality of sets of time stamps comprises a first time and a corresponding fourth time, the two-dimensional coordinate takes the first time as an abscissa, the fourth time as an ordinate, and the fourth time is a difference value between the second time and the first time;

A first line is determined based on an objective function having a slope that is a frequency difference between a clock of the communication device and a clock of the second apparatus, the objective function being such that the plurality of sets of time stamps within the two-dimensional coordinate system are located on a same side of the first line.

15. The communications apparatus of claim 14, wherein the objective function satisfies:

s.t.ax _i +b-y _i epsilon is less than or equal to epsilon, wherein x _i ＝t _1,i ，y _i ＝t _2,i -t _1,i Epsilon is a preset parameter, t _1,i And t _2,i -t _1,i Is the i-th group timestamp.

16. The communication apparatus according to claim 14 or 15, wherein the processing module is further configured to determine a value of the first line as a phase deviation at a set of time stamps having a largest abscissa among the plurality of sets of time stamps.

17. The communication apparatus of claim 16, wherein the first determined phase offset by the processing module is a reference value for phase adjustment.

18. The communication device according to any of the claims 14-17, wherein the processing module is specifically configured to:

determining a frequency deviation value, wherein the frequency deviation value is the ratio of the frequency deviation value to time frequency;

and calibrating the deviation of the clock according to the frequency compensation value.

19. The communication device according to any of claims 12-18, wherein the first message is sent in a broadcast manner or in a multicast manner.

20. The communication device according to any of claims 12-19, wherein the first message is generated at a control plane and sent through a data plane port.

21. The communication device according to any of claims 12-20, wherein the first time is determined at a control plane or a data plane.

22. The communication apparatus according to any of claims 12-21, wherein the communication apparatus and the second device communicate directly.

23. A communication device, characterized in that the communication device comprises a processor and a memory for storing a computer program, the processor being adapted to execute the computer program stored on the memory, such that the communication device performs the method according to any of claims 1-11.

24. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program which, when executed by a computer, causes the computer to perform the method according to any of claims 1-11.

25. A computer program product, characterized in that the computer program product stores a computer program which, when executed by a computer, causes the computer to perform the method according to any of claims 1-11.