CN117059026A - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN117059026A
CN117059026A CN202310992992.XA CN202310992992A CN117059026A CN 117059026 A CN117059026 A CN 117059026A CN 202310992992 A CN202310992992 A CN 202310992992A CN 117059026 A CN117059026 A CN 117059026A
Authority
CN
China
Prior art keywords
stage
light
emitting
module
display panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310992992.XA
Other languages
Chinese (zh)
Inventor
高娅娜
黄高军
周星耀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Tianma Display Technology Co Ltd
Original Assignee
Xiamen Tianma Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Tianma Display Technology Co Ltd filed Critical Xiamen Tianma Display Technology Co Ltd
Priority to CN202310992992.XA priority Critical patent/CN117059026A/en
Publication of CN117059026A publication Critical patent/CN117059026A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention relates to the technical field of display, and discloses a display panel and a display device, wherein the display panel comprises: a sub-pixel including a pixel circuit and a light emitting element; the pixel circuit comprises a driving module, a switch module and a light-emitting control module; in the time of displaying a frame of a display picture of a display panel, the working process of the pixel circuit comprises a first stage and a second stage; the first phase comprises a first light-emitting phase and a first non-light-emitting phase; the second phase comprises a second light-emitting phase and a second non-light-emitting phase; the second non-luminous phase comprises a first bias compensation phase, the switch module is conducted in the first bias compensation phase, and the first signal end transmits bias compensation voltage; the duty cycle of the light emission control signal in the first phase is different from the duty cycle thereof in the second phase. The invention effectively improves the problem of picture flickering when the display panel is displayed in the prior art.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and more particularly, to a display panel and a display device.
Background
The pixel circuit provides a driving current required for display to the light emitting element of the display device and controls whether the light emitting element enters a light emitting stage, so that the pixel circuit becomes an indispensable element in most display devices. However, as the service time increases, the internal characteristics of the driving transistor in the pixel circuit change slowly, so that the threshold voltage of the driving transistor shifts, thereby affecting the driving current generated by the driving transistor, further ensuring that the display effect of the display device is not ideal and the phenomenon of flicker of a picture is easy to occur.
Disclosure of Invention
In view of the above, the present invention provides a display panel and a display device to improve the flicker problem of the display panel in the prior art.
The present invention provides a display panel, comprising: a substrate base; the sub-pixels are arranged in an array and positioned on one side of the substrate, and each sub-pixel comprises a pixel circuit and a light-emitting element; the pixel circuit comprises a driving module, a switch module and a light-emitting control module; the first end of the switch module is connected with the first signal end, and the second end of the switch module is electrically connected with the first end of the driving module; the light-emitting control module is connected between the first power supply signal end and the light-emitting element, the control end of the light-emitting control module is connected with the light-emitting control signal end, and the light-emitting control signal end is used for transmitting a light-emitting control signal; in the time of displaying a frame of a picture of a display panel, the working process of the pixel circuit comprises a plurality of first phases and a plurality of second phases, the first phases and the second phases are alternately arranged, and the duration of the first phases is the same as that of the second phases; the first stage comprises a first light-emitting stage and a first non-light-emitting stage, wherein the switch module is closed in the first stage, the light-emitting control module is conducted in the first light-emitting stage, and the light-emitting control module is closed in the first non-light-emitting stage; the second stage comprises a second light-emitting stage and a second non-light-emitting stage, wherein in the second light-emitting stage, the light-emitting control module is turned on, and in the second non-light-emitting stage, the light-emitting control module is turned off; the second non-luminous phase comprises a first bias compensation phase, the switch module is conducted in the first bias compensation phase, and the first signal end transmits bias compensation voltage; the duty cycle of the light emission control signal in the first phase is different from the duty cycle thereof in the second phase.
Based on the same thought, the invention also provides a display device which comprises the display panel provided by the invention.
Compared with the prior art, the display panel and the display device provided by the invention have the advantages that at least the following effects are realized:
in the display panel provided by the invention, the duty ratio of the light-emitting control signal in the first stage is different from that in the second stage. The duration of the first stage is the same as the duration of the second stage, namely the duration of the first lighting stage in the first stage is different from the duration of the second lighting stage in the second stage, so that the phenomenon that the brightness of a display screen of a display panel is different from the brightness of the display screen of the display panel in the second stage due to the fact that a driving transistor is not biased in the first stage and is biased in the first bias compensation stage in the second stage is effectively relieved, the brightness of the display screen of the display panel in the first stage tends to be the same as the brightness of the display screen of the display panel in the second stage in one frame of picture time of the display panel, screen flickering is effectively improved, and visual experience is improved.
Of course, it is not necessary for any one product to practice the invention to achieve all of the technical effects described above at the same time.
Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a partial cross-sectional view of a display panel according to the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to the present invention;
FIG. 3 is a schematic circuit diagram of a pixel circuit according to the present invention;
FIG. 4 is a timing diagram of a driving scheme according to the present invention;
FIG. 5 is a schematic circuit diagram of another pixel circuit according to the present invention;
FIG. 6 is a schematic diagram of another embodiment of a driving timing diagram;
FIG. 7 is a schematic diagram of another embodiment of a driving timing diagram according to the present invention;
FIG. 8 is a comparison of driving timings for the first mode and the second mode according to the present invention;
FIG. 9 is a schematic diagram of a further embodiment of a driving timing diagram according to the present invention;
fig. 10 is a schematic plan view of a display device according to the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
Fig. 1 is a partial cross-sectional view of a display panel according to the present invention, fig. 2 is a schematic structural diagram of a pixel circuit according to the present invention, fig. 3 is a schematic circuit diagram of a pixel circuit according to the present invention, fig. 4 is a driving timing chart according to the present invention, and referring to fig. 1 to fig. 4, a display panel according to the present embodiment is provided, which includes:
A substrate base 10;
sub-pixels P arranged in an array on one side of the substrate 10, the sub-pixels P including pixel circuits 20 and light emitting elements 30;
the pixel circuit 20 includes a driving module 21, a switching module 22, and a light emission control module 23;
a first end of the switch module 22 is connected with the first signal end D1, and a second end of the switch module 22 is electrically connected with the first end of the driving module 21;
the light-emitting control module 23, the light-emitting control module 23 is connected between the first power supply signal end PVDD and the light-emitting element 30, the control end of the light-emitting control module 23 is connected with the light-emitting control signal end Emit, and the light-emitting control signal end Emit is used for transmitting the light-emitting control signal E1;
in the time of one frame of display picture of the display panel, the working process of the pixel circuit comprises a plurality of first phases T1 and a plurality of second phases T2, the first phases T1 and the second phases T2 are alternately arranged, and the duration of the first phases T1 is the same as the duration of the second phases T2;
the first phase T1 includes a first light-emitting phase T11 and a first non-light-emitting phase T12, in which the switch module 22 is turned off in the first phase T1, the light-emitting control module 23 is turned on in the first light-emitting phase T11, and in which the light-emitting control module 23 is turned off in the first non-light-emitting phase T12;
the second stage T2 includes a second light-emitting stage T21 and a second non-light-emitting stage T22, in which the light-emitting control module 23 is turned on in the second light-emitting stage T21, and in which the light-emitting control module 23 is turned off in the second non-light-emitting stage T22;
The second non-light-emitting stage T22 includes a first bias compensation stage T221, in which the switch module 22 is turned on during the first bias compensation stage T221, and the first signal terminal D1 transmits a bias compensation voltage;
the duty ratio of the light emission control signal in the first phase T1 is different from that in the second phase T2.
Specifically, the display panel includes a substrate 10, an array layer 40 and a display layer 50 disposed on one side of the substrate 10, wherein the array layer 40 includes a plurality of pixel circuits 20, and the display layer 50 includes a plurality of light emitting elements 30. Specifically, the light emitting element 30 may include an organic light emitting diode, or the light emitting element 30 may include an inorganic light emitting diode. The light emitting element 30 includes a first electrode, a light emitting layer, and a second electrode which are stacked. In one embodiment, the first electrode is an anode and the second electrode is a cathode. Of course, in other embodiments of the present invention, the display panel may further include other structures, and for example, a side of the display layer 50 away from the substrate 10 may be provided with an encapsulation layer, where the encapsulation layer is used for encapsulating and protecting the light emitting element 30. Or when the display panel also has a touch function, the display panel also comprises a touch layer. The display panel of the present embodiment includes, but is not limited to, the above-described structure, and the present embodiment is not particularly limited herein, and may be understood with reference to the structure of the display panel in the related art.
In the sub-pixel P, the pixel circuit 20 is electrically connected to the light emitting element 30, and the pixel circuit 20 is configured to drive the light emitting element 30 electrically connected thereto to emit light. Specifically, the pixel circuit 20 supplies a driving current to the light emitting element 30 electrically connected thereto, and the light emitting element 30 displays a certain luminance according to the magnitude of the driving current.
The pixel circuit 20 includes a driving module 21, a switching module 22, and a light emission control module 23. The first end of the switch module 22 is connected to the first signal end D1, the second end of the switch module 22 is electrically connected to the first end of the driving module 21, and when the switch module 22 is turned on, a signal of the first signal end D1 can be transmitted to the first end of the driving module 21. The light-emitting control module 23 is connected between the first power signal end PVDD and the light-emitting element 30, the control end of the light-emitting control module 23 is connected with the light-emitting control signal end Emit, the light-emitting control signal end Emit is used for transmitting a light-emitting control signal E1, the light-emitting control module 23 can be turned on or off under the control of the light-emitting control signal E1, and when the light-emitting control module 23 is turned on, the signal output by the driving module 21 can be provided to the light-emitting element 30.
As will be understood with reference to the circuit diagram illustrated in fig. 3 and the timing diagram illustrated in fig. 4, in a period of one frame of display screen of the display panel, the working process of the pixel circuit includes a plurality of first phases T1 and a plurality of second phases T2, where the first phases T1 and the second phases T2 are alternately arranged, and a duration of the first phases T1 is the same as a duration of the second phases T2.
The first phase T1 includes a first light-emitting phase T11 and a first non-light-emitting phase T12, and in the first light-emitting phase T11, the light-emitting control module 23 is turned on under the control of the light-emitting control signal E1, and the driving current generated by the driving module 21 is supplied to the light-emitting element 30, so that the light-emitting element 30 emits light. In the first non-emission period T12, the emission control module 23 is turned off under the control of the emission control signal E1, and at this time, no driving current is supplied to the light emitting element 30, and the light emitting element 30 does not emit light. That is, the first non-light-emitting stage T12 may be set in the first stage T1 to implement adjustment of the light-emitting duration in the first stage T1, that is, the duration of the first non-light-emitting stage T12 in the first stage T1 increases, so that the duration of the first light-emitting stage T11 in the first stage T1 decreases.
Similarly, the second stage T2 includes a second light-emitting stage T21 and a second non-light-emitting stage T22, and in the second light-emitting stage T21, the light-emitting control module 23 is turned on under the control of the light-emitting control signal E1, and the driving current generated by the driving module 21 is supplied to the light-emitting element 30, so that the light-emitting element 30 emits light. In the second non-light emitting stage T22, the light emitting control module 23 is turned off under the control of the light emitting control signal E1, and at this time, no driving current is supplied to the light emitting element 30, and the light emitting element 30 does not emit light. That is, the second non-light-emitting stage T22 may be set in the second stage T2 to implement adjustment of the light-emitting duration in the second stage T2, that is, the duration of the second non-light-emitting stage T22 in the second stage T2 increases, so that the duration of the second light-emitting stage T21 in the second stage T2 decreases.
In the second stage T2, the second non-light-emitting stage T22 includes a first bias compensation stage T221, in the first bias compensation stage T221, the switch module 22 is turned on, and the first signal terminal D1 transmits a bias compensation voltage, so that the bias compensation voltage can be transmitted to the first terminal of the driving module 21, that is, the bias compensation voltage can be transmitted to the first terminal of the driving transistor M1, and the driving transistor M1 can be biased, thereby avoiding a characteristic offset phenomenon of the driving transistor M1 caused by that the driving transistor M1 does not write data for a long time, so that the electrical property of the driving transistor M1 is recovered, and the driving effect of the driving module 21 is improved. In the first phase T1, the switching module 22 is turned off, i.e., the driving transistor M1 is not biased in the first phase T1. The first stage T1 and the second stage T2 are alternately arranged, so that the problem that the driving transistor M1 is excessively strong due to the fact that the driving transistor M1 is continuously biased is effectively avoided.
The duty ratio of the emission control signal E1 in the first phase T1 is different from that in the second phase T2. The duration of the first stage T1 is the same as the duration of the second stage T2, namely, the duration of the first lighting stage T11 in the first stage T1 is different from the duration of the second lighting stage T21 in the second stage T2, so that the phenomenon that the brightness of a display screen displayed in the first stage T1 is different from the brightness of the display screen displayed in the second stage T2 due to the fact that the driving transistor M1 is not biased in the first stage T1 and the driving transistor M1 is biased in the first bias compensation stage T221 in the second stage T2 is effectively relieved, and the brightness of the display screen displayed in the first stage T1 tends to be the same as the brightness of the display screen displayed in the second stage T2 in one frame of the display screen time of the display screen is enabled to be effectively improved, and the visual experience is improved.
Optionally, the duration of the first non-light-emitting period T11 in the first period T1 may be adjusted by adjusting the duration of the first non-light-emitting period T11 in the first period T1, so that the brightness of the display screen of the display panel in the first period T1 is adjusted to be the same as the brightness of the display screen of the display panel in the second period T2 in one frame of the display screen. Since the first bias compensation stage T221 is disposed in the second non-light-emitting stage T22 in the second stage T2, the duration of the second non-light-emitting stage T22 in the second stage T2 may not be adjusted, thereby avoiding affecting the setting of the first bias compensation stage T221.
Optionally, with continued reference to fig. 3 and 4, the pixel circuit further includes a DATA writing module 24, a first terminal of the DATA writing module 24 is connected to the DATA voltage terminal DATA, and a second terminal of the DATA writing module 24 is electrically connected to the source of the driving transistor M1, wherein the DATA voltage terminal DATA is used for transmitting the DATA voltage. In the DATA writing stage t1, the DATA writing module 24 is turned on, the DATA voltage terminal DATA writes the DATA voltage signal to the first pole of the driving transistor M1, and the subsequent driving transistor M1 can form the driving current based on the DATA voltage signal. In the first offset compensation phase T221, the data write module 24 is turned off.
The light emission control module 23 includes a first light emission control module 231 and a second light emission control module 232, and the pixel circuit further includes a threshold compensation module 25, a first reset module 26, and a second reset module 27.
The control end of the first light emitting control module 231 is electrically connected to the light emitting control signal end Emit, the first end of the first light emitting control module 231 is electrically connected to the first power signal end PVDD, the second end of the first light emitting control module 231 is electrically connected to the first pole of the driving transistor M1, and the first light emitting control module 231 is configured to provide the first power signal to the first pole of the driving transistor M1.
The control end of the second light-emitting control module 232 is electrically connected to the light-emitting control signal end Emit, the first end of the second light-emitting control module 232 is electrically connected to the second electrode of the driving transistor M1, the second end of the second light-emitting control module 232 is electrically connected to the anode of the light-emitting element 30, and the second light-emitting control module 232 is used for controlling the driving current generated by the driving transistor M1 to be transmitted to the light-emitting element 30.
The threshold compensation module 25 is used for compensating the threshold voltage of the driving transistor M1, the first reset module 26 is used for providing a first reset signal to the gate of the driving transistor M1, and the second reset module 27 is used for providing a second reset signal to the anode of the light emitting element 30.
The control terminal of the data writing module 24 is electrically connected to the first scan signal terminal SP. The control end of the threshold compensation module 25 is electrically connected to the second scan signal end S2, the first end of the threshold compensation module 25 is electrically connected to the second pole of the driving transistor M1, and the second end of the threshold compensation module 25 is electrically connected to the gate of the driving transistor M1. The cathode of the light emitting element 30 is electrically connected to the second power signal terminal PVEE. The control end of the first reset module 26 is electrically connected to the third scan signal end S1, the first end of the first reset module 26 is electrically connected to the reset signal end Vref, and the second end of the first reset module 26 is electrically connected to the gate of the driving transistor M1. The control end of the second reset module 27 is electrically connected to the second scan signal end SP, the first end of the second reset module 27 is electrically connected to the reset signal end Vref, and the second end of the second reset module 27 is electrically connected to the anode of the light emitting element 30.
It should be noted that, in the embodiment of the present invention, specific structures of the reset module, the data writing module, the threshold compensation module, and the light emitting control module are not limited in particular, and each module of the pixel circuit may be designed according to actual needs on the premise that the bias compensation function of the threshold voltage of the driving transistor can be implemented. For easy understanding, specific structures of the reset module, the data writing module, the threshold compensation module, and the light emission control module are exemplified below in the embodiments of the present invention, where each module may optionally include a thin film transistor. With continued reference to fig. 3, a circuit configuration of 8T1C for the pixel circuit in the display panel is exemplarily shown in fig. 3. Of course, in other embodiments of the present invention, the pixel circuit may have other circuit structures, and the disclosure is not described herein.
Fig. 5 is a circuit schematic of another pixel circuit according to the present invention, fig. 6 is another driving timing chart according to the present invention, and referring to fig. 5 and 6, the pixel circuit further includes a DATA writing module 24, a first terminal of the DATA writing module 24 is connected to a DATA voltage terminal DATA, and a second terminal of the DATA writing module 24 is electrically connected to a source of the driving transistor M1, wherein the DATA voltage terminal DATA is used for transmitting a DATA voltage. In the DATA writing stage t1, the DATA writing module 24 is turned on, the DATA voltage terminal DATA writes the DATA voltage signal to the first pole of the driving transistor M1, and the subsequent driving transistor M1 can form the driving current based on the DATA voltage signal. The reusable DATA writing module 24 is the switch module 22, and the DATA voltage terminal DATA is the first signal terminal D1. That is, in the data writing stage t1, the switch module 22 is turned on, and the first signal terminal D1 transmits the data voltage signal. In the first offset compensation phase T221, the switch module 22 is turned on, and the first signal terminal D1 transmits the offset compensation voltage.
The light emission control module 23 includes a first light emission control module 231 and a second light emission control module 232, and the pixel circuit further includes a threshold compensation module 25, a first reset module 26, and a second reset module 27.
The control end of the first light emitting control module 231 is electrically connected to the light emitting control signal end Emit, the first end of the first light emitting control module 231 is electrically connected to the first power signal end PVDD, the second end of the first light emitting control module 231 is electrically connected to the first pole of the driving transistor M1, and the first light emitting control module 231 is configured to provide the first power signal to the first pole of the driving transistor M1.
The control end of the second light-emitting control module 232 is electrically connected to the light-emitting control signal end Emit, the first end of the second light-emitting control module 232 is electrically connected to the second electrode of the driving transistor M1, the second end of the second light-emitting control module 232 is electrically connected to the anode of the light-emitting element 30, and the second light-emitting control module 232 is used for controlling the driving current generated by the driving transistor M1 to be transmitted to the light-emitting element 30.
The threshold compensation module 25 is used for compensating the threshold voltage of the driving transistor M1, the first reset module 26 is used for providing a first reset signal to the gate of the driving transistor M1, and the second reset module 27 is used for providing a second reset signal to the anode of the light emitting element 30.
The control terminal of the data writing module 24 is electrically connected to the first scan signal terminal SP. The control end of the threshold compensation module 25 is electrically connected to the second scan signal end S2, the first end of the threshold compensation module 25 is electrically connected to the second pole of the driving transistor M1, and the second end of the threshold compensation module 25 is electrically connected to the gate of the driving transistor M1. The cathode of the light emitting element 30 is electrically connected to the second power signal terminal PVEE. The control end of the first reset module 26 is electrically connected to the third scan signal end S1, the first end of the first reset module 26 is electrically connected to the reset signal end Vref, and the second end of the first reset module 26 is electrically connected to the gate of the driving transistor M1. The control terminal of the second reset module 27 is electrically connected to the second scan signal terminal SP, the first terminal of the second reset module 27 is electrically connected to the reset signal terminal Vref, and the second terminal of the second reset module 27 is electrically connected to the anode of the light emitting element 30.
It should be noted that, in the embodiment of the present invention, specific structures of the reset module, the data writing module, the threshold compensation module, and the light emitting control module are not limited in particular, and each module of the pixel circuit may be designed according to actual needs on the premise that the bias compensation function of the threshold voltage of the driving transistor can be implemented. For easy understanding, specific structures of the reset module, the data writing module, the threshold compensation module, and the light emission control module are exemplified below in the embodiments of the present invention, where each module may optionally include a thin film transistor. With continued reference to fig. 5, a circuit configuration of 7T1C for the pixel circuit in the display panel is exemplarily shown in fig. 5. Of course, in other embodiments of the present invention, the pixel circuit may have other circuit structures, and the disclosure is not described herein.
With continued reference to fig. 3 and 4, in some alternative embodiments, the driving module 21 includes a driving transistor M1, the driving transistor M1 being a P-type transistor, and the first end of the switching module 22 is electrically connected to the source of the driving transistor M1;
the bias compensation voltage is a high level voltage;
the duty cycle of the emission control signal E1 in the first phase T1 is smaller than that in the second phase T2.
Specifically, the driving module 21 includes a driving transistor M1, the first end of the switching module 22 is electrically connected to the source of the driving transistor M1, in the first bias compensation stage T221, the switching module 22 is turned on, and the first signal end D1 transmits a bias compensation voltage, the bias compensation voltage is a high level voltage, so that the bias compensation voltage can be transmitted to the first end of the driving module 21, that is, the bias compensation voltage can be transmitted to the source of the driving transistor M1, the source of the driving transistor M1 is a high level voltage, at this time, the gate potential of the driving transistor M1 is generally close to Vdata- |Δvth|, where Vdata is the voltage value of the data voltage, Δvth is the threshold voltage of the driving transistor M1, that is, in the first bias compensation stage T221, the gate-source voltage vgs of the driving transistor M1 is less than 0, at this time, the driving transistor M1 is under the negative bias effect, and the characteristics of the driving transistor M1 are negatively floated. Since the driving transistor M1 is a P-type transistor, the driving transistor M1 is not turned on easily, so that the driving current generated by the driving transistor M1 is low in the second light emitting stage T21.
At this time, the duty ratio of the light emission control signal E1 in the first stage T1 is smaller than that in the second stage T2, that is, the duration occupied by the first light emission stage T11 in the first stage T1 is smaller than that occupied by the second light emission stage T21 in the second stage T2, so that the phenomenon that the brightness of the display panel in the first stage T1 is larger than that in the second stage T2 due to the fact that the driving current generated by the driving transistor M1 in the first stage T11 is larger than that generated by the driving transistor M1 in the second stage T2 is effectively relieved, the brightness of the display panel in the first stage T1 is larger than that in the second stage T2, and the brightness of the display panel in the first stage T1 tends to be the same as that in the second stage T2 is effectively improved, and the visual experience is improved.
Optionally, the duration of the first non-light-emitting period T11 in the first period T1 may be reduced by increasing the duration of the first non-light-emitting period T11 in the first period T1, so that the brightness of the display screen of the display panel in the first period T1 is reduced in one frame of screen time of the display panel, so that the brightness of the display screen of the display panel in the second period T2 tends to be the same.
Fig. 7 is a schematic diagram of a driving timing chart according to the present invention, referring to fig. 3 and 7, in some alternative embodiments, the driving module 21 includes a driving transistor M1, the driving transistor M1 is a P-type transistor, and a first end of the switching module 22 is electrically connected to a source of the driving transistor M1;
the bias compensation voltage is a low level voltage;
the duty cycle of the emission control signal E1 in the first phase T1 is greater than that in the second phase T2.
Specifically, the driving module 21 includes a driving transistor M1, the first end of the switching module 22 is electrically connected to the source of the driving transistor M1, in the first bias compensation stage T221, the switching module 22 is turned on, and the first signal end D1 transmits a bias compensation voltage, the bias compensation voltage is a low level voltage, so that the bias compensation voltage can be transmitted to the first end of the driving module 21, that is, the bias compensation voltage can be transmitted to the source of the driving transistor M1, the source of the driving transistor M1 is a low level voltage, at this time, the gate potential of the driving transistor M1 is generally close to Vdata- |Δvth|, where Vdata is the voltage value of the data voltage, Δvth is the threshold voltage of the driving transistor M1, that is, in the first bias compensation stage T221, the gate-source voltage vgs of the driving transistor M1 is greater than 0, at this time, the driving transistor M1 is under the positive bias effect, and the characteristics of the driving transistor M1 are positively floated. Since the driving transistor M1 is a P-type transistor, the driving transistor M1 is turned on more easily, so that the driving current generated by the driving transistor M1 is higher in the second light emitting stage T21.
At this time, the duty ratio of the light emission control signal E1 in the first stage T1 is greater than that in the second stage T2, that is, the duration occupied by the first light emission stage T11 in the first stage T1 is greater than that occupied by the second light emission stage T21 in the second stage T2, so that the phenomenon that the brightness of the display panel in the first stage T1 is less than that in the second stage T2 due to the fact that the driving current generated by the driving transistor M1 in the first stage T11 is less than that generated by the driving transistor M1 in the second stage T2 is effectively relieved, the brightness of the display panel in the first stage T1 is less than that in the second stage T2 is effectively improved, and the screen flicker phenomenon is effectively improved.
Optionally, the duration of the first non-light-emitting period T11 in the first period T1 may be increased by reducing the duration of the first non-light-emitting period T11 in the first period T1, so that the brightness of the display screen of the display panel in the first period T1 is increased in one frame of screen time of the display panel, so that the brightness of the display screen of the display panel in the second period T2 tends to be the same.
It should be noted that, in fig. 3, the driving transistor M1 is exemplarily shown to be a PMOS driving transistor, and in other embodiments of the present invention, the driving transistor M1 may also be an NMOS driving transistor, at this time, in a frame of picture time of the display panel, a duty ratio of the light emission control signal E1 in the first stage T1 and a duty ratio of the light emission control signal E1 in the second stage T2 may be set with reference to the above embodiments, which are not described herein in detail.
Fig. 8 is a comparison diagram of driving timings of a first mode and a second mode according to the present invention, referring to fig. 3 and 8, in some alternative embodiments, the pixel circuit further includes a DATA writing module 24, a first terminal of the DATA writing module 24 is connected to a DATA voltage terminal DATA, and a second terminal of the DATA writing module 24 is electrically connected to a source of the driving transistor M1, wherein the DATA voltage terminal DATA is used for transmitting a DATA voltage;
the working state of the pixel circuit comprises a first mode and a second mode, wherein in the first mode, the voltage value of the data voltage is V1, and in the second mode, the voltage value of the data voltage is V2, wherein V1 is less than V2;
in the first mode, the duty ratio of the light emission control signal E1 in the first phase T1 is A1, and in the second mode, the duty ratio of the light emission control signal E1 in the first phase T1 is A2, wherein A1 < A2.
Specifically, the pixel circuit further includes a DATA writing module 24, a first end of the DATA writing module 24 is connected to a DATA voltage end DATA, and a second end of the DATA writing module 24 is electrically connected to a source electrode of the driving transistor M1, wherein the DATA voltage end DATA is used for transmitting a DATA voltage. In the DATA writing stage t1, the DATA writing module 24 is turned on, the DATA voltage terminal DATA writes the DATA voltage to the first pole of the driving transistor M1, and the subsequent driving transistor M1 can form the driving current based on the DATA voltage signal.
The working state of the pixel circuit comprises a first mode and a second mode, wherein in the first mode, the voltage value of the data voltage is V1, and in the second mode, the voltage value of the data voltage is V2, and V1 is less than V2. That is, in the first mode, the voltage value of the data voltage is low, and the first mode is a low gray scale display mode. That is, in the second mode, the voltage value of the data voltage is higher, and the second mode is a high gray scale display mode.
Since the switch module 22 is turned on in the first bias compensation stage T221, and the first signal terminal D1 transmits the bias compensation voltage, the bias compensation voltage is a high level voltage, so that the bias compensation voltage can be transmitted to the first terminal of the driving module 21, that is, the bias compensation voltage can be transmitted to the source of the driving transistor M1, and the source of the driving transistor M1 is a high level voltage, at this time, the gate potential of the driving transistor M1 is generally close to Vdata- Δvth, where Vdata is the voltage value of the data voltage, Δvth is the threshold voltage of the driving transistor M1, that is, in the first bias compensation stage T221, the gate-source voltage vgs of the driving transistor M1 is less than 0, at this time, the driving transistor M1 is under the negative bias effect, and the characteristics of the driving transistor M1 drift negatively. Since the driving transistor M1 is a P-type transistor, the driving transistor M1 is not turned on easily, so that the driving current generated by the driving transistor M1 is low in the second light emitting stage T21. In the first mode, the voltage value of the data voltage is V1, and in the first bias compensation stage T221, the gate potential of the driving transistor M1 is generally close to V1- |Δvth|, at this time, the gate-source voltage vgs of the driving transistor M1 is smaller than 0, and the difference between the gate voltage and the source voltage of the driving transistor M1 is larger, so that the driving transistor M1 is under a larger negative bias, and thus, in the second light emitting stage T21, the driving current generated by the driving transistor M1 is lower.
In the first mode, the duty ratio of the light emission control signal E1 in the first phase T1 is A1, and in the second mode, the duty ratio of the light emission control signal E1 in the first phase T1 is A2, wherein A1 < A2. That is, in the first mode, the duty ratio of the light emission control signal E1 in the first stage T1 is lower than that in the second mode. That is, compared with the second mode, in the first mode, the first lighting stage T11 in the first stage T1 occupies less time, so that the phenomenon that in the first mode, the brightness of the display screen in the first stage T1 is larger than the brightness of the display screen in the second stage T2 in the frame time of the display panel in the first mode caused by lower driving current generated by the driving transistor M1 in the second lighting stage T21 in the first mode is effectively relieved, the brightness of the display screen in the first stage T1 tends to be the same as the brightness of the display screen in the second stage T2 in the frame time of the display panel in the first mode, the screen flicker phenomenon is effectively improved, and the visual experience is improved.
Referring to fig. 3 and 8, in some alternative embodiments, |v1-v2| is positively correlated with |a1-a2|.
Specifically, in the first bias compensation stage T221, the gate potential of the driving transistor M1 is generally close to Vdata- |Δvth|, where Vdata is the voltage value of the data voltage, Δvth is the threshold voltage of the driving transistor M1, and at this time, the gate-source voltage vgs of the driving transistor M1 is less than 0. The smaller the voltage value of the data voltage, the larger the difference between the gate voltage and the source voltage of the driving transistor M1, and the driving transistor M1 is under a larger negative bias, and the lower the driving current generated by the driving transistor M1 in the second light emitting stage T21. Correspondingly, the duty ratio of the light-emitting control signal E1 in the first stage T1 can be adjusted according to the voltage value of the data voltage, namely, the smaller the voltage value of the data voltage is, the smaller the duty ratio of the light-emitting control signal E1 in the first stage T1 is, so that when the voltage value of the data voltage is different, the brightness of a display picture of the display panel in the first stage T1 tends to be the same as the brightness of the display picture in the second stage T2 in one frame of picture time of the display panel, the screen flicker phenomenon is effectively improved, and the visual experience is improved.
With continued reference to fig. 3 and 4, in some alternative embodiments, the pixel circuit further includes a DATA writing module 24, a first terminal of the DATA writing module 24 is connected to a DATA voltage terminal DATA, and a second terminal of the DATA writing module 24 is electrically connected to a source of the driving transistor M1, wherein the DATA voltage terminal DATA is used for transmitting a DATA voltage;
in the time of displaying a frame of display images of the display panel, the working process of the pixel circuit further comprises a third stage T3, and a first stage T1 is arranged between the third stage T3 and the first second stage T2;
the third stage T3 includes a third non-light-emitting stage T32 and a third light-emitting stage T31 that are sequentially arranged, the third non-light-emitting stage T32 includes a data writing stage T1, and in the data writing stage T1, the data writing module 24 is turned on, and the data voltage is written into the driving module 21;
in the first lighting stage T11, the second lighting stage T21, and the third lighting stage T31, the lighting control module 23 is turned on, and the first power signal terminal PVDD writes the first power signal into the driving transistor M1;
in the same frame of display time of the display panel, the duration of the second lighting stage T21 is A', the duration of the first lighting stage T11 is A, wherein,VPVDD is the voltage value of the first power supply signal, vdata is the voltage value of the data voltage, and Δvth is the threshold voltage of the driving transistor M1.
Specifically, the pixel circuit further includes a DATA writing module 24, a first end of the DATA writing module 24 is connected to a DATA voltage end DATA, and a second end of the DATA writing module 24 is electrically connected to a source electrode of the driving transistor M1, wherein the DATA voltage end DATA is used for transmitting a DATA voltage. In the DATA writing stage T1, the DATA writing module 24 is turned on, the DATA voltage terminal DATA writes a DATA voltage signal to the first pole of the driving transistor M1, and in the first, second and third light emitting stages T11, T21 and T31, the light emitting control module 23 is turned on, the first power signal terminal PVDD writes a first power signal to the driving transistor M1, and the driving transistor M1 may form a driving current based on the DATA voltage and the first power signal.
In the first bias compensation stage T221, the switch module 22 is turned on, and the first signal terminal D1 transmits a bias compensation voltage, where the bias compensation voltage is a high level voltage, so that the bias compensation voltage can be transmitted to the first terminal of the driving module 21, that is, the bias compensation voltage can be transmitted to the source of the driving transistor M1, where the source of the driving transistor M1 is a high level voltage, and at this time, the gate potential of the driving transistor M1 is generally close to Vdata- Δvth, where Vdata is a voltage value of the data voltage, Δvth is a threshold voltage of the driving transistor M1, that is, in the first bias compensation stage T221, the gate-source voltage vgs of the driving transistor M1 is less than 0, and at this time, the driving transistor M1 is under a negative bias effect, and the characteristics of the driving transistor M1 drift negatively. Since the driving transistor M1 is a P-type transistor, the driving transistor M1 is not turned on easily, so that the driving current generated by the driving transistor M1 is low in the second light emitting stage T21. That is, in the second light emitting period T21, the driving current generated by the driving transistor M1 is affected by the negative drift of the threshold voltage of the driving transistor M1, so that the duration of the first light emitting period T11 can be calculated from the duration of the second light emitting period T21, the voltage value of the first power supply signal, the voltage value of the data voltage, and the threshold voltage of the driving transistor M1.
With continued reference to fig. 3 and 4, in some alternative embodiments, the third non-light emitting phase T32 further includes a second bias compensation phase T2 and a reset phase T3, the second bias compensation phase T2 being located after the data writing phase T1, the switch module 22 being turned on during the second bias compensation phase T2, writing a bias compensation voltage to the drive module 21;
the reset phase t3 is located before the data writing phase t2, and in the reset phase t3, the switching module 22 is turned on, and the bias compensation voltage is written into the driving module 21.
Specifically, in a frame of display time of the display panel, the third non-light-emitting stage T32 further includes a second bias compensation stage T2, where the second bias compensation stage T2 is located after the data writing stage T1, and the switch module 22 is turned on, and the bias compensation voltage can be transmitted to the first end of the driving transistor M1, so that the driving transistor M1 can be biased, and thus, in the first light-emitting stage T11 in the first stage T1 after the third light-emitting stage T31 and the third stage T3, the light-emitting element 30 emits light based on the driving current generated by the biased driving transistor M1. Since the first bias compensation stage T221 is provided in the second non-light-emitting stage T22, the light-emitting element 30 also emits light based on the driving current generated by the biased driving transistor M1 at the first light-emitting stage T11 in the first stage T1 after each second stage T2, thereby reducing the difference between the display luminance of the display panel at the third light-emitting stage T31 and the first light-emitting stage T11 in the first stage T1 and the display luminance thereof at the subsequent first light-emitting stage T11 in the first stage T1.
The third non-light-emitting stage T32 further includes a reset stage T3, where the reset stage T3 is located before the data writing stage T2, and in the reset stage T3, the switch module 22 is turned on, and the bias compensation voltage is written into the driving module 21, so that the driving transistor M1 can be reset once, and the tailing phenomenon during switching of the display panel picture can be reduced.
With continued reference to fig. 3 and 4, in some alternative embodiments, the duty cycle of the emission control signal E1 in the third phase T3 is greater than its duty cycle in the first phase T1.
Specifically, in the second bias compensation phase t2, the switch module 22 is turned on, and the first signal terminal D1 transmits the bias compensation voltage, where the bias compensation voltage is a high level voltage, so that the bias compensation voltage can be transmitted to the first terminal of the driving module 21, that is, the bias compensation voltage can be transmitted to the source of the driving transistor M1, where the source of the driving transistor M1 is a high level voltage, and at this time, the gate potential of the driving transistor M1 is generally close to Vdata- Δvth, where Vdata is the voltage value of the data voltage, Δvth is the threshold voltage of the driving transistor M1, that is, in the second bias compensation phase t2, the gate-source voltage vgs of the driving transistor M1 is less than 0, and at this time, the driving transistor M1 is under the negative bias effect, and the characteristics of the driving transistor M1 drift negatively. Since the driving transistor M1 is a P-type transistor, the driving transistor M1 is not turned on easily, and thus the driving current generated by the driving transistor M1 is low in the third light emitting stage T31.
At this time, the duty ratio of the light emission control signal E1 in the third stage T3 is greater than the duty ratio of the light emission control signal in the first stage T1, that is, the duration occupied by the first light emission stage T11 in the first stage T1 is less than the duration occupied by the third light emission stage T31 in the third stage T3, so that the phenomenon that the brightness of the display panel in the first stage T1 is greater than the brightness of the display panel in the third stage T3 due to the fact that the driving current generated by the driving transistor M1 in the first stage T11 is greater than the driving current generated by the driving transistor M1 in the third stage T31 in the first stage T1 is effectively relieved, the brightness of the display panel in the first stage T1 tends to be the same as the brightness of the display panel in the third stage T3, and the visual experience is effectively improved.
Fig. 9 is a further driving timing chart provided by the present invention, referring to fig. 3 and 9, in some alternative embodiments, the duty cycle of the light emission control signal E1 in the first phase T1 is greater than that in the second first phase T1.
Specifically, a first stage T1 is disposed between the third stage T3 and the first second stage T2, and the driving current generated by the driving transistor M1 in the first light-emitting stage T11 in the first stage T1 is reduced due to the influence of the bias of the driving transistor M1 in the second bias compensation stage T2 in the third stage T3. At this time, the duty ratio of the light emission control signal E1 in the first stage T1 is greater than the duty ratio of the light emission control signal in the second first stage T1, that is, the duration a11 occupied by the first light emission stage T11 in the first stage T1 is greater than the duration a12 occupied by the first light emission stage T11 in the first stage T1, so that the phenomenon that the brightness of the display panel in the first stage T1 tends to be the same due to the fact that the driving current generated by the driving transistor M1 in the first light emission stage T11 in the first stage T1 is smaller than the driving current generated by the driving transistor M1 in the second first stage T1 in the first stage T1 is smaller than the brightness of the display panel in the second stage T1 is effectively alleviated, and the flicker phenomenon is effectively improved, so that the brightness of the display panel in each first stage T1 tends to be the same in one frame of picture time of the display panel is improved.
In some alternative embodiments, please refer to fig. 10, fig. 10 is a schematic plan view of a display device provided by the present invention, and a display device 1000 provided by the present embodiment includes a display panel 100 provided by the above-mentioned embodiments of the present invention. The embodiment of fig. 10 is only taken as an example of a mobile phone to describe the display device 1000, and it is to be understood that the display device 1000 provided in the embodiment of the present invention may be any other display device 1000 having a display function, such as a computer, a television, a vehicle-mounted display device, etc., which is not particularly limited in the present invention. The display device 1000 provided in the embodiment of the present invention has the beneficial effects of the display panel 100 provided in the embodiment of the present invention, and the specific description of the display panel 100 in the above embodiments may be referred to in the embodiments, and the description of the embodiment is omitted herein.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:
in the display panel provided by the invention, the duty ratio of the light-emitting control signal in the first stage is different from that in the second stage. The duration of the first stage is the same as the duration of the second stage, namely the duration of the first lighting stage in the first stage is different from the duration of the second lighting stage in the second stage, so that the phenomenon that the brightness of a display screen of a display panel is different from the brightness of the display screen of the display panel in the second stage due to the fact that a driving transistor is not biased in the first stage and is biased in the first bias compensation stage in the second stage is effectively relieved, the brightness of the display screen of the display panel in the first stage tends to be the same as the brightness of the display screen of the display panel in the second stage in one frame of picture time of the display panel, screen flickering is effectively improved, and visual experience is improved.
While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (10)

1. A display panel, comprising:
a substrate base;
the sub-pixels are arranged on one side of the substrate and comprise pixel circuits and light-emitting elements;
the pixel circuit comprises a driving module, a switch module and a light-emitting control module;
the first end of the switch module is connected with the first signal end, and the second end of the switch module is electrically connected with the first end of the driving module;
the light-emitting control module is connected between the first power supply signal end and the light-emitting element, the control end of the light-emitting control module is connected with the light-emitting control signal end, and the light-emitting control signal end is used for transmitting a light-emitting control signal;
in the time of one frame of display picture of the display panel, the working process of the pixel circuit comprises a plurality of first phases and a plurality of second phases, the first phases and the second phases are alternately arranged, and the duration of the first phases is the same as the duration of the second phases;
The first stage comprises a first light-emitting stage and a first non-light-emitting stage, wherein in the first stage, the switch module is closed, in the first light-emitting stage, the light-emitting control module is conducted, and in the first non-light-emitting stage, the light-emitting control module is closed;
the second stage comprises a second light-emitting stage and a second non-light-emitting stage, wherein in the second light-emitting stage, the light-emitting control module is conducted, and in the second non-light-emitting stage, the light-emitting control module is turned off;
the second non-light-emitting stage comprises a first bias compensation stage, wherein in the first bias compensation stage, the switch module is conducted, and the first signal end transmits bias compensation voltage;
the duty ratio of the light emission control signal in the first phase is different from the duty ratio thereof in the second phase.
2. The display panel of claim 1, wherein the display panel comprises,
the driving module comprises a driving transistor, the driving transistor is a P-type transistor, and the first end of the switch module is electrically connected with the source electrode of the driving transistor;
the bias compensation voltage is a high level voltage;
the duty cycle of the light emission control signal in the first phase is smaller than that in the second phase.
3. The display panel of claim 1, wherein the display panel comprises,
the driving module comprises a driving transistor, the driving transistor is a P-type transistor, and the first end of the switch module is electrically connected with the source electrode of the driving transistor;
the bias compensation voltage is a low level voltage;
the duty cycle of the light emission control signal in the first phase is greater than that in the second phase.
4. The display panel of claim 2, wherein the display panel comprises,
the pixel circuit further comprises a data writing module, wherein a first end of the data writing module is connected with a data voltage end, a second end of the data writing module is electrically connected with a source electrode of the driving transistor, and the data voltage end is used for transmitting data voltage;
the working state of the pixel circuit comprises a first mode and a second mode, wherein in the first mode, the voltage value of the data voltage is V1, and in the second mode, the voltage value of the data voltage is V2, wherein V1 is less than V2;
in the first mode, the duty ratio of the light-emitting control signal in the first stage is A1, and in the second mode, the duty ratio of the light-emitting control signal in the first stage is A2, wherein A1 is less than A2.
5. The display panel of claim 4, wherein the display panel comprises,
the |v1-v2| is positively correlated with |a1-a2|.
6. The display panel of claim 2, wherein the display panel comprises,
the pixel circuit further comprises a data writing module, wherein a first end of the data writing module is connected with a data voltage end, a second end of the data writing module is electrically connected with a source electrode of the driving transistor, and the data voltage end is used for transmitting data voltage;
in the time of one frame of display picture of the display panel, the working process of the pixel circuit further comprises a third stage, and a first stage is arranged between the third stage and a first stage and the second stage;
the third stage comprises a third non-light-emitting stage and a third light-emitting stage which are sequentially arranged, the third non-light-emitting stage comprises a data writing stage, and in the data writing stage, the data writing module is conducted to write the data voltage into the driving module;
in the first light-emitting stage, the second light-emitting stage and the third light-emitting stage, the light-emitting control module is conducted, and the first power supply signal end writes a first power supply signal into the driving transistor;
In the same frame of display frame time of the display panel, the duration of the second lighting stage is A', the duration of the first lighting stage is A, wherein,VPVDD is the voltage value of the first power supply signal, vdata is the voltage value of the data voltage, and Δvth is the threshold voltage of the driving transistor.
7. The display panel of claim 6, wherein the display panel comprises,
the third non-light-emitting stage further comprises a second bias compensation stage and a reset stage, wherein the second bias compensation stage is positioned after the data writing stage, and the switch module is conducted to write the bias compensation voltage into the driving module in the second bias compensation stage;
the reset phase is located before the data writing phase, and in the reset phase, the switch module is conducted to write the bias compensation voltage into the driving module.
8. The display panel of claim 7, wherein the display panel comprises,
the duty cycle of the light emission control signal in the third phase is greater than that in the first phase.
9. The display panel of claim 7, wherein the display panel comprises,
the duty cycle of the light emission control signal in a first one of the first phases is greater than the duty cycle of the light emission control signal in a second one of the first phases.
10. A display device, characterized in that the display device comprises a display panel according to any one of claims 1-9.
CN202310992992.XA 2023-08-08 2023-08-08 Display panel and display device Pending CN117059026A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310992992.XA CN117059026A (en) 2023-08-08 2023-08-08 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310992992.XA CN117059026A (en) 2023-08-08 2023-08-08 Display panel and display device

Publications (1)

Publication Number Publication Date
CN117059026A true CN117059026A (en) 2023-11-14

Family

ID=88661902

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310992992.XA Pending CN117059026A (en) 2023-08-08 2023-08-08 Display panel and display device

Country Status (1)

Country Link
CN (1) CN117059026A (en)

Similar Documents

Publication Publication Date Title
CN107452331B (en) Pixel circuit, driving method thereof and display device
US20240119897A1 (en) Pixel Circuit and Driving Method Therefor and Display Panel
US11881164B2 (en) Pixel circuit and driving method thereof, and display panel
CN110610684B (en) Organic electroluminescent display panel and display device
CN104933993B (en) Pixel-driving circuit and its driving method, display device
CN104871233B (en) Display device, method for driving the same, and electronic apparatus
US9084331B2 (en) Active matrix organic light emitting diode circuit and operating method of the same
CN112102785A (en) Pixel circuit, display panel, driving method of display panel and display device
CN101615380B (en) Display apparatus, driving method for display apparatus and electronic apparatus
CN105427809B (en) Pixel compensation circuit and AMOLED display device
CN109801592B (en) Pixel circuit, driving method thereof and display substrate
CN112908264B (en) Pixel driving circuit, driving method, display panel and display device
CN113950715B (en) Pixel circuit, driving method thereof and display device
US20090295772A1 (en) Pixel and organic light emitting display using the same
CN110097848B (en) Display device, driving method for display device, and electronic apparatus
CN108597445B (en) Display device, driving method for display device, and electronic apparatus
CN108389551B (en) Pixel circuit, driving method thereof and display device
CN111354314A (en) Pixel circuit, driving method of pixel circuit and display panel
CN104347031A (en) Display device, method for driving display device, and electronic apparatus
CN111145686A (en) Pixel driving circuit, display panel and driving method
JP4260586B2 (en) Display device drive circuit and drive method
CN112102784A (en) Pixel driving circuit, manufacturing method thereof and display device
GB2620507A (en) Pixel circuit and driving method therefor and display panel
CN115035858A (en) Pixel circuit, driving method thereof and display panel
CN112164375A (en) Pixel compensation circuit, driving method thereof and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination