CN117055679B - Low-offset band-gap reference circuit and low-offset band-gap reference chip - Google Patents
Low-offset band-gap reference circuit and low-offset band-gap reference chip Download PDFInfo
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- CN117055679B CN117055679B CN202311312401.6A CN202311312401A CN117055679B CN 117055679 B CN117055679 B CN 117055679B CN 202311312401 A CN202311312401 A CN 202311312401A CN 117055679 B CN117055679 B CN 117055679B
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- G—PHYSICS
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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Abstract
The invention provides a low-offset band-gap reference circuit and a low-offset band-gap reference chip, wherein a zero-temperature drift structure is constructed through a full NPN triode, the offset problem of the whole circuit is solved by utilizing the low-offset characteristic of the NPN triode, and the output current irrelevant to room temperature can be provided, so that the whole low-offset band-gap reference circuit has the low-offset characteristic and the zero-temperature drift characteristic.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a low-offset band-gap reference circuit and a low-offset band-gap reference chip.
Background
The power supply will output a precise voltage or current point that can be referenced to the entire chip, which is the reference voltage or reference current. In a common reference voltage circuit, a band gap reference source is a common and accurate reference source. The band gap reference source (Bandgap Reference) has excellent temperature stability and is commonly used for high-precision voltage reference. The existing band gap reference circuit is usually built by a PNP type triode, but part of chips with low offset characteristics need to have the reference circuit with low offset characteristics, and the band gap reference circuit built by the PNP type triode is difficult to meet the low offset characteristics and cannot solve the offset problem of the reference circuit. In addition, the band gap reference of the core circuit is built by utilizing the low-offset characteristic of the NPN type three-stage tube, and the problem of offset of the reference circuit can be solved, but the problem that the output current is large along with the change of the power supply voltage exists in the NPN type band gap reference, and the power supply rejection ratio (Power Supply Rejection Ratio, PSRR) is poor.
Disclosure of Invention
The invention provides a low-offset band-gap reference circuit and a low-offset band-gap reference chip, which are used for solving the problems that the offset problem of the reference circuit cannot be solved and the defect that the output current is changed greatly along with the power supply voltage in the prior art.
The invention provides a low offset bandgap reference circuit, comprising:
a power supply voltage isolation structure and a zero temperature drift structure;
the zero-temperature drift structure comprises a first NPN triode, a second NPN triode, a third NPN triode, a fourth NPN triode and a third resistor; the power supply voltage isolation structure comprises a fifth NPN triode, a sixth NPN triode, a seventh NPN triode, an eighth NPN triode, a first resistor and a second resistor;
the collectors of the seventh NPN triode and the eighth NPN triode are respectively connected with a power supply through the first resistor and the second resistor; the base electrode of the seventh NPN type triode, the base electrode of the eighth NPN type triode, the emitter electrode of the eighth NPN type triode and the collector electrode of the sixth NPN type triode are connected; the emitter of the seventh NPN triode, the collector of the fifth NPN triode, the base of the fifth NPN triode and the base of the sixth NPN triode are connected;
the emitter of the fifth NPN triode is connected with the collector of the third NPN triode; the emitter of the sixth NPN triode is connected with the first end of the third resistor; the second end of the third resistor, the collector electrode of the fourth NPN triode, the base electrode of the fourth NPN triode and the base electrode of the third NPN triode are connected; the emitter of the third NPN triode, the collector of the first NPN triode and the base of the second NPN triode are connected; the emitter of the fourth NPN triode, the collector of the second NPN triode and the base of the first NPN triode are connected; the emitter of the first NPN type triode and the emitter of the second NPN type triode are connected, and the current and the voltage at the connection part of the emitter of the first NPN type triode and the emitter of the second NPN type triode are respectively the output current and the output voltage of the low-offset band gap reference circuit.
According to the low-offset bandgap reference circuit provided by the invention, the power supply voltage isolation structure of the low-offset bandgap reference circuit further comprises an electrostatic discharge protection structure.
According to the low-offset band gap reference circuit provided by the invention, the static electricity discharge protection structure comprises a ninth NPN triode and a tenth NPN triode;
the collector electrode of the ninth NPN type triode, the base electrode of the seventh NPN type triode and the base electrode of the eighth NPN type triode are connected; the base electrode of the ninth NPN triode, the emitter electrode of the eighth NPN triode and the collector electrode of the sixth NPN triode are connected; the emitter of the ninth NPN triode is grounded;
the base electrode of the tenth NPN type triode, the emitter electrode of the seventh NPN type triode and the collector electrode of the fifth NPN type triode are connected; the collector electrode of the tenth NPN triode is connected with a power supply; and the emitter of the tenth NPN triode, the base of the fifth NPN triode and the base of the sixth NPN triode are connected.
According to the low-offset bandgap reference circuit provided by the invention, the power supply voltage isolation structure of the low-offset bandgap reference circuit further comprises a starting circuit.
According to the low-offset band-gap reference circuit provided by the invention, the starting circuit is formed by connecting a plurality of diodes in series; the first end of the starting circuit, the base electrode of the seventh NPN triode, the base electrode of the eighth NPN triode and the collector electrode of the ninth NPN triode are connected; the second end of the starting circuit, the emitter of the seventh NPN triode, the collector of the fifth NPN triode and the base of the tenth NPN triode are connected.
According to the low-offset band-gap reference circuit provided by the invention, the number of diodes in the starting circuit is 6.
According to the low-offset bandgap reference circuit provided by the invention, the low-offset bandgap reference circuit further comprises a MOS capacitor.
According to the low-offset band-gap reference circuit provided by the invention, the MOS capacitor is connected between the base electrode of the second NPN triode and the ground.
According to the low-offset band-gap reference circuit provided by the invention, the low-offset band-gap reference circuit further comprises a fourth resistor; the first end of the fourth resistor, the emitter of the first NPN triode and the emitter of the second NPN triode are connected; the second end of the fourth resistor is grounded; the fourth resistor is used for adjusting the output voltage of the low-offset bandgap reference circuit so as to provide a reference voltage corresponding to a preset voltage value.
The invention also provides a low offset bandgap reference chip comprising: an integrated circuit of any of the low offset bandgap reference circuits described above.
According to the low-offset band gap reference circuit and the low-offset band gap reference chip provided by the invention, a zero-temperature drift structure is constructed through the full NPN type triode, the offset problem of the whole circuit is solved by utilizing the low-offset characteristic of the NPN type triode, and the output current irrelevant to room temperature can be provided, so that the whole low-offset band gap reference circuit has the low-offset characteristic and the zero-temperature drift characteristic.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a low offset bandgap reference circuit according to the present invention;
fig. 2 is a schematic circuit diagram of a zero temperature drift structure provided by the invention;
FIG. 3 is a second schematic diagram of a low offset bandgap reference circuit according to the present invention;
reference numerals:
110: a fifth NPN triode; 120: a sixth NPN triode;
130: a seventh NPN triode; 140: an eighth NPN triode;
150: a first resistor; 160: a second resistor; 170: a ninth NPN triode;
180: a tenth NPN triode; 190: a start-up circuit;
210: a first NPN triode; 220: a second NPN triode;
230: a third NPN triode; 240: a fourth NPN triode;
250: a third resistor; 260: a fifth resistor;
270: a sixth resistor; 280: and a fourth resistor.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The existing band gap reference circuit is usually built by a PNP type triode, but part of chips with low offset characteristics need to have the reference circuit with low offset characteristics, and the band gap reference circuit built by the PNP type triode is difficult to meet the low offset characteristics and cannot solve the offset problem of the reference circuit. In addition, the core circuit is built by partially utilizing the low-offset characteristic of the NPN type three-stage tube, so that the offset problem of the reference circuit can be solved, but the problem that the output current of the NPN type band gap reference is changed greatly along with the power supply voltage exists, and the power supply inhibition is relatively poor.
In contrast, the invention provides a low-offset bandgap reference circuit for providing a reference current which has low offset characteristics, zero temperature drift and is not affected by power supply voltage variation. Fig. 1 is a schematic circuit diagram of a low offset bandgap reference circuit provided in the present invention, as shown in fig. 1, the circuit includes a power supply voltage isolation structure and a zero temperature drift structure, the zero temperature drift structure is used for providing an output current with low offset characteristics and zero temperature drift characteristics, and by adding the power supply voltage isolation structure above the zero temperature drift structure, interference of the power supply voltage on the circuit is isolated, and dependence of the output current on power supply voltage variation is eliminated.
The zero-temperature drift structure comprises a first NPN triode 210, a second NPN triode 220, a third NPN triode 230, a fourth NPN triode 240 and a third resistor 250; the power supply voltage isolation structure includes a fifth NPN transistor 110, a sixth NPN transistor 120, a seventh NPN transistor 130, an eighth NPN transistor 140, a first resistor 150, and a second resistor 160.
Specifically, the zero temperature drift structure utilizes the low-offset characteristic of the NPN triode to build a reference circuit which can be used for a low-offset characteristic circuit, and simultaneously realizes the zero temperature drift characteristic of the output current. As shown in fig. 1, in the zero-temperature drift structure, the emitter of the fifth NPN transistor 110 and the collector of the third NPN transistor 230 are connected; the emitter of the sixth NPN transistor 120 is connected to a first terminal of the third resistor 250 (which may be either terminal of the resistor); the second end of the third resistor 250 (the other end of the resistor), the collector of the fourth NPN transistor 240, the base of the fourth NPN transistor 240, and the base of the third NPN transistor 230 are connected; the emitter of the third NPN transistor 230, the collector of the first NPN transistor 210, and the base of the second NPN transistor 220 are connected; the emitter of the fourth NPN transistor 240, the collector of the second NPN transistor 220, and the base of the first NPN transistor 210 are connected; the emitter of the first NPN transistor 210 and the emitter of the second NPN transistor 220 are connected, and the current and the voltage at the connection of the emitter of the first NPN transistor 210 and the emitter of the second NPN transistor 220 are the output current and the output voltage of the low offset bandgap reference circuit, respectively.
In order to facilitate the demonstration of the low offset characteristic and the zero temperature drift characteristic of the zero temperature drift structure, as shown in fig. 2, a fifth resistor 260 and a sixth resistor 270 (whose resistance values are denoted as R1 and R2, respectively) may be added to the zero temperature drift structure.
Without considering mismatch, i.e. r1=r2:
then satisfy
Wherein,k is Bowman's constant, T is the thermodynamic temperature, absolute temperature, q is the electron charge, i.e.>Is a constant; r is (r) 1 R is the ratio of the emitter areas of the second NPN transistor 220 and the first NPN transistor 210 2 Is the ratio of the emitter areas of the third NPN transistor 230 and the fourth NPN transistor 240.
In the case of mismatch consideration, if1 and->2 (i.e.)>) And the mismatch rate is/>And the emitter current of the third NPN transistor 230 +.>Emitter current +.>There is a deviation->The method comprises the following steps:
wherein,，/>。
the circuit satisfies the following conditions(can be preset),>is the emitter current of the second NPN transistor 220.
Thus, the first and second substrates are bonded together,
it can be seen that the output current I O The circuit has zero temperature drift characteristics because the circuit is independent of room temperature under the conditions of considering mismatch and not considering mismatch.
In addition, in the case of mismatch, since the matching between the fifth resistor 260 and the sixth resistor 270 is good in the normal case (Δp<2%) and thus the deviation of the current mirror gain (i.e. an) versus the output current I O The impact of (a) is very small, i.e. the circuit has a low offset characteristic.
Although the zero temperature drift structure can provide an output current with low offset characteristics and zero temperature drift characteristics, the output current is sensitive to the change of the power supply voltage, and the output current can be reduced along with the increase of the power supply voltage.
Therefore, the embodiment of the invention increases the power supply voltage isolation structure above the zero temperature drift structure to isolate the interference of the power supply voltage to the circuit. Specifically, as shown in fig. 1, in the power supply voltage isolation structure, the collectors of the seventh NPN transistor 130 and the eighth NPN transistor 140 are connected to a power supply via the first resistor 150 and the second resistor 160, respectively; the base of the seventh NPN transistor 130, the base of the eighth NPN transistor 140, the emitter of the eighth NPN transistor 140, and the collector of the sixth NPN transistor 120 are connected; the emitter of the seventh NPN transistor 130, the collector of the fifth NPN transistor 110, and the base of the fifth NPN transistor 110 and the base of the sixth NPN transistor 120 are connected.
After the power supply voltage isolation structure is added, the low-offset band-gap reference circuit can not be interfered by power supply voltage while having low offset characteristics and zero temperature drift characteristics, so that the power supply rejection ratio of the circuit is improved. The specific derivation of this conclusion is as follows:
the circuit satisfies the following conditions:and->
Thus meeting the following requirements
Wherein V is BE Is the base-emitter voltage of triode, I C Is collector current of triode, I S Is the saturated current of triode, V BE5 A voltage V of the base-emitter of the fifth NPN transistor 110 BE6 Is the base-emitter voltage of the sixth NPN transistor 110, I bias To flow through the third resistor 250, I 1 In order to flow a current through the first resistor 150, 2 is the current flowing through the second resistor 160.
On the basis of this, due to the output current I O Is based on I bias It is determined that I can be seen from the above formula bias Independent of supply voltage, thus outputting current I O And is independent of the supply voltage.
In summary, according to the circuit provided by the embodiment of the invention, the zero temperature drift structure is constructed through the full NPN type triode, the problem of the detuning of the whole circuit is solved by utilizing the low detuning characteristic of the NPN type triode, and the output current irrelevant to the room temperature can be provided, so that the whole low detuning band gap reference circuit has the low detuning characteristic and the zero temperature drift characteristic.
Based on the above embodiment, the power supply voltage isolation structure of the low offset bandgap reference circuit further includes an electrostatic discharge protection structure. Specifically, in the case where an electrostatic discharge (ESD) protection function is not provided in an external chip where the low offset bandgap reference circuit is located, in order to ensure the safety of the low offset bandgap reference circuit, an ESD protection structure may be added to the power supply voltage isolation structure.
As shown in fig. 3, the esd protection structure includes a ninth NPN transistor 170 and a tenth NPN transistor 180;
wherein, the collector of the ninth NPN transistor 170, the base of the seventh NPN transistor 130, and the base of the eighth NPN transistor 140 are connected; the base electrode of the ninth NPN transistor 170, the emitter electrode of the eighth NPN transistor 140, and the collector electrode of the sixth NPN transistor 120 are connected; the emitter of the ninth NPN triode 170 is grounded;
the base of the tenth NPN transistor 180, the emitter of the seventh NPN transistor 130, and the collector of the fifth NPN transistor 110 are connected; the collector of the tenth NPN triode 180 is connected with a power supply; the emitter of the tenth NPN transistor 180, the base of the fifth NPN transistor 110, and the base of the sixth NPN transistor 120 are connected.
Based on any of the above embodiments, a start-up circuit 190 is also included in the supply voltage isolation structure of the low offset bandgap reference circuit for providing a current that breaks the balance to ensure circuit start-up.
As shown in fig. 3, the start-up circuit 190 is formed by connecting a plurality of diodes in series; the first end of the start circuit 190, the base of the seventh NPN transistor 130, the base of the eighth NPN transistor 140, and the collector of the ninth NPN transistor 170 are connected; the second end of the start circuit 190, the emitter of the seventh NPN transistor 130, the collector of the fifth NPN transistor 110, and the base of the tenth NPN transistor 180 are connected. Specifically, the number of diodes in the start-up circuit 190 may be 6. The advantage of this start-up circuit is very simple and the power consumption is relatively small in the bandgap reference steady state.
Based on any of the above embodiments, the low offset bandgap reference circuit further includes a MOS capacitor, wherein the MOS capacitor can prevent parasitic oscillation, and the optimum capacitance and the optimum position of the capacitor can be determined according to the magnitude of the output current and the load of the output terminal when the MOS capacitor is applied to the actual circuit. In some embodiments, for circuits with smaller output currents, the MOS capacitor may be connected between the base of the second NPN transistor and ground.
Based on any of the above embodiments, as shown in fig. 3, the low offset bandgap reference circuit further includes a fourth resistor 280; the first end of the fourth resistor 280, the emitter of the first NPN transistor 210 and the emitter of the second NPN transistor 220 are connected; the second end of the fourth resistor 280 is grounded; the fourth resistor 280 is used to adjust the output voltage of the low offset bandgap reference circuit (i.e., V in fig. 3) out ) To provide a reference voltage corresponding to the preset voltage value.
Based on any one of the above embodiments, there is further provided a low offset bandgap reference chip, which includes the integrated circuit of the low offset bandgap reference circuit provided in any one of the above embodiments.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A low offset bandgap reference circuit, comprising:
a power supply voltage isolation structure and a zero temperature drift structure;
the zero-temperature drift structure comprises a first NPN triode, a second NPN triode, a third NPN triode, a fourth NPN triode and a third resistor; the power supply voltage isolation structure comprises a fifth NPN triode, a sixth NPN triode, a seventh NPN triode, an eighth NPN triode, a first resistor and a second resistor;
the collectors of the seventh NPN triode and the eighth NPN triode are respectively connected with a power supply through the first resistor and the second resistor; the base electrode of the seventh NPN type triode, the base electrode of the eighth NPN type triode, the emitter electrode of the eighth NPN type triode and the collector electrode of the sixth NPN type triode are connected; the emitter of the seventh NPN triode, the collector of the fifth NPN triode, the base of the fifth NPN triode and the base of the sixth NPN triode are connected;
the emitter of the fifth NPN triode is connected with the collector of the third NPN triode; the emitter of the sixth NPN triode is connected with the first end of the third resistor; the second end of the third resistor, the collector electrode of the fourth NPN triode, the base electrode of the fourth NPN triode and the base electrode of the third NPN triode are connected; the emitter of the third NPN triode, the collector of the first NPN triode and the base of the second NPN triode are connected; the emitter of the fourth NPN triode, the collector of the second NPN triode and the base of the first NPN triode are connected; the emitter of the first NPN type triode and the emitter of the second NPN type triode are connected, and the current and the voltage at the connection part of the emitter of the first NPN type triode and the emitter of the second NPN type triode are respectively the output current and the output voltage of the low-offset band gap reference circuit.
2. The low offset bandgap reference circuit of claim 1, further comprising an electrostatic discharge protection structure in said supply voltage isolation structure of said low offset bandgap reference circuit.
3. The low offset bandgap reference circuit of claim 2, wherein said electrostatic discharge protection structure comprises a ninth NPN transistor and a tenth NPN transistor;
the collector electrode of the ninth NPN type triode, the base electrode of the seventh NPN type triode and the base electrode of the eighth NPN type triode are connected; the base electrode of the ninth NPN triode, the emitter electrode of the eighth NPN triode and the collector electrode of the sixth NPN triode are connected; the emitter of the ninth NPN triode is grounded;
the base electrode of the tenth NPN type triode, the emitter electrode of the seventh NPN type triode and the collector electrode of the fifth NPN type triode are connected; the collector electrode of the tenth NPN triode is connected with a power supply; and the emitter of the tenth NPN triode, the base of the fifth NPN triode and the base of the sixth NPN triode are connected.
4. A low offset bandgap reference circuit as claimed in claim 3, further comprising a start-up circuit in said supply voltage isolation structure of said low offset bandgap reference circuit.
5. The low offset bandgap reference circuit of claim 4, wherein said start-up circuit is formed by a plurality of diodes in series; the first end of the starting circuit, the base electrode of the seventh NPN triode, the base electrode of the eighth NPN triode and the collector electrode of the ninth NPN triode are connected; the second end of the starting circuit, the emitter of the seventh NPN triode, the collector of the fifth NPN triode and the base of the tenth NPN triode are connected.
6. The low offset bandgap reference circuit of claim 5, wherein said number of diodes in said start-up circuit is 6.
7. The low offset bandgap reference circuit of claim 1, wherein said low offset bandgap reference circuit further comprises a MOS capacitor.
8. The low offset bandgap reference circuit of claim 7, wherein said MOS capacitor is connected between the base of said second NPN transistor and ground.
9. The low offset bandgap reference circuit of claim 1, further comprising a fourth resistor therein; the first end of the fourth resistor, the emitter of the first NPN triode and the emitter of the second NPN triode are connected; the second end of the fourth resistor is grounded; the fourth resistor is used for adjusting the output voltage of the low-offset bandgap reference circuit so as to provide a reference voltage corresponding to a preset voltage value.
10. A low offset bandgap reference chip comprising an integrated circuit of a low offset bandgap reference circuit as claimed in any one of claims 1 to 9.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7030598B1 (en) * | 2003-08-06 | 2006-04-18 | National Semiconductor Corporation | Low dropout voltage regulator |
| CN102681587A (en) * | 2012-05-23 | 2012-09-19 | 天津大学 | Low-temperature drifting reference voltage and reference current generating circuit |
| DE102013111083A1 (en) * | 2012-10-10 | 2014-04-17 | Analog Devices, Inc. | Base-emitter voltage difference circuit for forming resistorless proportional to absolute temperature unit cell in cascading voltage reference circuit, has metal-oxide semiconductor transistor for controlling collector voltage of transistor |
| CN104503528A (en) * | 2014-12-24 | 2015-04-08 | 电子科技大学 | Low-noise band-gap reference circuit reducing detuning influence |
| CN107544612A (en) * | 2017-10-11 | 2018-01-05 | 郑州云海信息技术有限公司 | A kind of reference voltage source circuit |
| CN113703511A (en) * | 2021-08-30 | 2021-11-26 | 上海川土微电子有限公司 | Band-gap reference voltage source with ultralow temperature drift |
| CN115145347A (en) * | 2022-08-19 | 2022-10-04 | 山东东仪光电仪器有限公司 | Second-order temperature compensation band gap reference circuit insensitive to operational amplifier offset |
| CN115291665A (en) * | 2022-09-13 | 2022-11-04 | 南京大学 | Band-gap reference circuit with offset cancellation |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5695439B2 (en) * | 2011-02-18 | 2015-04-08 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| US9354644B2 (en) * | 2014-10-02 | 2016-05-31 | Analog Devices, Inc. | Apparatus and method of temperature drift compensation |
-
2023
- 2023-10-10 CN CN202311312401.6A patent/CN117055679B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7030598B1 (en) * | 2003-08-06 | 2006-04-18 | National Semiconductor Corporation | Low dropout voltage regulator |
| CN102681587A (en) * | 2012-05-23 | 2012-09-19 | 天津大学 | Low-temperature drifting reference voltage and reference current generating circuit |
| DE102013111083A1 (en) * | 2012-10-10 | 2014-04-17 | Analog Devices, Inc. | Base-emitter voltage difference circuit for forming resistorless proportional to absolute temperature unit cell in cascading voltage reference circuit, has metal-oxide semiconductor transistor for controlling collector voltage of transistor |
| CN104503528A (en) * | 2014-12-24 | 2015-04-08 | 电子科技大学 | Low-noise band-gap reference circuit reducing detuning influence |
| CN107544612A (en) * | 2017-10-11 | 2018-01-05 | 郑州云海信息技术有限公司 | A kind of reference voltage source circuit |
| CN113703511A (en) * | 2021-08-30 | 2021-11-26 | 上海川土微电子有限公司 | Band-gap reference voltage source with ultralow temperature drift |
| CN115145347A (en) * | 2022-08-19 | 2022-10-04 | 山东东仪光电仪器有限公司 | Second-order temperature compensation band gap reference circuit insensitive to operational amplifier offset |
| CN115291665A (en) * | 2022-09-13 | 2022-11-04 | 南京大学 | Band-gap reference circuit with offset cancellation |
Non-Patent Citations (1)
| Title |
|---|
| 低温漂带隙基准源的设计及改进技术研究;应晶;中国优秀硕士学位论文全文数据库;第10-22页 * |
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| CN117055679A (en) | 2023-11-14 |
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