CN117055449A - Implementation method of coordination control device for high-capacity energy storage power station - Google Patents
Implementation method of coordination control device for high-capacity energy storage power station Download PDFInfo
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- G05B19/00—Programme-control systems
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- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
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Abstract
The invention provides a method for realizing a coordination control device for a large-capacity energy storage power station, which comprises the following steps: the setting equipment consists of a main board and two slave boards, and functions of CPU and DSP are divided and managed on the main board and the slave boards; setting the function of network ports on the main board and the slave board; setting a main board to directly control 128 PCS devices, and receiving double-network data of 64 PCS devices from the main board; designing an internal data exchange mechanism of a hundred meganetwork port based on a back plate, and finishing data receiving and sending from the plate to the main plate; setting a DSP part of the main board to execute frequency modulation and voltage regulation logic; the management CPU section of the set board provides a device management function. The invention can effectively solve the problems in the prior art, namely, the rapid synchronous adjustment of all PCS of the large-scale energy storage power station is completed, and the performance of the energy storage power station in the aspects of primary frequency modulation, source network load interaction, dynamic reactive voltage response and the like is improved.
Description
Technical Field
The invention relates to the field of power automation, in particular to a method for realizing a coordination control device for a high-capacity energy storage power station.
Background
In recent years, global energy revolution and the transition of the operation modes of electric power systems have prompted the widespread use of energy storage technologies. In particular, the increasing demands of power systems for power stability and reliability have led to the development of large-scale energy storage power stations as an important component of power systems. These power stations are typically made up of a large number of energy storage converters (PCS) to enable efficient storage and scheduling of electrical energy. However, how to efficiently coordinate control becomes an important and complex problem when a large number of PCS are deployed in one power station.
Conventional automatic power generation control (AGC) and Automatic Voltage Control (AVC) have failed to meet the operational requirements of large-scale energy storage power stations. Because the methods have obvious limitations in the process of the coordination control task of the large-scale energy storage power station, especially in the aspects of primary frequency modulation, source network load interaction, dynamic reactive voltage response and the like. These limitations are mainly manifested in that the system cannot meet the fast response requirements when it fluctuates in a complex grid environment. In addition, control of reactive voltage response of energy storage power stations and the like is also challenging.
Meanwhile, as the scale of energy storage power stations is continuously increased, the number of PCS to be processed is gradually increased. For large scale energy storage power stations, the number of control of the PCS may be very large, reaching hundreds of. In this case, the amount of data to be processed is large and the task is complicated for the control system. If the traditional processing mode is adopted, the interrupt task can be overtime, and the stable operation of the device is affected.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a method for realizing a coordination control device for a large-capacity energy storage power station, which can effectively solve the problems existing in the prior art, namely, the rapid synchronous adjustment of all PCS of the large-scale energy storage power station is completed, the performance of the energy storage power station in the aspects of primary frequency modulation, source network load interaction, dynamic reactive voltage response and the like is improved, the data processing requirements of high concurrency and large capacity can be properly processed, and the safe and stable operation of a power grid is ensured.
In order to achieve the above object, the present invention provides a method for implementing a coordination control device for a high-capacity energy storage power station, including:
step S1: the Zynq-series-based chip setting device consists of a main board and two slave boards, functions of CPU and DSP are divided and managed on the main board and the slave boards according to requirements, and the FPGA is used for realizing network port management, clock synchronization, sampling and GOOSE storm suppression;
step S2: the method comprises the steps that network ports are set on a main board and a slave board, wherein the main board is used for communication with EMS, primary frequency modulation, the slave board and PCS, and the slave board is mainly responsible for downloading programs and configuration files, communication with the main board and bidirectional communication with the PCS;
step S3: setting a main board to directly control 128 PCS devices at most, and receiving double-network data of 64 PCS devices from the main board; designing an internal data exchange mechanism of a hundred meganetwork port based on a back plate, and finishing data receiving and sending from the plate to the main plate;
step S4: setting a DSP part of the main board to execute frequency modulation and voltage regulation logic;
step S5: the management CPU section of the set board provides a device management function.
Further, the step S2 specifically includes:
step S21: setting a main board network interface, including the configuration of an EMS communication port, the configuration of a primary frequency modulation communication port, the configuration of a slave board communication port and the configuration of a PCS dual-network communication port;
step S22: setting slave board network interfaces, including configuration of program and configuration file downloading ports, configuration of main board communication ports and configuration of PCS dual-network communication ports;
step S23: and (5) verifying a network interface.
Further, the step S3 specifically includes:
step S31: setting a main board PCS control, including setting 128 PCS devices which can be associated and directly controlled in main board configuration; setting communication parameters of each PCS device in GOOSE protocol configuration of a main board;
step S32: setting slave board PCS data reception, including setting, in a slave board configuration, dual-network data capable of associating and receiving at most 64 PCS devices; setting and receiving data parameters of each PCS device in GOOSE protocol configuration of the slave board;
step S33: setting an internal data exchange mechanism, wherein the setting of the internal data exchange mechanism comprises setting hundred meganetwork ports in the back board configuration; designing and implementing an internal data exchange mechanism for receiving and transmitting data of the slave board;
step S34: and performing system communication test and data exchange test.
Further, step S4 specifically includes:
step S41: in the DSP configuration of the main board, the main board is set as a main processor for executing frequency and voltage adjustment; loading a logic algorithm in the DSP;
step S42: setting frequency modulation and voltage regulation parameters;
step S43: setting input and output channels of frequency and voltage adjustment signals;
step S44: and performing functional tests of the frequency modulation and voltage regulation system to ensure that the system adjusts the frequency and the voltage according to expectations.
Further, step S5 specifically includes:
step S51: on each board card, configuring an ARM core as a management CPU;
step S52: loading an operating system and device management software;
step S53: configuring parameters and interfaces of liquid crystal display in equipment management software;
step S54: configuring parameters and interfaces of waveform records in equipment management software;
step S55: configuring parameters and interfaces for setting value management in equipment management software;
step S56: configuring parameters and interfaces of the report in the device management software;
step S57: after the configuration and the setting are completed, the system test of the equipment management function is carried out.
Further, cloud management and data analysis are further included, and the cloud management and data analysis method specifically comprises the following steps:
step S61: cloud service selection and setting: a Cloud service provider is selected, such as AWS, azure, or Google Cloud. Considering that your design is based on the Linux operating system, these mainstream cloud service providers can meet the requirements;
a cloud server is created on the cloud service and necessary settings are made, including network settings, security settings, storage settings, etc.
Step S62: connection of equipment and cloud:
on the device, a connection to the cloud server is configured, typically via a secure network protocol such as SSL/TLS. This step requires some necessary software and libraries to be installed on the device, such as OpenSSL.
The connection between the device and the cloud server is established through an SDK or an API provided by a cloud service provider.
Step S63: uploading and storing data:
a mechanism for uploading data is designed, such as uploading data periodically or uploading data when the data changes. Data uploading requires consideration of security and integrity of the data, and may require encryption and integrity checking of the data.
At the cloud, a data storage scheme is designed, which can be a database service provided by a cloud service provider or a file storage service, and depends on your data characteristics and requirements.
Step S64: data analysis:
data analysis is performed using a data analysis tool provided by a Cloud service provider, such as Athena for AWS or BigQuery for Google Cloud. The cloud server can also be provided with own data analysis software, such as a pandas library of Python.
The results of the data analysis may be used to optimize the performance of the device, such as to optimize frequency and voltage regulation parameters, and may also be used for fault prediction and maintenance of the device.
Step S65: data presentation:
data presentation is performed using a Data visualization tool provided by a Cloud service, such as the QuickSight of AWS or the Data Studio of Google Cloud. So that the user can view the device status and data via the mobile device at any time and any place.
Further, the method also comprises AI optimization, specifically:
step S71: and (3) data collection: data relating to the performance of the device, such as voltage, current, frequency, etc., is collected using a data acquisition system on the device and related environmental factors, such as temperature, humidity, etc., are recorded. These data will be used to train the AI model.
Step S72: data cleaning and preprocessing: the collected data is cleaned and preprocessed, including abnormal values removal, missing values filling, and data normalization or normalization.
Step S73: model selection and training: an appropriate AI model, such as a decision tree, random forest, neural network, etc., is selected locally or in the cloud and the model is trained using the collected data.
Step S74: model test and optimization: the performance of the model is evaluated on a separate test dataset and the model is optimized according to the performance results, such as adjusting model parameters, or using a different model.
Step S75: model deployment: and deploying the trained model on the equipment. At this stage, the model will receive real-time data and output predictions to aid in frequency and voltage adjustments.
Step S76: model monitoring and updating: new data for the device is continuously collected and used periodically to update the model to ensure that the model is able to adapt to changes in the device and environment.
Further, the method also comprises the following steps of enhancing the equipment safety:
installing a firewall in the equipment and the network to ensure that all data transmission is encrypted and periodically performing network security assessment;
the data stored on the device is encrypted and the important data is backed up periodically. Meanwhile, the access right to the sensitive data is limited, and only authorized personnel can access the sensitive data;
protecting the physical location of the device includes installing a security camera, controlling physical access to the device using locks and keys, and setting an alarm system to detect and respond to security events.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention provides a method for realizing a coordination control device for a large-capacity energy storage power station, which is suitable for different CPU plug-ins aiming at the energy storage power stations with different capacities, can be compatible with a main CPU, wherein the main CPU is in three configuration modes of 1 slave CPU and 2 slave CPUs, ensures the flexibility of product configuration, and also improves the general applicability and economy of product configuration.
2. The invention provides a method for realizing a coordination control device for a large-capacity energy storage power station, which is characterized in that a main CPU does not need to receive and process large-flow GOOSE, but converts the large-flow GOOSE into low-flow internal synchronous frames through a slave board, so that the load of the main CPU is greatly reduced, the calculation resources are saved for the application calculation with more complicated energy storage coordination control, and the running stability of products is also ensured.
3. The invention provides a method for realizing a coordination control device for a high-capacity energy storage power station, which reduces the task load of the device by using a GOOSE processing deadline judging method, can realize limited GOOSE frame data processing according to the GOOSE processing deadline in a device timer task, avoids task overtime caused by infinitely processing the GOOSE frame, and avoids the running breakdown of a board card.
4. The invention provides a method for realizing a coordination control device for a large-capacity energy storage power station, which mainly completes the application algorithm and logic of data receiving and cooperative control of a slave board, and the master CPU immediately sends the data through the interrupted GOOSE task after the calculation is completed without sending the data through the slave board, so that no time delay exists from the instruction generation to the GOOSE program execution, and the scheme can be better suitable for the field requirement on low time delay of energy storage control.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will briefly explain the drawings needed in the embodiments or the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of the present invention
FIG. 2 is a schematic diagram of a distributed 3-block CPU design according to the present invention
FIG. 3 is a view showing the construction of a CPU1 board card according to the present invention;
FIG. 4 is a diagram of a CPU2/CPU3 board card of the present invention;
FIG. 5 is a schematic diagram of a GOOSE data exchange method from board to motherboard according to the present invention;
fig. 6 is a schematic diagram of a test environment of the coordination control device.
Detailed Description
The technical solution of the present invention will be more clearly and completely explained by the description of the preferred embodiments of the present invention with reference to the accompanying drawings.
As shown in fig. 1, the present invention specifically comprises:
step S1: the Zynq-series-based chip setting device consists of a main board and two slave boards, functions of CPU and DSP are divided and managed on the main board and the slave boards according to requirements, and the FPGA is used for realizing network port management, clock synchronization, sampling and GOOSE storm suppression;
step S2: the method comprises the steps that network ports are set on a main board and a slave board, wherein the main board is used for communication with EMS, primary frequency modulation, the slave board and PCS, and the slave board is mainly responsible for downloading programs and configuration files, communication with the main board and bidirectional communication with the PCS;
step S3: setting a main board to directly control 128 PCS devices at most, and receiving double-network data of 64 PCS devices from the main board; designing an internal data exchange mechanism of a hundred meganetwork port based on a back plate, and finishing data receiving and sending from the plate to the main plate;
step S4: setting a DSP part of the main board to execute frequency modulation and voltage regulation logic;
step S5: the management CPU section of the set board provides a device management function.
The step S2 specifically comprises the following steps:
step S21: setting a main board network interface, including the configuration of an EMS communication port, the configuration of a primary frequency modulation communication port, the configuration of a slave board communication port and the configuration of a PCS dual-network communication port;
step S22: setting slave board network interfaces, including configuration of program and configuration file downloading ports, configuration of main board communication ports and configuration of PCS dual-network communication ports;
step S23: and (5) verifying a network interface.
The step S3 specifically comprises the following steps:
step S31: setting a main board PCS control, including setting 128 PCS devices which can be associated and directly controlled in main board configuration; setting communication parameters of each PCS device in GOOSE protocol configuration of a main board;
step S32: setting slave board PCS data reception, including setting, in a slave board configuration, dual-network data capable of associating and receiving at most 64 PCS devices; setting and receiving data parameters of each PCS device in GOOSE protocol configuration of the slave board;
step S33: setting an internal data exchange mechanism, wherein the setting of the internal data exchange mechanism comprises setting hundred meganetwork ports in the back board configuration; designing and implementing an internal data exchange mechanism for receiving and transmitting data of the slave board;
step S34: and performing system communication test and data exchange test.
The step S4 specifically comprises the following steps:
step S41: in the DSP configuration of the main board, the main board is set as a main processor for executing frequency and voltage adjustment; loading a logic algorithm in the DSP;
step S42: setting frequency modulation and voltage regulation parameters;
step S43: setting input and output channels of frequency and voltage adjustment signals;
step S44: and performing functional tests of the frequency modulation and voltage regulation system to ensure that the system adjusts the frequency and the voltage according to expectations.
The step S5 specifically comprises the following steps:
step S51: on each board card, configuring an ARM core as a management CPU;
step S52: loading an operating system and device management software;
step S53: configuring parameters and interfaces of liquid crystal display in equipment management software;
step S54: configuring parameters and interfaces of waveform records in equipment management software;
step S55: configuring parameters and interfaces for setting value management in equipment management software;
step S56: configuring parameters and interfaces of the report in the device management software;
step S57: after the configuration and the setting are completed, the system test of the equipment management function is carried out.
The cloud management and data analysis system also comprises cloud management and data analysis, and specifically comprises the following steps:
step S61: cloud service selection and setting: a Cloud service provider is selected, such as AWS, azure, or Google Cloud. Considering that your design is based on the Linux operating system, these mainstream cloud service providers can meet the requirements;
a cloud server is created on the cloud service and necessary settings are made, including network settings, security settings, storage settings, etc.
Step S62: connection of equipment and cloud:
on the device, a connection to the cloud server is configured, typically via a secure network protocol such as SSL/TLS. This step requires some necessary software and libraries to be installed on the device, such as OpenSSL.
The connection between the device and the cloud server is established through an SDK or an API provided by a cloud service provider.
Step S63: uploading and storing data:
a mechanism for uploading data is designed, such as uploading data periodically or uploading data when the data changes. Data uploading requires consideration of security and integrity of the data, and may require encryption and integrity checking of the data.
At the cloud, a data storage scheme is designed, which can be a database service provided by a cloud service provider or a file storage service, and depends on your data characteristics and requirements.
Step S64: data analysis:
data analysis is performed using a data analysis tool provided by a Cloud service provider, such as Athena for AWS or BigQuery for Google Cloud. The cloud server can also be provided with own data analysis software, such as a pandas library of Python.
The results of the data analysis may be used to optimize the performance of the device, such as to optimize frequency and voltage regulation parameters, and may also be used for fault prediction and maintenance of the device.
Step S65: data presentation:
data presentation is performed using a Data visualization tool provided by a Cloud service, such as the QuickSight of AWS or the Data Studio of Google Cloud. So that the user can view the device status and data via the mobile device at any time and any place.
As a specific embodiment, AWS is selected as the cloud service provider and an EC2 instance is created as the server. The selected operating system is consistent with a hardware device, such as Linux;
an OpenSSL library is installed on the device and then an SSL connection is created with the AWS SDK (e.g., AWS SDK for Python (bot 3)) to the AWS EC2 instance.
The device collects data every 10 minutes and then uploads the data to the AWS over the SSL connection. The uploaded data is stored in the S3 service of the AWS, and the data is organized by date and time, such as "/year/monta/day/hour/minute/second".
Data analysis was performed using the Athena service of AWS. For example, an SQL query may be written to find the points in time where the frequency variation is greatest over the past hour.
A dashboard is created using the QuickSight service of the AWS, displaying the latest state of the device and the results of the data analysis. For example, a line graph is created showing the frequency change of the device over the last 24 hours.
As a specific embodiment, the method further comprises AI optimization, specifically:
step S71: and (3) data collection: data relating to the performance of the device, such as voltage, current, frequency, etc., is collected using a data acquisition system on the device and related environmental factors, such as temperature, humidity, etc., are recorded. These data will be used to train the AI model.
Step S72: data cleaning and preprocessing: the collected data is cleaned and preprocessed, including abnormal values removal, missing values filling, and data normalization or normalization.
Step S73: model selection and training: an appropriate AI model, such as a decision tree, random forest, neural network, etc., is selected locally or in the cloud and the model is trained using the collected data.
Step S74: model test and optimization: the performance of the model is evaluated on a separate test dataset and the model is optimized according to the performance results, such as adjusting model parameters, or using a different model.
Step S75: model deployment: and deploying the trained model on the equipment. At this stage, the model will receive real-time data and output predictions to aid in frequency and voltage adjustments.
Step S76: model monitoring and updating: new data for the device is continuously collected and used periodically to update the model to ensure that the model is able to adapt to changes in the device and environment.
As a specific embodiment, the method further comprises the step of enhancing the safety of the equipment specifically as follows:
installing a firewall in the equipment and the network to ensure that all data transmission is encrypted and periodically performing network security assessment;
the data stored on the device is encrypted and the important data is backed up periodically. Meanwhile, the access right to the sensitive data is limited, and only authorized personnel can access the sensitive data;
protecting the physical location of a device, including installing a security camera, controlling physical access to the device using locks and keys, and setting an alarm system to detect and respond to security events
As a specific implementation mode, the invention adopts a scheme of 2 slave boards to receive 128 double-network PCSs, each slave board is responsible for completing 64 double-network PCSs, and after data reception is completed, data transmission from the board to the main board is completed through internal data exchange.
The real-time performance of the PCS needs to be ensured in order to ensure the quick response adjustment of the PCS, and the delay from the preparation of data transmission to the end of transmission is as low as possible.
As a specific implementation mode, the cooperative control device adopts a standard 4U chassis design, wherein a CPU part adopts a distributed board card design of 3 back-inserted CPUs, the distributed board card comprises two board card types, a CPU1 is a main board card, and a CPU2 and a CPU3 are used as slave board cards and are of the same hardware. In the invention, CPU1 is 10 slots, CPU2 is 12 slots, and CPU3 is 14 slots, as shown in FIG. 2;
the function of each board card is as follows:
CPU1 is a main board card, zynq7020 is adopted as a main chip, the Zynq7020 chip comprises two ARM cores and an FPGA, the FPGA is connected with a PHY chip with 8 network ports, and as shown in FIG. 3, the following functional division is carried out on each part:
(1) An ARM core is used as a management CPU to configure a Linux operating system, realize device management functions and provide platform functions such as protocol, liquid crystal, wave recording, value setting, reporting and the like.
(2) The other ARM core is used as a DSP, is a bare core, and completes task execution through timer interrupt triggering.
The specific functions include:
A. the cooperative control application function module comprises, but is not limited to, a primary frequency modulation logic, a reactive voltage modulation logic and the like;
and the GOOSE communication function module directly sends out the control of the lower 128 PCSs from the board card, and does not send out the control of the PCSs from the boards CPU2 and CPU3, so that the design mode can effectively ensure the real-time performance of the control of the PCSs, if the control delay of the lower PCSs is increased through the forwarding of the CPU2 and the CPU3, the field requirement cannot be met, and the internal information transfer quantity of the CPU1, the CPU2 and the CPU3 in the device is also very huge, so that huge pressure and test are brought to the data processing of the board card.
C. The data exchange module of the master-slave board combines the application characteristics of cooperative control on site, namely the characteristics of slow receiving and fast transmitting, designs an internal exchange mechanism depending on hundred meganet ports of the back board, completes data receiving from the board to the main board, and the specific implementation details are explained in detail later.
(3) The FPGA mainly completes the functions of time synchronization, sampling, network port management, GOOSE storm suppression and the like. In the CPU1, the FPGA divides the network ports 1 and 2 into CPU control network ports, and divides the network ports 3,4,5,6,7 and 8 into DSP control network ports.
(4) The PHY of 8 network ports is connected with 8 RJ45 ports, specifically, the network ports 1 and 2 mainly complete upward EMS communication, the network ports 3 and 4 can complete the communication with primary frequency modulation in the energy storage power station, can receive an instruction of the primary frequency modulation device, can also transmit the stored information to the primary frequency modulation device in a summarized manner, the network port 5 is connected to the CPU3 through a backboard, the communication between the CPU1 and the CPU3 is completed, the network port 6 is connected to the CPU2 through the backboard, the communication between the CPU1 and the CPU2 is completed, the network ports 7 and 8 complete the double-network communication with 128 PCS, the issuing of the downward PCS instruction is mainly completed, and the uploading information of the PCS is not received.
CPU2, CPU3 are from the integrated circuit board, the framework is similar to CPU1, adopt Zynq7010 as the master chip, zynq7010 chip includes two ARM cores and FPGA, and the PHY chip of 8 net gapes is connected to the FPGA, as shown in FIG. 4, does the following functional division:
(1) An ARM core is used as a management CPU to configure a Linux operating system to realize a device management function, and mainly realizes the uploading and downloading functions of programs of a slave board CPU.
(2) The other ARM core is used as a DSP, is a bare core, and completes task execution through timer interrupt triggering.
The specific functions include:
and A, a GOOSE communication function module, wherein each board card completes double-network data receiving of the PCS of the lower 64 stations, and the two board cards can complete double-network data receiving of the PCS of at least 128 stations in total, and continuously refresh internal data after GOOSE analysis.
B. The data exchange module of the master-slave board combines the application characteristics of cooperative control on site, namely the characteristics of slow receiving and fast transmitting, designs an internal exchange mechanism depending on hundred meganet ports of the back board, completes data transmission from the board to the main board, and the specific implementation details are explained in detail later.
(3) The FPGA mainly completes the functions of network port management, GOOSE storm suppression and the like. In the CPU2 and the CPU3, the FPGA divides the network port 1 into CPU control network ports and divides the network ports 2,3,4,5 and 6 into DSP control network ports.
(4) The PHY of the 8 network ports is connected with the 6 RJ45 ports, specifically, the network port 1 mainly completes downloading of programs and configuration files, the network port 2 is connected to the CPU1 through the backboard to complete communication between the CPU1 and the slave boards, and the network ports 3,4,5 and 6 complete double-network communication with 64 PCS, mainly receive uploading information of the PCS and have the processing capacity of high-capacity GOOSE.
As a specific embodiment, in the engineering field, the slave board CPU board card needs to complete data processing in time to face the PCS high-frequency GOOSE of 64 dual networks.
In the worst case analysis, in a timer task (i.e. the interrupt task period of 833us adopted in the invention is in 833 us), 64 frames of GOOSE data frames sent by all PCS (i.e. 64 frames of GOOSE) can be received at maximum, if two networks arrive simultaneously, a single interrupt task needs to receive and process 128 frames of GOOSE data, if the interrupt cannot be processed, the interrupt task is overtime, and the stable operation of the device is affected. Because the GOOSE is a burst data frame mode, the data frame is sent quickly when the change occurs, and the heartbeat frame is maintained at ordinary times, therefore, the method can not interrupt each 833us continuously to receive 128 frames of messages with high probability, and according to the characteristic, a method for judging the processing deadline of the GOOSE is designed to reduce the task load of a device.
The GOOSE processing deadline judging method specifically comprises the following steps:
(1) Designing a buffer BUF of 1024 data frames for circularly storing GOOSE data frames, and writing PTR_WR into a pointer +1 after a new GOOSE frame comes in;
(2) After each interrupt comes in, starting to analyze from the last reading pointer, after GOOSE analyzes a frame, PTR_RD reads pointer +1, in the GOOSE analysis process, detecting the task execution time of the interrupt, and when the task execution time is greater than the GOOSE processing deadline fixed value (default 700 us), stopping analyzing the processed frame, and continuing to process the next interrupt of the unprocessed GOOSE frame;
(3) After the next interrupt comes in, processing continues by continuing to read the pointer from ptr_rd, continuing to execute as per (2).
As shown in fig. 5, when the energy storage co-control processes GOOSE, the slave board receives large-flow GOOSE data of PCS, and after processing via GOOSE analysis program with GOOSE deadline function, the large-flow GOOSE data is stored in the data area, and is continuously exchanged to the CPU of the master board via low-flow master-slave synchronous data frame.
According to the scheme, large-flow data are equally divided into two daughter boards, and the data are transferred to the main board at a low rate after GOOSE processing, so that the GOOSE processing pressure of the device is greatly relieved, and the stable operation of the device is improved.
The specific implementation steps are as follows:
(1) A GOOSE profile is defined, taking a certain PCS as an example, and text is simplified appropriately for ease of illustration.
[GOOSE Rx1]
Appid = 0100
FiberNo = 12-3,12-4
[ INPUT1] # PCS running State
Index = 3
Type = Long
Name = B01.RAPID_CTRL.gci1_run_status
INPUT2 # outputs total active power
Index = 4
Type = Float
Name = B01.RAPID_CTRL.gci1_p_value
...
The GOOSE profile content is explained as follows:
[ GOOSE Rx1] represents the 1 st GOOSE reception
Appid=0100, meaning Appid received by GOOSE for matching GOOSE
Fiberno=12-3, 12-4, meaning that reception from the 3 and 4 ports of the plate is through 12 slots
[ INPUT1] # PCS running State, representing the 1 st GOOSE connection under the current GOOSE control block
Index=3, indicating that the current link uses the 3 rd way of the GOOSE control block
Type=long, indicating that the data Type is Long
Name=b01. Rapid_ctrl. Gci1_run_status, representing the reception variable defined by the main CPU board
[ INPUT2] # PCS running State, representing the 2 nd GOOSE connection under the current GOOSE control block
Index=4, indicating that the current link uses the 4 th path of the GOOSE control block
Type=float, meaning that the data Type is floating point
Name=b01. Rapid_ctrl. Gci1_p_value, representing the reception variable defined by the main CPU board
In order to simplify engineering configuration, all CPUs share the same GOOSE configuration file, and flexible adjustment of GOOSE on each board card is completed by modifying fiber No of the configuration file. And downloading the configuration files to all CPU boards, judging whether the GOOSE is received through the board by the respective CPU boards through the fiber No, and if the CPU2 judges that the fiber No is 12-3, indicating that the GOOSE is received from the 3 ports of the board.
(2) Downloading the GOOSE configuration file to3 CPU boards, completing analysis of respective GOOSE receiving parts from the boards and sending the analyzed result to the data synchronization frame of the host at fixed time, wherein the cooperation control does not require higher real-time performance of the received data of the GOOSE, so that each board receives at most 64 PCS by adopting each 833us interrupt to exchange one GOOSE control block, and therefore, exchange of all data of the board can be completed through 833us by 64= 53.312ms at most. If the data exchange rate needs to be increased, only the GOOSE control block exchange number needs to be increased in each interrupt.
(3) Synchronizing data frames is similar to GOOSE communication and includes
MAC of interest, the invention employs 01-0C-CD-02-AA-AA
Source MAC, the invention adopts 01-0C-CD-02-BB
Frame type, the invention adopts 0 XCDD
Length, byte length of data frame
The number of control blocks is defaulted to 1, and can be automatically adjusted according to the switching frequency
APPID, GOOSE identification mark
The GOOSE required to transmit the data receives the data and the response quality, and the data and the response quality are sequentially arranged.
(4) After receiving the 2 synchronous data frames of the slave boards, the master board matches the received APPID with the content of the GOOSE configuration file, associates corresponding data with internal variables, and completes data updating.
Configuration method of distributed cooperative control application scene
Although the scheme mainly solves the access problem of 128 PCS data at maximum, the scheme has higher flexible adaptability to the small-capacity energy storage power station, and improves the general applicability and economy of the product.
(1) When the number of PCS is less than or equal to 32, the single main CPU can be adopted to complete the process, the optical port of the main CPU can be directly used for receiving GOOSE, the economic cost is lowest, and the processing capacity is minimum;
(2) When the number of PCS is less than or equal to 64, a CPU and a slave CPU can be adopted to complete, GOOSE can be directly received from an optical port of the slave CPU, the economic cost is moderate, and the processing capacity is moderate;
(3) When the number of PCS is less than or equal to 128, one CPU and two slave CPUs can be adopted to finish, and half of GOOSE is received for the optical ports of the two slave CPUs respectively, so that the economic cost is maximum and the processing capacity is maximum;
CPU task time-consuming test
The test environment is deployed through a UDMview tool, GOOSE pressure test is conducted on the cooperative control, and the pressure test comprises two parts:
the high-capacity data of GOOSE receives the external pressure generated by the device;
action logic in the device continuously triggers the generation of the record wave, and reports the internal pressure of the recorded platform;
the specific test environment is shown in fig. 6;
(1) CPU2 needs to connect network port 3,4 to GOOSE A and GOOSE B network of exchanger, two PC machines are installed with UDMview and also connected to GOOSE A and GOOSE B network, and simulate 64 PCS, the sending frequency can be adjusted to 4ms, at this time CPU2 receives the double network data of 64 PCS;
(2) The CPU3 is the same as the CPU2 and needs to be connected with another 64 PCS double-network data;
(3) The relay protection test simulates periodic primary frequency modulation action, and the invention adopts the mode of once action every 5s and 10s action every time to carry out repeated test.
(4) The above environment was copied for 24 hours, and the maximum task loads of the CPU1, the CPU2, and the CPU3 were observed.
Analysis of results:
the task interrupt periods of the 3 CPUs are 833us, the maximum task loads of 24 hours are observed to be namely that CPU1 is 454us, CPU2 is 323us, CPU3 is 367us, and 3 are smaller than 833us.
The CPU1 can not generate larger load rise due to the external GOOSE flow in the actual field, so that the field application requirement can be met;
the CPU2 and the CPU3 can possibly face larger GOOSE flow pressure in the actual field, and the current task consumes relatively less time, and even if the current task faces larger flow, the current task has a processing margin of more than 400 us, so that the field application requirement can be met;
in a word, the overall performance design can meet the double-network processing requirement of 128 PCS of the high-capacity energy storage power station.
The above detailed description is merely illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Various modifications, substitutions and improvements of the technical scheme of the present invention will be apparent to those skilled in the art from the description and drawings provided herein without departing from the spirit and scope of the invention. The scope of the invention is defined by the claims.
Claims (8)
1. The implementation method of the coordination control device for the high-capacity energy storage power station is characterized by comprising the following steps of:
step S1: the setting equipment consists of a main board and two slave boards, functions of a CPU and a DSP are divided and managed on the main board and the slave boards, and the FPGA is used for realizing network port management, clock synchronization, sampling and GOOSE storm suppression;
step S2: setting network ports on a main board and a slave board, wherein the main board is used for communication with EMS, primary frequency modulation, the slave board and PCS, and the slave board is responsible for downloading programs and configuration files, communication with the main board and bidirectional communication with the PCS;
step S3: setting a main board to directly control 128 PCS devices, and receiving double-network data of 64 PCS devices from the main board; designing an internal data exchange mechanism of a hundred meganetwork port based on a back plate, and finishing data receiving and sending from the plate to the main plate;
step S4: setting a DSP part of the main board to execute frequency modulation and voltage regulation logic;
step S5: the management CPU section of the set board provides a device management function.
2. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, wherein the step S2 is specifically:
step S21: setting a main board network interface, including the configuration of an EMS communication port, the configuration of a primary frequency modulation communication port, the configuration of a slave board communication port and the configuration of a PCS dual-network communication port;
step S22: setting slave board network interfaces, including configuration of program and configuration file downloading ports, configuration of main board communication ports and configuration of PCS dual-network communication ports;
step S23: and performing network interface verification.
3. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, wherein the step S3 is specifically:
step S31: setting a main board PCS control, wherein the main board PCS control comprises setting 128 PCS devices which can be associated and directly controlled in the main board configuration; setting communication parameters of each PCS device in GOOSE protocol configuration of a main board;
step S32: setting slave board PCS data receiving, including setting double-network data capable of associating and receiving 64 PCS devices in a slave board configuration; setting and receiving data parameters of each PCS device in GOOSE protocol configuration of the slave board;
step S33: setting an internal data exchange mechanism, wherein the setting of the internal data exchange mechanism comprises setting hundred meganetwork ports in the back board configuration; designing and implementing an internal data exchange mechanism for receiving and transmitting data of the slave board;
step S34: and performing system communication test and data exchange test.
4. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, wherein the step S4 is specifically:
step S41: in the DSP configuration of the main board, the main board is set as a main processor for executing frequency and voltage adjustment; loading a logic algorithm in the DSP;
step S42: setting frequency modulation and voltage regulation parameters;
step S43: setting input and output channels of frequency and voltage adjustment signals;
step S44: and performing functional tests of the frequency modulation and voltage regulation system to ensure that the system adjusts the frequency and the voltage according to expectations.
5. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 3, wherein the step S5 is specifically:
step S51: on the board card, configuring an ARM core into a management CPU;
step S52: loading an operating system and device management software;
step S53: configuring parameters and interfaces of liquid crystal display in equipment management software;
step S54: configuring parameters and interfaces of waveform records in equipment management software;
step S55: configuring parameters and interfaces for setting value management in equipment management software;
step S56: configuring parameters and interfaces of the report in the device management software;
step S57: after the configuration and the setting are completed, the system test of the equipment management function is carried out.
6. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, further comprising cloud management and data analysis, specifically comprising the following steps:
step S61: cloud service selection and setting;
step S62: the equipment is connected with the cloud;
step S63: uploading and storing data;
step S64: performing data analysis;
step S65: and displaying the data by utilizing a data visualization tool.
7. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, further comprising AI optimization, specifically:
step S71: collecting data related to performance of the device using a data acquisition system on the device;
step S72: cleaning and preprocessing the collected data;
step S73: selecting an AI model and training the model using the collected data;
step S74: evaluating the performance of the model on an independent test data set and optimizing the model according to the performance result;
step S75: deploying the trained model on equipment, wherein the model receives real-time data and outputs a prediction result to help frequency adjustment and voltage adjustment;
step S76: new data for the device is continuously collected and used periodically to update the model to ensure that the model is able to adapt to changes in the device and environment.
8. The implementation method of the coordination control device for the high-capacity energy storage power station according to claim 1, further comprising the step of enhancing equipment safety specifically:
installing a firewall in the equipment and the network to ensure that all data transmission is encrypted and periodically performing network security assessment;
the data stored on the device is encrypted and the important data is backed up periodically, and at the same time, the access rights to the sensitive data are limited and only authorized personnel can access the data.
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