CN117040254A - Secondary ripple current suppression method based on virtual fractional order inductance - Google Patents

Secondary ripple current suppression method based on virtual fractional order inductance Download PDF

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Publication number
CN117040254A
CN117040254A CN202310986720.9A CN202310986720A CN117040254A CN 117040254 A CN117040254 A CN 117040254A CN 202310986720 A CN202310986720 A CN 202310986720A CN 117040254 A CN117040254 A CN 117040254A
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converter
voltage
current
reference voltage
foi
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何良宗
杨泽龙
周鸿彦
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Xiamen University
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Xiamen University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The application discloses a secondary ripple current suppression method based on virtual fractional order inductance, which is applied to a two-stage single-phase inverter formed by a front-end DC/DC converter and a rear-end DC/AC converter. The traditional method suppresses the secondary current ripple by adding a large virtual resistor in the DC/DC converter, but the large virtual resistor can cause the reduction of the dynamic performance of the system during the load jump, and the small virtual resistor cannot effectively suppress the secondary current ripple, namely, the improvement of the dynamic performance and the reduction of the secondary ripple current are mutually contradictory. The application provides a secondary ripple current suppression method, which is characterized in that a virtual negative-order inductor is constructed in an output impedance loop of a DC/DC converter, so that secondary current ripple can be effectively reduced, and the dynamic performance of a system can be improved; in addition, the control method based on the virtual fractional order inductance can improve the stability of the two-stage single-phase inverter system, and the secondary ripple suppression performance and the dynamic performance are superior to those of the traditional ripple suppression method.

Description

Secondary ripple current suppression method based on virtual fractional order inductance
Technical Field
The application relates to the field of power supply ripple suppression, in particular to a method for realizing secondary ripple current suppression in a two-stage single-phase inverter by constructing a virtual fractional order inductor.
Background
The two-stage single-phase inverter is a cascade system consisting of a front-end DC/DC converter and a rear-end DC/AC converter, and can convert the bus DC voltage into the required DC voltage and then invert the DC voltage into an AC voltage to be output. Due to rapid development of power electronics technology, two-stage single-phase inverters are increasingly being widely used in power electronics systems such as uninterruptible power supplies, distributed energy sources, electric vehicles, and the like.
When the two-stage single-phase inverter works normally, an alternating voltage and an alternating current are output, and a phase difference exists between the two voltages, so that the output power can pulsate at a secondary frequency. Meanwhile, as the input is direct-current voltage, the power loss is ignored, the input power and the output power are equal, and a secondary ripple current is generated at the input power supply. The secondary current ripple has great harm to the power supply, can reduce the efficiency of the power supply, reduce the service life of the power supply, and the like. Therefore, it is necessary to suppress the secondary ripple current generated, and reduce the damage caused by the secondary ripple current.
Current secondary current ripple suppression methods can be divided into two categories. The first is to suppress the secondary ripple current by adding a secondary ripple suppression circuit rather than adding a large electrolytic capacitor or LC resonant circuit. The method has poor inhibition effect, increases the volume of a circuit, and can cause extra device loss due to the addition of extra power electronic devices, thereby reducing the efficiency and the power density of the system. The second type is to control the front-end DC/DC to inhibit the secondary current ripple, and the method does not need to add extra electrical elements, has a good effect of inhibiting the secondary ripple current, and does not influence the efficiency and the power density of the system.
Disclosure of Invention
In view of the above problems, the application provides a secondary ripple current suppression method based on virtual fractional order inductance, which does not need additional circuit devices, can suppress the secondary ripple current to be less than 1%, solves the problems of efficiency reduction, volume increase, cost increase, power density reduction and the like caused by adding additional devices in the traditional scheme, and has faster dynamic response speed and stability.
The technical scheme adopted by the application for solving the technical problems is as follows:
baseThe secondary ripple current suppression method of the virtual fractional order inductor is applied to a two-stage single-phase inverter formed by a front-end DC/DC converter and a rear-end DC/AC converter; the front-end DC/DC converter is used as an interface between the input direct-current power supply and the back-end DC/AC converter; the output impedance of the DC/DC converter is reconfigurable by the equivalent real inductance L e Is the current i of (2) FOI And capacitor C b Voltage v of (2) b Based on the frequency selection characteristic of the band-pass filter to specific harmonic waves, the output impedance of the DC/DC converter at the secondary fundamental wave frequency is equivalent to a negative-order inductance;
the inhibition method specifically comprises the following steps:
1) The real inductance L is equivalent to that of the DC/DC converter in each sampling period e Is the current i of (2) FOI And capacitor C b Voltage v of (2) b Sampling, and returning a sampling result to the controller;
2) Reference voltage v of DC/DC converter r Subtracting the capacitance C b Voltage v of (2) b Multiplying the transfer function B of the band-pass filter R The transfer function of the bandpass filter is expressed as:
wherein K is G Is a proportionality coefficient, f b Is the bandwidth of the band-pass filter, f o Is the center frequency of the band-pass filter;
the transfer function H of the loop 1 (s) is expressed as:
H 1 (s)=(v r -v b )×B R
3) Reference voltage v of DC/DC converter r Subtracting H 1 V, i.e r -H 1 Obtaining a first reference voltage v r1
4) Let the first reference voltage v r1 Subtracting v b V, i.e r1 -v b Obtaining an error; transfer function G of error and voltage controller v (s) multiplying, the transfer function of the voltage controller is:
wherein K is p Is the proportionality coefficient of the voltage controller, K i Is the integral coefficient of voltage control;
5) By inductive current i L Multiplying by virtual impedance r FOI Through bandpass filter G BPF After that, the feedback node is moved forward to K PWM Previously, a second reference voltage v is obtained r2 I.e. i L ×r FOI ×G BPF /(K PWM Xe(s). Times.M (D)); voltage v of capacitor b Through bandpass filter B R After that, the feedback node is moved forward to K PWM Previously, a third reference voltage v is obtained r3 V, i.e b ×B R /(K PWM Xe(s). Times.M (D)); finally, using the transfer function G of error and voltage controller v Subtracting the second reference voltage from the product of(s) and adding the third reference voltage to obtain a fourth reference voltage v r4 The following are provided:
wherein K is PWM E(s) is the coefficient of the controlled voltage source, M (D) is the equivalent turn ratio of the ideal transformer, G BPF Is a transfer function of a band-pass filter, and has the expression:
6) Will be fourth reference voltage v r4 Multiplying the gain K of a pulse width modulator PWM The duty ratio d is obtained, and then the duty ratio d is transmitted to a switching tube of the DC/DC converter after passing through a driving circuit, so that the output voltage of the DC/DC converter is controlled, and the secondary ripple current is restrained.
Preferably, K G The value of (2).
Preferably, the virtual fractional order inductance Z bus-FOI The expression is:
Z bus-FOI =-(sL e +r FOI G BFP (jw o ))
wherein w is o Is 2 times fundamental angular frequency.
Preferably, the center frequency of each band pass filter is the frequency of the second current harmonic.
The beneficial effects of the application are as follows:
(1) The virtual fractional order inductor is constructed by the control method, so that the secondary ripple current of the direct-current side power supply is restrained, no additional electric element is needed, the stability and efficiency of the system are improved, the power density of the system is increased, the cost is reduced, and the system has a better ripple restraining effect;
(2) The method can ensure that the voltage of the secondary fundamental wave frequency passes through and the voltages of other frequencies are suppressed compared with the existing method;
(3) According to the application, after the inductance current is collected, the inductance current is fed back to the reference voltage through the band-pass filter, and compared with the existing method, the method can eliminate voltage errors caused by current feedback.
Drawings
FIG. 1 is a schematic diagram of an exemplary circuit topology for supplying an AC load, comprising a DC power source, a DC/DC converter, and a DC/AC converter, in accordance with an embodiment of the present application;
FIG. 2 is an equivalent schematic diagram of the circuit structure of FIG. 1 according to an embodiment of the present application;
FIG. 3 is a small signal model of the circuit structure of FIG. 2 according to an embodiment of the present application;
FIG. 4 is a block diagram of a control system for secondary current ripple suppression according to an embodiment of the present application;
FIG. 5 shows a voltage band pass filter B according to an embodiment of the application R Is a Bode diagram of (B);
FIG. 6 shows a current loop bandpass filter G according to an embodiment of the application BPF Is a Bode diagram of (B);
FIG. 7 is a block diagram of the output impedance of the Buck circuit according to the embodiment of the present application;
FIG. 8 is a diagram of a physical equivalent circuit at a double fundamental frequency in an embodiment of the application;
FIG. 9 is a diagram of the impedance phase of a virtual fractional order inductor constructed in accordance with an embodiment of the present application;
fig. 10 is a diagram illustrating an actual current ripple suppression test according to an embodiment of the present application.
Detailed Description
The present application is further illustrated in the following drawings and detailed description, which are to be understood as being merely illustrative of the application and not limiting of its scope, since various equivalent modifications to the application will fall within the scope of the application as defined in the appended claims after reading the application.
The secondary ripple current suppression method based on the virtual fractional order inductance is applied to a two-stage single-phase inverter, wherein the two-stage single-phase inverter comprises a front-end DC/DC converter and a rear-end DC/DC converter; the front-end DC/DC converter serves as an interface between the input DC power source and the back-end DC/AC converter. The DC/DC converter is a DC-DC converter with an LC circuit or similar LC circuit, including but not limited to buck, boost, buck-boost and derivative topologies thereof.
Fig. 1 shows a typical circuit topology for supplying an ac load, which is composed of a DC power supply, a DC/DC converter, and a DC/DC converter. DC power supply V in The method comprises the steps of providing electric energy, reducing the voltage by a DC/DC converter (Buck circuit), and forming 50Hz sine alternating current by an inverter circuit to supply power to an alternating current load.
Fig. 2 shows an equivalent circuit of the exemplary circuit topology shown in fig. 1, where a DC/DC converter (inverter circuit) is equivalent to a DC source connected in parallel with an ac source having a frequency twice the fundamental frequency. The secondary ripple current generated by the alternating current source is fed back to the direct current source through the Buck circuit, so that a secondary ripple current is generated on the direct current voltage source side.
FIG. 3 shows a small signal model of a DC/DC converter if the output of the Buck circuit is constructed by controlThe impedance becomes fractional order inductance at the double fundamental frequency, and the secondary ripple current flows into the capacitor C b Therefore, the output current i of the DC power supply in Will not contain secondary ripple current.
Fig. 4 is a block diagram of a control method for implementing secondary current ripple suppression according to the present application, where the method is implemented by:
1) The real inductance L is equivalent to that of the DC/DC converter in each sampling period e Is the current i of (2) FOI And capacitor C b Voltage v of (2) b Sampling is carried out, and a sampling result is returned to the controller.
2) Reference voltage v of DC/DC converter r Subtracting the capacitance C b Voltage v of (2) b Multiplying the transfer function B of the band-pass filter R . The transfer function of the band pass filter is expressed as:
wherein K is G Is a proportionality coefficient, the value is taken as 2, f b Is the bandwidth of the band-pass filter, and has the value of 10HZ, f o The center frequency of the band-pass filter is 100Hz. Voltage ring band-pass filter B R The bird's nest is shown in fig. 5. It can be seen that only the voltage component at 100Hz can pass the band pass filter.
Transfer function of the loop is H 1 (s) represents the expression:
H 1 (s)=(v r -v b )×B R
3) Reference voltage v of DC/DC converter r Subtracting H 1 V, i.e r -H 1 Obtain a first new reference voltage v r1 . Let the first reference voltage v r1 Subtracting v b V, i.e r1 -v b Obtaining error, and then transferring the error to a transfer function G of a voltage controller v (s) multiplying. The transfer function of the voltage controller is:
wherein K is p Is the proportionality coefficient of the voltage controller, and the value range is 0.1<K p <10;K i Is the integral coefficient of voltage control, and the value range is 0.1<K i <1。
4) Will induce a current i L Multiplying by virtual impedance r FOI Through bandpass filter G BPF After that, the feedback node is moved forward to K PWM Previously, a second reference voltage v is obtained r2 I.e. i L ×r FOI ×G BPF /(K PWM Xe(s). Times.M (D)); voltage v of capacitor b Through bandpass filter B R After that, the feedback node is moved forward to K PWM Previously, a third reference voltage v is obtained r3 V, i.e b ×B R /(K PWM Xe(s). Times.M (D)). Finally, using the transfer function G of error and voltage controller v Subtracting the second reference voltage from the product of(s) and adding the third reference voltage to obtain a fourth reference voltage v r4
Wherein K is PWM For the gain of the pulse width modulator, e(s) is the coefficient of the controlled voltage source, M (D) is the equivalent turn ratio of the ideal transformer, e(s) and M (D) are related to the topological structure, and the virtual impedance r FOI Has a value of 20Ω, G BPF Is a transfer function of a band-pass filter, and has the expression:
wherein f b Is the bandwidth of the band-pass filter, and has the value of 10HZ, f o The center frequency of the band-pass filter is 100Hz. The band-pass filter is designed with consideration to the bandwidth and center frequency, while ensuring that the current portion with a frequency of 100Hz can pass through the filter,while filtering out all other frequency components of the current. Current loop bandpass filter G BPF As shown in FIG. 6, only the 100Hz current component can pass, the rest is filtered out, thus the current i is filtered out L When the reference voltage is fed back to the reference voltage end, the reference voltage only adds the double frequency alternating current component, and the rest frequency parts are not affected, so that the voltage error of the output port is reduced.
6) Will be fourth reference voltage v r4 Multiplying the gain K of a pulse width modulator PWM The duty ratio d is obtained, and the duty ratio d is transmitted to a switching tube (MOSFET, IGBT) of the DC/DC converter after passing through a driving circuit, so that the output voltage of the DC/DC converter is controlled, and the secondary ripple current is restrained.
Fig. 7 is a bode diagram showing the output impedance of the DC/DC converter in the suppression method of the present application. As can be seen from the figure, the output impedance Z of the DC/DC converter O Peak at twice the fundamental frequency (100 Hz) is high impedance to the secondary current ripple, so the secondary ripple current is suppressed.
The control system block diagram according to fig. 4 can be obtained:
due to K G The value of (2) is therefore:
thus generating a negative inductor current-i FOI The current contains only components of the secondary frequency. The equivalent input impedance of the port is the fractional order inductance, and the expression is:
Z bus-FOI =-(sL e +r FOI G BFP (jw o ))
fig. 8 is a diagram of a physical equivalent circuit at twice the frequency under the control method described herein by constructing a virtual fractional order inductance. From the figure, it can be seen that the virtual fractional orderThe inductance is formed by a negative inductance-L e And a negative group-r FOI Composition is prepared.
As shown in fig. 9, which is an impedance phase diagram of the constructed virtual fractional order inductor, it can be seen that the order of the constructed fractional order inductor is greater than-2 and less than-1.
As shown in fig. 10 (a), the dc side power supply current i of the Buck circuit is only under the voltage feedback closed loop control in Capacitor voltage v b And the waveform of the inverter output voltage, the current i can be seen in Contains larger secondary ripple current pulsation.
As shown in fig. 10 (b), the dc side power supply current i of the Buck circuit under the proposed suppression method in Capacitor voltage v b And the waveform of the inverter output voltage, the current i can be seen in The secondary ripple current is inhibited, and the Fourier analysis result shows that the secondary ripple content is less than 1%, so that the control method provided by the application has an excellent inhibiting effect on the secondary ripple current.
The foregoing is merely one specific embodiment of the present application, but the design concept of the present application is not limited thereto, and any insubstantial modification of the present application by using the concept shall belong to the behavior of infringement of the protection scope of the present application.

Claims (4)

1. A secondary ripple current suppression method based on virtual fractional order inductance is applied to a two-stage single-phase inverter formed by a front-end DC/DC converter and a rear-end DC/AC converter; the front-end DC/DC converter is used as an interface between the input direct-current power supply and the back-end DC/AC converter; the method is characterized in that: the output impedance of the DC/DC converter is reconfigurable by the equivalent real inductance L e Is the current i of (2) FOI And capacitor C b Voltage v of (2) b Based on the frequency selection characteristic of the band-pass filter to specific harmonic waves, the output impedance of the DC/DC converter at the secondary fundamental wave frequency is equivalent to a negative-order inductance;
the inhibition method specifically comprises the following steps:
1) The real inductance L is equivalent to that of the DC/DC converter in each sampling period e Is the current i of (2) FOI And capacitor C b Voltage v of (2) b Sampling, and returning a sampling result to the controller;
2) Reference voltage v of DC/DC converter r Subtracting the capacitance C b Voltage v of (2) b Multiplying the transfer function B of the band-pass filter R The transfer function of the bandpass filter is expressed as:
wherein K is G Is a proportionality coefficient, f b Is the bandwidth of the band-pass filter, f o Is the center frequency of the band-pass filter;
the transfer function H of the loop 1 (s) is expressed as:
H 1 (s)=(v r -v b )×B R
3) Reference voltage v of DC/DC converter r Subtracting H 1 V, i.e r -H 1 Obtaining a first reference voltage v r1
4) Let the first reference voltage v r1 Subtracting v b V, i.e r1 -v b Obtaining an error; transfer function G of error and voltage controller v (s) multiplying, the transfer function of the voltage controller is:
wherein K is p Is the proportionality coefficient of the voltage controller, K i Is the integral coefficient of voltage control;
5) By inductive current i L Multiplying by virtual impedance r FOI Through bandpass filter G BPF After that, the feedback node is moved forward to K PWM Previously, a second reference voltage v is obtained r2 I.e. i L ×r FOI ×G BPF /(K PWM Xe(s). Times.M (D)); voltage v of capacitor b Through bandpass filter B R After that, againAdvancing the feedback node to K PWM Previously, a third reference voltage v is obtained r3 V, i.e b ×B R /(K PWM Xe(s). Times.M (D)); finally, using the transfer function G of error and voltage controller v Subtracting the second reference voltage from the product of(s) and adding the third reference voltage to obtain a fourth reference voltage v r4 The following are provided:
wherein K is PWM E(s) is the coefficient of the controlled voltage source, M (D) is the equivalent turn ratio of the ideal transformer, G BPF Is a transfer function of a band-pass filter, and has the expression:
6) Will be fourth reference voltage v r4 Multiplying the gain K of a pulse width modulator PWM The duty ratio d is obtained, and then the duty ratio d is transmitted to a switching tube of the DC/DC converter after passing through a driving circuit, so that the output voltage of the DC/DC converter is controlled, and the secondary ripple current is restrained.
2. The method for suppressing a secondary ripple current based on a virtual fractional order inductance according to claim 1, wherein K is G The value of (2).
3. The method for suppressing a secondary ripple current based on a virtual fractional order inductor according to claim 2, wherein the virtual fractional order inductor Z bus-FOI The expression is:
Z bus-FOI =-(sL e +r FOI G BFP (jw o ))
wherein w is o Is 2 times fundamental angular frequency.
4. The method of claim 1, wherein the center frequency of each band-pass filter is the frequency of the second current harmonic.
CN202310986720.9A 2023-08-08 2023-08-08 Secondary ripple current suppression method based on virtual fractional order inductance Pending CN117040254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310986720.9A CN117040254A (en) 2023-08-08 2023-08-08 Secondary ripple current suppression method based on virtual fractional order inductance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310986720.9A CN117040254A (en) 2023-08-08 2023-08-08 Secondary ripple current suppression method based on virtual fractional order inductance

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