CN117039808A - Battery protection chip and battery protection circuit - Google Patents

Battery protection chip and battery protection circuit Download PDF

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Publication number
CN117039808A
CN117039808A CN202310644794.4A CN202310644794A CN117039808A CN 117039808 A CN117039808 A CN 117039808A CN 202310644794 A CN202310644794 A CN 202310644794A CN 117039808 A CN117039808 A CN 117039808A
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CN
China
Prior art keywords
battery protection
circuit
battery
protection chip
logic
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310644794.4A
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Chinese (zh)
Inventor
李�杰
杨小华
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Shenzhen Chuangxin Microelectronics Co ltd
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Shenzhen Chuangxin Microelectronics Co ltd
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Application filed by Shenzhen Chuangxin Microelectronics Co ltd filed Critical Shenzhen Chuangxin Microelectronics Co ltd
Priority to CN202310644794.4A priority Critical patent/CN117039808A/en
Publication of CN117039808A publication Critical patent/CN117039808A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/18—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for batteries; for accumulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00—Details of emergency protective circuit arrangements
    • H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/00306—Overdischarge protection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0042—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction
    • H02J7/0045—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction concerning the insertion or the connection of the batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The application discloses a battery protection chip, which comprises an over-discharge comparator, a logic processing module and a logic change sub-circuit, wherein the logic change sub-circuit is connected with a power input port of the battery protection chip, an output end of the over-discharge comparator, the logic processing module and the ground; the logic change sub-circuit is used for enabling the over-discharge protection state of the battery protection chip to be effective in a delayed mode and releasing the over-discharge protection state. The application changes the setting of the subcircuit through logic, so that the over-discharge protection state is delayed to take effect, and the phenomenon that the battery protection chip immediately blocks the normal operation of the battery and cannot recover by itself due to the fact that the voltage of the detection port is the same as the voltage of the power input port when the power is firstly electrified is avoided.

Description

Battery protection chip and battery protection circuit
Technical Field
The present application relates to the field of consumer electronics, and more particularly, to a battery protection chip and a battery protection circuit.
Background
If the battery protection chip with the dormancy function triggers over-discharge protection during the primary power-on, the discharge MOS tube controlled by the discharge control port DO can be immediately turned off, the voltage of the detection port VM can be pulled up to the same degree as the voltage of the power input port VDD, but due to the dormancy function, the voltage of the detection port VM can be locked, so that the protection chip cannot automatically recover to a working state, the voltage of the detection port VM can be reduced only by an external charger, the working state of the protection chip is recovered, and the working efficiency of the battery protection chip is reduced.
Disclosure of Invention
The application provides a battery protection chip and a battery protection circuit, which are used for solving the problems in the background technology.
The battery protection chip comprises an over-discharge comparator, a logic processing module and a logic change sub-circuit, wherein the logic change sub-circuit is connected with a power input port of the battery protection chip, an output end of the over-discharge comparator, the logic processing module and the ground; the logic change sub-circuit is used for enabling the over-discharge protection state of the battery protection chip to be effective in a delayed mode and releasing the over-discharge protection state.
Therefore, the application changes the setting of the subcircuit through logic, so that the over-discharge protection state is delayed to be effective, and the phenomenon that the battery protection chip immediately blocks the normal operation of the battery and cannot recover by itself because the voltage of the detection port is the same as the voltage of the power input port when the power is firstly electrified is avoided.
In some embodiments, the logic change sub-circuit includes a logic switch, where the logic switch is connected to an output end of the over-amplification comparator, and is configured to control on-off of the logic change sub-circuit according to an output result of the over-amplification comparator.
Thus, the application provides the connection relation and the operation mode of the logic switch in the logic change sub-circuit.
In some embodiments, the logic altering sub-circuit further comprises a current source connected to the power input port of the battery protection chip and the logic switch, and a capacitor connected to the logic switch and ground, wherein the current source is configured to charge the capacitor.
Thus, the application provides the connection relation and the function of the current source and the capacitor in the logic change sub-circuit.
In some embodiments, the connection point of the logic processing module and the logic change subcircuit is located at the anode of the capacitor.
Thus, the application provides a connection mode of the logic change sub-circuit and the logic processing module.
The application also provides a battery protection circuit, which comprises the battery protection chip and a protected battery.
As such, the present application provides a specific application of the battery protection chip provided in the foregoing embodiment.
In some embodiments, the battery protection circuit further comprises a filter circuit, the filter circuit comprises a filter resistor and a filter capacitor, the filter resistor is connected with the positive electrode of the battery and the power input port of the battery protection chip, the filter capacitor is connected with the power input port of the battery protection chip and the ground, and the negative electrode of the battery is grounded.
Thus, the application provides a connection mode of the battery and the battery protection chip.
In some embodiments, the circuit further comprises a discharge control circuit connected with the discharge control port of the battery protection chip and the negative electrode of the battery, and a charge control circuit connected with the charge control port of the battery protection chip and the negative electrode of the battery.
Thus, the present application provides a method of connecting sub-circuits related to charge and discharge control in a battery protection circuit.
In some embodiments, the circuit further comprises a discharge control circuit connected with the discharge control port of the battery protection chip and the positive electrode of the battery, and a charge control circuit connected with the charge control port of the battery protection chip and the positive electrode of the battery.
Thus, the present application provides a method of connecting sub-circuits related to charge and discharge control in a battery protection circuit.
In some embodiments, the circuit further comprises a load charge detection circuit connected to the detection port of the battery protection chip and the charge control circuit or the discharge control circuit.
In this way, the present application provides a connection method of the load charge detection circuit on the basis of the above embodiment.
In some embodiments, the circuit further includes a built-in control MOS transistor connected to the power input port and the detection port of the battery protection chip via two poles other than the gate, or connected to the common ground port and the detection port of the battery protection chip.
Thus, the application provides a connection mode for protecting the MOS tube arranged in the chip.
Additional aspects and advantages of embodiments of the application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of embodiments of the application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a schematic diagram of an internal module of a battery protection chip according to the related art;
FIG. 2 is a simplified schematic diagram of a related art over-discharge control logic link within a battery protection chip;
FIG. 3 is a simplified schematic diagram of the circuit connections of the logic change subcircuit in the battery protection chip provided by the present application;
FIG. 4 is a schematic diagram of the circuit connection of the battery protection circuit provided by the present application;
FIG. 5 is a schematic diagram of the circuit connection of the battery protection circuit provided by the present application;
FIG. 6 is a schematic diagram of the circuit connection of the battery protection circuit provided by the present application;
FIG. 7 is a schematic diagram of the circuit connection of the battery protection circuit provided by the present application;
FIG. 8 is a schematic diagram of voltage variation of the battery protection chip according to the present application;
FIG. 9 is a schematic diagram of voltage variation of the battery protection chip according to the present application;
wherein: 1. a battery protection chip; 10. a logic change sub-circuit; 2. a filter circuit; 3. a discharge control circuit; 4. a charge control circuit; 5. a load charge detection circuit; VDD, power input port; VSS, common ground port; a CO, charge control port; DO and discharge control ports; VM, detection port; CS; a current source; LS, logic switch; C. a capacitor; r1, a filter resistor; c1, a filter capacitor; r2, detecting resistance; CMOS, built-in control MOS tube; p+, load/charge positive; p-, load/negative charge terminal; BAT, protected battery.
Detailed Description
Embodiments of the technical scheme of the present application will be described in detail below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present application, and thus are merely examples, and are not intended to limit the scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description of the application and the claims and the description of the drawings above are intended to cover a non-exclusive inclusion.
In the description of embodiments of the present application, the technical terms "first," "second," and the like are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the description of the embodiments of the present application, the term "and/or" is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
In the description of the embodiments of the present application, the term "plurality" means two or more (including two), and similarly, "plural sets" means two or more (including two), and "plural sheets" means two or more (including two).
In the description of the embodiments of the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured" and the like should be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; or may be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to specific circumstances.
As shown in fig. 1 and 3, the present application provides a battery protection chip 1, which includes an over-discharge comparator, a logic processing module, and a logic change sub-circuit 10, wherein the logic change sub-circuit 10 is connected with a power input port VDD of the battery protection chip, an output end of the over-discharge comparator, the logic processing module, and ground.
Specifically, fig. 1 shows a module inside a battery protection chip with a sleep function in the related art, and for a logic link of over-discharge protection, the module mainly includes an over-discharge comparator, a logic processing module, a delay module, a discharge control port, and the like, and a branch circuit formed by the above features is separately proposed and simplified to obtain a simplified schematic diagram as shown in fig. 2. Under such circumstances, after the over-discharge protection is triggered, the discharge MOS tube controlled by the change of the DO level of the discharge control port is turned off, and the voltage of the detection port VM is pulled up to the same extent as the voltage of the power input port VDD, but due to the sleep function, the voltage of the detection port VM is locked, so that the protection chip cannot restore to the working state by itself. To solve this problem, the present application adds a logic change sub-circuit 10 to the link shown in fig. 2, and the connection scheme is shown in fig. 3. The logic change subcircuit mainly aims to enable the voltage at the detection port VM to be pulled up to be the same as the voltage of the power input port VDD to be effective in a delayed mode through the arrangement of the logic change subcircuit, enable the battery to work temporarily in a normal state when the battery is electrified for the first time, avoid the production efficiency reduction caused by the fact that the battery cannot work normally when the battery is electrified for the first time, and enable the over-discharge protection state of the battery protection chip 1 to be automatically relieved without external connection of other equipment through reverse adjustment of the change of the conditions of the logic change subcircuit 10.
Therefore, the application changes the setting of the subcircuit through logic, so that the over-discharge protection state is delayed to be effective, and the phenomenon that the battery protection chip immediately blocks the normal operation of the battery and cannot recover by itself because the voltage of the detection port is the same as the voltage of the power input port when the power is firstly electrified is avoided.
As shown in fig. 3, in some embodiments, the logic change sub-circuit 10 includes a logic switch LS, where the logic switch LS is connected to an output terminal of the over-discharge comparator, and is configured to control on-off of the logic change sub-circuit 10 according to an output result of the over-discharge comparator.
Specifically, the logic change sub-circuit 10 is controlled by the output signal of the output end of the over-amplification comparator, and the logic switch LS is controlled by the output signal of the over-amplification comparator to be turned on and off. In some examples, when the battery is powered up below the over-discharge protection voltage, the battery voltage signal is below the over-discharge reference voltage, the over-discharge comparator outputs a low level, at which time the logic switch LS is controlled to close and the logic change subcircuit 10 is turned on; when the battery is powered on above the overdischarge protection voltage, the overdischarge comparator outputs a high level, the logic switch LS is controlled to be turned off, and the logic change sub-circuit 10 is opened.
Thus, the present application provides the connection and operation of the logic switch LS in the logic change sub-circuit 10.
As shown in fig. 3, in some embodiments, the logic-changing subcircuit 10 further includes a current source CS and a capacitor C, the current source CS is connected to the power input port VDD of the battery protection chip and the logic switch LS, the capacitor C is connected to the logic switch LS and ground, and the current source CS is used to charge the capacitor C.
Specifically, the capacitor C is a core component for enabling the logic change sub-circuit to have a delay and reverse contact function, and needs to be implemented in cooperation with the current source CS. In some examples, when the battery is powered up below the overdischarge protection voltage, the battery voltage signal is lower than the overdischarge reference voltage, the overdischarge comparator outputs a low level, at this time, the logic switch LS is controlled to be closed, the logic change sub-circuit 10 is turned on, the current source CS charges the capacitor C, a period of time is required from the equipotential of the plate to the full charge of the capacitor C, and the period of time is defined as T, and the logic processing module detects a low level and is in a normal working state at present, and after the charging of the capacitor C is completed, the logic processing module detects a high level to trigger the overdischarge protection. Conversely, in the case where the battery protection chip 1 is already in the over-discharge protection state, the logic processing module may be caused to re-detect the low level by discharging the capacitor C, thereby releasing the over-discharge protection state. The method for discharging the capacitor C may be a method of providing a simple reset circuit at both ends of the capacitor C, and the present application is not limited thereto. When the battery is powered on higher than the overdischarge protection voltage, the overdischarge comparator outputs a high level, the logic switch LS is controlled to be turned off, the logic change sub-circuit 10 is opened, the capacitor C cannot be charged by the current source CS, the voltage detected by the logic processing module is always 0, and the battery protection circuit 1 keeps a normal working state.
Thus, the present application provides the connection and function of the current source CS and the capacitor C in the logic change sub-circuit 10.
In some embodiments, as shown in FIG. 3, the connection point of the logic processing module to the logic change subcircuit 10 is at the anode of the capacitor C.
Specifically, in order to implement the delay action of the capacitor C in the above embodiment, the voltage detected by the logic processing module must satisfy: the low level is detected during the time T when the over-put comparator outputs a low level, i.e. the logic change sub-circuit 10 is on, and then the high level is detected, and the low level is detected when the over-put comparator outputs a high level, i.e. the logic change sub-circuit 10 is off, so that only the anode satisfies the condition for both plates of the capacitor C. The logic processing module is connected to the anode of the capacitor C.
Thus, the present application provides a way of connecting the logic change sub-circuit 10 to the logic processing module.
As shown in fig. 4, 5, 6 and 7, the present application also provides a battery protection circuit, which includes a battery protection chip 1 and a protected battery BAT.
In particular, the specific application of the battery protection chip 1 should be further described in connection with a battery protection circuit. The circuits shown in fig. 4, 5, 6 and 7 are all circuit structures to which the battery protection chip 1 can be applied, and mainly have the technical effects of delaying the over-discharge state of the protected battery BAT to take effect and reverse contact. Next, the actual application process of the battery protection chip 1 is described by taking the circuit connection structure in the four drawings as an example.
Thus, the present application provides a specific application of the battery protection chip 1.
In some embodiments, as shown in fig. 4, 5, 6 and 7, the battery protection circuit further includes a filter circuit 2, where the filter circuit 2 includes a filter resistor R1 and a filter capacitor C1, the filter resistor R1 is connected to the positive electrode of the battery BAT and the power input port VDD of the battery protection chip 1, the power input port VDD of the battery protection chip of the filter capacitor C1 is connected to ground, and the negative electrode of the battery BAT is connected to the common ground port VSS of the battery protection chip 1 and to ground.
Specifically, battery protection coreWhen the sheet 1 is applied to a battery protection circuit, the connection with the battery BAT to be protected must be made by providing a filter circuit to avoid the voltage instability of the battery protection chip 1 caused by the fluctuation or jitter of the battery BAT, and the simplest common circuit in the filter circuit is an RC circuit. Therefore, the battery protection circuit provided by the application is provided with the filter circuit 2, wherein the filter resistor R1 and the filter capacitor C1 form a group of series RC filter circuits. Since the filter capacitor C1 cannot flow a direct current, both the resistor and the capacitor have an impeding effect on the current, and the total impedance is determined by the capacitive reactance of the filter resistor R1 and the filter capacitor C1, and the total impedance varies with the frequency. Turning frequency f of filter circuit 2 0 The method meets the following conditions:
when the frequency of the input signal is greater than f 0 The total impedance of the filter circuit 2 is substantially unchanged and is equal to R1.
In this way, the present application provides a connection manner of the battery BAT and the battery protection chip 1.
In some embodiments, as shown in fig. 4, the battery protection circuit further includes a discharge control circuit 3 and a charge control circuit 4, the discharge control circuit 3 is connected to the discharge control port DO of the battery protection chip 1 and the negative electrode of the battery, and the charge control circuit 4 is connected to the charge control port CO of the battery protection chip 1 and the negative electrode of the battery.
Specifically, fig. 4 shows a discrete negative electrode battery protection circuit, where the discharge control circuit 3 and the charge control circuit 4 are discrete and are connected to the discharge control port DO and the charge control port CO of the battery protection chip 1, respectively. The over-discharge protection function of the battery protection chip 1 is mainly performed by the discharge control port DO and the discharge control circuit 3. In some examples, the discharge control circuit 3 includes a discharge control MOS transistor, a gate of which is connected to the discharge control port DO, a source is connected to a negative electrode of the battery BAT to be protected, and a drain is connected to the charge control circuit 4. When the battery BAT is powered on below the overdischarge protection voltage, the battery voltage signal is lower than the overdischarge reference voltage, the overdischarge comparator outputs a low level, at the moment, the logic switch LS is controlled to be closed, the logic change sub-circuit 10 is switched on, the current source CS charges the capacitor C, the capacitor C needs a period of time from the equal potential of the polar plate to the full charge, the period of time is defined as T, the detection of the capacitor C by the logic processing module is still at the low level in the T time, the battery is in a normal working state at present, at the moment, the discharge control port DO is kept at the high level, and the discharge control MOS tube is conducted. When the capacitor C is charged, the logic processing module detects high level and triggers over-discharge protection, at the moment, the discharge control port DO outputs low level, the discharge control MOS tube is cut off, and the battery BAT is prevented from continuously discharging.
Thus, the present application provides a method of connecting sub-circuits related to charge and discharge control in a battery protection circuit.
In some embodiments, as shown in fig. 5, the battery protection circuit further includes a discharge control circuit 3 and a charge control circuit 4, where the discharge control circuit 3 is connected to the discharge control port DO of the battery protection chip 1 and the positive electrode of the battery, and the charge control circuit 4 is connected to the charge control port CO of the battery protection chip 1 and the positive electrode of the battery.
Specifically, fig. 5 shows a discrete positive electrode battery protection circuit, and the discharge control circuit 3 and the charge control circuit 4 are discrete and are respectively connected to the discharge control port DO and the charge control port CO of the battery protection chip 1, but unlike the circuit shown in fig. 4, the discharge control circuit 3 and the charge control circuit 4 are connected to the positive electrode side of the battery BAT. The over-discharge protection function of the battery protection chip 1 is mainly performed by the discharge control port DO and the discharge control circuit 3. In some examples, the discharge control circuit 3 includes a discharge control MOS transistor, the gate of which is connected to the discharge control port DO, the source is connected to the load/charge positive terminal p+ of the battery BAT to be protected, and the drain is connected to the charge control circuit 4. When the battery BAT is powered on below the overdischarge protection voltage, the battery voltage signal is lower than the overdischarge reference voltage, the overdischarge comparator outputs a low level, at the moment, the logic switch LS is controlled to be closed, the logic change sub-circuit 10 is switched on, the current source CS charges the capacitor C, the capacitor C needs a period of time from the equal potential of the polar plate to the full charge, the period of time is defined as T, the detection of the capacitor C by the logic processing module is still at the low level in the T time, the battery is in a normal working state at present, at the moment, the discharge control port DO is kept at the low level, and the discharge control MOS tube is conducted. When the capacitor C is charged, the logic processing module detects high level and triggers over-discharge protection, at the moment, the discharge control port DO outputs high level, the discharge control MOS tube is cut off, and the battery is prevented from continuously discharging.
Thus, the present application provides a method of connecting sub-circuits related to charge and discharge control in a battery protection circuit.
In some embodiments, as shown in fig. 4 and 5, the circuit further includes a load charge detection circuit 5, and the load charge detection circuit 5 is connected to the detection port VM of the battery protection chip 1, and the charge control circuit 4 or the discharge control circuit 3.
Specifically, in fig. 4, the load charge detection circuit 5 includes a detection resistor R2, one end of which is connected to the detection port VM, and the other end of which is connected to the charge control circuit 4 and the load/negative charge terminal, which functions to detect that the current battery is in a load/charge state, while detecting that a voltage change at the port VM also represents a change in the operating state of the battery. In fig. 5, since the discharge control circuit 3 and the charge control circuit 4 are connected to the positive electrode side of the battery, the load charge detection circuit 5 is also connected to the positive electrode side of the battery accordingly.
In this way, the present application provides a connection method of the load charge detection circuit 5 on the basis of the above-described embodiment.
In some embodiments, as shown in fig. 6 and 7, the circuit further includes a built-in control MOS transistor CMOS, where the built-in control MOS transistor CMOS is connected to the power input port VDD and the detection port VM of the battery protection chip 1 or to the common ground port VSS and the detection port VM of the battery protection chip 1 through two poles other than the gate.
Specifically, the discharging control and the charging control of part of the battery protection chip 1 are not discrete, but are realized by a built-in control MOS tube CMOS built in the chip, and the built-in control MOS tube CMOS directly receives signals comprehensively sent by the logic processing module and the delay module to control the discharging and charging states of the battery in two directions. The connection mode of the built-in control MOS transistor CMOS is also divided into two types, one is to connect the power input port VDD and the detection port VM as shown in fig. 6, and the source and the drain are not substantially different due to the characteristics of the NMOS transistor, so that the symmetrical connection method does not have the source and the drain, so that the built-in control MOS transistor CMOS is connected to the power input port VDD and the detection port VM through two poles other than the gate. The other is to connect the common ground port VSS and the detection port VM as shown in fig. 7. The connection mode can simply maintain or resist the charge and discharge process of the battery by controlling the on-off of the MOS transistor CMOS. The mode of operation of the battery protection chip 1 with the built-in control MOS transistor CMOS in the circuit will be described with reference to the circuit shown in fig. 6. In the circuit shown in fig. 6, when the battery BAT is powered on below the overdischarge protection voltage, the battery voltage signal is lower than the overdischarge reference voltage, the overdischarge comparator outputs a low level, at this time, the logic switch LS is controlled to be closed, the logic change sub-circuit 10 is turned on, the current source CS charges the capacitor C, a period of time from the equipotential of the plate to the full charge of the capacitor C is defined as T, the voltage detected by the logic processing module is still low level in the T period of time, and is currently in a normal working state, at this time, the logic processing module outputs a low level to the built-in control MOS transistor CMOS, at this time, the built-in control MOS transistor CMOS is turned on, and the battery BAT is normally discharged. When the capacitor C is charged, the logic processing module detects a high level and triggers over-discharge protection, the logic processing module outputs the high level to the built-in control MOS tube CMOS, the built-in control MOS tube CMOS is cut off at the moment, a discharge loop of the battery BAT is interrupted, and discharge is prevented.
Thus, the application provides a connection mode for protecting the MOS tube arranged in the chip.
In some examples, taking the circuit shown in fig. 4 as an example for the application effect of the battery protection chip 1 provided by the present application, when the battery BAT is powered up below the overdischarge protection voltage, the battery voltage signal is lower than the overdischarge reference voltage, the overdischarge comparator outputs a low level, at this time, the logic switch LS is controlled to be closed, the logic change sub-circuit 10 is turned on, the current source CS charges the capacitor C, the capacitor C needs a period of time from the equal potential of the plate to the full charge, and the logic change sub-circuit 10 is fixedThe logic processing module detects a high level after the capacitor C is charged, and triggers over-discharge protection. The voltage change curve in this process is shown in FIG. 8, V P- Is the voltage value detected at the load/charge negative terminal P-VDD is the voltage value of the power supply input port VDD. When the battery is powered up above the overdischarge protection voltage, the overdischarge comparator outputs a high level, the logic switch LS is controlled to be turned off, the logic change sub-circuit 10 is opened, the capacitor C cannot be charged by the current source CS, the voltage detected by the logic processing module is always 0, the battery protection circuit 1 keeps a normal working state, and at the moment, V is equal to P- The voltage change curve during this process is shown in fig. 9, maintained at 0V.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application, and are intended to be included within the scope of the appended claims and description. In particular, the technical features mentioned in the respective embodiments may be combined in any manner as long as there is no structural conflict. The present application is not limited to the specific embodiments disclosed herein, but encompasses all technical solutions falling within the scope of the claims.

Claims (10)

1. The battery protection chip comprises an over-discharge comparator and a logic processing module, and is characterized by further comprising a logic change sub-circuit, wherein the logic change sub-circuit is connected with a power input port of the battery protection chip, an output end of the over-discharge comparator, the logic processing module and the ground; the logic change sub-circuit is used for enabling the over-discharge protection state of the battery protection chip to be effective in a delayed mode and releasing the over-discharge protection state.
2. The battery protection chip of claim 1, wherein the logic change sub-circuit comprises a logic switch, and the logic switch is connected with the output end of the over-discharge comparator and is used for controlling the on-off of the logic change sub-circuit according to the output result of the over-discharge comparator.
3. The battery protection chip of claim 2, wherein the logic altering subcircuit further comprises a current source connected to a power input port of the battery protection chip and the logic switch, and a capacitor connected to the logic switch and ground, the current source being configured to charge the capacitor.
4. The battery protection chip of claim 3, wherein a connection point of the logic processing module and the logic change subcircuit is located at an anode of the capacitor.
5. A battery protection circuit, characterized in that the battery protection circuit comprises the battery protection chip as claimed in claims 1-4 and a protected battery.
6. The battery protection circuit of claim 5, further comprising a filter circuit comprising a filter resistor and a filter capacitor, the filter resistor being connected to the positive electrode of the battery and the power input port of the battery protection chip, the filter capacitor being connected to the power input port of the battery protection chip and to ground, the negative electrode of the battery being connected to the common ground port of the battery protection chip and to ground.
7. The battery protection circuit of claim 5, further comprising a discharge control circuit coupled to the discharge control port of the battery protection chip and the negative electrode of the battery, and a charge control circuit coupled to the charge control port of the battery protection chip and the negative electrode of the battery.
8. The battery protection circuit of claim 5, further comprising a discharge control circuit coupled to the discharge control port of the battery protection chip and the positive electrode of the battery, and a charge control circuit coupled to the charge control port of the battery protection chip and the positive electrode of the battery.
9. The battery protection circuit according to claim 7 or 8, further comprising a load charge detection circuit connected to a detection port of the battery protection chip, and the charge control circuit or the discharge control circuit.
10. The battery protection circuit according to claim 5, further comprising a built-in control MOS transistor connected to a power input port and a detection port of the battery protection chip via two poles other than the gate, or to a common ground port and a detection port of the battery protection chip.
CN202310644794.4A 2023-06-01 2023-06-01 Battery protection chip and battery protection circuit Pending CN117039808A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310644794.4A CN117039808A (en) 2023-06-01 2023-06-01 Battery protection chip and battery protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310644794.4A CN117039808A (en) 2023-06-01 2023-06-01 Battery protection chip and battery protection circuit

Publications (1)

Publication Number Publication Date
CN117039808A true CN117039808A (en) 2023-11-10

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310644794.4A Pending CN117039808A (en) 2023-06-01 2023-06-01 Battery protection chip and battery protection circuit

Country Status (1)

Country Link
CN (1) CN117039808A (en)

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