CN116991776A - Address modification device and address modification method - Google Patents

Abstract

The application discloses an address modification device and an address modification method, and belongs to the technical field of communication. The address modification device includes: a controller; the address modification circuit comprises a digital-to-analog converter and a signal receiver, one end of the address modification circuit is connected with the controller, and the other end of the address modification circuit is used for being connected with a main equipment interface of the bus; the controller is used for controlling the digital-analog converter to output a target analog signal, receiving a feedback signal of a target slave device responding to the target analog signal through the signal receiver, and sending an address modification instruction to the target slave device so as to modify the address of the target slave device, wherein the target slave device is one slave device responding to the target analog signal from a plurality of slave devices. The device can solve the problem of address conflict among bus slave devices.

Description

Address modification device and address modification method

Technical Field

The present application relates to the field of communications technologies, and in particular, to an address modification apparatus and an address modification method.

Background

Since the birth of the RS-485 bus, the RS-485 bus is widely applied to various fields of industrial control, electric power, instruments and meters and the like due to the advantages of easiness in networking, stable and reliable transmission, low cost and the like, is a common field bus and can realize data communication among a plurality of devices.

However, when the device is used on site, when a plurality of devices of the same type are mounted on the RS-485 network, particularly devices of the same manufacturer and the same model, address conflict on the RS-485 bus can be caused due to the fact that the addresses of the factory buses of the devices are the same, normal communication can be carried out without sending, and in this case, address modification can only be realized through sequential rerouting and power failure, and the device is complex in operation and low in efficiency.

Disclosure of Invention

The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the application provides an address modification device and an address modification method, which can solve the problem of address conflict between slave devices, and the address modification operation is simple and has high efficiency.

In a first aspect, the present application provides an address modifying apparatus for modifying an address of a slave device on a bus, the bus including a master device of a hand-held topology and a plurality of slave devices, the address modifying apparatus comprising:

a controller;

the address modification circuit comprises a digital-to-analog converter and a signal receiver, one end of the address modification circuit is connected with the controller, and the other end of the address modification circuit is used for being connected with a main equipment interface of the bus;

the controller is used for controlling the digital-to-analog converter to output a target analog signal, and receiving a feedback signal of the target slave device responding to the target analog signal through the signal receiver; the controller is further configured to send an address modification instruction to the target slave device to modify an address of the target slave device, where the target slave device is one of the plurality of slave devices that responds to the target analog signal.

According to the address modification device, the address modification circuit is connected with the bus, the controller controls the digital-analog converter of the address modification circuit to output the target analog signal, only one target slave device feeds back the target analog signal at a time, and then an address modification instruction is sent to the target slave device to modify the address of the target slave device, so that the problem of address conflict among the slave devices can be solved, and the address modification operation is simple and high in efficiency.

According to one embodiment of the application, the address modification circuit further comprises an analog switch, the digital-to-analog converter is connected between the controller and the analog switch, the signal receiver is connected between the controller and the analog switch, the analog switch is used for connecting the main device interface, and the analog switch is used for switching the bus to be connected with the digital-to-analog converter or connected with the signal receiver.

According to one embodiment of the application, an interface terminal is arranged at the end of the analog switch, which is connected with the interface of the main device.

According to an embodiment of the application, the address modification means comprises: and the controller and the at least one address modification circuit are arranged on the main board.

According to one embodiment of the present application, the main board is provided with a power supply communication interface, and the power supply communication interface is used for receiving at least one of a baud rate setting instruction and a slave device communication instruction.

According to one embodiment of the present application, the power supply communication interface is a USB interface.

According to one embodiment of the application, the main board is provided with a first dial switch, and the first dial switch is used for configuring the baud rate of the slave device.

According to one embodiment of the application, the main board is provided with a second dial switch, and the second dial switch is used for configuring a terminal matching resistor of the slave device.

According to one embodiment of the application, the main board is provided with a first indicator light for indicating the working state of the address modification device.

According to one embodiment of the application, the main board is provided with at least one second indicator light, the second indicator light corresponds to the address modification circuit one by one, and the second indicator light is used for indicating the working state of the address modification circuit.

According to an embodiment of the application, the address modification means comprises:

the first shell and the second shell are installed in a matched mode, and the main board is located in an accommodating space defined by the first shell and the second shell.

According to one embodiment of the application, the bus is an RS-485 bus and the signal receiver is an RS-485 receiver.

In a second aspect, the present application provides an address modification method for modifying an address of a slave device on a bus, the bus including a master device of a hand-held topology and a plurality of slave devices, the address modification method comprising:

outputting a first target analog signal to the bus;

receiving a feedback signal of a first target slave device responding to the first target analog signal, wherein the first target slave device is one slave device responding to the first target analog signal in a plurality of slave devices;

and sending a first address modification instruction to the first target slave device, wherein the first address modification instruction is used for modifying the address of the first target slave device.

According to the address modification method, the address modification of the single slave device can be realized by outputting the first target analog signal, receiving the response feedback signal, establishing communication with the first target slave device in the bus and sending the address modification instruction to the first target slave device, so that the problem of address conflict of the slave devices on the bus can be solved.

According to one embodiment of the present application, after the sending of the first address modification instruction to the first target slave device, the method further includes:

outputting a second target analog signal to the bus, the second target analog signal being greater than the first target analog signal;

receiving a feedback signal of a second target slave device responding to the second target analog signal, wherein the input end of the second target slave device is connected with the output end of the first target slave device;

and sending a second address modification instruction to the second target slave device, wherein the second address modification instruction is used for modifying the address of the second target slave device.

Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.

Drawings

The foregoing and/or additional aspects and advantages of the application will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic diagram of an address modifying apparatus according to an embodiment of the present application;

FIG. 2 is a second schematic diagram of an address modifying apparatus according to an embodiment of the present application;

FIG. 3 is a schematic flow chart of an address modification method according to an embodiment of the present application;

FIG. 4 is a second flowchart of an address modification method according to an embodiment of the present application.

Reference numerals: address modifying device 100, controller 110, address modifying circuit 120, digital-to-analog converter 121, signal receiver 122, analog switch 123, first housing 201, second housing 202, motherboard 203, USB interface 204, dial switch 205, interface terminal 206, first indicator light 207, and second indicator light 208.

Detailed Description

Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.

In the related art, when a plurality of devices of the same type are mounted on a bus of a communication network, the problem of address conflict of the plurality of devices on the bus can occur, normal communication is performed without sending, address modification needs to be realized through sequential wire-changing and power-off, and the operation is complex and the efficiency is low.

An address modification apparatus 100 according to an embodiment of the present application is described below with reference to fig. 1 and 2.

The address modification device 100 of the embodiment of the present application is used for modifying addresses of slave devices on a bus, and setting different addresses for a plurality of slave devices on the bus, so as to realize normal communication of a plurality of devices.

The bus comprises a master device and a plurality of slave devices in a hand-in-hand topology structure.

The hand-held topology is a ring topology, i.e. a master device and a plurality of slave devices on the hand-held topology may form a closed link.

As shown in fig. 1, an address modification apparatus 100 according to an embodiment of the present application includes: a controller 110 and at least one address modification circuit 120.

Wherein the controller 110 is used as a control system for processing information data of the address modification circuit 120.

In actual implementation, the controller 110 may send a control instruction to the address modification circuit 120 by receiving an instruction from the PC side, so as to modify the address of the slave device on the bus.

It should be noted that, the controller 110 may be a single-chip microcomputer, and the communication module of the single-chip microcomputer sends a control instruction to the address modification circuit 120 to modify the address of the slave device on the bus by receiving the instruction from the PC end through the single-chip microcomputer.

In this embodiment, address modification circuit 120 includes a digital-to-analog converter 121 and a signal receiver 122.

One end of the address modification circuit 120 is connected to the controller 110, and is used for receiving a control instruction of the controller 110, and the other end is connected to a master device interface of the bus, so as to replace a master device on the bus to communicate with other slave devices on the bus.

The digital-to-analog converter 121 is an electronic device that converts an input digital signal into an output analog signal, and the signal receiver 122 is an electronic device that receives information of a slave device on the bus, wherein the digital-to-analog converter 121 may have an accuracy of 8 bits to 20 bits, an output range of 0V to 5V or 0V to 10V, and an output frequency of 1MHz to 50MHz.

In this embodiment, the digital-to-analog converter 121 is configured to simulate the bus level, output a target analog signal, and transmit the target analog signal to a plurality of slave devices on the bus, wherein the target analog signal is configured to simulate the voltage difference magnitude of the master device.

In actual implementation, the controller 110 may send a control instruction of an analog bus level to the digital-analog converter 121, and the digital-analog converter 121 may output a target analog signal to a plurality of slave devices after receiving the corresponding control instruction and simulating the bus level.

It should be noted that, the bus is in a hand-in-hand topology structure, after the digital-to-analog converter 121 outputs the target analog signal, each slave device in the bus may receive the target analog signal, and the slave devices located at different positions in the hand-in-hand topology structure may not reach the response standard due to the existence of the internal resistance of the cable.

In this embodiment, after the digital-to-analog converter 121 outputs the target analog signal, only the target slave device in the bus will respond to the target analog signal, i.e., the target slave device is one slave device from among the plurality of slave devices that responds to the target analog signal.

Take the RS-485 bus as an example.

For a slave device on the RS-485 bus having an input sensitivity of 200mV, when the received level is greater than or equal to 200mV, which indicates a signal "0", less than or equal to-200 mV, which indicates a signal "1", between-200 mV and 200mV, the signal is not processed, i.e., the slave device does not respond.

The RS-485 bus comprises slave devices 1 to n in a hand-in-hand topological structure, the slave devices 1 to n are sequentially connected, the slave devices 1 are directly connected with a master device interface, the address modification device 100 simulates the master device to output a target analog signal, the voltage difference amplitude of the target analog signal is 201mV, the bus voltage difference at the slave device 1 is greater than or equal to 200mV, and the slave device 1 responds to the target analog signal, namely the slave device 1 is the target slave device.

Because of the existence of the internal resistance of the cable, the bus voltage difference of the slave device 2 and the slave device 3 and … of the slave device n is smaller than 200mV, the address modification device 100 can communicate with the slave device 1 without responding to the target analog signal, and can not normally communicate with other slave devices.

In this embodiment, the target slave device feeds back a corresponding signal to the address modification apparatus 100 in response to the target analog signal, and the signal receiver 122 receives the feedback signal of the target slave device in response to the target analog signal, and establishes communication between the address modification apparatus 100 and the target slave device.

In this embodiment, a control instruction for receiving the feedback signal of the target analog signal is sent to the signal receiver 122 by the controller 110, so that the signal receiver 122 obtains the feedback signal of the target slave device, and then the controller 110 sends an address modification instruction to the target slave device.

Wherein the controller 110 sends an instruction to the target slave device, the digital-to-analog converter 121 may be controlled by the controller 110 to send an address modification instruction to the target slave device.

In actual implementation, after the signal receiver 122 obtains the feedback signal of the target slave device, the address of the target slave device may be calculated to obtain a new address to be modified by the target slave device, and the controller 110 controls the digital-to-analog converter 121 to send an address modification instruction and the new address to be modified to the target slave device, so that the target slave device modifies the address.

It will be appreciated that the address modification apparatus 100 includes at least one address modification circuit 120, which may enable modification of addresses of one or more bus devices, which may be advantageous for improving the efficiency of use of the address modification apparatus 100.

Take the RS-485 bus as an example.

For a slave device on the RS-485 bus with an input sensitivity of 200mV at its receiver, the reception level of slave device 1 is set to be greater than or equal to 200mV, the bus differential pressure of slave device 2, slave device 3, …, slave device n is less than 200mV, and the address modification apparatus 100 can communicate with slave device 1 normally.

After receiving the target analog signal, the slave device 1 responds to the target analog signal, the slave device 2 and the slave device 3 and the slave device … do not respond to the target analog signal, the address modifying device 100 is independently communicated with the slave device 1, the address modifying device 100 sends an address modifying instruction to the slave device 1, and the address of the device 1 is modified, so that the address of the device 1 does not conflict with the existing address of the bus.

Address modification apparatus 100 simulates the master device to raise the output bus voltage difference amplitude, sets the increment to 1mV, and when the reception level of device 1 and slave device 2 is greater than or equal to 200mV, the bus voltage difference of slave device 3 and slave device 4 and …, slave device n, is less than 200mV, and address modification apparatus 100 can communicate with slave device 1 and slave device 2 normally.

After receiving the target analog signal, the slave device 2 responds to the target analog signal, the address modification device 100 successfully communicates with the slave device 2, and since the address of the slave device 1 has been modified in the previous step, the address modification device 100 communicates with the slave device 2 alone, and the address modification device 100 sends an address modification instruction to the slave device 2 to modify the address of the slave device 2 so that the address of the slave device 2 does not conflict with the existing address of the bus.

The address modification apparatus 100 simulates the master device to raise the output bus voltage difference amplitude again until the address modification of all the slave devices of the bus is completed.

The address modifying apparatus 100 in the embodiment of the present application controls the digital-to-analog converter 121 to simulate the bus level to output the target analog signal through the controller 110, and sequentially modifies the slave device addresses, so as to solve the problem of the conflict of multiple device addresses on the bus.

According to the address modification apparatus 100 provided in the embodiment of the present application, the address modification circuit 120 is connected to the bus, the controller 110 controls the digital-analog converter 121 of the address modification circuit 120 to output the target analog signal, only one target slave device feeds back the target analog signal at a time, and further sends an address modification instruction to the target slave device, and the address of the target slave device is modified, so that the problem of address collision between the slave devices can be solved, and the address modification operation is simple and efficient.

In some embodiments, address modification circuit 120 further includes an analog switch 123, digital-to-analog converter 121 is connected between controller 110 and analog switch 123, signal receiver 122 is connected between controller 110 and analog switch 123, analog switch 123 is used to connect the host interface, and analog switch 123 is used to switch the bus to connect with digital-to-analog converter 121 or to connect with signal receiver 122.

The analog switch 123 can switch different signal links, i.e. the switching bus is connected to the digital-analog converter 121 or to the signal receiver 122.

It should be noted that the analog switch 123 can only be connected to at most one signal link, i.e., can only switch the bus to connect to the digital-analog converter 121 or the bus to connect to the signal receiver 122.

In this embodiment, when the analog switch 123 is connected to the digital-analog converter 121, the controller 110 controls the digital-analog converter 121 to output the target analog signal to the slave device, and when the analog switch 123 is connected to the signal receiver 122, the controller 110 controls the signal receiver 122 to receive the feedback signal of the target slave device, and the address of the target slave device can be modified.

In actual implementation, the controller 110 may control the analog switch 123 to be connected to the digital-to-analog converter 121, so that the bus is connected to the digital-to-analog converter 121, and the controller 110 may control the digital-to-analog converter 121 to simulate the bus level and output the target analog signal to the plurality of slave devices.

The controller 110 may also control the analog switch 123 to be connected to the signal receiver 122, so that the bus is connected to the signal receiver 122, and the controller 110 may control the signal receiver 122 to receive a feedback signal of the target slave device and send a modification instruction to the target slave device according to the received feedback signal.

In this embodiment, by switching the different links of the address modification circuit 120 by the analog switch 123, the functions of outputting the target analog signal and receiving the feedback signal of the target analog signal can be performed, and the normal operation of the address modification apparatus 100 can be ensured.

In some embodiments, the end of the analog switch 123 that interfaces with the host device is provided with an interface terminal 206.

In this embodiment, the analog switch 123 is connected with the main device interface of the bus through the interface terminal 206, so that connection and disconnection between the address modification apparatus 100 and the main line can be facilitated, and convenience in use of the address modification apparatus 100 can be improved.

In some embodiments, address modification apparatus 100 comprises: the motherboard 203, the controller 110 and at least one address modification circuit 120 are disposed on the motherboard 203.

In this embodiment, the motherboard 203 and at least one address modification circuit 120 are integrated on the motherboard 203, so that the failure rate of the address modification apparatus 100 can be reduced, and the stability and reliability of the address modification apparatus 100 can be enhanced.

In some embodiments, the motherboard 203 is provided with a power-on communication interface for receiving at least one of baud rate setting instructions and slave device communication instructions.

Wherein the baud rate setting instruction is configured to control the address modification device 100 to select a corresponding baud rate to operate, the baud rate may include 9600 baud rate, 19200 baud rate, 115200 baud rate, and the like.

It should be noted that the power supply communication interface may include two interfaces, namely a power supply interface and a communication interface, where the communication interface is used to supply power to the address modification device 100, and the communication interface is used to receive an instruction from the PC side.

The power supply communication interface may be a single interface, and by integrating the power supply function and the communication function into the same interface, the address modification device 100 can be powered and can receive the instruction of the PC side.

In actual implementation, the address modification device 100 and the PC terminal may be connected through a power supply communication interface, where the power supply communication interface transmits a communication command of the PC terminal to the controller 110, so that the controller 110 controls the address modification device 100 to work normally.

For example, the baud rate setting instruction sent by the PC side may be received by the controller 110, so as to set the baud rate when the address modification device 100 operates.

For another example, the controller 110 may receive a communication command of the slave device sent by the PC end, and the controller 110 controls the analog switch 123 to be connected to the signal receiver 122, so that the slave device may transmit a feedback signal of the responsive target analog signal to the signal receiver 122, to complete address modification of the target slave device.

It should be noted that, the communication command and the baud rate of the address modification device 100 may be set by software on the PC side and transmitted to the controller 110, so that the address modification device 100 may be normally operated only by providing power when being used next time, and the command is not required to be transmitted to the address modification device 100 through the PC side.

In this embodiment, the PC terminal is connected to the address modification apparatus 100 by providing a power supply communication interface on the motherboard 203, and the normal operation of the address modification apparatus 100 is ensured by the power supply communication interface and transmitting the PC terminal command.

In some embodiments, the powered communication interface is a USB interface 204.

It will be appreciated that the USB interface 204 is an interface integrating a power supply function and a communication function, and can supply power to the address modification device 100 and receive instructions from the PC side.

In this embodiment, the power supply communication interface is set as the USB interface 204, and is unified with the PC end, so that the address modification device 100 is convenient to use.

In some embodiments, the motherboard 203 is provided with a first dial switch for configuring the baud rate of the slave device.

In this embodiment, the baud rate of the slave device may be configured by the first dial switch, and four commonly used bit rates may be switched by the first dial switch, so as to facilitate the operation of the address modification apparatus 100 in execution.

In some embodiments, the motherboard 203 is provided with a second dial switch for configuring the terminal matching resistance of the slave device.

In this embodiment, the terminal matching resistor of the slave device is configured through the second dial switch, and the size of the terminal matching resistor of the slave device can be selected through the second dial switch, or whether the matching resistor is mounted can be selected through the second dial switch.

It should be noted that, the first dial switch and the second dial switch may be the same, for example, as shown in fig. 2, the main board 203 is provided with a dial switch 205, and the dial switch 205 may implement the configuration of the baud rate and the terminal matching resistor, and the size of the address modification apparatus 100 is reduced by setting the selection of the baud rate of the slave device and the selection of the terminal matching resistor of the slave device on the same switch.

In some embodiments, the main board 203 is provided with a first indicator light 207, and the first indicator light 207 is used to indicate the operating state of the address modification device 100.

In this embodiment, by providing the first indicator light on the main board 203, it is advantageous to intuitively determine the operation state of the current address modification apparatus 100 for determination.

For example, when the address modification device 100 is operating, the first indicator light 207 is illuminated, indicating that the address modification device 100 is in an operating state; when the address modification device 100 stops operating, the first indicator light 207 is turned off, indicating that the address modification device 100 is not in an operating state.

In some embodiments, the motherboard 203 is provided with at least one first indicator light 208, where the first indicator light 208 is in one-to-one correspondence with the address modification circuit 120, and the first indicator light 208 is used to indicate the operating state of the address modification circuit 120.

In this embodiment, by providing the first indicator lamp 208 on the motherboard 203, it is advantageous to determine the current operating state of the address modification circuit 120 in a visual manner.

For example, when the address modification circuit 120 is operating, the first indicator light 208 is illuminated, indicating that the address modification circuit 120 is in an operational state; when the address modification circuit 120 stops operating, the first indicator light 208 is turned off, indicating that the address modification circuit 120 is not in an operating state.

It should be noted that the motherboard 203 may include a plurality of first indicator lamps 208 corresponding to a plurality of different address modification circuits 120, and each of the first indicator lamps indicates an operation state of the corresponding address modification circuit 120.

For example, if the motherboard 203 has two first indicator lights 208 corresponding to two different address modification circuits 120, when both the first indicator lights 208 are turned on, it indicates that both the address modification circuits 120 are in an operating state.

In actual implementation, the operating state of the whole address modification device 100 can be judged by lighting the first indicator lamp 207 and the first indicator lamp 208, which is beneficial to overhauling the fault of the address modification device 100.

For example, when the first indicator lamp 207 is turned on and the first indicator lamp 208 is not turned on, it indicates that the address modification apparatus 100 is operated but the address modification circuit 120 is not operated normally, and the address modification circuit 120 can be overhauled, so that the overhauling range is narrowed.

In some embodiments, address modification apparatus 100 comprises:

the first housing 201 and the second housing 202 are mounted in cooperation, and the main board 203 is located in the accommodation space defined by the first housing 201 and the second housing 202.

In this embodiment, by disposing the main board 203 in the accommodating space defined by the first housing 201 and the second housing 202, the main board 203 can be protected, the interference of the main board 203 from the external environment is reduced, and the normal operation of the address modification apparatus 100 is ensured.

It should be noted that, the first housing 201 and the second housing 202 may be detachable housings, so that the motherboard 203 may be conveniently detached for maintenance when the address modification apparatus 100 fails.

The structure of the address modification apparatus 100 will be specifically described below.

As shown in fig. 2, the first case 201 and the second case 202 are respectively disposed at the top and bottom of the main board 203 for protecting the main board 203; the USB interface 204 is disposed on the motherboard 203, and is used for powering the address modification device 100 and connecting to a PC terminal; the dial switch 205 is disposed on the main board 203, and is used for configuring the baud rate of the slave device and the terminal matching resistance of the slave device; the interface terminal 206 is disposed on the motherboard 203 and is used for connecting the analog switch 123 and a main device of the bus; the indicator lamps are disposed on the motherboard 203 and are used for indicating the operating states of the address modification device 100 and the address modification circuit 120, including a first indicator lamp 207 and a first indicator lamp 208.

In some embodiments, the bus is an RS-485 bus and the signal receiver 122 is an RS-485 receiver.

In this embodiment, by setting the bus as the RS-485 bus and setting the signal receiver 122 as the RS-485 receiver, the rate of communication can be ensured, and the stability of the communication system can be maintained.

The bus differential pressure of the master device output is larger than that of the slave device 1, larger than that of the slave device 2, larger than that of the slave device 3, and the bus differential pressure of the slave devices on the bus is sequentially reduced.

In actual implementation, the address modification device 110 simulates the voltage difference amplitude output by the master device, and sends an RS-485 bus command sequence, and the bus voltage difference of the slave device 1 can be set to be greater than or equal to 200mV, and the bus voltage difference of other slave devices is set to be less than 200mV, so that the master device can communicate with the slave device 1 and cannot communicate with other slave devices.

The controller 110 controls the analog switch 123 to switch to the RS-485 receiver, receives bus data, and determines that communication is successful if normal data return is received.

The address modifying means 110 sends an address modifying instruction after successful communication with the slave device 1, modifying the address of the slave device 1 so that it does not collide with the existing address of the bus.

If normal data is not received, the analog master device raises the amplitude of the output bus voltage difference, the bus voltage difference between the slave device 1 and the slave device 2 can be set to be greater than or equal to 200mV, the bus voltage difference between other slave devices is smaller than 200mV, and at the moment, the master device can communicate with the slave device 1 and the slave device 2 and cannot communicate with other slave devices.

Since the address of the slave device 1 has been modified, the master device can now communicate with the slave device 2 alone normally.

Repeating the above operation until all device addresses of the bus are modified.

In actual implementation, the common communication baud rate may be selected by the dial switch 205 on the motherboard 203, and whether the matching resistor is needed may be selected by the dial switch 205 on the motherboard 203.

A specific embodiment is described below.

The address modification apparatus 100 includes a controller 110 and at least one address modification circuit 120.

The controller 110 and at least one address modification circuit 120 are located on the motherboard 203, with one end of the address modification circuit 120 being connected to the controller 110 and the other end being interfaced with the bus's host device.

The address modification circuit 120 includes a digital-to-analog converter 121, a signal receiver 122, and an analog switch 123, the analog switch 123 being used to connect with the digital-to-analog converter 121 or the signal receiver 122.

In this embodiment, the controller 110 controls the analog switch 123 to connect with the digital-analog converter 121, controls the digital-analog converter 121 to perform the simulation of the bus signal, and transmits the simulated target analog signal to the slave device, and the controller 110 controls the analog switch 123 to connect with the signal receiver 122, and the target slave device needing to modify the address responds to the feedback signal of the target analog signal to the signal receiver 122, so that the controller 110 can send an address modification instruction to the target slave device to perform the address modification.

Take the RS-485 bus as an example.

The controller 110 receives an external PC end instruction through the USB interface 204, at this time, the first indicator lamp 207 and the first indicator lamp 208 are turned on, the controller 110 controls the voltage difference amplitude output by the digital-analog converter 121 main device, sends an RS-485 bus instruction sequence, sets the bus voltage difference of the slave device 1 to be greater than or equal to 200mV, and sets the bus voltage difference of the slave device 2 and the slave device 3 and … to be less than 200mV.

The address modifying means 110 communicates with the slave device 1 alone, the address modifying means 110 receiving a feedback signal from the slave device 1 and sending an address modifying instruction to the slave device 1, modifying the address of the slave device 1 so that it does not collide with the existing address of the bus.

The voltage difference amplitude of the master device output simulated by the digital-to-analog converter 121 is raised so that the bus voltage difference between the slave device 1 and the slave device 2 is greater than or equal to 200mV, the bus voltage difference between the slave device 3 and the slave device 4 and the slave device … is less than 200mV, and the address modifying device 110 is communicated with the slave device 2 independently because the address of the slave device 1 has been modified, the address modifying device 110 receives a feedback signal of the slave device 2, sends an address modifying instruction to the slave device 2, and modifies the address of the slave device 2 so as not to conflict with the existing address of the bus.

Repeating the above operation until all device addresses of the bus are modified.

In this embodiment, by setting the amplitude of the voltage difference outputted from the master device simulated by the digital-to-analog converter 121, the slave devices are individually communicated, and the addresses of the slave devices are sequentially modified, so that the problem of address collision between the bus slave devices is solved, and normal communication between the devices can be realized.

The embodiment of the application also provides an address modification method.

The execution body of the address modification method provided in the embodiment of the present application may be the address modification apparatus 100 described above, or may be an electronic device or a functional module or a functional entity in the electronic device that can implement the address modification method, and the address modification method provided in the embodiment of the present application is described below by taking the electronic device as an execution body as an example.

The address modification method is used for modifying addresses of slave devices on a bus, wherein the bus comprises a master device and a plurality of slave devices in a hand-held topology structure.

As shown in fig. 3, the address modification method includes: step 310, step 320 and step 330.

Step 310, outputting a first target analog signal to a bus.

The first target analog signal is used for simulating the voltage difference amplitude of the main equipment.

In this step, the first target analog signal may be controlled by the controller 110 of the address modification device 100 to make an analog output by the digital-to-analog converter 121.

When the first target analog signal is output to the bus, all the slave devices in the bus may receive the first target analog signal.

Step 320, receiving a feedback signal from the first target slave device in response to the first target analog signal.

Wherein the first target slave device is one slave device responding to the first target analog signal from among the plurality of slave devices.

It should be noted that, the first target slave device responds to the first target analog signal, and the other slave devices do not respond to the first target analog signal.

In actual implementation, the feedback signal of the first target slave device in response to the first target analog signal may be sent to the address modification device 100, so as to implement separate communication between the first target slave device and the address modification device 100.

Step 330, sending a first address modification instruction to the first target slave device.

The first address modification instruction is used for modifying the address of the first target slave device.

In actual execution, the address of the first target slave device may be modified by the address modification apparatus 100 sending a first address modification instruction to the first target slave device.

According to the address modification method provided by the embodiment of the application, the address modification of the single slave device is realized by outputting the first target analog signal and receiving the response feedback signal, establishing communication with the first target slave device in the bus and sending the address modification instruction to the first target slave device, so that the problem of address conflict of the slave devices on the bus can be solved.

It should be noted that, due to the internal resistance of the bus cable, when the address modification is performed on other slave devices, the analog signal may be increased, so that the other slave devices may communicate with the address modification apparatus 100.

In some embodiments, after sending the first address modification instruction to the first target slave device, the method further comprises:

outputting a second target analog signal to the bus, the second target analog signal being greater than the first target analog signal;

receiving a feedback signal of the second target slave device in response to the second target analog signal, wherein the input end of the second target slave device is connected with the output end of the first target slave device;

and sending a second address modification instruction to the second target slave device, wherein the second address modification instruction is used for modifying the address of the second target slave device.

In this embodiment, the second target slave device may be caused to communicate with the address modification apparatus 100 by outputting a second target analog signal that is greater than the first target analog signal.

In actual implementation, the input end of the second target slave device is connected with the output end of the first target slave device, the first target slave device receives the second target analog signal and then transmits the second target analog signal to the second target slave device through the hand-held structure, and the signal received by the second target slave device is smaller than the signal received by the first target slave device due to the existence of the internal resistance of the bus cable.

When the second analog signal is output, the address modifying apparatus 100 may communicate with the second target slave device alone to modify the address of the second target slave device, because the address of the first target slave device has already been modified.

In actual implementation, the address of the third target slave device may be modified by outputting a third analog signal that is greater than the second analog signal, in communication with the third target slave device, wherein an input of the third target slave device is connected to an output of the second target slave device.

And repeating the above operations, and sequentially modifying the addresses of the slave devices until the address modification of all the slave devices is completed.

It will be appreciated that due to the internal resistance of the bus cable, the differential pressure received by the slave devices connected in turn will gradually decrease, and address modification of all slave devices can be achieved by gradually raising the differential pressure.

A specific embodiment is described below.

As shown in FIG. 4, address modification apparatus 100 simulates the magnitude of the voltage difference, assuming that starting from 201mV, an RS-485 bus sequence is sent such that the bus voltage difference at slave 1 is greater than or equal to 200mV, and slave 2, slave 3, … …, slave n, has a bus voltage difference <200mV, address modification apparatus 100 can communicate with device 1 while not communicating normally with other slaves.

The controller 110 controls the analog switch 123 to switch to the signal receiver 122 to receive the bus data, and when the normal data is received, the communication is judged to be successful, the digital-analog converter 121 is switched to transmit the mode, and the address modifying instruction is transmitted to modify the address of the slave device 1 so as not to conflict with the existing address of the bus.

If no normal signal is received, digital to analog converter 121 raises the bus voltage amplitude, assuming an increment of 1mV is set such that the bus voltage difference at slave 1 and slave 2 is greater than or equal to 200mV, slave 3, slave 4 … … and slave n are less than 200mV, address modification apparatus 100 may communicate with slave 1 and slave 2, but address modification apparatus 100 may communicate with slave 2 alone to send an address modification command to modify the address of slave 2 since the address of slave 1 has been modified in the previous step.

The digital-to-analog converter 121 continuously raises the bus voltage amplitude, sequentially modifies the addresses of the slave devices until the address modification of all the slave devices is completed, and solves the problem of bus slave device address conflict.

In this embodiment, by simulating the bus voltage difference amplitude, and communicating with the slave devices individually, the addresses of the slave devices are modified in turn, so that the problem of address conflicts of the slave devices on the bus can be solved.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.

In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", etc. are based on the orientation or positional relationship shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element in question must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.

In the description of the application, a "first feature" or "second feature" may include one or more of such features.

In the description of the present application, "plurality" means two or more.

In the description of the application, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact with each other by another feature therebetween.

In the description of the application, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature.

In the description of the present specification, reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the application, the scope of which is defined by the claims and their equivalents.

Claims (14)

1. An address modification apparatus for modifying an address of a slave device on a bus, the bus comprising a master device and a plurality of slave devices in a hand-held topology, the address modification apparatus comprising:

a controller;

the address modification circuit comprises a digital-to-analog converter and a signal receiver, one end of the address modification circuit is connected with the controller, and the other end of the address modification circuit is used for being connected with a main equipment interface of the bus;

the controller is used for controlling the digital-to-analog converter to output a target analog signal, and receiving a feedback signal of the target slave device responding to the target analog signal through the signal receiver; the controller is further configured to send an address modification instruction to the target slave device to modify an address of the target slave device, where the target slave device is one of the plurality of slave devices that responds to the target analog signal.

2. The address modifying apparatus of claim 1, wherein the address modifying circuit further comprises an analog switch, the digital-to-analog converter being connected between the controller and the analog switch, the signal receiver being connected between the controller and the analog switch, the analog switch being for connecting the host device interface, the analog switch being for switching the bus to connect with the digital-to-analog converter or to connect with the signal receiver.

3. An address modifying device as claimed in claim 2, wherein the end of the analogue switch to which the master device is interfaced is provided with an interface terminal.

4. An address modifying device as claimed in any one of claims 1 to 3, wherein the address modifying device comprises: and the controller and the at least one address modification circuit are arranged on the main board.

5. The address modifying apparatus of claim 4, wherein the main board is provided with a power-supply communication interface for receiving at least one of a baud rate setting instruction and a slave communication instruction.

6. The address modifying device of claim 5, wherein the powered communication interface is a USB interface.

7. The address modifying apparatus of claim 4, wherein the motherboard is provided with a first dial switch for configuring the baud rate of the slave device.

8. The address modifying apparatus of claim 4, wherein the motherboard is provided with a second dial switch for configuring a termination matching resistor of the slave device.

9. The address modifying device of claim 4, wherein the main board is provided with a first indicator light for indicating an operating state of the address modifying device.

10. The address modifying device of claim 4, wherein the motherboard is provided with at least one second indicator light, the second indicator light being in one-to-one correspondence with the address modifying circuit, the second indicator light being configured to indicate an operating state of the address modifying circuit.

11. The address modification apparatus of claim 4, wherein the address modification apparatus comprises:

the first shell and the second shell are installed in a matched mode, and the main board is located in an accommodating space defined by the first shell and the second shell.

12. An address modifying device as claimed in any one of claims 1 to 3 wherein the bus is an RS-485 bus and the signal receiver is an RS-485 receiver.

13. An address modification method for modifying an address of a slave device on a bus, the bus including a master device of a hand-held topology and a plurality of slave devices, the address modification method comprising:

outputting a first target analog signal to the bus;

receiving a feedback signal of a first target slave device responding to the first target analog signal, wherein the first target slave device is one slave device responding to the first target analog signal in a plurality of slave devices;

and sending a first address modification instruction to the first target slave device, wherein the first address modification instruction is used for modifying the address of the first target slave device.

14. The address modification method of claim 13, wherein after said sending a first address modification instruction to said first target slave device, the method further comprises:

outputting a second target analog signal to the bus, the second target analog signal being greater than the first target analog signal;

receiving a feedback signal of a second target slave device responding to the second target analog signal, wherein the input end of the second target slave device is connected with the output end of the first target slave device;

and sending a second address modification instruction to the second target slave device, wherein the second address modification instruction is used for modifying the address of the second target slave device.