CN116962599A - Image acquisition interface device, method for docking image acquisition equipment and chip - Google Patents

Image acquisition interface device, method for docking image acquisition equipment and chip Download PDF

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Publication number
CN116962599A
CN116962599A CN202310663211.2A CN202310663211A CN116962599A CN 116962599 A CN116962599 A CN 116962599A CN 202310663211 A CN202310663211 A CN 202310663211A CN 116962599 A CN116962599 A CN 116962599A
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China
Prior art keywords
interface
image acquisition
mipi
module
signal channels
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CN202310663211.2A
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Chinese (zh)
Inventor
范建威
黄国椿
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Rockchip Electronics Co Ltd
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Rockchip Electronics Co Ltd
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Priority to CN202310663211.2A priority Critical patent/CN116962599A/en
Publication of CN116962599A publication Critical patent/CN116962599A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268—Signal distribution or switching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R27/00—Coupling parts adapted for co-operation with two or more dissimilar counterparts
    • H01R27/02—Coupling parts adapted for co-operation with two or more dissimilar counterparts for simultaneous co-operation with two or more dissimilar counterparts
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus

Abstract

The present application relates to the field of image processing technologies, and in particular, to an image acquisition interface device, a method for docking an image acquisition device, and a chip. The image acquisition interface device includes: the switchable interface module comprises a plurality of signal channels, is configured to be electrically coupled to an output interface of the image acquisition module, and is configured to switch mapping of the plurality of signal channels according to the type of the output interface of the image acquisition module so as to acquire image data sent from the output interface of the image acquisition module. According to the technical scheme, the interface types of the image acquisition modules can be compatible through one seat, and the manufacturing cost of the electronic equipment and the complexity of interface wiring are reduced.

Description

Image acquisition interface device, method for docking image acquisition equipment and chip
Technical Field
The present application relates to the field of image processing technologies, and in particular, to an image acquisition interface device, a method for docking an image acquisition device, and a chip.
Background
With the rapid development of artificial intelligence, machine vision and computer vision technologies, people have higher and higher requirements on images, and the image pixel and frame rate of cameras and display screens of consumer electronics are also improved. Meanwhile, with the increase of application scenes, the application of multiple cameras is also becoming wider and wider.
In the related art, corresponding seats are arranged according to the types of interfaces of the image acquisition module, and the same seat cannot be compatible with multiple types of interfaces. Thus, if the electronic device needs to use multiple types of interfaces, multiple types of seats need to be provided. Furthermore, the volume of the electronic equipment is increased, the manufacturing cost is increased, and the complexity of interface wiring is improved.
Disclosure of Invention
The application provides an image acquisition interface device, a method for docking image acquisition equipment and a chip, which can simultaneously be compatible with interface types of various image acquisition modules through one image acquisition interface seat, and reduce the manufacturing cost of electronic equipment and the complexity of interface wiring.
In a first aspect, an embodiment of the present application proposes an image acquisition interface device. The device comprises: the switchable interface module comprises a plurality of signal channels, is configured to be electrically coupled to an output interface of the image acquisition module, and is configured to switch mapping of the plurality of signal channels according to the type of the output interface of the image acquisition module so as to acquire image data sent from the output interface of the image acquisition module.
In some embodiments, the type of output interface of the image acquisition module comprises MIPI-DPHY or MIPI-CPHY, and the switchable interface module comprises at least 10 signal channels.
In some embodiments, the switchable interface module is configured to: and if the output interface of the image acquisition module is an MIPI-DPHY interface, mapping of 10 signal channels in the plurality of signal channels is time-division multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-DPHY interface.
In some embodiments, the switchable interface module is configured to: and if the output interface of the image acquisition module is an MIPI-CPHY interface, mapping of 9 signal channels in the plurality of signal channels is time-division multiplexed into 3 groups of 3-line signal channels corresponding to the MIPI-CPHY interface.
In some embodiments, the switchable interface module comprises: a first sub-interface module comprising 10 signal channels configured to be electrically coupled to an output interface of a first image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to an output interface corresponding to the first image acquisition module, the output interface of the first image acquisition module comprising a MIPI-DPHY interface or a MIPI-CPHY interface; and a second sub-interface module comprising 10 signal channels configured to be electrically coupled to an output interface of a second image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to correspond to the output interface of the second image acquisition module, the output interface of the second image acquisition module comprising a MIPI-DPHY interface or a MIPI-CPHY interface.
In some embodiments, the apparatus further comprises: a main control module electrically coupled to the switchable interface module and configured to receive the image data from the switchable interface module and decode and verify the image data to output processed image data; an acquisition module electrically coupled to the main control module and configured to acquire the processed image data and store the processed image data in a memory.
In some embodiments, the apparatus further comprises: a detachable interface module electrically coupled to an output interface of an image acquisition module of the type MIPI-DPHY interface and configured to activate one or more pairs of clock lines to electrically couple to one or more image acquisition modules.
In some embodiments, the detachable interface module includes 4 pairs of data lines and 2 pairs of clock lines and is configured to: the MIPI-DPHY interface of an image acquisition module is accessed through 4 pairs of data lines and 1 pair of clock lines; or the MIPI-DPHY interface of one image acquisition module is accessed through 2 pairs of data lines and 1 pair of clock lines, and the MIPI-DPHY interface of the other image acquisition module is accessed through the other 2 pairs of data lines and the other 1 pair of clock lines.
In a second aspect, an embodiment of the present application proposes a method for docking an image acquisition device. The method comprises the following steps: acquiring the type of an output interface of an image acquisition module to be connected; and according to the type, mapping pins of a plurality of signal channels of the switchable interface module to the output interface, wherein the output interface is an MIPI-DPHY interface or an MIPI-CPHY interface, and the switchable interface module comprises at least 10 signal channels.
In some embodiments, associating pin maps of a plurality of signal channels of the switchable interface module with the output interface according to the type includes: and if the output interface of the image acquisition module is an MIPI-DPHY interface, the 10 signal channels are multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-DPHY interface in a time-sharing mode.
In some embodiments, associating pin maps of a plurality of signal channels of the switchable interface module with the output interface according to the type includes: and if the output interface of the image acquisition module is an MIPI-CPHY interface, the 9 signal channels in the 10 signal channels are multiplexed into 3 groups of 3-line signal channels corresponding to the MIPI-CPHY interface in a time-sharing mode.
In a third aspect, an embodiment of the present application proposes a chip comprising an image acquisition interface device as described above.
According to the embodiment of the disclosure, the state type of the switchable interface module is controlled by the control module according to the interface type of the image acquisition module, so that the electronic equipment can be compatible with the interface types of the image acquisition modules through one seat without arranging a plurality of seats according to the interface types, the compatibility of the electronic equipment is improved, and the manufacturing cost and the volume of the electronic equipment are reduced; meanwhile, the complexity of interface wiring is reduced.
The foregoing summary is merely an overview of the present application, and may be implemented according to the text and the accompanying drawings in order to make it clear to a person skilled in the art that the present application may be implemented, and in order to make the above-mentioned objects and other objects, features and advantages of the present application more easily understood, the following description will be given with reference to the specific embodiments and the accompanying drawings of the present application.
Drawings
The drawings are only for purposes of illustrating the principles, implementations, applications, features, and effects of the present application and are not to be construed as limiting the application.
FIG. 1 is a block schematic diagram of an image acquisition interface apparatus according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an image acquisition interface device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of mapping pins of a switchable interface module according to an embodiment of the present application;
FIG. 4 is a diagram of mapping pins of a detachable interface module according to an embodiment of the present application;
fig. 5 is a flow chart of a method for docking an image acquisition device according to an embodiment of the present application.
Fig. 6 is a flow chart of a method for docking an image acquisition device according to an embodiment of the present application.
Detailed Description
In order to describe the possible application scenarios, technical principles, practical embodiments, achievement of the purposes and effects of the present application in detail, the following description is made in conjunction with the specific embodiments listed below and with the accompanying drawings. The embodiments described herein are only for more clearly illustrating the technical aspects of the present application, and thus are only exemplary and not intended to limit the scope of the present application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of the phrase "in various places in the specification are not necessarily all referring to the same embodiment, nor are they particularly limited to independence or relevance from other embodiments. In principle, in the present application, as long as there is no technical contradiction or conflict, the technical features mentioned in each embodiment may be combined in any manner to form a corresponding implementable technical solution.
Unless defined otherwise, technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application pertains; the use of related terms herein is for the purpose of describing particular embodiments only and is not intended to limit the application.
In the description of the present application, the term "and/or" is a representation for describing a logical relationship between objects, which means that three relationships may exist, for example a and/or B, representing: there are three cases, a, B, and both a and B. In addition, the character "/" herein generally indicates that the front-to-back associated object is an "or" logical relationship.
In the present application, terms such as "first" and "second" are used merely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual number, order, or sequence of such entities or operations.
Without further limitation, the use of the terms "comprising," "including," "having," or other like terms in this specification is intended to cover a non-exclusive inclusion, such that a process, method, or article of manufacture that comprises a list of elements does not include additional elements but may include other elements not expressly listed or inherent to such process, method, or article of manufacture.
In the present application, the expressions "greater than", "less than", "exceeding", etc. are understood to exclude this number; the expressions "above", "below", "within" and the like are understood to include this number. Furthermore, in the description of embodiments of the present application, the meaning of "a plurality of" is two or more (including two), and similarly, the expression "a plurality of" is also to be understood as such, for example, "a plurality of" and the like, unless specifically defined otherwise.
As mentioned in the background art, when the electronic device needs to use multiple types of interfaces, multiple types of sockets need to be provided to adapt the interfaces of the respective types of image capturing devices through the multiple types of sockets. Therefore, the electronic equipment is required to be provided with a plurality of seats, the size is increased, the manufacturing cost is increased, and the complexity of interface wiring is improved.
In order to solve at least the problems, the application provides a technical scheme of an image acquisition module which can be compatible with various output interfaces. In some embodiments of the present application, a technical solution is provided that can be compatible with both mipidhy and mipphy image acquisition modules, and only one MIPI-CSI image acquisition interface device is needed to be compatible with the mipidhy interface and the mipphy image acquisition module. The device is provided with a plurality of MIPICIS interfaces, a plurality of image acquisition modules can be connected with the device through a plurality of high-speed physical layer D/CPHY interfaces, and the CPU is connected with the image acquisition modules of the MIPI-DPHY interfaces or the MIPI-CPHY interfaces in an external mode by setting the D/CPHY interfaces to work in a DPHY mode or a CPHY mode. In this way, the device can drive the image acquisition modules of a plurality of MIPI-DPHY interfaces or MIPI-CPHY interfaces at the same time. In addition, the device also comprises an MIPIDPHY interface which can be used for splitting, and one 4-lane MIPI-DPHY interface can be split into 2-lane MIPI-DPHY interfaces for use. In this way, the device can also realize that one MIPI-DPHY seat drives two MIPI-DPHY image acquisition modules, so that the supporting quantity of cameras is expanded.
A detailed implementation of embodiments according to the present disclosure will be described in detail below with reference to exemplary embodiments and in conjunction with the accompanying drawings.
Referring to fig. 1, fig. 1 is a block diagram of an image capturing interface apparatus according to an embodiment of the application, and as shown in fig. 1, the image capturing interface apparatus 100 can switch an interface module 101.
The switchable interface module 101 comprises a plurality of signal channels. The switchable interface module 101 is configured to be electrically coupled to the output interface of the image acquisition module and to switch the mapping of the plurality of signal channels according to the type of the output interface of the image acquisition module to obtain image data transmitted from the output interface of the image acquisition module.
In some embodiments, the type of output interface of the image acquisition module comprises MIPI-DPHY or MIPI-CPHY, and the switchable interface module 101 comprises at least 10 signal channels.
In some embodiments, the switchable interface module 101 is configured to time-division multiplex the mapping of 10 signal channels of the plurality of signal channels into 4 pairs of data differential channels and 1 pair of data differential channels corresponding to the MIPI-DPHY interface if the output interface of the image acquisition module is the MIPI-DPHY interface.
In some embodiments, the switchable interface module 101 is configured to time-division multiplex the mapping of 9 signal channels of the plurality of signal channels into 3 groups of 3-wire signal channels corresponding to the MIPI-CPHY interface if the output interface of the image acquisition module is the MIPI-CPHY interface.
In some embodiments, the switchable interface module 101 may include a first sub-interface module and a second sub-interface module. The first sub-interface module includes 10 signal paths. The first sub-interface module is configured to be electrically coupled to an output interface of the first image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to correspond to the output interface of the first image acquisition module, the output interface of the first image acquisition module including a MIPI-DPHY interface or a MIPI-CPHY interface. The second sub-interface module includes 10 signal paths. The second sub-interface module is configured to be electrically coupled to an output interface of the second image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to correspond to the output interface of the second image acquisition module, the output interface of the second image acquisition module including a MIPI-DPHY interface or a MIPI-CPHY interface.
In some embodiments, the image acquisition interface apparatus 100 may further include a main control module and an acquisition module. The main control module is electrically coupled to the switchable interface module and is configured to receive image data from the switchable interface module and to decode and verify the image data to output processed image data. The acquisition module is electrically coupled to the main control module and is configured to acquire the processed image data and store the processed image data in the memory.
Fig. 2 is a schematic structural diagram of an image capturing interface device according to an embodiment of the present application. As shown in fig. 2, as an example, the image acquisition interface apparatus is included in the CPU and includes two switchable interface modules (mipi/CPHY 0 and mipi/CPHY 1), two detachable interface modules (mipidhy 0 and mipidhy 1), a main control module (mipsi-2 host0 and mipsi-2 host 1), and an acquisition module (VideoIutputCapture).
The main control module is respectively connected with the switchable interface module and the acquisition module. The main control module is responsible for decoding and checking the image data output by the switchable interface module and transmitting the decoded and checked image data to the acquisition module. The acquisition module acquires the image data sent by the main control module and stores the image data in a memory (e.g., DDR module) so as to be taken by the later-stage module. The switchable interface module can be time-division multiplexed into DPHY or CPHY, and the state type of the switchable interface module is controlled and switched by the system according to the interface type of the image acquisition module. The switchable interface module as shown in fig. 2 may be configured to perform the operations or actions of the switchable interface module 101 described with reference to fig. 1.
Fig. 3 is a pin map pictorial diagram of a switchable interface module in accordance with an embodiment of the present application. As shown in fig. 3, the switchable interface module (D/CPHY) includes 10 mapping pins as an example. In fig. 3, "mipi_dphy0_rx_clkp/mipi_cphy0_rx_trio0_a" represents a mapping pin, which can be used as the positive electrode CLKP (mipi_dphy0_rx_clkp) of the differential signal of the DPHY clock channel CLK, or can be multiplexed as trio0A (mipi_cphyy0_rx_trio0_a) of the three A, B, C signals of the CPHYtrio channel 0.
Referring to fig. 3, when the interface of the image acquisition module to be connected is the MIPI-CPHY interface, mipi_cphy0_rx_trio0_a to mipi_cphy0_rx_trio0_ C, MIPI _cphy0_rx_trio1_a to mipi_cphy0_rx_trio1_c and mipi_cphy0_rx_trio2_a to mipi_cphy0_rx_trio2_c in the switchable interface module are multiplexed into 9 signals of the MIPI-CPHY interface, and "no_use" in fig. 3 indicates that the pin map is not used. If the interface of the image acquisition module to be connected is the MIPI-DPHY interface, 10 pins are multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-CPHY interface, for example, mipi_dphy0_rx_d0_ 0P, MIPI _dphy0_rx_d0n in front of the "/" symbol in fig. 3 represents 1 pair of data differential channels, mipi_dphy0_rx_clkp and mipi_dphy0_rx_clkn represents 1 pair of clock differential channels.
In the whole image processing system, the system equipment comprises a plurality of MIPICII-2 controllers, and the MIPICII-2 controllers are responsible for packaging and packaging the codes of the image data and inserting ECC and check codes into the image data stream.
In some embodiments, to increase the number of cameras to which the image acquisition interface apparatus may be connected, the apparatus further comprises a detachable interface module. The detachable interface module is electrically coupled to an output interface of an image acquisition module of the type MIPI-DPHY interface and is configured to activate one or more pairs of clock lines to electrically couple to one or more image acquisition modules.
In some embodiments, the detachable interface module includes 4 pairs of data lines and 2 pairs of clock lines. The detachable interface module is configured to access the MIPI-DPHY interface of one image acquisition module through 4 pairs of data lines and 1 pair of clock lines. Alternatively, the detachable interface module is configured to access the MIPI-DPHY interface of one image acquisition module through 2 pairs of data lines and 1 pair of clock lines, and to access the MIPI-DPHY interface of another image acquisition module through another 2 pairs of data lines and another 1 pair of clock lines.
Fig. 4 is a schematic diagram of mapping pins of a detachable interface module according to an embodiment of the application. As shown in FIG. 4, the detachable interface module (DPHY) includes 12 mapping pins, which includes 4 pairs of data lines and 2 pairs of clock lines (clock lines include: MIPIDPHY0RXCLK0P and MIPIDPHY0RXCLK0N, MIPIDPHY0RXCLK1P and MIPIDPHY0RXCLK1N, data lines include: MIPIDPHY0RXD0P and MIPIDPHY0RXD0N, MIPIDPHY0RXD1P and MIPIDPHY0RXD1N, MIPIDPHY0RXD2P and MIPIDPHY0RXD2N, MIPIDPHY0RXD3P and MIPIDPHY0RXD 3N), as an example.
The detachable interface module has two modes of operation, 4lane mode and 2lane modes (1 lane is shown for differential data lines). When the number of MIPI-DPHY interfaces accessed by the detachable interface module is 1, the working mode is a 4-lane mode, and 4 pairs of data lines and 1 pair of clock lines are used for accessing the MIPI-DPHY interfaces. When the number of MIPI-DPHY interfaces accessed by the detachable interface module is 2, the working mode is a 2-lane mode, and 4 pairs of data lines and 2 pairs of clock lines are used for accessing the MIPI-DPHY interfaces. In this way, the number of supportable cameras of the image acquisition interface device can be increased.
In summary, according to the image capturing interface device of the embodiment of the present application, by providing the switchable interface module, the switchable interface module includes a plurality of signal channels, and is configured to be electrically coupled to the output interface of the image capturing module, and configured to switch the mapping of the plurality of signal channels according to the type of the output interface of the image capturing module; therefore, the electronic equipment does not need to arrange a plurality of seats according to a plurality of interface types, and can be compatible with the interface types of a plurality of image acquisition modules through one seat, so that the compatibility of the electronic equipment is improved, and the manufacturing cost and the volume of the electronic equipment are reduced; meanwhile, the complexity of interface wiring is reduced.
In another aspect, an embodiment of the present application proposes a method for interfacing with an image acquisition device. Fig. 5 is a flow chart of a method for docking an image acquisition device according to an embodiment of the present application. As shown in fig. 5, the method includes the following steps S101 and S102.
Step S101, obtaining the type of an output interface of the image acquisition module to be connected.
Step S102, according to the type, the pin mapping of the plurality of signal channels of the switchable interface module corresponds to an output interface, wherein the output interface is an MIPI-DPHY interface or an MIPI-CPHY interface, and the switchable interface module comprises at least 10 signal channels.
In some embodiments, associating pin maps of a plurality of signal channels of a switchable interface module with an output interface according to a type includes: and if the output interface of the image acquisition module is an MIPI-DPHY interface, the 10 signal channels are time-division multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-DPHY interface.
In some embodiments, associating pin maps of a plurality of signal channels of a switchable interface module with an output interface according to a type includes: and if the output interface of the image acquisition module is an MIPI-CPHY interface, the 9 signal channels in the 10 signal channels are multiplexed into 3 groups of 3-line signal channels corresponding to the MIPI-CPHY interface in a time-sharing mode.
Fig. 6 is a flow chart of a method for docking an image acquisition device according to an embodiment of the present application. As shown in fig. 6, the method includes the following steps, as an example.
Firstly, the system module is initialized, and after the initialization is completed, whether the interface used by the current user is a DPHY interface or a D/CPHY interface is judged.
If the interface used by the current user is the DPHY interface, further judging whether the current user uses the two paths of 2-lane image acquisition modules.
If yes, switching the split interface module MIPIDPHY to a 2 x 2lanemode mode.
If not, switching the split interface module MIPIDPHY to 4lanemode to support a plurality of interfaces.
If the interface used by the current user is the D/CPHY interface, further judging whether the current user uses the DPHY image acquisition module.
If yes, the switchable interface module MIPID/CPHY is switched to DPHYmode.
If not, the switchable interface module MIPID/CPHY is switched to CPHYmode. Thus, switching of the interface modes can be completed.
Then, the image acquisition module is driven, and the acquired image data is stored.
It should be noted that the above description of the image capturing interface apparatus is also applicable to the method for docking the image capturing device, and will not be described herein.
In order to implement the above embodiments, the embodiments of the present application provide a chip. Comprising an image acquisition interface device as described above.
Finally, it should be noted that, although the embodiments have been described in the text and the drawings, the scope of the application is not limited thereby. The technical scheme generated by replacing or modifying the equivalent structure or equivalent flow by utilizing the content recorded in the text and the drawings of the specification based on the essential idea of the application, and the technical scheme of the embodiment directly or indirectly implemented in other related technical fields are included in the patent protection scope of the application.

Claims (12)

1. An image acquisition interface device, comprising:
the switchable interface module comprises a plurality of signal channels, is configured to be electrically coupled to an output interface of the image acquisition module, and is configured to switch mapping of the plurality of signal channels according to the type of the output interface of the image acquisition module so as to acquire image data sent from the output interface of the image acquisition module.
2. The image acquisition interface apparatus of claim 1, wherein the type of output interface of the image acquisition module comprises MIPI-DPHY or MIPI-CPHY, and the switchable interface module comprises at least 10 signal channels.
3. The image acquisition interface apparatus of claim 2, wherein the switchable interface module is configured to:
and if the output interface of the image acquisition module is an MIPI-DPHY interface, mapping of 10 signal channels in the plurality of signal channels is time-division multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-DPHY interface.
4. The image acquisition interface apparatus of claim 2, wherein the switchable interface module is configured to:
and if the output interface of the image acquisition module is an MIPI-CPHY interface, mapping of 9 signal channels in the plurality of signal channels is time-division multiplexed into 3 groups of 3-line signal channels corresponding to the MIPI-CPHY interface.
5. The image acquisition interface apparatus of claim 1, wherein the switchable interface module comprises:
a first sub-interface module comprising 10 signal channels configured to be electrically coupled to an output interface of a first image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to an output interface corresponding to the first image acquisition module, the output interface of the first image acquisition module comprising a MIPI-DPHY interface or a MIPI-CPHY interface; and
a second sub-interface module comprising 10 signal channels configured to be electrically coupled to an output interface of a second image acquisition module and configured to switch a mapping of a selected signal channel of the 10 signal channels to correspond to the output interface of the second image acquisition module, the output interface of the second image acquisition module comprising a MIPI-DPHY interface or a MIPI-CPHY interface.
6. The image acquisition interface apparatus of claim 1, further comprising:
a main control module electrically coupled to the switchable interface module and configured to receive the image data from the switchable interface module and decode and verify the image data to output processed image data;
an acquisition module electrically coupled to the main control module and configured to acquire the processed image data and store the processed image data in a memory.
7. The image acquisition interface apparatus of claim 1, further comprising:
a detachable interface module electrically coupled to an output interface of an image acquisition module of the type MIPI-DPHY interface and configured to activate one or more pairs of clock lines to electrically couple to one or more image acquisition modules.
8. The image acquisition interface apparatus of claim 7, wherein the detachable interface module includes 4 pairs of data lines and 2 pairs of clock lines, and is configured to:
the MIPI-DPHY interface of an image acquisition module is accessed through 4 pairs of data lines and 1 pair of clock lines; or alternatively
The MIPI-DPHY interface of one image acquisition module is accessed through 2 pairs of data lines and 1 pair of clock lines, and the MIPI-DPHY interface of the other image acquisition module is accessed through the other 2 pairs of data lines and the other 1 pair of clock lines.
9. A method for interfacing with an image acquisition device, comprising:
acquiring the type of an output interface of an image acquisition module to be connected;
and according to the type, mapping pins of a plurality of signal channels of the switchable interface module to the output interface, wherein the output interface is an MIPI-DPHY interface or an MIPI-CPHY interface, and the switchable interface module comprises at least 10 signal channels.
10. The method of claim 9, wherein associating pin maps of a plurality of signal channels of the switchable interface module with the output interface according to the type comprises:
and if the output interface of the image acquisition module is an MIPI-DPHY interface, the 10 signal channels are multiplexed into 4 pairs of data differential channels and 1 pair of clock differential channels corresponding to the MIPI-DPHY interface in a time-sharing mode.
11. The method of claim 9, wherein associating pin maps of a plurality of signal channels of the switchable interface module with the output interface according to the type comprises:
and if the output interface of the image acquisition module is an MIPI-CPHY interface, the 9 signal channels in the 10 signal channels are multiplexed into 3 groups of 3-line signal channels corresponding to the MIPI-CPHY interface in a time-sharing mode.
12. A chip comprising an image acquisition interface device according to any one of claims 1 to 8.
CN202310663211.2A 2023-06-06 2023-06-06 Image acquisition interface device, method for docking image acquisition equipment and chip Pending CN116962599A (en)

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