CN116961153A

CN116961153A - Abnormality detection method, abnormality detection device, abnormality detection terminal, abnormality detection program, and abnormality detection program

Info

Publication number: CN116961153A
Application number: CN202210403570.XA
Authority: CN
Inventors: 李志杰
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2022-04-18
Filing date: 2022-04-18
Publication date: 2023-10-27

Abstract

The present application relates to an abnormality detection method, apparatus, terminal, storage medium, and program product. The method comprises the following steps: detecting whether the state of the current limiting chip is abnormal or not in the battery charging process; if the state of the current limiting chip is abnormal, controlling the current limiting chip to stop working; the battery comprises a current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core. The method can improve the safety of the battery in the charging process.

Description

Abnormality detection method, abnormality detection device, abnormality detection terminal, abnormality detection program, and abnormality detection program

Technical Field

The present application relates to the field of battery technologies, and in particular, to an abnormality detection method, apparatus, terminal, storage medium, and program product.

Background

Aiming at the quick charge technology of the battery, a quick charge scheme adopting a single battery cell and a quick charge scheme adopting multiple battery cells exist at present. For the fast charging scheme adopting multiple cells, a series-connection multiple-cell technology and a parallel-connection multiple-cell technology exist at present, wherein the parallel-connection double-cell technology can adapt to a folding screen with a new form of a terminal.

For the parallel dual-cell technology, a plurality of cells are parallel and can form a loop for mutual charging. Generally, in order to ensure the safety of charging or discharging the battery, a current limiting chip is connected in series in front of the battery cell to control the input current or the output current of the battery cell.

However, the above methods in some cases charge the battery, still present a safety risk.

Disclosure of Invention

The embodiment of the application provides an abnormality detection method, an abnormality detection device, a abnormality detection terminal, a storage medium and a program product, which can improve the safety of a battery charging process.

In a first aspect, there is provided an abnormality detection method including:

detecting whether the state of the current limiting chip is abnormal or not in the battery charging process;

if the state of the current limiting chip is abnormal, controlling the current limiting chip to stop working;

the battery comprises the current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core.

In a second aspect, there is provided an abnormality detection apparatus including:

the detection module is used for detecting whether the state of the current limiting chip is abnormal in the battery charging process;

The control module is used for controlling the current limiting chip to stop working if the state of the current limiting chip is abnormal; the battery comprises the current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core.

In a third aspect, there is provided a terminal comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of the method of the first aspect described above.

In a fourth aspect, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method of the first aspect described above.

In a fifth aspect, there is provided a computer program product comprising a computer program which, when executed by a processor, implements the steps of the method of the first aspect described above.

The abnormality detection method, the abnormality detection device, the abnormality detection terminal, the abnormality detection storage medium and the abnormality detection program product are used for detecting whether the state of the current limiting chip is abnormal or not in the battery charging process, and if the state of the current limiting chip is abnormal, the current limiting chip is controlled to stop working; the battery comprises a current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core. In the method, whether the current limiting chip connected in series with the first electric core is abnormal or not can be detected in the battery charging process, and the current limiting chip is stopped to work when the abnormality occurs, so that the current passing through the first electric core can not flow excessively, the pressure difference between the first electric core and the second electric core which are connected in parallel can not be excessively large, the problem that the current limiting chip is broken down due to excessively large pressure difference can be avoided, and the safety of the battery charging process can be ensured.

Drawings

In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a diagram of an application environment for an anomaly detection method in one embodiment;

FIG. 2 is a flow chart of an anomaly detection method in one embodiment;

FIG. 3 is a block diagram of a circuit for charging a dual cell in one embodiment;

FIG. 4 is a flowchart of an abnormality detection method according to another embodiment;

FIG. 5 is a flowchart of an abnormality detection method according to another embodiment;

FIG. 6 is a flowchart of an abnormality detection method according to another embodiment;

FIG. 7 is a flowchart of an abnormality detection method according to another embodiment;

FIG. 8 is a flowchart of an abnormality detection method in another embodiment;

FIG. 9 is a flowchart of an abnormality detection method in another embodiment;

FIG. 10 is a block diagram showing the configuration of an abnormality detection apparatus in one embodiment;

Fig. 11 is a block diagram showing an internal structure of a terminal in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

Before introducing the technical scheme of the embodiment of the application, explanation is made on proper nouns related to the application:

MCU: microcontroller Unit, a micro control unit;

ADC: analog-to-digital converter, analog-to-digital conversion channels;

PCB: printed Circuit Board, printed circuit board;

ADSP: analog Digital Signal Processor, analog digital signal processing chip;

VOOCPHY: the physical logic module is used for receiving and sending the vooc quick charge information;

AP: android Processor, running an operating system processor of the android;

VBUS: voltage bus, voltage output by the adapter;

IBUS: the current output by the adapter;

load switch: load conversion;

charge pump: a charge pump.

Currently, in the parallel dual-cell technology, a plurality of cells are parallel, and a loop can be formed between the cells to charge each other. Generally, in order to ensure the safety of charging or discharging the battery, a current limiting chip is connected in series in front of the battery cell to control the input current or the output current of the battery cell. Taking two cells in parallel in a charge-discharge circuit as an example, if no current limiting chip is used for controlling the current in the charge-discharge circuit, the voltage difference between the two cells is uncontrollable, in extreme cases, the small cells can be uncontrollably and rapidly filled (the large current floats and is not filled when the large current is judged to be full actually), the current flowing through the large cells is small, and when the small cells are judged to be full, the large cells have much capacity which is not full, namely the small cells float and are judged to be full, and the large cells are small in current and are not full. Thus, the battery is controlled to exit the fast charging (also simply called fast charging) process, on one hand, the normal charging (also simply called normal charging) can be caused for a long time, and the fast charging effect can not be achieved; on the other hand, a current limiting chip is needed to control the pressure difference between the large battery cell and the small battery cell, if the pressure difference is too large, at the moment of pulling out the power adapter, the pressure difference at two ends of the current limiting chip is too large, so that the risk of breaking down the current limiting chip and the safety risk of charging and overcharging the battery with large current are caused, and even the battery bulge safety accident is seriously caused. It follows that the above method in some cases charges the battery, still presenting a safety risk.

The abnormality detection method provided by the embodiment of the application can be applied to an application environment shown in fig. 1. Wherein the power adapter 102 may communicate with the terminal 104. For example, during charging of the terminal 104, the power adapter 102 may communicate data related to a charging protocol with the terminal 104, etc. The power adapter 102 may communicate with the terminal 104 by wired or wireless communication. The terminal 104 may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, internet of things devices and portable wearable devices, and the internet of things devices may be smart speakers, smart televisions, smart air conditioners, smart vehicle devices, and the like. The portable wearable device may be a smart watch, smart bracelet, headset, or the like.

In one embodiment, as shown in fig. 2, an abnormality detection method is provided, and the method is applied to the terminal in fig. 1, for example, and the method may include the following steps:

s202, detecting whether the state of the current limiting chip is abnormal in the process of charging the battery.

In this step, the number of the current limiting chips may be one or more (for example, two or three, etc.). The first battery cell and the second battery cell included in the battery may also be one or more, for example, the battery may include a first battery cell and a plurality of second battery cells, or the battery may include a plurality of first battery cells and a plurality of second battery cells, etc.

Taking the example of a battery including two cells (e.g., the first cell and the second cell above) and two current limiting chips, a typical charging circuit can be seen in fig. 3. In fig. 3, when the battery starts to charge quickly (also simply referred to as fast charge), the IBUS (e.g., current coming out of the USB) of the power adapter is split into two paths to reach two cells, one of which is vbus— Load switch — charge pump— second cell; the other path is VBUS & lt- & gt Load switch & lt- & gt charge pump & lt- & gt current limiting chip & lt- & gt first battery cell. The two current limiting chips are connected in parallel and then connected in series in front of the first electric core, the current flowing through the first electric core is larger, the current limiting value of the small current limiting chip is set, the current of the first electric core is smaller, and the excessive current flows into the second electric core, and vice versa. The current limiting chip may be a bidirectional current limiting chip capable of bidirectional current limiting, and may be denoted as bidirectional current limiting chip 1 and bidirectional current limiting chip 2. In this way, the input current and the output current of the whole battery can be controlled, so that the voltage difference between the first battery cell and the second battery cell is in a controllable range. Therefore, it is important to detect whether the current limiting chip is abnormal or not.

In this embodiment, when detecting whether the state of the current-limiting chip is abnormal, whether the state of the current-limiting chip is abnormal may be detected when the battery is in a normal charging state, whether the state of the current-limiting chip is abnormal may be detected when the battery is in a fast charging state, or whether the state of the current-limiting chip is abnormal may be detected when other charging conditions, which is not particularly limited.

Specifically, the step can obtain whether the state of the current limiting chip is abnormal or not by comparing the value set on the current limiting chip with the actually measured value; or, whether the state of the current limiting chip is abnormal or not can be obtained by externally connecting other equipment on the current limiting chip or in the charging circuit and measuring the parameters of the current limiting chip or the parameters in the charging circuit by the other equipment; and the detection can be performed in other modes, so that whether the state of the current-limiting chip is abnormal or not can be obtained.

S204, if the state of the current-limiting chip is abnormal, controlling the current-limiting chip to stop working.

In this step, when the obtained state of the current-limiting chip is abnormal, the enable of the current-limiting chip may be pulled down to control the current-limiting chip to fail to operate, i.e. stop operating. And if the state of at least one current limiting chip is abnormal, controlling all the current limiting chips to stop working. Of course, if the obtained current limiting chip is in a normal state, the current limiting chip does not need to be operated, and the current limiting chip can work normally.

In addition, when the state of the current limiting chip is abnormal, optionally, if the state of the current limiting chip is abnormal and the battery is currently in a fast charge state, the battery is controlled to be switched from the fast charge state to a common charge state. That is, if the state of the current limiting chip is abnormal during the fast charging process of the battery, the battery needs to be switched from the fast charging state to the normal charging state, so as to effectively reduce the safety risk during the charging process of the battery.

In the abnormality detection method, whether the state of the current-limiting chip is abnormal is detected in the battery charging process, and if the state of the current-limiting chip is abnormal, the current-limiting chip is controlled to stop working; the battery comprises a current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core. In the method, whether the current limiting chip connected in series with the first electric core is abnormal or not can be detected in the battery charging process, and the current limiting chip is stopped to work when the abnormality occurs, so that the current passing through the first electric core can not flow excessively, the pressure difference between the first electric core and the second electric core which are connected in parallel can not be excessively large, the problem that the current limiting chip is broken down due to excessively large pressure difference can be avoided, and the safety of the battery charging process can be ensured.

The above embodiments refer to the detection of the state of the current limiting chip during the battery charging process, and the following embodiments describe in detail how to detect whether the state of the current limiting chip is abnormal.

In another embodiment, another abnormality detection method is provided, and based on the above embodiment, as shown in fig. 4, the step S202 may include the following steps:

s302, acquiring state parameters of a current limiting chip in a battery charging process; the state parameter includes at least one of a first current limit value of the current limiting chip, a voltage value across the current limiting chip, and a bus state value recorded in a register of the current limiting chip.

The first current limiting value of the current limiting chip refers to a current limiting value set on the current limiting chip. Optionally, if the battery includes a plurality of current limiting chips, the first current limiting value is a sum of current limiting values of the current limiting chips; generally, before the battery is charged, a corresponding current limiting value may be set for each current limiting chip in advance, and the set current limiting values are summed to obtain a first current limiting value. In addition, if the battery includes a current limiting chip, the first current limiting value is a current limiting value of the current limiting chip; if there is only one current limiting chip, the current limiting value set on the current limiting chip is the first current limiting value.

The voltage values at the two ends of the current limiting chip can be obtained through measurement of an external voltmeter, can be obtained through multiplication of the first current limiting value of the current limiting chip and the internal resistance of the current limiting chip, can be obtained in other modes, is not particularly limited, and can be obtained in any way.

For the bus state value recorded in the register of the current limiting chip, the bus state value is used for indicating I ² Whether the state of the C-bus is abnormal, e.g. the bus state value being 0 indicates I ² The state of the C bus is normal, and when the bus state value is 1, I is represented ² The state of the C bus is abnormal.

S304, determining whether the state of the current-limiting chip is abnormal according to the state parameters.

In this step, after the state parameters of the current-limiting chip are obtained, it may be determined whether the state of the current-limiting chip is abnormal according to at least one of the state parameters. For example, if one state parameter is abnormal, the state of the current-limiting chip can be considered to be abnormal; or if the two state parameters are abnormal, the state of the current limiting chip is considered to be abnormal; or if all the state parameters are abnormal, the state of the current-limiting chip is considered to be abnormal.

The method for determining whether the state of the current limiting chip is abnormal through the state parameter may be determined by comparing the state parameter with a pre-stored standard state parameter of the current limiting chip, or may be determined by comparing the state parameter with other parameters (such as current) in the circuit, or may be determined in other manners, which is not limited specifically herein.

In this embodiment, by acquiring a state parameter of the current-limiting chip and determining whether the state of the current-limiting chip is abnormal according to the state parameter, the state parameter includes a current-limiting value, a voltage value, and a bus state value in a register. The state of the current limiting chip is determined through various state parameters, so that the accuracy of the determined state of the current limiting chip can be improved, and the safety of the battery charging process can be further ensured.

The above embodiments refer to a specific process of determining whether the state of the current limiting chip is abnormal according to the state parameters, which may include various parameters, such as a current limiting value, a voltage value, and a bus state value in a register.

In another embodiment, another abnormality detection method is provided, and if the state parameter includes the first current limit value, based on the above embodiment, as shown in fig. 5, the step S304 may include the following steps:

s402, acquiring a battery cell current value; the cell current value includes at least one of a first current value through the first cell and a second current value through the second cell.

In this step, the current value passing through the cells may be measured by an ammeter or the like, where the current value passing through the first cell is denoted as a first current value and the current value passing through the second cell is denoted as a second current value.

S404, determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the cell current value.

In this step, after the cell current value and the first current limit value of the current limiting chip are obtained, it is possible to detect whether the current limiting chip is abnormal. The detection method includes a method of detecting using the first current value and the first current limit value, a method of detecting using the second current value and the first current limit value, or a plurality of methods of detecting using the first current value, the second current value, and the first current limit value, and the like, and the detection processes of these methods will be described in detail below.

1) Optionally, for the detecting manner using the first current value and the first current limiting value, if the current value of the battery cell includes the first current value, determining a first current threshold according to the first current limiting value and a preset first foolproof threshold; and determining whether the state of the current limiting chip is abnormal according to the comparison result of the first current value and the first current threshold value.

Here, the first fool-proof threshold may be set according to practical situations, and may be, for example, 100ms, 200ms, or the like. The first current threshold value may be a sum value obtained by summing the first current limit value and the first fool-proof threshold value.

Specifically, after the first current value and the first current threshold value are obtained, the magnitudes of the first current value and the first current threshold value may be compared, and a magnitude comparison result of the first current value and the first current threshold value may be obtained. The comparison of the magnitudes may be performed by means of a difference comparison, or may be performed by means of a quotient comparison, although other comparison methods are also possible. The comparison of the difference values can be performed by firstly obtaining the difference value between the first current value and the first current threshold value, comparing the difference value with 0, if the difference value is larger than 0, indicating that the first current value is larger than the first current threshold value, otherwise, indicating that the first current value is not larger than the first current threshold value.

After the comparison result of the first current value and the first current threshold is obtained, if the first current value is greater than the first current threshold, it indicates that the current limiting chip is shorted, that is, the current limiting function of the current limiting chip is no longer effective, that is, the state of the current limiting chip may be abnormal.

2) Optionally, for the detecting manner using the second current value and the first current limiting value, if the current value of the battery cell includes the second current value, determining the second current limiting value according to the first current limiting value and a preset expected current value; determining a second current threshold according to the second current limiting value and a preset second foolproof threshold; and determining whether the state of the current limiting chip is abnormal according to the comparison result of the second current value and the second current threshold value.

The second fool-proof threshold may be set according to practical situations, for example, may be 100ms, 200ms, etc., and the second fool-proof threshold may be equal to or unequal to the first fool-proof threshold, for example, the second fool-proof threshold may be greater than the first fool-proof threshold. The second current limiting value may be a difference obtained by subtracting the first current limiting value from a desired current value, which is a current value applied from the terminal to the adapter and is a known value. The second current threshold value may be a sum value obtained by summing the second current limit value and the second fool-proof threshold value.

Specifically, after the second current value and the second current threshold value are obtained, the magnitudes of the second current value and the second current threshold value may be compared, and a magnitude comparison result of the second current value and the second current threshold value may be obtained. The comparison of the magnitudes may be performed by difference comparison, or may be performed by quotient comparison, although other comparison methods are also possible. Taking the quotient comparison as an example, the quotient of the second current value and the second current threshold value can be obtained first, and the quotient is compared with 1, if the quotient is larger than 1, the second current value is larger than the second current threshold value, otherwise, the second current value is not larger than the second current threshold value.

After the comparison result of the second current value and the second current threshold is obtained, if the second current value is greater than the second current threshold, the first current value will be generally smaller than the first current limit value, which indicates that the current-limiting chip is open/closed, and the current-limiting function of the current-limiting chip is not effective any more, that is, the state of the current-limiting chip may be abnormal.

3) For the detection mode using the first current value, the second current value and the first current limit value, the detection results in the 1) and the 2) can be combined, that is, the state of the current-limiting chip is detected in at least one mode to possibly have an abnormality, so that the state of the current-limiting chip can be indicated to possibly have an abnormality.

In this embodiment, whether the state of the current limiting chip is abnormal is determined through the obtained current value of the first electric core, the obtained current value of the second electric core and the obtained first current limiting value of the current limiting chip, so that whether the state of the current limiting chip is abnormal can be accurately detected through the electric core current value and the obtained current limiting value, and the accuracy of detecting the state of the current limiting chip is improved. Further, whether the state of the current limiting chip is abnormal or not is determined according to the comparison result of the current value and the current threshold value, so that the state of the current limiting chip can be detected simply and rapidly, and the accuracy and the efficiency of the state detection of the current limiting chip are improved. Furthermore, a foolproof threshold is added into the current threshold, so that the universality of the detection method can be improved.

The above-mentioned embodiments refer to that whether the current limiting chip is abnormal or not can be determined by comparing the current value with the current threshold value, and in order to improve the accuracy and reliability of the detection result, the final detection result can be obtained through multiple detection, and the following embodiments will describe the process.

In another embodiment, another abnormality detection method is provided, and the step S404 may include the following steps based on the above embodiment:

the step of determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the cell current value is periodically executed. I.e. the detection step in S404 described above is performed periodically, where the period may be 100ms, 200ms, 500ms, 1S, etc. In addition, a current state count value may be preset, where the initial value of the current state count value is 0, and the current state count value is incremented each time an abnormality of the current limiting chip is detected in S404, and if the abnormality of the current limiting chip is detected, the current state count value remains unchanged, that is, no operation is performed, and finally, the number of times of abnormality occurrence of the current limiting chip may be obtained through the current state count value. If the abnormal times of the state of the current-limiting chip are larger than a first preset times threshold, determining that the state of the current-limiting chip is abnormal. The first preset number of times threshold here may be set according to practical situations, and may be, for example, 2, 3, 4, or the like. When the current limiting chip has an abnormal state in the step, the terminal can also set the state of the current limiting chip as current fault, for example, set state=error_over_curr.

In this embodiment, whether the state of the current limiting chip is abnormal is periodically detected through the first current limiting value and the electric core current value, so that the accuracy and reliability of the state detection result of the current limiting chip can be improved. In addition, the abnormal state of the current limiting chip is determined when the abnormal state frequency is larger than the frequency threshold, so that the problem of misjudgment caused by one-time detection error can be avoided, and the accuracy of the state detection of the current limiting chip is further improved.

In another embodiment, another abnormality detection method is provided, and if the state parameter includes a voltage value of two ends of the current limiting chip, based on the above embodiment, as shown in fig. 6, the step S304 may include the following steps:

s502, calculating a first voltage difference value between a voltage value at one end of the current limiting chip and a voltage value at the other end of the current limiting chip.

In this step, the voltage values at two ends of the current-limiting chip may be obtained by means of voltage meter measurement, and the two obtained voltage values are subjected to difference, and the obtained difference value takes an absolute value to obtain a difference value absolute value, where the difference value absolute value may be recorded as a first voltage difference value.

S504, determining whether the state of the current-limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold value.

In this step, since the current limiting chip used at present has insufficient precision under the condition of small charging current, so that misjudgment is easy, a limitation is currently made, that is, when the terminal applies to the power adapter that the expected current value is greater than 3A and detects that the current on the actual IBUS line is also greater than 3A, the abnormal flow is detected through the first voltage difference value in this step.

Specifically, the preset voltage threshold may be set according to practical situations, for example, 5mv, 10mv, and so on. After the first voltage difference value and the voltage threshold value are obtained, the magnitudes of the first voltage difference value and the voltage threshold value can be compared, and a magnitude comparison result of the first voltage difference value and the voltage threshold value is obtained. The comparison of the magnitudes may be performed by difference comparison, or may be performed by quotient comparison, although other comparison methods are also possible. After the comparison result of the first voltage difference and the voltage threshold is obtained, if the first voltage difference is greater than the voltage threshold, it indicates that the current-limiting chip is shorted, and the current-limiting function of the current-limiting chip is no longer effective, that is, the state of the current-limiting chip may be abnormal.

In this embodiment, whether the state of the current limiting chip is abnormal is determined by the voltage difference between the voltage values at two ends of the current limiting chip, so that whether the state of the current limiting chip is abnormal can be accurately detected by the voltage difference, and the accuracy of detecting the state of the current limiting chip is improved. Further, whether the state of the current-limiting chip is abnormal or not is determined according to the comparison result of the voltage difference value and the voltage threshold value, so that the state of the current-limiting chip can be detected simply and rapidly, and the accuracy and the efficiency of the state detection of the current-limiting chip are improved.

As with the current detection, the above-described embodiments refer to determining whether there is an abnormality in the current-limiting chip by comparing the magnitude of the voltage difference and the magnitude of the voltage threshold, and in general, in order to improve the accuracy and reliability of the detection result, the final detection result may be obtained by multiple detections, and the following embodiments will describe the process.

In another embodiment, another abnormality detection method is provided, and based on the above embodiment, the step S504 may include the following steps:

periodically executing the step of determining whether the state of the current limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold value; that is, the detection step in S504 described above is performed periodically, where the period may be 100ms, 200ms, 500ms, 1S, or the like, and the period may be the same as or different from the period of the current detection, and where the period of the voltage detection is smaller than the period of the current detection described above. In addition, here, a voltage state count value may be preset, where the initial value of the voltage state count value is 0, and the voltage state count value is added every time the state abnormality of the current-limiting chip is detected in S504, and if the state of the current-limiting chip is detected to be normal, the voltage state count value remains unchanged, that is, no operation is performed, and finally, the number of times that the state of the current-limiting chip is abnormal may be obtained through the voltage state count value. If the abnormal times of the state of the current limiting chip are larger than a second preset times threshold, determining that the state of the current limiting chip is abnormal; the second preset number of times threshold may be set according to practical situations, for example, may be 2, 3, 4, etc., and the second preset number of times may be equal to or different from the first preset number of times. When the current limiting chip has an abnormal state in the step, the terminal can also set the state of the current limiting chip as voltage fault, for example, set state=error_over_vol.

In this embodiment, whether the state of the current-limiting chip is abnormal is periodically detected according to the comparison result of the voltage difference value and the voltage threshold value, so that the accuracy and reliability of the state detection result of the current-limiting chip can be improved. In addition, the abnormal state of the current limiting chip is determined when the abnormal state frequency is larger than the frequency threshold, so that the problem of misjudgment caused by one-time detection error can be avoided, and the accuracy of the state detection of the current limiting chip is further improved.

In another embodiment, another method for detecting an abnormality is provided, and if the state parameter includes a bus state value recorded in a register of the current limiting chip, the step S304 may include the following steps:

if the bus state value recorded in the register is abnormal, determining that the state of the current-limiting chip is abnormal.

In the step, if the current limiting chip comprises a plurality of registers, if the bus state value in at least one register is abnormal, determining that the state of the current limiting chip is abnormal; if the current limiting chip comprises a register, if the bus state value in the register is abnormal, the state abnormality of the current limiting chip is directly determined. When the current limiting chip is in abnormal state in the step, the terminal can also set the state of the current limiting chip as I ² ERROR-reporting C, e.g. setting status = error_over_i ² C。

In addition, the bus state value recorded in the register of the current limiting chip may be periodically read, and whether the state of the current limiting chip is abnormal or not may be detected, where the period of the register detection may be 100ms, 200ms, 500ms, 1s, etc., where the period of the register detection may be the same as or different from the period of the current detection and the period of the voltage detection, and where the period of the register detection is smaller than the period of the voltage detection and the period of the voltage detection is smaller than the period of the current detection.

In this embodiment, if the bus state value recorded in the register is abnormal, the state abnormality of the current-limiting chip is determined, so that it can be determined more simply and accurately that the current-limiting chip has the I ² And C, the abnormality is caused, and the efficiency and the accuracy of the state detection of the current-limiting chip are improved.

The above embodiments refer to detecting whether the state of the current-limiting chip is abnormal during the battery charging process, and for detecting whether the state of the current-limiting chip is abnormal, the access condition of the battery cell can be detected first generally, and the following embodiments describe the process in detail.

In another embodiment, another abnormality detection method is provided, and the method may further include, before the step S202, as shown in fig. 7, the steps of:

S602, detecting whether the first battery cell and the second battery cell are normally accessed.

In this step, it may be determined whether the cell is normally accessed by a reading of the fuel gauge in series with the cell, e.g., a reading of the fuel gauge in series with the first cell is normal, indicating that the first cell is normally accessed, otherwise, indicating that the first cell is not normally accessed. The second cell also has an electricity meter connected in series with it, and it can also be determined by the same method whether the second cell is normally accessed.

In addition, as an alternative, the present embodiment may periodically perform the step of detecting whether the first battery cell and the second battery cell access the normal, that is, may periodically perform the detection process of the step S602. The period may be set according to practical situations, for example, may be 1s, 2s, 5s, etc., that is, whether the first battery cell and the second battery cell access normally is detected at regular intervals.

S604, if at least one of the first battery cell and the second battery cell is abnormally accessed, and the battery is in the fast charge state currently, the battery is controlled to be switched from the fast charge state to the common charge state.

In this step, after the access results of the first battery cell and the second battery cell are obtained, if the battery is currently in a fast charge state and at least one of the two battery cells is abnormally accessed, the battery needs to be switched from the fast charge state to a normal charge state, so as to effectively reduce the safety risk in the battery charging process. Meanwhile, the display interface of the terminal can prompt that the battery is a nonstandard battery, namely a standard battery.

S606, if the first battery cell and the second battery cell are accessed normally, returning to execute the step of detecting whether the state of the current-limiting chip is abnormal in the battery charging process.

In this step, if both the battery cells access normally, the step of S202 may be performed to detect whether the state of the current-limiting chip is abnormal.

In this embodiment, by detecting whether the first battery cell and the second battery cell are normally accessed, if at least one battery cell is abnormally accessed and is currently in a fast charge state, the battery is switched from fast charge to normal charge, so as to effectively reduce the safety risk in the battery charging process.

In the above embodiments, it is mentioned that whether the state of the current-limiting chip is abnormal during the battery charging process is detected, and whether the fast charge switch is to be switched is generally determined by detecting the voltage difference across the battery cell after detecting whether the state of the current-limiting chip is abnormal, and the following embodiments will describe the process in detail.

In another embodiment, another abnormality detection method is provided, and based on the above embodiment, as shown in fig. 8, the method may further include the following steps:

s702, if the state of the current limiting chip is normal, detecting whether a second voltage difference value between the first battery cell and the second battery cell meets a threshold condition.

In this step, when the state of the current limiting chip is normal, the voltage difference between the two ends of the first battery cell and the voltage difference between the two ends of the second battery cell can be obtained through measurement by a voltmeter or the like, and the obtained difference is recorded as a second voltage difference.

In addition, a threshold condition may be set in advance according to the actual situation, and the threshold condition may include a preset voltage threshold, for example, the magnitude of the preset voltage threshold may be 100mv, 150mv, or the like.

Then, the relationship between the second voltage difference and the preset voltage threshold may be determined, where the determining manner may be a difference making manner or a quotient making manner, and the foregoing embodiments have corresponding detailed descriptions, which are not repeated herein, so that the relationship between the second voltage difference and the preset voltage threshold may be obtained in any way.

And S704, if the threshold condition is not met, adjusting the second voltage difference value to meet the threshold condition.

In this step, if the second voltage difference is greater than or equal to the preset voltage threshold, the second voltage difference is considered to not satisfy the threshold condition, and at this time, the difference such as the band between the first cell and the second cell may be adjusted. The specific adjustment strategy may be to adjust the current limiting value of the current limiting chip or to make the second voltage difference meet the threshold condition by mutual charging between the battery cells.

For example, when fast charging is not started, that is, when the current limiting value of the current limiting chip is adjusted, the second voltage difference value can meet the threshold condition, and when the current limiting value of the current limiting chip is adjusted, the current limiting chip is turned off for a while, then the current limiting chip is turned off for the first time, and the current with high voltage (that is, the voltage difference is larger) charges the current with low voltage (that is, the voltage difference is smaller) until the second voltage difference value is smaller than the preset voltage threshold value, that is, when the second voltage difference value meets the threshold condition, the current limiting chip is turned on, and the fast charging switch is turned on for fast charging.

For example, if the second voltage difference value is greater than or equal to the preset voltage threshold value in the fast charging process, the current limiting value of the current limiting chip can be adjusted, the charging current of the first battery cell is reduced, and the charging current of the second battery cell is increased, so that the second voltage difference value meets the threshold value condition.

S706, if the threshold condition is met and the current battery is currently in the normal charge state, the battery is controlled to be switched to the fast charge state.

In this step, if the second voltage difference is smaller than the preset voltage threshold, the second voltage difference is considered to satisfy the threshold condition, and if the battery is currently in the normal charge state at this time, the battery can be switched from the normal charge state to the fast charge state, so as to improve the efficiency of charging the battery.

In this embodiment, whether the voltage difference between the two battery cells meets the threshold condition is detected when the state of the current limiting chip is normal, and the voltage difference is adjusted to meet the threshold condition when the voltage difference does not meet the threshold condition, so that the subsequent fast charging process can be executed on the premise of ensuring the safety of the battery.

In order to facilitate the detailed description of the technical solution of the present application, the following detailed description of the technical solution of the present application is provided in combination with a detailed embodiment, and based on the above embodiment, as shown in fig. 9, the method may include the following steps:

s801, after the fast charging power adapter is inserted, a 5S timing detection thread is started.

S802, detecting whether the first battery cell and the second battery cell are accessed normally, if so, executing S804, otherwise, executing S803.

S803, if the battery is in the fast charge state currently, the battery is controlled to be switched from fast charge to normal charge.

S804, detecting whether the state of the current-limiting chip is abnormal, if so, executing S805, otherwise, executing S806.

S805, turning off the enabling of the current limiting chip, controlling the current limiting chip to stop working, and returning to execute S803.

S806, detecting whether the second voltage difference between the first battery cell and the second battery cell meets a threshold condition, if yes, executing S808, otherwise executing S807.

S807, the second voltage difference is adjusted to satisfy the threshold condition.

S808, detecting whether the quick charge switch needs to be cut, if so, returning to S802, otherwise, executing S809.

S809, cutting off the quick charge switch, and monitoring a first current limit value, a battery core current value, voltage values at two ends of the current limit chip and a bus state value recorded in a register of the current limit chip in the quick charge process.

S810, judging whether a plurality of current limiting chips exist in the circuit, if yes, executing S811, otherwise, executing S812.

S811, obtaining the current limiting value of each of the plurality of current limiting chips, and obtaining the sum value.

S812, obtaining the current limiting value of the single current limiting chip.

S813, the total current limit value of the current limiting chip is obtained according to S811 or S812.

S814, a first current value passing through the first battery cell and a second current value passing through the second battery cell are obtained.

S815, determining whether the first current value is greater than (total current value+first foolproof threshold, denoted as first current threshold), or determining whether the second current value is greater than (desired current value-total current value+second foolproof threshold, denoted as second current threshold), if not, executing S816, if yes, executing S817.

S816, the current state count value remains unchanged.

S817, the current status count value of the short circuit or the open circuit is incremented by one.

S818, judging whether the current state count value is larger than a first preset time threshold, if yes, executing S819, and if not, returning to executing S810.

And S819, determining that the state of the current limiting chip is abnormal and the current is abnormal.

S820, detecting whether the expected current value is greater than 3A and the IBUS current is greater than 3A, if yes, executing S821, otherwise, returning to S820.

S821, calculating a first voltage difference between the voltage value at one end of the current limiting chip and the voltage value at the other end.

S822, judging whether the first voltage difference value is smaller than a voltage threshold value, if not, executing S823, and if yes, executing S824.

S823, the voltage state count value is kept unchanged.

S824, the voltage state count value of the short circuit is incremented by one.

S825, judging whether the voltage state count value is larger than a second preset time threshold, if yes, executing S826, otherwise, returning to executing S820.

S826, determining that the state of the current-limiting chip is abnormal and the current-limiting chip is abnormal.

S827, detecting whether the bus state value recorded in the register of the current-limiting chip is abnormal, if so, executing S828, and if not, returning to executing S827.

S828, determining that the state of the current-limiting chip is abnormal and is I ² C is abnormal.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides an abnormality detection device for realizing the abnormality detection method. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the embodiment of one or more abnormality detection devices provided below may be referred to the limitation of the abnormality detection method hereinabove, and will not be repeated here.

In one embodiment, as shown in fig. 10, there is provided an abnormality detection apparatus including a detection module 11 and a control module 12, wherein:

a detection module 11, configured to detect whether the state of the current-limiting chip is abnormal during the battery charging process;

the control module 12 is configured to control the current limiting chip to stop working if the state of the current limiting chip is abnormal; the battery comprises the current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core.

In another embodiment, another abnormality detecting device is provided, and the detecting module 11 may include a state parameter acquiring unit and a state detecting unit, where:

a state parameter acquisition unit for acquiring during battery chargingTaking state parameters of the current limiting chip; the state parameter comprises at least one of a first current limit value of the current limiting chip, a voltage value at two ends of the current limiting chip and a bus state value recorded in a register of the current limiting chip, wherein the bus state value is used for indicating I ² Whether the state of the C bus is abnormal;

And the state detection unit is used for determining whether the state of the current-limiting chip is abnormal according to the state parameters.

Optionally, if the battery includes a plurality of current limiting chips, the first current limiting value is a sum of current limiting values of the current limiting chips; if the battery includes a current limiting chip, the first current limiting value is a current limiting value of the current limiting chip.

In another embodiment, another abnormality detecting device is provided, wherein the state parameter includes a first current limit value, and the state detecting unit may include a current value obtaining subunit and a current detecting subunit, where:

the current value acquisition subunit is used for acquiring the current value of the battery cell; the cell current value includes at least one of a first current value through the first cell and a second current value through the second cell;

and the current detection subunit is used for determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the electric core current value.

Optionally, the current detection subunit is specifically configured to determine, if the current value of the electrical core includes a first current value, a first current threshold according to a first current limit value and a preset first foolproof threshold; and determining whether the state of the current limiting chip is abnormal according to the comparison result of the first current value and the first current threshold value.

Optionally, the current detection subunit is specifically configured to determine, if the current value of the electrical core includes a second current value, the second current value according to the first current value and a preset expected current value; determining a second current threshold according to the second current limiting value and a preset second foolproof threshold; and determining whether the state of the current limiting chip is abnormal according to the comparison result of the second current value and the second current threshold value.

Optionally, the current detection subunit is specifically configured to periodically perform the step of determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the current value of the battery cell; if the abnormal times of the state of the current-limiting chip are larger than a first preset times threshold, determining that the state of the current-limiting chip is abnormal.

In another embodiment, another abnormality detecting device is provided, where the state parameter includes a voltage value across the current limiting chip, and the state detecting unit may include a differential pressure determining subunit and a voltage detecting subunit, where:

the differential pressure determining subunit is used for calculating a first voltage difference value between the voltage value at one end of the current limiting chip and the voltage value at the other end of the current limiting chip;

And the voltage detection subunit is used for determining whether the state of the current-limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold value.

Optionally, the voltage detection subunit is specifically configured to periodically perform the step of determining whether the state of the current-limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold; if the abnormal times of the state of the current-limiting chip are larger than a second preset times threshold, determining that the state of the current-limiting chip is abnormal.

In another embodiment, another abnormality detecting device is provided, where the state parameter includes a bus state value recorded in a register of the current-limiting chip, and the state detecting unit may include a return value abnormality detecting subunit, configured to determine that the state of the current-limiting chip is abnormal if the bus state value recorded in the register is abnormal.

In another embodiment, another abnormality detecting device is provided, and the device may further include a cell detecting module, a first switching module, and a return executing module, before the detecting module 11 detects whether the state of the current limiting chip is abnormal during the battery charging process, where:

The battery cell detection module is used for detecting whether the first battery cell and the second battery cell are normally accessed;

the first switching module is used for controlling the battery to be switched from the quick charge state to the common charge state if at least one of the first battery cell and the second battery cell is abnormally accessed and the battery is in the quick charge state currently;

and the return execution module is used for returning to execute the step of detecting whether the state of the current-limiting chip is abnormal in the battery charging process if the first battery cell and the second battery cell are accessed normally.

Optionally, the apparatus may further include a period execution module, configured to periodically execute the step of detecting whether the first battery cell and the second battery cell access to the normal battery cell.

In another embodiment, another abnormality detection apparatus is provided, where on the basis of the foregoing embodiment, the apparatus may further include a voltage difference detection module, an adjustment module, and a second switching module, where:

the voltage difference detection module is used for detecting whether a second voltage difference value between the first battery cell and the second battery cell meets a threshold value condition or not if the state of the current limiting chip is normal;

The adjusting module is used for adjusting the second voltage difference value to meet the threshold condition if the threshold condition is not met;

and the second switching module is used for controlling the battery to be switched to the quick charge state if the threshold condition is met and the current battery is in the common charge state.

In another embodiment, another abnormality detection device is provided, where the device may further include a third switching module, where the third switching module is configured to control the battery to switch from the fast charge state to the normal charge state if the state of the current limiting chip is abnormal and the battery is currently in the fast charge state.

Each of the modules in the abnormality detection apparatus described above may be implemented in whole or in part by software, hardware, and a combination thereof. The above modules may be embedded in hardware or independent of a processor in the terminal, or may be stored in software in a memory in the terminal, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a terminal is provided, the internal structure of which may be as shown in fig. 11. The terminal includes a processor, a memory, an input/output interface, a communication interface, a display unit, and an input device. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input/output interface. Wherein the processor of the terminal is adapted to provide computing and control capabilities. The memory of the terminal includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input/output interface of the terminal is used for exchanging information between the processor and the external device. The communication interface of the terminal is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a method of anomaly detection. The display unit of the terminal is used for forming a visual picture and can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the terminal can be a touch layer covered on the display screen, can also be a key, a track ball or a touch pad arranged on the terminal shell, and can also be an external keyboard, a touch pad or a mouse and the like.

It will be appreciated by those skilled in the art that the structure shown in fig. 11 is merely a block diagram of a portion of the structure associated with the present inventive arrangements and is not limiting of the terminal to which the present inventive arrangements are applied, and that a particular terminal may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

The embodiment of the application also provides a computer readable storage medium. One or more non-transitory computer-readable storage media containing computer-executable instructions that, when executed by one or more processors, cause the processors to perform the steps of a method of anomaly detection.

The embodiments of the present application also provide a computer program product containing instructions that, when run on a computer, cause the computer to perform an anomaly detection method.

It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the embodiments provided herein may include at least one of a relational database and a non-relational database. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processor referred to in the embodiments provided in the present application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, or the like, but is not limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims

1. An anomaly detection method, the method comprising:

the battery comprises a current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core.

2. The method of claim 1, wherein detecting whether the state of the current limiting chip is abnormal during the battery charging process comprises:

acquiring state parameters of the current limiting chip in the battery charging process; the state parameter comprises a first current limiting value of the current limiting chip, at least one of a voltage value at two ends of the current limiting chip and a bus state value recorded in a register of the current limiting chip, wherein the bus state value is used for indicating I ² Whether the state of the C bus is abnormal;

and determining whether the state of the current limiting chip is abnormal according to the state parameter.

3. The method of claim 2, wherein the status parameter includes the first current limit value, and wherein determining whether the status of the current limiting chip is abnormal based on the status parameter includes:

acquiring a current value of a battery cell; the cell current values include at least one of a first current value through the first cell and a second current value through the second cell;

and determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the cell current value.

4. The method of claim 3, wherein the determining whether the state of the current limiting chip is abnormal based on the first current limiting value and the cell current value comprises:

If the battery cell current value comprises the first current value, determining a first current threshold according to the first current limiting value and a preset first foolproof threshold;

and determining whether the state of the current limiting chip is abnormal according to the comparison result of the first current value and the first current threshold value.

5. The method of claim 3, wherein the determining whether the state of the current limiting chip is abnormal based on the first current limiting value and the cell current value comprises:

if the battery cell current value comprises the second current value, determining a second current limit value according to the first current limit value and a preset expected current value;

determining a second current threshold according to the second current limiting value and a preset second fool-proof threshold;

and determining whether the state of the current limiting chip is abnormal according to the comparison result of the second current value and the second current threshold value.

6. The method of claim 3, wherein the determining whether the state of the current limiting chip is abnormal based on the first current limiting value and the cell current value comprises:

periodically executing the step of determining whether the state of the current limiting chip is abnormal according to the first current limiting value and the cell current value;

If the abnormal times of the state of the current limiting chip are larger than a first preset times threshold, determining that the state of the current limiting chip is abnormal.

7. The method of any one of claims 3 to 6, wherein if the battery includes a plurality of the current limiting chips, the first current limiting value is a sum of current limiting values of the current limiting chips;

if the battery comprises one current limiting chip, the first current limiting value is the current limiting value of the current limiting chip.

8. The method of claim 2, wherein the status parameter includes a voltage value across the current limiting chip, and the determining whether the status of the current limiting chip is abnormal according to the status parameter includes:

calculating a first voltage difference value between a voltage value at one end of the current limiting chip and a voltage value at the other end of the current limiting chip;

and determining whether the state of the current limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold value.

9. The method of claim 8, wherein determining whether the state of the current limiting chip is abnormal based on the first voltage difference value comprises:

periodically executing the step of determining whether the state of the current limiting chip is abnormal according to the comparison result of the first voltage difference value and the preset voltage threshold value;

If the abnormal times of the state of the current limiting chip are larger than a second preset times threshold, determining that the state of the current limiting chip is abnormal.

10. The method of claim 2, wherein the status parameter includes a bus status value recorded in a register of the current limiting chip, and wherein determining whether the status of the current limiting chip is abnormal according to the status parameter includes:

if the bus state value is abnormal, determining that the state of the current limiting chip is abnormal.

11. The method of claim 1, wherein prior to detecting whether the state of the current limiting chip is abnormal during battery charging, the method further comprises:

detecting whether the first battery cell and the second battery cell are normally accessed;

if at least one of the first battery cell and the second battery cell is abnormal in access, and the battery is in a fast charging state at present, controlling the battery to be switched from the fast charging state to a common charging state;

and if the first battery cell and the second battery cell are accessed normally, returning to the step of executing the step of detecting whether the state of the current-limiting chip is abnormal in the battery charging process.

12. The method of claim 11, wherein the method further comprises:

the step of detecting whether the first cell and the second cell access normal is performed periodically.

13. The method according to claim 1, wherein the method further comprises:

if the state of the current limiting chip is normal, detecting whether a second voltage difference value between the first battery cell and the second battery cell meets a threshold condition or not;

if the threshold condition is not met, the second voltage difference value is adjusted to meet the threshold condition;

and if the threshold condition is met and the battery is currently in the common charging state, controlling the battery to be switched to the quick charging state.

14. The method according to claim 1, wherein the method further comprises:

and if the state of the current limiting chip is abnormal and the battery is in the fast charging state, controlling the battery to be switched from the fast charging state to the common charging state.

15. An abnormality detection apparatus, comprising:

The control module is used for controlling the current limiting chip to stop working if the state of the current limiting chip is abnormal; the battery comprises a current limiting chip, a first electric core and a second electric core which are mutually connected in parallel, wherein the current limiting chip is connected with the first electric core in series, and the capacity of the first electric core is smaller than that of the second electric core.

16. A terminal comprising a memory and a processor, the memory having stored therein a computer program which, when executed by the processor, causes the processor to perform the steps of the method of any of claims 1 to 14.

17. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any one of claims 1 to 14.

18. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any one of claims 1 to 14.