CN116959354A - Driving circuit, circuit driving method and display panel - Google Patents
Driving circuit, circuit driving method and display panel Download PDFInfo
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- CN116959354A CN116959354A CN202310746593.5A CN202310746593A CN116959354A CN 116959354 A CN116959354 A CN 116959354A CN 202310746593 A CN202310746593 A CN 202310746593A CN 116959354 A CN116959354 A CN 116959354A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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Abstract
The invention provides a driving circuit, a circuit driving method and a display panel, wherein the working mode of a data driver is switched through a switching module, so that the data driver samples display data corresponding to one target unit pixel into display data corresponding to a plurality of unit pixels in a first mode, the total sampling amount of the display data is reduced, the data driver can sample multi-frame display data in the sampling period of the original one-frame display data, and the refresh rate is improved under the condition that the original performance of the data driver is unchanged; meanwhile, gray scale adjustment is carried out on display data output by the shift register through the gray scale adjustment module, so that gray scale transition smoothness is realized, and the display effect is improved.
Description
Technical Field
The present invention relates to the field of display, and in particular, to a driving circuit, a circuit driving method, and a display panel.
Background
The refresh rate pursued in the display industry is higher and higher, and is limited by the performance of related devices such as a logic board and a driver, and the refresh rate can be improved by reducing the resolution in a pixel merging mode, however, the mode generally causes the merged pixel to display the content of one pixel, so that the picture transition is hard and the display effect is poor.
Disclosure of Invention
The invention mainly aims at providing a driving circuit, a control method and a display panel, and aims to solve the problems of hard transition of pictures and poor display effect in the combined pixel scene in the prior art.
In order to achieve the above object, the present invention provides a driving circuit, which includes a data driver, a switching module, and a control module, wherein the data driver includes a shift register and a gray scale adjustment module, a control end of the shift register is connected to the switching module, an output end of the shift register is connected to the gray scale adjustment module, and a control end of the switching module is connected to the control end of the gray scale adjustment module; wherein:
the control module is used for receiving a first mode instruction, and after generating a first mode signal corresponding to a first mode, sending the first mode signal to the switching module and the gray scale adjusting module;
the switching module is used for controlling the data driver to work in a first mode after receiving the first mode signal, and in the first mode, the shift register is used for sampling display data corresponding to one target unit pixel into display data corresponding to a plurality of unit pixels;
the gray scale adjustment module is used for performing gray scale adjustment on the display data output by the shift register after receiving the first mode signal.
Optionally, the shift register includes a plurality of sequentially connected register groups, each of which includes a plurality of sequentially connected register units corresponding to the unit pixels; the switching module is connected with each registering unit, and the output end of each registering unit is connected with the gray scale adjusting module; wherein:
and the switching module is used for controlling the data driver to work in a first mode after receiving the first mode signal, and in the first mode, the registering units in the registering group sample the display data of the target unit pixels corresponding to the registering group at the same time.
Optionally, the switching module includes a first connection unit and a second connection unit, a control end of the first connection unit and a control end of the second connection unit are connected with the control module, where:
the input ends of the register units in the register group are connected through the first connecting unit;
the register units in the register group are connected through the second connection unit, wherein: the first connection unit and the second connection unit are opposite in conduction state.
Optionally, the first connection unit is a PMOS tube, and the second connection unit is an NMOS tube.
In addition, to achieve the above object, the present invention also provides a circuit driving method applied to a control module, the circuit driving method including:
receiving a first mode instruction and generating a first mode signal corresponding to a first mode;
and sending the first mode signal to a switching module and a gray scale adjusting module, so that the switching module sets the data driver to be in a first mode, and the gray scale adjusting module carries out gray scale adjustment on display data output by the shift register.
In addition, in order to achieve the above object, the present invention further provides a circuit driving method applied to a gray scale adjustment module, the circuit driving method comprising:
if a first mode signal sent by the control module is received, display data output by the shift register are obtained;
and gray scale adjustment is carried out on the display data.
Optionally, the step of performing gray scale adjustment on the display data includes:
determining first data corresponding to a first unit pixel and second data corresponding to a second unit pixel in the display data, wherein the data corresponding to the first unit pixel in a first mode and the data corresponding to the second mode are the same, and the data corresponding to the second unit pixel in the first mode and the data corresponding to the second mode are different;
and performing gray scale adjustment on second data corresponding to the second unit pixel according to the first data.
Optionally, the step of performing gray scale adjustment on the second data corresponding to the second unit pixel according to the first data includes:
determining a first gray scale difference value between first data of adjacent first unit pixels;
determining an interval difference value according to the first gray-scale difference value and the second data of the second unit pixel;
and updating the second data of each second unit pixel according to the interval difference value, so that the corresponding second gray-scale difference value between the adjacent first unit pixels and the second unit pixels or between the adjacent second unit pixels is the interval difference value.
Optionally, the step of determining the interval difference value according to the first gray-scale difference value and the second data of the second unit pixel includes:
acquiring the pixel number of the second unit pixel;
adding 1 to the pixel data to obtain the gray level transition number
Dividing the first gray level difference value by the gray level transition number to obtain the interval difference value.
In addition, in order to achieve the above object, the present invention also provides a display panel, which is characterized in that the display panel includes unit pixels and the driving circuit as described above.
The invention provides a driving circuit, a circuit driving method and a display panel, wherein the driving circuit comprises a data driver, a switching module and a control module, the data driver comprises a shift register and a gray scale adjusting module, the control end of the shift register is connected with the switching module, the output end of the shift register is connected with the gray scale adjusting module, and the control end of the switching module is connected with the control end of the gray scale adjusting module; wherein: the control module is used for receiving a first mode instruction, and after generating a first mode signal corresponding to a first mode, sending the first mode signal to the switching module and the gray scale adjusting module; the switching module is used for controlling the data driver to work in a first mode after receiving the first mode signal, and in the first mode, the shift register is used for sampling display data corresponding to one target unit pixel into display data corresponding to a plurality of unit pixels; the gray scale adjustment module is used for performing gray scale adjustment on the display data output by the shift register after receiving the first mode signal. The working mode of the data driver is switched through the switching module, so that the data driver samples the display data corresponding to one target unit pixel into the display data corresponding to a plurality of unit pixels in a first mode, the total sampling amount of the display data is reduced, the data driver can sample multi-frame display data in the sampling period of the original one-frame display data, and the refresh rate is improved under the condition that the original performance of the data driver is unchanged; meanwhile, gray scale adjustment is carried out on display data output by the shift register through the gray scale adjustment module, so that gray scale transition smoothness is realized, and the display effect is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a functional block diagram of an embodiment of a driving circuit according to the present invention;
FIG. 2 is a schematic diagram of the basic structure of a data driver in the driving circuit according to the present invention;
FIG. 3 is a schematic diagram of a basic structure of a bidirectional shift register in a driving circuit according to the present invention;
FIG. 4 is a schematic diagram of a driving circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram showing a connection between a shift register and a switching module in a driving circuit according to an embodiment of the invention;
fig. 6 is a schematic structural diagram of an embodiment of a display panel according to the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Reference numerals illustrate:
| reference numerals | Name of the name | Reference numerals | Name of the name |
| 100 | Data driver | 200 | Switching module |
| 110 | Shift register | 210 | First connecting unit |
| 111 | Register set | 220 | Second connection unit |
| 1111 | Register unit | 300 | Control module |
| 120 | Gray scale adjusting module | D | Trigger device |
| & | AND gate | NOT | NOT gate |
| OR | OR gate |
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that all directional indicators (such as up, down, left, right, front, and rear are used in the embodiments of the present invention) are merely for explaining the relative positional relationship, movement conditions, and the like between the components in a certain specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicators are changed accordingly.
Furthermore, the description of "first," "second," etc. in this disclosure is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present invention.
Referring to fig. 1, fig. 1 is a functional block diagram of an embodiment of a driving circuit according to the present invention. In this embodiment, the driving circuit includes a data driver 100, a switching module 200, and a control module 300, where the data driver 100 includes a shift register 110 and a gray scale adjustment module 120, a control end of the shift register 110 is connected to the switching module 200, an output end of the shift register 110 is connected to the gray scale adjustment module 120, and a control end of the switching module 200 is connected to the control end of the gray scale adjustment module 120 and to the control module 300; wherein:
the control module 300 is configured to receive a first mode instruction, and after generating a first mode signal corresponding to a first mode, send the first mode signal to the switching module 200 and the gray scale adjustment module 120;
the switching module 200 is configured to control the data driver 100 to operate in a first mode after receiving the first mode signal, where the shift register 110 is configured to sample display data corresponding to one target unit pixel into display data corresponding to a plurality of unit pixels;
the gray scale adjustment module 120 is configured to perform gray scale adjustment on the display data output by the shift register 110 after receiving the first mode signal.
The control module 300 is used for realizing data processing operation in the driving circuit; the control module 300 may specifically be a SOC in a display.
The data driver 100 is configured to convert the received display data into a data signal and output the data signal to the data line. For ease of understanding, the basic structure of the data driver 100 is described; referring to fig. 2, the Data driver 100 includes a shift Register 110, an Input Register, a Data Latch, a Level Shifter, a digital-to-analog converter Digital Analog Converter, and an Output Buffer; in the figure, the shift register 110 is shown as a Bi-directional shift register 110Bi-directional Shift Register, in practical applications, the type of the shift register 110 may be set based on practical application requirements, for example, the shift register 110 may also be set as a unidirectional shift register 110, and the Bi-directional shift register 110 is taken as an example for the following description, and other types of shift registers 110 may be analogically executed and will not be described again.
The gray scale regulator is arranged between the input register and the data latch.
After receiving the source data, the logic board TCON processes the source data to obtain display data and control timing, and the TCON sends the control timing to the relevant devices driven by the scan lines and sends the display data to the data driver 100 in series, where R 10 First bit data representing first red pixel, R 17 Eighth bit data representing first red pixel, R 20 First bit data representing a second red pixel, R 27 The eighth bit of data representing the second red pixel is the same as G and B, and will not be described again.
The shift register 110 in the data driver 100 samples serial display data and sends the sampled display data to the input register in parallel, the input register outputs the display data to the gray scale regulator, the gray scale regulator carries out gray scale regulation on the display data and sends the display data to the data latch for temporary storage at the rising edge of the TP signal sent by TCON, the level converter carries out boosting on digital logic voltage corresponding to the display data after receiving the display data, so that the digital logic voltage corresponding to the display data can start a switch tube in the digital-to-analog converter, and the binding point voltage module GM is used for providing binding point voltages for the digital-to-analog converter, wherein GM 1-GM 7 represent positive gray scale binding point voltages, and GM 8-GM 14 represent negative gray scale binding point voltages; the digital-to-analog converter determines the corresponding gray-scale voltage based on the boosted display data and outputs the gray-scale voltage to the output buffer, and the output buffer outputs the gray-scale voltage to the data line at the falling edge of the TP signal.
The basic structure and the basic implementation manner of the data driver 100 in one scenario are described above, and in practical applications, the structure and implementation manner of the data driver 100 may be adjusted according to practical needs.
The shift register 110 is used for converting serial display data input by TCON into parallel display data. Referring to fig. 3, fig. 3 is a schematic diagram of a structure of a bidirectional shift register 110, where the bidirectional shift register 110 includes a plurality of D flip-flops (hereinafter referred to as flip-flops D), and each flip-flop D is correspondingly provided with a combination of and gate & OR gate OR; CKV is a displacement pulse signal, STV is a left shift signal, STVR is a right shift signal, and U/D is a serial display data signal, where the same and gate as STV is connected to the STV, and output through NOT gate NOT is a right shift input signal, and the structure of the bidirectional shift register 110 in fig. 3 is conventional, and the specific connection relationship and implementation principle are NOT repeated.
It can be understood that, in general, the flip-flop D in the shift register 110 samples the display data corresponding to a fixed unit pixel, and the unit pixel refers to the minimum unit of the screen display; for example, if one unit pixel corresponds to 24 bits of data, the first bit data of the first unit pixel is sampled by the trigger D1, the second bit data of the first unit pixel is sampled by the trigger D2, and so on, the first bit data of the second unit pixel is sampled by the trigger D25, and this display mode is called a second mode in the following; in the first mode, the plurality of flip-flops D in the shift register 110 sample the same data, such as the first bit data of the first unit pixel by the flip-flops D1 and 25, the second bit data of the first unit pixel by the flip-flops D2 and 26, and so on, and the first bit data of the second unit pixel by the flip-flops D49 and 73; from the above, it is clear that in the first mode, the amount of data to be acquired is halved relative to the second mode, and therefore, an improvement in refresh rate can be achieved.
It can be understood that, in the first mode, since there is sampling of the display data corresponding to one unit pixel into the display data corresponding to a plurality of unit pixels, the gray scale adjustment module 120 performs the gray scale adjustment operation; in the second mode, the data driver 100 samples based on the actual correspondence between the unit pixels and the display data, and thus the gray scale adjustment module 120 does not perform the gray scale adjustment operation.
In this embodiment, the switching module 200 switches the working mode of the data driver 100, so that the data driver 100 samples the display data corresponding to one target unit pixel into the display data corresponding to a plurality of unit pixels in the first mode, thereby reducing the total sampling amount of the display data, and further enabling the data driver 100 to sample multi-frame display data in the sampling period of the original one-frame display data, and improving the refresh rate under the condition that the original performance of the data driver 100 is unchanged; meanwhile, the gray scale adjustment module 120 is used for gray scale adjustment of the display data output by the shift register 110, so that gray scale transition smoothness is realized, and the display effect is improved.
Further, referring to fig. 4, the shift register 110 includes a plurality of sequentially connected register groups 111, and each of the register groups 111 includes a plurality of sequentially connected register units 1111 corresponding to unit pixels; the switching module 200 is connected to each of the register units 1111, and an output end of each of the register units 1111 is connected to the gray scale adjustment module 120; wherein:
the switching module 200 is configured to control the data driver 100 to operate in a first mode after receiving the first mode signal, where in the first mode, the register unit 1111 in the register group 111 samples display data of a target unit pixel corresponding to the register group 111 at the same time.
The register unit 1111 is configured to sample display data of a single unit pixel, and the register unit 1111 includes a plurality of flip-flops D; the unit pixel is the minimum unit of screen display, and is composed of R, G, B three sub-pixels; specifically, taking an example that the color depth of a unit pixel is 8 bits, each of the three sub-pixels R, G, B needs 8 bits of data to perform gray scale control, and at this time, the register unit 1111 corresponding to the unit pixel includes 3×8=24 flip-flops D, and each of the 8 flip-flops D samples the display data of one sub-pixel. It should be noted that, the number of the triggers D corresponding to the specific unit pixels may be set based on the actual application scenario, for example, when 10bit color depth is applied, each sub-pixel corresponds to 10 triggers D, in other embodiments, different numbers of triggers D may be set for sub-pixels with different colors to sample, and different manners may be implemented based on the setting analogy in the embodiment, which is not described herein.
In general, i.e., in the second mode, one flip-flop D samples one bit of display data, one register unit 1111 samples display data corresponding to one unit pixel, two register units 1111 samples display data corresponding to two unit pixels, and so on, a number of register units 1111 samples display data corresponding to a number of unit pixels. That is, in the second mode, the resolution of the sampling is identical to the actual arrangement of the pixels of the display, for example, the resolution of the display is 1920×1080, the number of pixels arranged in the scanning line direction is 1920, and 1920 register units 1111 are correspondingly arranged, and in the second mode, the 1920 register units 1111 sample the display data corresponding to 1920 unit pixels, and the shift register 110 is shifted step by step when sampling the display data, so that 1920×24 shifts are required to complete the sampling of one line of display data at this time.
The register set 111 is used for indicating a register unit 1111 corresponding to the pixels to be combined; in this embodiment, the register set 111 includes two register units 1111 as an example, and other numbers can be analogically executed, which will not be repeated.
In the first mode, two register units 1111 sample display data corresponding to one unit pixel, four register units 1111 sample display data corresponding to two unit pixels, and so on, and a plurality of register units 1111 sample display data corresponding to half of the unit pixels; it should be noted that, the two register units 1111 may sample the display data corresponding to one unit pixel, or the two register units 1111 may sample the display data corresponding to one unit pixel at the same time, or only one register unit 1111 of the two register units 1111 may sample the display data corresponding to one unit pixel, and the other register unit 1111 does not perform the sampling operation. In the first mode, the resolution of sampling is half of the actual setting of the pixels of the display, for example, the resolution of the display is 1920×1080, the number of pixels set in the scanning line direction is 1920, and 1920 register units 1111 are correspondingly arranged, and in the first mode, the 1920 register units 1111 sample the display data corresponding to 810 unit pixels, and at this time, 810×24 shifts are required to complete sampling of one line of display data.
As is clear from the above description, in the second mode, a resolution of 1920×1080 is realized, and 1920×1080×24 shifts are used as one sampling period, and the second mode can sample display data of one frame of screen in one sampling period; the data driver 100 has unchanged performance, and in the first mode, the resolution of 810×1080 can be realized, and in the first mode, 810×1080×24×2 shifts can be performed in one sampling period, and display data of two frames of pictures are sampled, so that the first mode can realize doubling of the refresh rate relative to the second mode, that is, if in the second mode, 60Hz display is performed on the display parameter of 1920×1080, and in the first mode, 120Hz display is performed on the display parameter of 810×1080. Further, the display parameters of the first mode and the second mode may be expressed as: display parameters in a first mode:
A×B，XHz
display parameters in the second mode:
(X×N)Hz
where a is the number of pixels in the scan line direction actually set by the display, B is the number of pixels in the data line direction actually set by the display, X is the refresh rate at a×b resolution, and N is the number of register units 1111 included in the register group 111.
It should be noted that, the number of the register units 1111 included in the register group 111 may also be adjusted based on the refresh rate actually required to be set, for example, a plurality of second modes are set, and the number of the register units 1111 included in the register group 111 is different in different second modes.
Further, referring to fig. 5, the switching module 200 includes a first connection unit 210 and a second connection unit 220, wherein a control end of the first connection unit 210 and a control end of the second connection unit 220 are connected to the control module 300, wherein:
the input ends of each register unit 1111 in the register group 111 are connected through the first connection unit 210;
each of the register units 1111 in the register group 111 is connected through the second connection unit 220, where: the first connection unit 210 is in an opposite conductive state to the second connection unit 220.
It is understood that the input of the register 1111 is the end of the register 1111 that receives the shift left signal and the AND gate, e.g. for the first register 1111, the input is the AND gate end connected to the STV.
The end-to-end connection relationship exists between each register unit 1111, in this embodiment, the end-to-end connection relationship of the register units 1111 is implemented by the second connection unit 220, that is, the output end of the preceding register unit 1111 is connected to the input end of the following register unit 1111 by the second connection unit 220, and the output end of the register unit 1111 is the output end of the tail flip-flop D in the register unit 1111.
Taking the example that the register group 111 includes two register units 1111, the register units 1111 include 24 flip-flops D, the first register unit 1111 in the first register group 111 includes flip-flops D1 to 24, the second register unit 1111 includes flip-flops D25 to 48, the third register unit 1111 in the second register group 111 includes flip-flops D49 to 72, the fourth register unit 1111 includes flip-flops D73 to 96, when the first connection unit 210 is turned on and the second connection unit 220 is turned off:
since the input ends of the first register unit 1111 and the second register unit 1111 are turned on through the first connection unit 210, the flip-flops D1 to 24 and the flip-flops D25 to 48 simultaneously perform shift sampling, specifically, the flip-flop D1 and the flip-flop D25 simultaneously sample the same data, the flip-flop D2 and the flip-flop D26 simultaneously sample the same data, and so on; since the first register unit 1111 and the second register unit 1111 are connected through the second connection unit 220, the data of the trigger D24 cannot be transmitted to the trigger D25, the data of the trigger D48 can be transmitted to the trigger D49, and similarly, the triggers D49 to 72 and the triggers D73 to 96 perform shift sampling at the same time, the trigger D49 and the trigger D73 sample the same data at the same time, the trigger D50 and the trigger D74 sample the same data at the same time, and so on; as can be seen from this, when the sampling is completed, the first register unit 1111 and the second register unit 1111 sample the display data corresponding to the first unit pixel at the same time, and the third register unit 1111 and the fourth register unit 1111 sample the display data corresponding to the second unit pixel at the same time.
When the first connection unit 210 is turned off and the second connection unit 220 is turned on:
the flip-flops D1 to 24 sequentially perform shift sampling, and since the second connection unit 220 is turned on, data of the flip-flop D24 is transmitted to the flip-flop D25, the flip-flops D25 to D48 shift sample, data of the flip-flop D48 is transmitted to the flip-flop D49, and so on; as can be seen from this, when the sampling is completed, the first register 1111 samples the display data corresponding to the first unit pixel, the second register 1111 samples the display data corresponding to the second unit pixel, the third register 1111 samples the display data corresponding to the third unit pixel, and the fourth register 1111 samples the display data corresponding to the fourth unit pixel.
Further, the first connection unit 210 is a PMOS tube, and the second connection unit 220 is an NMOS tube.
It can be understood that the conduction conditions of the NMOS tube and the PMOS tube are opposite, and after the grid electrodes of the PMOS tube and the NMOS tube are in short circuit, the conduction states of the NMOS tube and the PMOS tube can be controlled by outputting a mode setting signal to the grid electrode of the MOS tube; specifically, when the mode setting signal is a high level signal, the NMOS tube is turned on, and when the mode setting signal is a low level signal, the NMOS tube is turned off, and the PMOS tube is turned on.
It can be appreciated that when the register group 111 includes more than two register units 1111, the PMOS transistors may be set based on practical application scenarios, for example, one PMOS transistor may be respectively disposed between the input ends of two adjacent register units 1111, and the input end of the first register unit 1111 may be respectively connected to the input ends of other register units 1111 through different PMOS transistors.
It should be noted that, since the PMOS and NMOS transistors are in opposite conduction states, in other embodiments, the first connection unit 210 may be set as an NMOS transistor, and the second connection unit 220 may be set as a PMOS transistor.
The invention also provides a circuit driving method, which is applied to a control module and comprises the following steps:
receiving a first mode instruction and generating a first mode signal corresponding to a first mode;
and sending the first mode signal to a switching module and a gray scale adjusting module, so that the switching module sets the data driver to be in a first mode, and the gray scale adjusting module carries out gray scale adjustment on display data output by the shift register.
The first mode instruction is triggered by the user, and specific triggering modes include, but are not limited to, a related button on a display, a software virtual setting item and a corresponding remote control key.
The first mode signal is used for indicating the switching module to set the data driver to a first mode and also used for indicating the gray scale adjusting module to execute gray scale adjusting operation; it can be understood that the second mode command and the corresponding second mode signal may also be set corresponding to the second mode, where the second mode signal instructs the switching module to set the data driver to the second mode and further instructs the gray scale adjustment module not to perform the gray scale adjustment operation.
The specific arrangement manner may refer to the foregoing embodiments, and will not be described in detail.
The invention also provides a circuit driving method which is applied to the gray scale adjusting module and comprises the following steps:
if a first mode signal sent by the control module is received, display data output by the shift register are obtained;
and gray scale adjustment is carried out on the display data.
And if the second mode signal sent by the control module is received, acquiring display data output by the shift register and outputting the display data.
The gray scale adjustment module performs gray scale adjustment operation in the first mode and does not perform gray scale adjustment operation in the second mode.
Further, the step of performing gray scale adjustment on the display data includes:
determining first data corresponding to a first unit pixel and second data corresponding to a second unit pixel in the display data, wherein the data corresponding to the first unit pixel in a first mode and the data corresponding to the second mode are the same, and the data corresponding to the second unit pixel in the first mode and the data corresponding to the second mode are different;
and performing gray scale adjustment on second data corresponding to the second unit pixel according to the first data.
It can be understood that in the first mode, the data corresponding to the first unit pixel is the same as that in the second mode, that is, the data corresponding to the first unit pixel meets the actual display requirement; the shift register synchronously samples in the first mode, and the data corresponding to the second unit pixel is the same as the data corresponding to the first unit pixel, that is, the data corresponding to the second unit pixel causes the problem of hard color transition between the first unit pixels, so that gray scale adjustment needs to be performed on the second unit pixel.
Further, the step of performing gray scale adjustment on the second data corresponding to the second unit pixel according to the first data includes:
determining a first gray scale difference value between first data of adjacent first unit pixels;
determining an interval difference value according to the first gray-scale difference value and the second data of the second unit pixel;
and updating the second data of each second unit pixel according to the interval difference value, so that the corresponding second gray-scale difference value between the adjacent first unit pixels and the second unit pixels or between the adjacent second unit pixels is the interval difference value.
The first gray level difference value is used for indicating the direct gray level difference of the adjacent first unit pixels. The hardness of color transition is often caused by gray scale mutation, so that the gray scale conversion is regulated to be more gentle, and the color transition can be natural.
The interval difference value is used for indicating the gray-scale difference between the second unit pixels after the gray-scale adjustment operation is performed.
Specifically, the step of determining the interval difference value according to the first gray-scale difference value and the second data of the second unit pixel includes:
acquiring the pixel number of the second unit pixel;
adding 1 to the pixel data to obtain the gray level transition number
Dividing the first gray level difference value by the gray level transition number to obtain the interval difference value.
Dividing the first gray level difference value by the gray level transition number to obtain an interval difference value; further, the gray scale value of each second unit pixel is added with the interval difference value according to the arrangement sequence to complete the gray scale adjustment operation; if the gray scale value of the preceding unit pixel is 50 in the adjacent first unit pixel, the gray scale value of the following unit pixel is 90, the first gray scale difference value is 40, the number of the second unit pixels is 3, the interval difference value is 40/3+1=10, the second unit pixel closest to the preceding unit pixel is 1 pixel, the second unit pixel closest to the preceding unit pixel is 2 pixels, and the second unit pixel closest to the preceding unit pixel is 3 pixels, it is understood that the gray scale values of 1, 2, 3 pixels are consistent with the gray scale value of the preceding unit pixel, and are 50; the 1-pixel updated gray-scale value is 50+1×10= 60,2, the 50+2×10= 70,3, and the 50+3×10=80; the gray level transition of the adjacent first unit pixels after updating is sequentially 50-60-70-80-90, and compared with the gray level transition of 50-90 before updating, the gray level transition is gentle, and the display effect is effectively improved. In addition to realizing gray level transition, since a plurality of brightnesses exist in unit pixels actually displayed, a visual angle can be improved; if the display has an equivalent viewing angle effect of 4 Domain domains in the second mode, when the number of second unit pixels between adjacent first unit pixels is 2, the unit pixels displayed in the first mode include two kinds of brightness, and at this time, the equivalent viewing angle effect of 4×2=8 Domain domains can be achieved.
The embodiment can accurately realize gray level smooth transition.
The present invention also protects a display panel, see fig. 6, which includes unit pixels and a driving circuit. The structure of the driving circuit can refer to the above embodiment, and will not be described herein. It should be noted that, since the display panel of the present embodiment adopts the technical scheme of the driving circuit, the display panel has all the beneficial effects of the driving circuit.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or system that comprises the element. The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.
Claims (10)
1. The driving circuit is characterized by comprising a data driver, a switching module and a control module, wherein the data driver comprises a shift register and a gray scale adjusting module, the control end of the shift register is connected with the switching module, the output end of the shift register is connected with the gray scale adjusting module, and the control end of the switching module is connected with the control end of the gray scale adjusting module; wherein:
the control module is used for receiving a first mode instruction, and after generating a first mode signal corresponding to a first mode, sending the first mode signal to the switching module and the gray scale adjusting module;
the switching module is used for controlling the data driver to work in a first mode after receiving the first mode signal, and in the first mode, the shift register is used for sampling display data corresponding to one target unit pixel into display data corresponding to a plurality of unit pixels;
the gray scale adjustment module is used for performing gray scale adjustment on the display data output by the shift register after receiving the first mode signal.
2. The driving circuit according to claim 1, wherein the shift register includes a plurality of sequentially connected register groups, each of the register groups including a plurality of sequentially connected register units corresponding to unit pixels; the switching module is connected with each registering unit, and the output end of each registering unit is connected with the gray scale adjusting module; wherein:
and the switching module is used for controlling the data driver to work in a first mode after receiving the first mode signal, and in the first mode, the registering units in the registering group sample the display data of the target unit pixels corresponding to the registering group at the same time.
3. The driving circuit according to claim 2, wherein the switching module includes a first connection unit and a second connection unit, a control terminal of the first connection unit and a control terminal of the second connection unit are connected with the control module, wherein:
the input ends of the register units in the register group are connected through the first connecting unit;
the register units in the register group are connected through the second connection unit, wherein: the first connection unit and the second connection unit are opposite in conduction state.
4. The driving circuit as recited in claim 3 wherein said first connection unit is a PMOS transistor and said second connection unit is an NMOS transistor.
5. A circuit driving method, applied to a control module, comprising:
receiving a first mode instruction and generating a first mode signal corresponding to a first mode;
and sending the first mode signal to a switching module and a gray scale adjusting module, so that the switching module sets the data driver to be in a first mode, and the gray scale adjusting module carries out gray scale adjustment on display data output by the shift register.
6. A circuit driving method, applied to a gray scale adjustment module, comprising:
if a first mode signal sent by the control module is received, display data output by the shift register are obtained;
and gray scale adjustment is carried out on the display data.
7. The circuit driving method of claim 6, wherein the step of gray scale adjusting the display data comprises:
determining first data corresponding to a first unit pixel and second data corresponding to a second unit pixel in the display data, wherein the data corresponding to the first unit pixel in a first mode and the data corresponding to the second mode are the same, and the data corresponding to the second unit pixel in the first mode and the data corresponding to the second mode are different;
and performing gray scale adjustment on second data corresponding to the second unit pixel according to the first data.
8. The circuit driving method as claimed in claim 7, wherein the step of gray-scale adjusting the second data corresponding to the second unit pixel according to the first data comprises:
determining a first gray scale difference value between first data of adjacent first unit pixels;
determining an interval difference value according to the first gray-scale difference value and the second data of the second unit pixel;
and updating the second data of each second unit pixel according to the interval difference value, so that the corresponding second gray-scale difference value between the adjacent first unit pixels and the second unit pixels or between the adjacent second unit pixels is the interval difference value.
9. The circuit driving method of claim 8, wherein the step of determining an interval difference value according to the first gray scale difference value and the second data of the second unit pixel comprises:
acquiring the pixel number of the second unit pixel;
adding 1 to the pixel data to obtain the gray level transition number
Dividing the first gray level difference value by the gray level transition number to obtain the interval difference value.
10. A display panel comprising unit pixels and a drive circuit according to any one of claims 1 to 4.
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