CN116955030A - Test plan distribution method and system, electronic device and storage medium - Google Patents
Test plan distribution method and system, electronic device and storage medium Download PDFInfo
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Abstract
The invention discloses a test plan distribution method and a system thereof, electronic equipment and a storage medium, wherein an eMMC test system comprises an upper computer and a test board, and the test board is provided with a plurality of eMMC devices; the method comprises the following steps: determining a test task and first resource information required by executing the test task from a preset first test plan list; testing the eMMC device in the test board according to the test task and the first resource information; detecting and recording the execution condition of the test task; under the condition that the execution of the test task fails, acquiring and analyzing log information recorded in the test process to obtain a task failure type mark; under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; retesting the eMMC device in the test board according to the second test plan list; the test efficiency can be effectively improved.
Description
Technical Field
The invention relates to the technical field of eMMC test, in particular to a test plan distribution method and system, electronic equipment and a storage medium.
Background
eMMC (Embedded Multi Media Card) is an embedded multimedia card. The eMMC adopts a unified MMC standard interface, and a high-density NAND-Flash (one type of Flash memory, the inside of which adopts a nonlinear macro-unit mode, so that a cheap and effective solution is provided for the realization of a solid-state large-capacity memory) memory and an MMC-Controller (multimedia Controller) are packaged in a BGA (Ball Grid Array) chip. The eMMC has the main advantages of simplifying the design of the mobile phone memory, having high updating speed and accelerating the research and development speed of the product, so that the eMMC is popular with mobile phone manufacturers. In order to understand the operation performance of eMMC, to eliminate possible faults, the performance of eMMC needs to be tested.
In the related art, in the eMMC testing process, testing is performed according to a preset plan list under normal conditions, but testing resources are limited, and when a certain testing task fails in the testing process, the conditions of overtime or incapability of normal performance and the like of a subsequent test may be affected, so that the testing efficiency is reduced.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein.
The embodiment of the invention provides a test plan distribution method, a system thereof, electronic equipment and a storage medium, which can automatically adjust a test plan to enable a test to be continued under the conditions that the test plan is interrupted and a test task can be restarted, and effectively improve the test efficiency.
In a first aspect, an embodiment of the present invention provides a test plan allocation method, which is applied to an eMMC test system, where the eMMC test system includes an upper computer and a test board, the upper computer is in communication connection with the test board, and the test board carries a plurality of eMMC devices, and the method includes:
determining a test task and first resource information required by executing the test task from a preset first test plan list; wherein the first test plan list comprises a plurality of test tasks and the first resource information distributed to each test task;
testing the eMMC device in the test board according to the test task and the first resource information;
detecting and recording the execution condition of the test task;
under the condition that the execution of the test task fails, acquiring and analyzing log information recorded in the test process to obtain a task failure type mark;
updating the first test plan list to obtain a second test plan list under the condition that the task failure type mark is a first mark or a second mark; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task;
And retesting the eMMC device in the test board according to the second test plan list.
According to some embodiments of the invention, in the case that the task failure type flag is a first flag or a second flag, updating the first test plan list to obtain a second test plan list includes:
under the condition that the task failure type mark is a first mark or a second mark, acquiring the total number of the pre-configured test tasks and the total resource information;
determining the number of the untested residual test tasks and the adjustable total residual resource information in the first test plan list according to the execution condition of the test tasks, the total test task number and the total resource information which are recorded in advance;
deleting the test tasks which are tested and completed from the first test plan list, and reallocating according to a preset allocation rule, the number of the residual test tasks and the total residual resource information to obtain a second test plan list, wherein the second test plan list comprises the residual test tasks and the second resource information required by each residual test task.
According to some embodiments of the invention, the total resource information comprises: the total number of eMMCs and the total planning time delay are preset; the total remaining resource information includes: the residual quantity and the residual time delay of the eMMC; the determining the number of the remaining testing tasks which are not tested in the first testing plan list and the total remaining resource information which can be allocated according to the execution condition of the testing tasks, the total testing task number and the total resource information which are recorded in advance comprises the following steps:
Determining the number of completed tasks, the number of used eMMCs and the used time delay from the recorded execution conditions of the test tasks;
calculating according to the total number of the test tasks and the number of the completed tasks to obtain the number of the remaining test tasks;
calculating according to the total number of eMMCs and the number of used eMMCs to obtain the remaining number of eMMCs;
calculating according to the total planned time delay and the used time delay to obtain the residual time delay;
and determining the total residual resource information according to the eMMC residual quantity and the residual time delay.
According to some embodiments of the present invention, the reassigning according to a preset assignment rule, the number of remaining test tasks and the total remaining resource information to obtain the second test plan list includes:
determining a weight tolerance, a test task priority order and a weight sum value according to the preset allocation rule;
determining an assigned weight coefficient of each remaining test task according to the weight tolerance, the test task priority sequence, the weight sum value and the number of remaining test tasks;
and distributing the eMMC residual quantity and the residual time delay for the residual test tasks according to the distribution weight coefficient to obtain the second resource information used by each residual test task.
According to some embodiments of the invention, the task failure type flag includes: a third flag and a fourth flag, wherein the third flag characterizes a command timeout in the test task and the fourth flag characterizes a data comparison error in the test task; after the task failure type mark is obtained, the method further comprises the following steps:
and under the condition that the task failure type mark is the third mark or the fourth mark, determining that the test task which is currently failed to be executed does not accord with a retest condition, and continuing to execute the next test task in the first test plan list.
According to some embodiments of the invention, after detecting and recording the execution of the test task, the method further includes:
under the condition that the test task is successfully executed, determining the next test task in the first test plan list and the first resource information required by the next test task;
and continuing to test the eMMC device in the test board according to the next test task and the first resource information required by the next test task.
According to some embodiments of the invention, the eMMC test system further includes a terminal device, where the terminal device is communicatively connected to the host computer; after the execution condition of the test task is detected and recorded, the method further comprises the following steps:
Generating a first test comprehensive report according to the execution condition of each test task in the first test plan list;
and sending the first test comprehensive report to the terminal equipment.
In a second aspect, an embodiment of the present invention provides an eMMC test system, including: the test device comprises an upper computer and a test board, wherein the upper computer is in communication connection with the test board, and the test board is provided with a plurality of eMMC devices;
the upper computer is used for:
determining a test task and first resource information required by executing the test task from a preset first test plan list; wherein the first test plan list comprises a plurality of test tasks and the first resource information distributed to each test task;
testing the eMMC device in the test board according to the test task and the first resource information;
detecting and recording the execution condition of the test task;
under the condition that the execution of the test task fails, acquiring and analyzing log information recorded in the test process to obtain a task failure type mark;
updating the first test plan list to obtain a second test plan list under the condition that the task failure type mark is a first mark or a second mark; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task;
And retesting the eMMC device in the test board according to the second test plan list.
In a third aspect, an embodiment of the present invention provides an electronic device, including: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the test plan allocation method as described in the first aspect when the computer program is executed.
In a fourth aspect, embodiments of the present invention provide a computer readable storage medium storing computer executable instructions for execution by a processor to implement the test plan allocation method of the first aspect.
The embodiment of the invention comprises the following steps: the eMMC test system comprises an upper computer and a test board which are in communication connection, wherein the test board is provided with a plurality of eMMC devices; determining a test task and first resource information required by executing the test task from a preset first test plan list by utilizing an upper computer of an eMMC test system; the first test plan list comprises a plurality of test tasks and first resource information distributed to each test task; then, testing the eMMC device in the test board according to the test task and the first resource information; then, detecting and recording the execution condition of the test task, and under the condition that the execution of the test task fails, acquiring and analyzing the recorded log information in the test process to obtain a task failure type mark; then, under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task; and retesting the eMMC device in the test board according to the second test plan list so as to improve the test efficiency. That is, the embodiment of the invention can automatically adjust the test plan to enable the test to continue under the condition that the test plan is interrupted and the test task can be restarted, thereby effectively improving the test efficiency.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
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The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an eMMC test system for performing a test plan allocation method according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a specific structure of an eMMC test system according to an embodiment of the present invention;
FIG. 3 is a flow chart of a test plan allocation method provided by an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a specific flow of step S150 in FIG. 3;
FIG. 5 is a schematic diagram illustrating a specific flow of step S230 in FIG. 3;
FIG. 6 is a schematic diagram of a first test plan list provided by one embodiment of the present invention;
FIG. 7 is a schematic diagram of a second test plan list obtained after updating the first test plan list, according to one embodiment of the present invention.
Fig. 8 is a schematic hardware structure of an electronic device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent.
It should be noted that although a logical order is illustrated in the flowchart in the description of the present invention, in some cases, the steps illustrated or described may be performed in an order different from that in the flowchart. In the description of the present invention, a plurality means one or more, and a plurality means two or more. The description of "first" and "second" is used for the purpose of distinguishing between technical features only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.
First, several terms involved in the present invention are explained:
eMMC (Embedded Multi Media Card) is an embedded memory standard specification defined by the MMC society and mainly aimed at products such as mobile phones and tablet computers. The eMMC integrates a controller in the package, providing a standard interface and managing the flash memory.
In the related art, in the eMMC testing process, testing is performed according to a preset plan list under normal conditions, but testing resources are limited, and when a certain testing task fails in the testing process, the conditions of overtime or incapability of normal performance and the like of a subsequent test may be affected, so that the testing efficiency is reduced.
Based on the above, the invention provides a test plan distribution method, an eMMC test system, electronic equipment and a computer readable storage medium, wherein the eMMC test system comprises an upper computer and a test board which are in communication connection, and the test board is provided with a plurality of eMMC devices; determining a test task and first resource information required by executing the test task from a preset first test plan list by utilizing an upper computer of an eMMC test system; the first test plan list comprises a plurality of test tasks and first resource information distributed to each test task; then, testing the eMMC device in the test board according to the test task and the first resource information; then, detecting and recording the execution condition of the test task, and under the condition that the execution of the test task fails, acquiring and analyzing the recorded log information in the test process to obtain a task failure type mark; then, under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task; and retesting the eMMC device in the test board according to the second test plan list so as to improve the test efficiency. That is, the embodiment of the invention can automatically adjust the test plan to enable the test to continue under the condition that the test plan is interrupted and the test task can be restarted, thereby effectively improving the test efficiency.
Embodiments of the present invention will be further described below with reference to the accompanying drawings.
In one aspect, as shown in fig. 1, the eMMC testing system 100 includes a host computer 110 and a test board 120, where the host computer 110 and the test board 120 are communicatively connected, and the test board 120 carries a plurality of eMMC devices.
Wherein the eMMC device is a subject to be tested, and the test board 120 is used for performing a test on the eMMC device; the upper computer 110 monitors the eMMC test procedure on the test board 120.
Specifically, the upper computer is used for: determining a test task and first resource information required by executing the test task from a preset first test plan list; the first test plan list comprises a plurality of test tasks and first resource information distributed to each test task; then, testing the eMMC device in the test board according to the test task and the first resource information; then, detecting and recording the execution condition of the test task, and under the condition that the execution of the test task fails, acquiring and analyzing the recorded log information in the test process to obtain a task failure type mark; then, under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task; and retesting the eMMC device in the test board according to the second test plan list so as to improve the test efficiency. Therefore, the eMMC test system provided by the embodiment of the invention can automatically adjust the test plan to enable the test to be continued under the condition that the test plan is interrupted and the test task can be restarted, thereby effectively improving the test efficiency.
As shown in fig. 2, the eMMC test system 100 includes a host computer 110, a plurality of test boards 120, and a terminal device 130, where the host computer 110 is respectively in communication connection with the plurality of test boards 120 and the terminal device 130, and each test board 120 is equipped with a plurality of eMMC devices.
The upper computer 110 may correspondingly perform eMMC testing on the plurality of test boards 120 according to a preset plurality of test plan lists; when the test on one test board 120 is completed, the interface is switched and another test board 120 is tested. Alternatively, at least two test boards 120 are tested simultaneously to improve the test efficiency.
The terminal device 130 is configured to receive a first comprehensive test report generated during the process of executing the test plan list, so that a tester knows the execution condition of each test task in the test plan list through the first comprehensive test report, and can provide a reliable reference for the subsequent new test plan list.
It will be appreciated by persons skilled in the art that the system architecture shown in the figures is not limiting of the embodiments of the invention and may include more or fewer components than shown, or certain components may be combined, or a different arrangement of components.
The system embodiments described above are merely illustrative, in that the units illustrated as separate components may or may not be physically separate, i.e., may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
It will be understood by those skilled in the art that the system architecture and the application scenario described in the embodiments of the present invention are for more clearly describing the technical solution of the embodiments of the present invention, and are not limited to the technical solution provided in the embodiments of the present invention, and those skilled in the art can know that, with the evolution of the system architecture and the appearance of the new application scenario, the technical solution provided in the embodiments of the present invention is equally applicable to similar technical problems.
Based on the above system configuration, various embodiments of the test plan allocation method of the present invention are presented below.
On the other hand, as shown in fig. 3, the test plan allocation method can be applied to the eMMC test system shown in fig. 1. The eMMC test system comprises an upper computer and a test board, wherein the upper computer is in communication connection with the test board, and the test board is provided with a plurality of eMMC devices. The test plan allocation method may include, but is not limited to, steps S110 to S160.
Step S110: determining a test task and first resource information required by executing the test task from a preset first test plan list; the first test plan list comprises a plurality of test tasks and first resource information distributed to the test tasks.
Step S120: and testing the eMMC device in the test board according to the test task and the first resource information.
Step S130: and detecting and recording the execution condition of the test task.
Step S140: under the condition that the execution of the test task fails, acquiring and analyzing the log information recorded in the test process to obtain a task failure type mark.
Step S150: under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task.
Step S160: retests the eMMC devices in the test board according to the second test plan list.
It is understood that the first resource information includes: a first eMMC number and a first test delay; the test task comprises a plurality of test cases. Specifically, through step S120, at least one eMMC device is called according to the first eMMC number, and in the first test time delay, the state of the interface between the eMMC device and the test board is kept as the test state, so as to execute the test case in the test task. And calling the eMMC devices of the first eMMC quantity in the first test time delay, and executing the test cases in the test task.
Through steps S110 to S160, in the embodiment of the present invention, by using an upper computer of an eMMC test system, a test task and first resource information required for executing the test task are determined from a preset first test plan list; the first test plan list comprises a plurality of test tasks and first resource information distributed to each test task; then, testing the eMMC device in the test board according to the test task and the first resource information; then, detecting and recording the execution condition of the test task, and under the condition that the execution of the test task fails, acquiring and analyzing the recorded log information in the test process to obtain a task failure type mark; then, under the condition that the task failure type mark is a first mark or a second mark, updating the first test plan list to obtain a second test plan list; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task; and retesting the eMMC device in the test board according to the second test plan list so as to improve the test efficiency. Therefore, the embodiment of the invention can automatically adjust the test plan to enable the test to continue under the condition that the test plan is interrupted and the test task can be restarted, thereby effectively improving the test efficiency.
Step S150 is further described with reference to fig. 4, and step S150 includes, but is not limited to, steps S210 to S230, according to some embodiments of the present invention.
Step S210: under the condition that the task failure type mark is a first mark or a second mark, acquiring the total number of the pre-configured test tasks and the total resource information;
step S220: determining the number of the remaining testing tasks which are not tested in the first testing plan list and the total available remaining resource information according to the execution condition of the testing tasks, the total testing task number and the total resource information which are recorded in advance;
step S230: deleting the test tasks which are tested and completed from the first test plan list, and reallocating according to a preset allocation rule, the number of the residual test tasks and the total residual resource information to obtain a second test plan list, wherein the second test plan list comprises the residual test tasks and the second resource information required by each residual test task.
Through steps S210 to S230, in the case that the task failure type flag is the first flag or the second flag, it is determined that the currently executed failed test task meets the retest condition, and resources and test tasks are reasonably allocated according to the number of untested remaining test tasks and the total available resource information, so as to obtain a second test plan list, so as to improve the resource utilization rate and ensure higher test efficiency.
Specifically, the total resource information includes: the total number of eMMCs and the total planning time delay are preset; the total remaining resource information includes: eMMC remaining number and remaining latency.
Step S220 is further described according to some embodiments of the present invention, step S220: the method for determining the number of the testing tasks which are not tested in the first testing plan list and the total resource information which can be allocated according to the execution condition of the testing tasks which are recorded in advance, the total testing task number and the total resource information comprises the following steps:
firstly, determining the number of completed tasks, the number of used eMMCs and the used time delay from the recorded execution conditions of the test tasks;
secondly, calculating according to the total test task number and the completed task number to obtain the residual test task number;
then, calculating according to the total number of eMMCs and the number of used eMMCs to obtain the residual number of eMMCs;
then, calculating according to the total planned time delay and the used time delay to obtain the residual time delay;
and finally, determining total residual resource information according to the residual quantity and the residual time delay of the eMMC.
Specifically, after the number of completed tasks, the number of used eMMC and the used time delay are obtained, the number of completed tasks is subtracted from the total number of test tasks to obtain the number of remaining test tasks, the total number of eMMC is subtracted from the number of used eMMC to obtain the remaining number of eMMC, the total plan time delay is subtracted from the used time delay to obtain the callable remaining time delay, and total remaining resource information is generated according to the remaining number of eMMC and the remaining time delay, so that reliable reference information is provided for reasonably adjusting the test plan.
Step S230 is further described in connection with fig. 5, and step S230 includes, but is not limited to, steps S310 through S330 according to some embodiments of the present application.
Step S310: and determining weight tolerance, test task priority and weight sum value according to a preset allocation rule.
In this step, the weight tolerance refers to the difference value of the assigned weight coefficients between two test tasks adjacent to each other in the execution sequence, and the weight tolerance may be configured in advance, which is not particularly limited in this aspect of the present application; the priority of the test tasks is also configured in advance, wherein the priority is from high to low; specifically, the weight sum value is 1.
Step S320: and determining the assigned weight coefficient of each residual test task according to the weight tolerance, the test task priority sequence, the weight sum value and the residual test task number.
In the step, according to the weight tolerance, the weight sum value and the number of the residual test tasks, the first item, the middle item and the last item of the arithmetic series with the increasing numerical value can be obtained; determining the leader of the arithmetic sequence as the distribution weight coefficient of the residual test task with the lowest priority level; determining the last item of the arithmetic series as the distribution weight coefficient of the residual test task with the highest priority level; and according to an allocation rule that the lower the priority order is, the lower the allocation weight coefficient is, the middle items of the arithmetic series are determined as the allocation weight coefficients of other residual test tasks one by one.
Step S330: and distributing the eMMC residual quantity and residual time delay for the residual test tasks according to the distribution weight coefficient to obtain second resource information used by each residual test task.
In this step, the second resource information includes: the redistributed second eMMC quantity and second test time delay; the test task comprises a plurality of test cases. Acquiring an allocation weight coefficient of each residual test task, multiplying the allocation weight coefficient by the residual eMMC number to obtain a second eMMC number which is reassigned by the residual test task; multiplying the distribution weight coefficient by the residual time delay to obtain a second test time delay to which the residual test task is redistributed, and obtaining second resource information used by each residual test task.
Specifically, after step S330, retesting is performed according to the second test plan list, in this process, at least one eMMC device is called according to the number of the second eMMC devices that are reassigned, and in the second test time delay that is reassigned, the state of the interface between the eMMC device and the test board is made to be the test state continuously, and the test cases in the remaining test tasks are executed.
According to the embodiment of the invention, through the steps S310 to S330, the residual quantity and the residual time delay of the eMMC are distributed for the residual test tasks, so that a re-planned second test plan list can be obtained, the eMMC device can be tested according to the test tasks and the second resource information in the second test plan list, and the test efficiency is improved.
According to some embodiments of the present invention, after the task failure type flag is obtained in step S140, the test plan allocation method further includes, but is not limited to, the following steps:
and under the condition that the task failure type mark is a third mark or a fourth mark, determining that the currently-executed failed test task does not accord with the retest condition, and continuing to execute the next test task in the first test plan list.
In some embodiments, the task failure type flag includes: and the fourth mark is used for indicating that the data comparison in the test task is wrong.
Specifically, under the condition that the task failure type mark is a third mark or a fourth mark, determining that the interrupted test task does not accord with the retest condition; under the condition that the test task does not accord with the retest condition, the test task which fails to test is skipped, and the next test task in the first test plan list is continuously executed, so that the follow-up test in the first test plan list can be ensured to be normally carried out, and the improvement of the test efficiency is facilitated.
According to some embodiments of the invention, step S130: after "detect and record execution of test tasks", the test plan allocation method further includes, but is not limited to, the following steps:
Under the condition that the test task is successfully executed, determining the next test task in the first test plan list and first resource information required by the next test task; and continuing to test the eMMC device in the test board according to the next test task and the first resource information required by the next test task.
Specifically, the execution condition of the test task includes execution success and execution failure, and under the condition that the execution of the test task is successful, the next test task in the first test plan list and first resource information required to be called by the next test task are determined, and corresponding resources are automatically called according to the first resource information to execute the next test task, so that the test is continued, and the efficient test efficiency is maintained.
According to some embodiments of the present invention, the eMMC test system further includes a terminal device, where the terminal device is in communication connection with the host computer; step S130: after "detect and record execution of test tasks", the test plan allocation method further includes, but is not limited to, the following steps:
generating a first test comprehensive report according to the execution condition of each test task in the first test plan list; and sending the first test comprehensive report to the terminal equipment.
Specifically, a first comprehensive test report generated in the process of executing the first test plan list is sent to the terminal device, so that a tester can know the execution condition of each test task in the first execution test plan list through the first comprehensive test report, and reliable reference can be provided for the subsequent new test plan list preparation. The first test comprehensive report comprises the information such as the resources actually occupied by the test task, the test task failure information, the test task success information and the like, and further, the test task failure information also comprises a task failure type mark, so that a tester can know the reason for the failure of the test task.
In an embodiment, in the process of generating a second test plan list and retesting the eMMC device in the test board according to the second test plan list, a second test comprehensive report is generated according to the execution condition of each test task in the second test plan list; and sending the second comprehensive test report to the terminal equipment so that the tester can know the execution condition of each test task in the retesting process, and the reliable reference is provided for the subsequent new test plan list preparation.
As an example, the test plan allocation method and how to update the first test plan list to obtain the second test plan list according to the embodiment of the present application are further described with reference to fig. 6 and 7.
The first test plan list shown in fig. 6 includes: the method comprises the steps of testing tasks and corresponding first resource information, wherein the first resource information comprises: a first eMMC number and a first test latency. The eight test tasks are respectively a test task A, a test task B, a test task C, a test task D, a test task E, a test task F, a test task G and a test task H; the number of first emmcs assigned to the eight test tasks is: 10, 20, 30, 12, 16, 17, 21, and 34; the first test delays assigned to the eight test tasks are: t, 2T, 3T, 1.2T, 1.6T, 1.7T, 2.1T and 3.4T. Furthermore, from the first test plan list of fig. 6, it is also known that the total resource information, i.e., the preset eMMC total number is 150, and the total plan delay is 15T. It can be understood that T is a timing period, and the value thereof can be customized, and the application does not limit the value of T.
In addition, it should be noted that the preset test task priority sequence is: test task A, test task B, test task C, test task D, test task E, test task F, test task G, test task H.
According to the priority sequence of the test tasks, firstly, calling resources according to the first resource information of the test task A, executing the test task A, and under the condition that the test of the test task A and the test task B is completed and successful, calling the resources according to the first resource information of the test task C, and continuing to execute the test task C.
And under the condition that the test task C fails in the test and the task failure type mark obtained by analyzing the log information is a third mark or a fourth mark, determining that the test task which fails to be executed currently does not accord with the retest condition, and continuing to execute the test task D.
Under the condition that the test task D fails in test and the task failure type mark obtained by analyzing the log information is a first mark or a second mark, determining that the test task which fails to be executed currently meets retest conditions, and updating a first test plan list.
When updating the first test plan list, firstly obtaining 8 total preset test tasks; and determining that the total number of the preset eMMCs in the total resource information is 150, and the total planning time delay is 15T.
Then, according to the execution condition of the previously executed test tasks, the number of completed tasks is determined to be 3, the number of used eMMCs is determined to be 50, and the used time delay is determined to be 5T. And the number of the untested residual test tasks in the first test plan list is 5, and the residual time delay is 10T in the total residual resource information which can be allocated.
Then, the test task A, the test task B and the test task C which cannot be restarted after the test is completed are deleted from the first test plan list.
Then, a weight tolerance of 0.05 is determined from a preset allocation rule, the priority order of the test tasks is unchanged, and the sum of the weights is 1.
And then, calculating according to the weight tolerance, the weight sum value and the number of the residual test tasks to obtain the first term, the middle term and the last term of the arithmetic series with the increasing value. Specifically, according to the sum formula of the arithmetic progression: s is S n ＝na 1 +n (n-1) d/2, where d is the tolerance, n is the number of columns, a 1 Is the first of the arithmetic series. When d=0.05, s n =1, n=5; the first term of the arithmetic series can be calculated to be 0.1, that is, the arithmetic series {0.1,0.15,0.2,0.25,0.3} can be obtained, and the arithmetic series {0.1,0.15,0.2,0.25,0.3} is the distribution weight coefficient to be distributed.
Then, according to the distribution rule that the lower the priority order is, the lower the distribution weight coefficient is, the distribution weight coefficients of the rest test task D, test task E, test task F, test task G and test task H are respectively determined as follows: 0.3, 0.25, 0.2, 0.15, 0.1.
And then, determining the number of the redistributed second eMMCs and the second test time delay of the rest test tasks according to the distribution weight coefficients of the test tasks D, E, F, G and H. For example, the number of second emmcs assigned to the test task D is: 100 x 0.3=30, and the assigned second test delay is: 10T 0.3=3t.
Finally, a second test plan list is obtained for the re-plan as shown in FIG. 7.
The second test plan list shown in fig. 7 includes: the residual test tasks and corresponding second resource information, the second resource information comprising: and the second eMMC quantity after reassignment and the second test time delay. The number of the remaining test tasks is 5, namely a test task D, a test task E, a test task F, a test task G and a test task H; the number of second emmcs allocated to the 5 remaining test tasks is: 30, 25, 20, 15, 10; the second test delays assigned to the 5 remaining test tasks are respectively: 3T, 2.5T, 2T, 1.5T, T. And then, retesting is carried out according to the second test plan list which is planned again.
It can be understood that the application scenario described in this embodiment is for more clearly describing the technical solution of the embodiment of the present invention, and does not constitute a limitation on the technical solution provided by the embodiment of the present invention, and those skilled in the art can know that, with the appearance of the new application scenario, the technical solution provided by the embodiment of the present invention is also applicable to similar technical problems.
In a third aspect, referring to fig. 8, an electronic device 800 includes: memory 820, processor 810, and a computer program stored on memory 820 and executable on the processor, processor 810 implementing the test plan allocation method as in the first aspect when executing the computer program.
Processor 810 and memory 820 may be connected by a bus or other means.
The processor 810 may be implemented by a general-purpose central processing unit, a microprocessor, an application specific integrated circuit, or one or more integrated circuits, etc., for executing relevant programs to implement the technical solutions provided by the embodiments of the present invention.
Memory 820 acts as a non-transitory computer readable storage medium that can be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some implementations, memory 820 may optionally include memory located remotely from the processor, which may be connected to the processor via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The non-transitory software programs and instructions required to implement the test plan allocation method of the above embodiments are stored in memory and when executed by a processor perform the test plan allocation method of the above embodiments, for example, perform the method steps shown in fig. 3, 4, 5 described above.
The apparatus embodiments or system embodiments described above are merely illustrative, in which elements illustrated as separate components may or may not be physically separate, i.e., may be located in one place, or may be distributed over multiple network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions for execution by a processor or controller, for example, by one of the above-described apparatus embodiments, which may cause the above-described processor to perform the test plan allocation method of the above-described embodiment, for example, to perform the method steps shown in fig. 3, 4, 5 described above.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the above embodiments, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present invention, and these equivalent modifications and substitutions are intended to be included in the scope of the present invention.
Claims (10)
1. The utility model provides a test plan distribution method, characterized in that is applied to eMMC test system, eMMC test system includes host computer and test board, wherein, the host computer with test board communication connection, test board carries on a plurality of eMMC devices, and the method includes:
determining a test task and first resource information required by executing the test task from a preset first test plan list; wherein the first test plan list comprises a plurality of test tasks and the first resource information distributed to each test task;
testing the eMMC device in the test board according to the test task and the first resource information;
detecting and recording the execution condition of the test task;
under the condition that the execution of the test task fails, acquiring and analyzing log information recorded in the test process to obtain a task failure type mark;
Updating the first test plan list to obtain a second test plan list under the condition that the task failure type mark is a first mark or a second mark; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task;
and retesting the eMMC device in the test board according to the second test plan list.
2. The method for allocating a test plan according to claim 1, wherein updating the first test plan list to obtain a second test plan list in the case that the task failure type flag is a first flag or a second flag comprises:
under the condition that the task failure type mark is a first mark or a second mark, acquiring the total number of the pre-configured test tasks and the total resource information;
determining the number of the untested residual test tasks and the adjustable total residual resource information in the first test plan list according to the execution condition of the test tasks, the total test task number and the total resource information which are recorded in advance;
deleting the test tasks which are tested and completed from the first test plan list, and reallocating according to a preset allocation rule, the number of the residual test tasks and the total residual resource information to obtain a second test plan list, wherein the second test plan list comprises the residual test tasks and the second resource information required by each residual test task.
3. The test plan allocation method according to claim 2, wherein the total resource information includes: the total number of eMMCs and the total planning time delay are preset; the total remaining resource information includes: the residual quantity and the residual time delay of the eMMC; the determining the number of the remaining testing tasks which are not tested in the first testing plan list and the total remaining resource information which can be allocated according to the execution condition of the testing tasks, the total testing task number and the total resource information which are recorded in advance comprises the following steps:
determining the number of completed tasks, the number of used eMMCs and the used time delay from the recorded execution conditions of the test tasks;
calculating according to the total number of the test tasks and the number of the completed tasks to obtain the number of the remaining test tasks;
calculating according to the total number of eMMCs and the number of used eMMCs to obtain the remaining number of eMMCs;
calculating according to the total planned time delay and the used time delay to obtain the residual time delay;
and determining the total residual resource information according to the eMMC residual quantity and the residual time delay.
4. The test plan allocation method according to claim 3, wherein said reallocating according to a preset allocation rule, the number of remaining test tasks and the total remaining resource information to obtain the second test plan list includes:
Determining a weight tolerance, a test task priority order and a weight sum value according to the preset allocation rule;
determining an assigned weight coefficient of each remaining test task according to the weight tolerance, the test task priority sequence, the weight sum value and the number of remaining test tasks;
and distributing the eMMC residual quantity and the residual time delay for the residual test tasks according to the distribution weight coefficient to obtain the second resource information used by each residual test task.
5. The test plan allocation method according to claim 1, wherein the task failure type flag includes: a third flag and a fourth flag, wherein the third flag characterizes a command timeout in the test task and the fourth flag characterizes a data comparison error in the test task; after the task failure type mark is obtained, the method further comprises the following steps:
and under the condition that the task failure type mark is the third mark or the fourth mark, determining that the test task which is currently failed to be executed does not accord with a retest condition, and continuing to execute the next test task in the first test plan list.
6. The method for assigning a test plan according to claim 5, further comprising, after said detecting and recording the execution of the test task:
under the condition that the test task is successfully executed, determining the next test task in the first test plan list and the first resource information required by the next test task;
and continuing to test the eMMC device in the test board according to the next test task and the first resource information required by the next test task.
7. The test plan distribution method according to claim 6, wherein the eMMC test system further includes a terminal device, the terminal device being communicatively connected to the host computer; after the execution condition of the test task is detected and recorded, the method further comprises the following steps:
generating a first test comprehensive report according to the execution condition of each test task in the first test plan list;
and sending the first test comprehensive report to the terminal equipment.
8. An eMMC test system, comprising: the test device comprises an upper computer and a test board, wherein the upper computer is in communication connection with the test board, and the test board is provided with a plurality of eMMC devices;
The upper computer is used for:
determining a test task and first resource information required by executing the test task from a preset first test plan list; wherein the first test plan list comprises a plurality of test tasks and the first resource information distributed to each test task;
testing the eMMC device in the test board according to the test task and the first resource information;
detecting and recording the execution condition of the test task;
under the condition that the execution of the test task fails, acquiring and analyzing log information recorded in the test process to obtain a task failure type mark;
updating the first test plan list to obtain a second test plan list under the condition that the task failure type mark is a first mark or a second mark; the first mark represents a case crash in the test task, and the second mark represents a case test timeout in the test task;
and retesting the eMMC device in the test board according to the second test plan list.
9. An electronic device, comprising: memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the test plan allocation method according to any one of claims 1 to 7 when executing the computer program.
10. A computer readable storage medium having stored thereon computer executable instructions executable by a processor to implement the test plan allocation method of any one of claims 1 to 7.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100274520A1 (en) * | 2009-04-22 | 2010-10-28 | International Business Machines Corporation | Creation of test plans |
| CN107832206A (en) * | 2017-10-16 | 2018-03-23 | 深圳市牛鼎丰科技有限公司 | Method of testing, device, computer-readable recording medium and computer equipment |
| CN109491898A (en) * | 2018-10-30 | 2019-03-19 | 武汉思普崚技术有限公司 | Testing efficiency method for improving and equipment based on automatic test and case management |
| CN114328226A (en) * | 2021-12-28 | 2022-04-12 | 苏州浪潮智能科技有限公司 | Test plan data generation method and related device |
| CN115543765A (en) * | 2021-06-30 | 2022-12-30 | 中兴通讯股份有限公司 | Test case scheduling method and device, computer equipment and readable medium |
| CN116126719A (en) * | 2023-02-08 | 2023-05-16 | 北京百度网讯科技有限公司 | Interface testing method and device, electronic equipment and storage medium |
-
2023
- 2023-06-28 CN CN202310781431.5A patent/CN116955030B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100274520A1 (en) * | 2009-04-22 | 2010-10-28 | International Business Machines Corporation | Creation of test plans |
| CN107832206A (en) * | 2017-10-16 | 2018-03-23 | 深圳市牛鼎丰科技有限公司 | Method of testing, device, computer-readable recording medium and computer equipment |
| CN109491898A (en) * | 2018-10-30 | 2019-03-19 | 武汉思普崚技术有限公司 | Testing efficiency method for improving and equipment based on automatic test and case management |
| CN115543765A (en) * | 2021-06-30 | 2022-12-30 | 中兴通讯股份有限公司 | Test case scheduling method and device, computer equipment and readable medium |
| CN114328226A (en) * | 2021-12-28 | 2022-04-12 | 苏州浪潮智能科技有限公司 | Test plan data generation method and related device |
| CN116126719A (en) * | 2023-02-08 | 2023-05-16 | 北京百度网讯科技有限公司 | Interface testing method and device, electronic equipment and storage medium |
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