CN116915701B

CN116915701B - Data processor-based route acceleration method, system and device

Info

Publication number: CN116915701B
Application number: CN202311032177.5A
Authority: CN
Inventors: 黄云鹏; 荆慧; 黄明亮; 鄢贵海
Original assignee: Yusur Technology Co ltd
Current assignee: Yusur Technology Co ltd
Priority date: 2023-08-16
Filing date: 2023-08-16
Publication date: 2024-04-19
Anticipated expiration: 2043-08-16
Also published as: CN116915701A

Abstract

The invention provides a routing acceleration method, a system and a device based on a data processor, which virtualize the function of a target physical network card, sink routing data and routing calculation tasks of a host end to a DPU (data processing unit), and utilize the high-speed and high-efficiency processing capacity of the data processor to perform parallel calculation, so that the load of the host is reduced, the calculation resources are released, the performance and the usability are improved, and the delay of the transmission of data packets to the host end for processing is avoided. And simultaneously, a virtual functional unit and a virtual network interface are configured for the target physical network card based on the SR-IOV, so that a network port of a host end is avoided, the delay of data forwarding is reduced, and the synchronous acceleration of a routing protocol is realized.

Description

Data processor-based route acceleration method, system and device

Technical Field

The present invention relates to the field of data routing technologies, and in particular, to a method, a system, and an apparatus for accelerating routing based on a data processor.

Background

A routing protocol is a protocol in a computer network for exchanging routing information between different network nodes. The main purpose of the routing protocol is to help routers in the network know routing information of different destinations, and determine an optimal routing path according to the information, so as to realize data communication among different nodes in the network.

In the conventional routing method, the host side sends and receives routing protocol data, which causes higher calculation overhead, increases routing update delay, and reduces system performance and efficiency. This form has significant drawbacks in high traffic scenarios with low latency and high reliability requirements, negatively impacting large networks and user experience. The scenario where conventional routing protocols are used only on the host side also presents a series of problems, such as slow routing switches and long link failure recovery times, resulting in packet loss and service interruption, and possible delays in route synchronization.

Therefore, in a scenario with a large network and a high time-delay requirement, the use of the conventional routing protocol at the host side cannot meet the requirements of applications such as cloud computing and artificial intelligence on high performance and low latency, and a method and a device for accelerating routing are needed.

Disclosure of Invention

In view of this, embodiments of the present invention provide a method, a system, and an apparatus for accelerating routing based on a data processor, so as to eliminate or improve one or more drawbacks existing in the prior art, and solve the problems of large computation overhead, high delay, and reduced system performance caused by performing routing computation and data transceiving on a host side in a conventional routing scheme.

In one aspect, the present invention provides a routing acceleration method based on data processors, the method being used for executing on a preset host, the host deploying one or more data processors, the method comprising the steps of:

Configuring, by the host, a target physical network card into a plurality of virtual functional units based on Single Root I/O Virtualization (SR-IOV) to virtualize a hardware function of the target physical network card, each of the virtual functional units configuring a virtual network interface;

Assigning an independent first physical address and a high speed serial computer expansion bus standard address (PCIe address) to each of the virtual functional units, and configuring network parameters for each virtual network interface;

Matching each virtual functional unit to one of the data processors through a corresponding one of the virtual network interfaces, and assigning the virtual network interface of each virtual functional unit to a plurality of services, each service of the plurality of services running on one or more virtual machines loaded by the host;

And unloading the respective routing protocol configuration information, the routing protocol configuration engine and the routing table to the corresponding data processor by each virtual functional unit, and issuing the data to be forwarded generated by each service to the corresponding data processor by the virtual machine running the service to execute routing calculation and forwarding.

In some embodiments, the virtual function units are set according to a set number, and each virtual function unit allocates the bandwidth of the target physical network card according to a preset proportion or average.

In some embodiments, network parameters are configured for each virtual network interface, including at least: IP address, subnet mask, default gateway, second physical address, and Domain Name System (DNS) server address.

In some embodiments, the first physical address and the high speed serial computer expansion bus standard address are generated in a predefined form or dynamically generated.

In some embodiments, routing computation is performed and forwarded by a virtual machine running the service to a corresponding data processor, including:

analyzing the routing protocol configuration information by the data processor to obtain network topology, link state and routing strategy;

And the data processor executes the route calculation of the data to be forwarded by using the route protocol configuration engine, and records the calculated shortest path in the route table according to the forwarded starting node and target node.

In some embodiments, performing, by the data processor, routing computation of the data to be forwarded using the routing protocol configuration engine, includes:

Initializing network topology according to the routing protocol configuration information, and creating an empty routing table for recording the shortest path between nodes;

inquiring the initialized network topology, acquiring a plurality of paths which can be reached between a target initial node and a target final node, respectively distributing each routing path to a plurality of data processors, and calculating the score of each routing path according to a set algorithm;

After each data processor selects a local shortest path with the lowest score from the distributed paths, each data processor screens out a global shortest path from all the local shortest paths;

And recording the global shortest path as the shortest path between the target initial node and the target final node in the routing table.

In some embodiments, calculating the score for each routing path according to a set algorithm includes:

Constructing a weighted directed graph, wherein nodes of the directed graph are routing nodes, and edges of the directed graph represent connection relations of the routing nodes, wherein 1 represents communication and 0 represents non-communication; the weight is used for marking the distance of the edge;

the score is a value of all row-side weighted sums over the routing path.

and each data processor calculates a shortest route path by adopting a Di Jie St-Lag algorithm or a Floride algorithm, and sends the data to be forwarded according to the shortest route path.

In another aspect, the present invention further provides a routing acceleration system based on a data processor, which is characterized in that the system includes: a communication network formed by a plurality of hosts, wherein each host is loaded with one or more data processors; the host and each data processor are used for executing the routing acceleration method based on the data processor.

In another aspect, the present invention also provides a computer readable storage medium having stored thereon a computer program, characterized in that the program when executed by a processor implements the steps of the above method.

The invention has the advantages that:

According to the routing acceleration method, system and device based on the data processor, the functions of the target physical network card are virtualized, routing data and routing calculation tasks of the host end are sunk on the DPU of the data processor, the high-speed and high-efficiency processing capacity of the data processor is utilized for parallel calculation, the load of the host is reduced, calculation resources are released, the performance and usability are improved, and delay of data packet transmission to the host end for processing is avoided. And simultaneously, a virtual functional unit and a virtual network interface are configured for the target physical network card based on the SR-IOV, so that a network port of a host end is avoided, the delay of data forwarding is reduced, and the synchronous acceleration of a routing protocol is realized.

Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.

It will be appreciated by those skilled in the art that the objects and advantages that can be achieved with the present invention are not limited to the above-described specific ones, and that the above and other objects that can be achieved with the present invention will be more clearly understood from the following detailed description.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate and together with the description serve to explain the application. In the drawings:

Fig. 1 is a flow chart of a routing acceleration method based on a data processor according to an embodiment of the invention.

Fig. 2 is a schematic diagram of a routing protocol synchronization acceleration scheme of a routing acceleration method based on a data processor according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a cross-node routing protocol synchronous acceleration scheme of a routing acceleration method based on a data processor according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the following embodiments and the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. The exemplary embodiments of the present invention and the descriptions thereof are used herein to explain the present invention, but are not intended to limit the invention.

It should be noted here that, in order to avoid obscuring the present invention due to unnecessary details, only structures and/or processing steps closely related to the solution according to the present invention are shown in the drawings, while other details not greatly related to the present invention are omitted.

It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components.

It is also noted herein that the term "coupled" may refer to not only a direct connection, but also an indirect connection in which an intermediate is present, unless otherwise specified.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the drawings, the same reference numerals represent the same or similar components, or the same or similar steps.

The conventional host side route synchronization does not fully consider the synchronization reliability, so that the problem of synchronization delay and packet loss is serious. In a large network environment, the synchronization efficiency will be severely affected. For frequently started and stopped services, server-side delay may have an impact on normal service operation. In high-traffic networks, conventional route synchronization schemes require a lot of computational resources, resulting in synchronization delays and traffic loss. For a service that needs to be started and stopped frequently, the routing synchronization delay may seriously affect the normal operation of the service. Conventional routers employ software-based forwarding, which may result in increased delays associated with context switching and data replication.

In order to overcome the problems, the application adopts a routing protocol synchronous acceleration method based on a Data Processor (DPU), and sinks a routing synchronous task to the DPU, thereby effectively reducing the delay increase caused by context switching and data replication, and further improving the routing synchronous efficiency. Under this architecture, the DPU is able to efficiently handle route synchronization tasks, achieving higher throughput and lower latency. By sinking network tasks to the DPU, the route synchronization efficiency can be remarkably improved, the synchronization delay and the packet loss rate are reduced, and the network performance and the service availability are further improved. The sinking routing protocol can automatically adjust the routing strategy according to the network condition, and the reliability and the elasticity of the network are improved. The power assisting device is used for assisting in realizing a high-performance low-delay self-adaptive network.

It should be noted that in the present application, the Data Processor (DPU) is a new generation processor for computing with data as a center, and integrates the complete data center function into a single chip, which is a special hardware component or chip, and aims to accelerate the data processing task in the data center and the network device, and the DPU, the Central Processing Unit (CPU) and the Graphics Processor (GPU) together form three new computing pillars. The data processor, as a dedicated hardware device, can be used for network acceleration, storage acceleration, security reinforcement and machine learning acceleration, and the hardware design of the DPU is optimized and built specifically for a specific task, thus providing excellent performance on the relevant task. By using a DPU, the system can achieve higher data processing speed and responsiveness. Because the DPU is dedicated to a particular task, its hardware design may achieve lower power consumption. This means that the DPU can more efficiently use energy while achieving the same task, reducing the energy costs of the system. The DPU may offload some of the heavy data processing tasks on the main processor (CPU). This allows the CPU to focus on more complex computing tasks, improving overall system performance and response speed. The design of the DPU makes it possible to accelerate specific functions, such as encryption, decryption, compression, etc., at the hardware level. This hardware acceleration provides more efficient data processing, particularly in the security and storage areas. The DPU can isolate different tasks to special hardware, thereby improving the safety and stability of the system. This isolation helps to prevent interference between tasks.

Specifically, the present invention provides a data processor-based routing acceleration method, which is used for executing on a preset host, wherein the host deploys one or more Data Processors (DPUs), as shown in fig. 1, and the method comprises the following steps S101 to S104:

Step S101: the target physical network card is configured into a plurality of virtual function units by the host based on SR-IOV (Single Root I/O Virtualization) to virtualize the hardware function of the target physical network card, and each virtual function unit is configured with a virtual network interface.

Step S102: each virtual functional unit is assigned an independent first physical address and a high-speed serial computer expansion bus standard address, and network parameters are configured for each virtual network interface.

Step S103: each virtual function unit is matched to a data processor through a corresponding virtual network interface, and the virtual network interfaces of the virtual function units are distributed to a plurality of services, and each service in the plurality of services runs on one or more virtual machines loaded by a host.

Step S104: and unloading the respective routing protocol configuration information, the routing protocol configuration engine and the routing table to the corresponding data processor by each virtual functional unit, and issuing the data to be forwarded generated by each service to the corresponding data processor by the virtual machine running the service to execute routing calculation and forwarding.

In step S101, SR-IOV (Single Root I/O Virtualization) is a computer hardware virtualization technique, allowing for improved network performance and reduced virtualization overhead in a virtualized environment. Its goal is to enhance the direct access capability of Virtual Machines (VMs) to physical hardware devices such as network adapters and storage adapters, thereby providing better performance and throughput. In this embodiment, a virtual function unit is established based on the function of the target physical network card, and the function of the target physical network card is executed by using the established virtual function unit.

In some embodiments, the virtual function units are arranged according to a set number, and each virtual function unit allocates the bandwidth of the target physical network card according to a preset proportion or average. For example, a network card with a bandwidth of 1000M may be divided into a plurality of virtual function units VF with a bandwidth of 100M, i.e. virtual network cards. The advantage of this form is that it can be communicated from the container network to the physical network card, only through one layer of network protocol stack processing, without first reaching the kernel protocol stack of the host, and it has less one layer of network processing, able to realize low delay and improve performance.

Further, a virtual network interface is provided for each virtual function unit, so as to provide a separate, virtualized network interface for a Virtual Machine (VM) or container, so that it can communicate with a network. The VNIC acts as a bridge between the VF and the internal network stack of the virtual machine, allowing the virtual machine to communicate directly with the physical network through the VF, thereby achieving higher performance and lower virtualization overhead.

In step S102, in order to meet the communication requirement, an independent first physical address and a high-speed serial computer expansion bus standard address are allocated to the virtual function unit, and network parameters are configured for each virtual network interface, so as to ensure direct communication with the network, improve communication efficiency, and improve performance.

In some embodiments, each virtual network interface configures network parameters including at least: IP address, subnet mask, default gateway, second physical address, and DNS server address.

Wherein the virtual network interface needs to be assigned a unique IP address for identifying the location of the interface on the network. The subnet mask is used to determine boundaries of the network portion and the host portion of the IP address for classification of the network address. The gateway address is the exit of the network where the virtual network interface is located, and is used for forwarding data packets between different networks. The virtual network interface needs to have a unique MAC address for identifying the interface at the data link layer. The DNS server address is used for domain name resolution to convert a domain name to an IP address so that the virtual network interface can access other network devices through the domain name.

In step S103, a dedicated data processor DPU is configured for each virtual function unit VF, and in this embodiment, the data processor DPU is configured specifically for the data routing function, and has a higher data processing capability for the task. Each virtual function unit VF may support the functionality of one or more services that run through virtual machines that are loaded within the host. The data generated by the service is issued to the data processor DPU by the virtual function unit VF in the routing process for routing calculation and forwarding.

In step S104, the specially configured data processor DPU performs route calculation and forwarding on the data to be forwarded based on the loaded routing protocol configuration information, the routing protocol configuration engine and the routing table. The host side automatically installs the related driver of the DPU and the corresponding SRIOV virtualization function by constructing a cloud platform controller. When the external routing network data packet is sent, the network data packet is sunk to the DPU side for routing calculation and forwarding through PCI communication by a virtual network card pair connected with the host side and the DPU side, so that the sinking operation of the routing protocol is realized.

In some embodiments, the virtual machine running the service performs routing computation and forwards the routing computation to the corresponding data processor, including steps S1041 to S1042:

Step S1041: the routing protocol configuration information is parsed by the data processor to obtain the network topology, link state and routing policy.

Step S1042: the data processor uses the routing protocol configuration engine to execute the routing calculation of the data to be forwarded, and records the shortest path obtained by calculation in the routing table according to the forwarding starting node and the forwarding target node.

In some embodiments, the routing computation of the data to be forwarded is performed by the data processor using the routing protocol configuration engine, comprising steps S201-S204:

Step S201: initializing network topology according to the routing protocol configuration information, and creating an empty routing table for recording the shortest path between nodes.

Step S202: inquiring and initializing network topology, acquiring a plurality of paths which can reach between a target initial node and a target final node, respectively distributing each routing path to a plurality of data processors, and calculating the score of each routing path according to a set algorithm.

Step S203: after each data processor selects a local shortest path with the lowest score from the dispatched paths, each data processor screens out a global shortest path from all the local shortest paths.

Step S204: and recording the global shortest path as the shortest path between the target initial node and the target final node in a routing table.

In some embodiments, in step S202, the score of each routing path is calculated according to a set algorithm, including steps S2021 to S2022:

Step S2021: constructing a weighted directed graph, wherein nodes of the directed graph are routing nodes, and edges of the directed graph represent connection relations of the routing nodes, wherein 1 represents communication and 0 represents non-communication; the weights are used to mark the distances of the edges.

Step S2022: the score is the value of all the row-side weighted sums on the routing path.

In some embodiments, routing computation is performed and forwarded by a virtual machine running the service to a corresponding data processor, including: and each data processor calculates the shortest route path by adopting a Di Jie St-Lag algorithm or a Floride algorithm, and sends the data to be forwarded according to the shortest route path.

For the dijkstra algorithm, its inputs are: a weighted directed graph and a starting point. The nodes of the directed graph are routing nodes, the edges of the directed graph represent the connection relation of the routing nodes, wherein 1 represents communication and 0 represents non-communication; the weights are used to mark the distances of the edges. The output is the shortest path from the start point to all other nodes in the graph. The method comprises the following steps: 1) The distance from the initialization start point to all other nodes is infinity, and the distance from the start point to itself is 0. 2) The starting point is added to the set S. 3) And for each node v adjacent to the starting point, updating the distance from the starting point to v, and recording the precursor nodes. 4) The node closest to the start point is selected from the nodes that have not been visited to join the set S. 5) Repeating steps 3 and 4 until all nodes have been accessed or no nodes are reachable. 6) And obtaining the shortest path from the starting point to other nodes in the reverse order according to the recorded precursor nodes.

For the florid algorithm, the input is a weighted directed graph. The nodes of the directed graph are routing nodes, the edges of the directed graph represent the connection relation of the routing nodes, wherein 1 represents communication and 0 represents non-communication; the weights are used to mark the distances of the edges. The output is the shortest path between any two nodes. The method comprises the following steps: 1) Initializing a distance matrix between nodes, wherein if a direct edge exists between two nodes, the distance is the weight of the edge, otherwise, the distance is infinity. 2) For each pair of nodes u and v, an attempt is made to update the distance between u and v by the intermediate node k, i.e., dist [ u ] [ v ] =min (dist [ u ] [ v ], dist [ u ] [ k ] +dist [ k ] [ v ]). 3) And repeating the step 2 until all the intermediate nodes are traversed. 4) The shortest path between any two nodes is obtained.

The invention is described below in connection with a specific embodiment:

the present embodiment provides a routing protocol synchronous acceleration method based on a DPU, referring to fig. 2 and fig. 3, including the following steps:

1. A DPU device is introduced:

1.1 connecting the DPU with the host, correctly inserting the DPU device into the PCIe slot of the host.

1.2, Installing a corresponding DPU driver to ensure that the DPU equipment and the host normally work.

1.3 The host system is configured to communicate with the DPU and to ensure that the DPU can offload routing protocols and routing synchronization functions at the host side.

2. Creating a plurality of virtual NICs using SR-IOV techniques:

2.1 for each virtual NIC to be created, the following steps are performed:

2.1.1 enabling SR-IOV functionality on a host:

step 1: a BIOS or UEFI setting of the host is entered.

Step 2: enable the SR-IOV support option and save the settings.

2.1.2 SR-IOV function of configured physical network card:

Step 1: an Ethernet physical network card using the SR-IOV is determined.

Step 2: the SR-IOV function of the physical network card is configured by the management tool BIOS of the host. The specific steps may vary from hardware to hardware and vendor to vendor and generally involve specifying the number of Virtual Functions (VFs) and the allocation of resources.

2.1.3 Determining the physical network card using the SR-IOV, i.e. determining which physical network card will be used for the combination of SR-IOV and DPU.

2.1.4 Configuration of Virtual Functions (VFs) and Virtual NICs (VNICs):

Step 1: it is determined that each VF corresponds to a VNIC for communicating with the DPU device.

Step 2: each VF is assigned an independent MAC address and PCIe address. These addresses may be predefined or dynamically generated, depending on the particular needs.

Step 3: the network parameters of each VNIC are configured, including IP address, subnet mask, default gateway, etc. These parameters should be appropriately configured according to the requirements.

2.2 Assigning virtual NICs to DPU devices and corresponding services:

2.2.1 associating VF and VNIC with DPU device: the DPU device is configured on the host to identify and communicate with the corresponding VF and VNIC.

2.2.2 Virtual NICs are assigned to different services:

Step 1: virtual NICs (VNICs) are flexibly assigned to different services depending on traffic demands and network traffic loads.

Step 2: each virtual NIC is associated with a corresponding service using the network configuration tool (ifconfig or ip commands) or management interface of the host. Each virtual NIC is ensured to have an independent IP address and routing table for flexible and efficient network resource allocation and management.

3. Cooperative work of virtual machine and DPU:

In a DPU-based system architecture DPU (Data Processing Unit) is a specialized hardware device, typically as part of a host system, that processes network packets, performs routing computations, and management functions. It has a certain relationship with the host system and the virtual machine.

The entire network may be a virtualized environment containing multiple virtual machines and DPUs. These virtual machines may be isolated environments of different operating system instances or applications on the host system. They run on the host computer through virtualization technologies (e.g., virtual machine monitor or container manager) and communicate with the DPU.

The following is an example describing in order of precedence the processing and forwarding of data in a DPU-based network:

3.1 data generation, wherein the data enters the virtual machine inside the virtual machine or through a network.

3.2 Data processing:

3.2.1 virtual machine internal processing: an application or operating system in the virtual machine performs the necessary processing operations, such as parsing the packet header, performing protocol operations, etc. The network stack within the virtual machine may handle a portion of the routing computation, but for complex routing protocols and large-scale network topologies, the computing resources of the virtual machine may be limited.

3.2.2 Data transfer to DPU: the virtual machine transfers the processed data to the DPU for further processing and routing computation. The virtual machine may transmit the data packets over a particular interface or communication mechanism to its associated DPU.

3.2.3DPU perform routing computation and management functions: the DPU processes the received data packets using its configured routing computation engine and management functions. It may execute various routing protocols such as OSPF, BGP or proprietary protocols, etc., calculate the best paths and generate corresponding routing tables by dynamically learning network topology and routing information.

3.2.4 Packet forwarding: the DPU decides the next hop destination of the data packet according to the calculation result and the information in the routing table. It may modify the header information of the data packet and forward the data packet to the appropriate egress interface.

3.3 Cooperative work of virtual machine and DPU: the DPU cooperates with the virtual machine by forwarding the data packet back to the virtual machine or sending the data packet to other devices on the network, thereby realizing the overall network function.

4. Take over the traffic offload routing protocol and route synchronization function of the host:

4.1 configuring a routing protocol engine and routing table of the DPU device: a routing protocol engine and corresponding software or hardware modules are configured on the DPU device for executing routing protocol algorithms and storing routing tables.

4.2 Transmitting routing protocol configuration information to the DPU device: and transmitting the routing protocol configuration information of the host side to the DPU device. This may be accomplished by communicating with the DPU device and sending configuration information to a corresponding module or storage area on the DPU device.

4.3DPU performs route calculation and selection: based on the transmitted routing protocol configuration information, the DPU device performs routing computation and selection operations to determine the best path and associated routing information for each destination in the network. The method comprises the following steps:

step 1: the DPU device receives the transmitted routing protocol configuration information, including network topology, link status, routing policies, etc.

Step 2: the DPU device parses and processes the received routing protocol configuration information to learn about nodes and connection relationships in the network.

Step 3: based on the configuration information and the network state, the DPU device executes a routing calculation algorithm, and the embodiment adopts an improved version of the shortest path algorithm and combines the DPU device to accelerate and optimize.

Step 3.1: initializing a network topology and a routing table: an initial distance value is set for each node, the distance value of the initial node is set to 0, and the other nodes are set to infinity. An empty routing table is created, and the shortest path between nodes and next-hop node information are recorded.

Step 3.2: selecting a starting node: an originating node is selected in the network topology. The remaining nodes are marked as not visited and a distance value is assigned starting from the start point.

Step 3.3: and (3) starting route calculation:

and selecting one node from the nodes which are not accessed, calculating the value of the next node of the path, storing the path score, and updating the value of the adjacency matrix.

Step 3.4: selecting the next node:

A node with the smallest distance value is selected as the next node to be accessed. The value of the next node of the path is calculated, the path score is stored, and the value of the adjacency matrix is updated.

Step 3.5: repeating the steps 3.3 and 3.4:

Steps 3.3 and 3.4 are repeated until all nodes are marked as accessed. In each iteration, the node with the smallest next distance value is selected, and the distance values of the adjacent nodes are updated until the shortest path from the starting node to all other nodes is found.

Step 3.6: parallel computing shortest path:

In the whole calculation process, all nodes between the starting node and the target node are divided into a plurality of subsets, a plurality of candidate paths are constructed, and the candidate paths are distributed to different DPU devices for parallel calculation. Each DPU device is responsible for calculating the distance of the assigned candidate path.

For each DPU device, a shortest path algorithm is performed in the assigned candidate paths, looking up the shortest path of the candidate paths assigned to it. High performance parallel computing algorithms and data structures are used to fully exploit the computing power of the DPU device.

Step 3.7: combining the calculation results:

And merging the shortest path results calculated by each DPU device into global shortest path information, and updating a global routing table.

The improved algorithm utilizes the parallel computing capability of the DPU devices, distributes computing tasks to a plurality of DPU devices for parallel computing, and accelerates the speed of route computing. By reasonably designing the algorithm and the data structure, the calculation resources of the DPU device are fully utilized, and the calculation efficiency of the shortest path is optimized. Further, the DPU can significantly improve the execution efficiency and speed of the routing protocol, whether for proprietary protocols or existing standard routing protocols, by utilizing its efficient computational power and dedicated hardware accelerators.

For the private protocol, the DPU realizes the rapid analysis and processing of the data packet by realizing the key function of the private protocol on a special hardware accelerator thereof. This includes parsing protocol headers, extracting routing information, calculating routing paths, and so on. The DPU uses efficient computing power to execute algorithms and logic required by the private protocol, routing decisions based on custom rules, updating and maintenance of routing tables, and the like. The hardware accelerator of the DPU can be optimized according to the specific requirements of the private protocol, and the hardware parallelism, the special algorithm, the data structure and the like are utilized to improve the execution efficiency and the execution speed.

For existing standard routing protocols, the DPU supports common standard routing protocols such as OSPF (open shortest path first), BGP (border gateway protocol), etc. These protocols are routing protocols that are widely used in networks, and DPUs can provide efficient execution through hardware accelerators. Fast forwarding table lookup, cache of routing tables, etc., to increase the speed and efficiency of protocol execution.

The DPU takes over the traffic of the host: the DPU device is configured to receive and process network traffic at the host side. The host system redirects traffic to the DPU device by adjusting the network configuration so that the DPU device can receive and process the traffic.

The present embodiment sinks the routing protocol to the DPU to achieve more efficient route computation and management, and the conventional host-side routing protocol requires a large amount of CPU and memory resources to handle the routing table and route synchronization functions. This may affect the efficiency and stability of data transmission in large data center networks. By offloading these tasks to the DPU, host-side CPU and memory usage is reduced, thereby achieving better resource allocation and overall system performance. Improving processing efficiency and reducing delay: the DPU is designed specifically for high performance computing, optimized for network processing tasks. The routing protocol and the routing synchronization function are transferred to the DPU, so that the processing efficiency can be improved, the delay can be reduced, and more responsive and flexible network infrastructure can be realized. Simultaneously utilizing the SR-IOV technology: multiple virtual network interface cards (vnics) can be created on a host using SR-IOV techniques to achieve concurrent network processing and increased throughput. This further improves network performance and helps to handle large volumes of traffic more efficiently.

The route calculation and management capability of the DPU can be dynamically adjusted according to network load and topology, so as to realize network self-adaption and overcome the traditional route synchronization challenge: in low latency scenarios and high traffic networks, conventional route synchronization methods may lead to latency, packet loss, and problems that may affect normal traffic operation. By adopting the DPU-based routing protocol synchronous acceleration method, the challenges are effectively solved, and more reliable and consistent network performance is ensured. The route synchronization efficiency is improved: sinking the route synchronization task to the DPU can significantly improve the efficiency of the synchronization process. This results in reduced synchronization delay and packet loss rate, ensuring higher network performance and service availability in demanding network environments. Automatically adjusting a routing policy: the sink routing protocol may automatically adjust the routing policy based on current network conditions. This adaptation capability ensures that the network remains reliable and resilient in the face of dynamic changes, providing a solid foundation for critical applications and services.

Further, in a low latency, high reliability scenario, a large number of hosts need to communicate with each other. In the conventional host-side routing protocol, each host needs to maintain a routing table and update the routing table in real time to reflect the change of the network topology, which results in high CPU and memory usage on the host side, and may affect the efficiency and stability of data transmission due to the routing synchronization delay. Based on this background, DPU (data processing unit) route calculation and management is implemented. According to the scheme, the routing protocol is sunk to the DPU, so that the CPU and memory utilization rate of the host side is reduced, the processing efficiency of the host side is improved, and the delay is reduced. Furthermore, the introduction of DPUs and SR-IOV techniques allows for offloading of routing protocols and routing synchronization functions to the DPUs such that each host need only maintain its own virtual network interface card (vNIC) and send data packets to the corresponding vNIC. The packet is forwarded to the DPU and then routed by querying a routing table on the DPU. Since the routing calculation is not required to be performed on the host side, the CPU and memory utilization rate of the host side can be reduced, the processing efficiency of the host side can be improved, and the delay can be reduced. Meanwhile, the use of the SR-IOV technology on the DPU enables a plurality of virtual NICs to be supported, thereby improving the parallel network processing capacity and throughput and further improving the network performance.

The DPU has flexible route calculation and management capability, and can be dynamically adjusted according to network load and topology to realize network self-adaption. Unlike traditional host side routing protocols that require manual maintenance and updating of routing tables, by introducing a DPU, routing computation and management capabilities can be dynamically adjusted on the DPU, enabling network adaptation. Thus, when the network condition changes, the DPU can adjust the routing strategy according to the actual situation, ensure the network performance to be optimized, and improve the network availability, reliability and performance.

In summary, according to the routing acceleration method, system and device based on the data processor, when the function of the target physical network card is virtualized, routing data and routing calculation tasks of the host end are sunk on the DPU of the data processor, and the high-speed and high-efficiency processing capacity of the data processor is utilized for parallel calculation, so that the load of the host is reduced, the calculation resources are released, the performance and usability are improved, and the delay of the transmission of the data packet to the host end is avoided. And simultaneously, a virtual functional unit and a virtual network interface are configured for the target physical network card based on the SR-IOV, so that a network port of a host end is avoided, the delay of data forwarding is reduced, and the synchronous acceleration of a routing protocol is realized.

Accordingly, the present invention also provides an apparatus/system comprising a computer device including a processor and a memory, the memory having stored therein computer instructions for executing the computer instructions stored in the memory, the apparatus/system implementing the steps of the method as described above when the computer instructions are executed by the processor.

The embodiments of the present invention also provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the edge computing server deployment method described above. The computer readable storage medium may be a tangible storage medium such as Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, floppy disks, hard disk, a removable memory disk, a CD-ROM, or any other form of storage medium known in the art.

Those of ordinary skill in the art will appreciate that the various illustrative components, systems, and methods described in connection with the embodiments disclosed herein can be implemented as hardware, software, or a combination of both. The particular implementation is hardware or software dependent on the specific application of the solution and the design constraints. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, a plug-in, a function card, or the like. When implemented in software, the elements of the invention are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine readable medium or transmitted over transmission media or communication links by a data signal carried in a carrier wave.

It should be understood that the invention is not limited to the particular arrangements and instrumentality described above and shown in the drawings. For the sake of brevity, a detailed description of known methods is omitted here. In the above embodiments, several specific steps are described and shown as examples. The method processes of the present invention are not limited to the specific steps described and shown, but various changes, modifications and additions, or the order between steps may be made by those skilled in the art after appreciating the spirit of the present invention.

In this disclosure, features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments and/or in combination with or instead of the features of the other embodiments.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations can be made to the embodiments of the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method of data processor-based routing acceleration, the method being applied to a host, the host deploying one or more data processors, the method comprising the steps of:

Configuring a target physical network card into a plurality of virtual function units based on single-root I/O virtualization by the host to virtualize the hardware function of the target physical network card, wherein each virtual function unit is configured with a virtual network interface;

assigning an independent first physical address and a high-speed serial computer expansion bus standard address to each virtual functional unit, and configuring network parameters for each virtual network interface;

2. The data processor-based routing acceleration method of claim 1, wherein the virtual function units are arranged according to a set number, and each virtual function unit allocates the bandwidth of the target physical network card according to a preset ratio or on average.

3. The method for accelerating routing based on data processor according to claim 1, wherein the network parameters are configured for each virtual network interface, and the network parameters at least include: IP address, subnet mask, default gateway, second physical address, and domain name system server address.

4. The data processor-based routing acceleration method of claim 1, wherein the first physical address and the high-speed serial computer expansion bus standard address are generated in a predefined form or dynamically generated.

5. The data processor-based route acceleration method of claim 1, wherein the virtual machine running the service issues to the corresponding data processor to perform route calculation and forwarding, comprising:

6. The data processor-based routing acceleration method of claim 5, wherein performing, by the data processor, routing computation of the data to be forwarded using the routing protocol configuration engine, comprises:

7. The data processor-based route acceleration method of claim 6, wherein calculating the score of each route path according to a set algorithm comprises:

the score is a value of all row-side weighted sums over the routing path.

8. The data processor-based route acceleration method of claim 1, wherein the virtual machine running the service issues to the corresponding data processor to perform route calculation and forwarding, comprising:

9. A data processor-based routing acceleration system, comprising: a communication network formed by a plurality of hosts, wherein each host is loaded with one or more data processors; the host and each data processor are configured to perform the data processor-based route acceleration method of any one of claims 1 to 8.

10. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the steps of the method according to any one of claims 1 to 8.