CN116915202B - LC band-pass filter with adjustable transmission zero point - Google Patents
LC band-pass filter with adjustable transmission zero point Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
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- H03H7/01—Frequency selective two-port networks
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Abstract
The invention discloses an LC band-pass filter with an adjustable transmission zero, which mainly solves the problems of large size and difficult tuning of frequency bands and transmission zero of the traditional switch filter bank. The LC band-pass filter comprises a first zero circuit, a first tuning circuit and a zero bias circuit, wherein the input end of the first tuning circuit is connected with one output end of the first zero circuit, one output end of the first tuning circuit is connected with the other input end of the first zero circuit, one end of the first tuning circuit is connected with an inductor L2 of the output end of the first tuning circuit, and the input end of the second tuning circuit is connected with the other end of the inductor L2 and the output end of the second tuning circuit is connected with the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1. The LC band-pass filter has the same frequency band and out-of-band transmission zero adjustable function, and can realize the function index of the switch filter bank only by the size of a single filter in the switch filter bank, thereby having obvious volume advantage.
Description
Technical Field
The invention belongs to the technical field of band-pass filters, and particularly relates to an LC band-pass filter with an adjustable transmission zero point.
Background
In the design of a radio frequency circuit, the application of the LC band-pass filter in an intermediate frequency circuit has irreplaceable effects and advantages, along with the development of miniaturization and integration of a board-level circuit at the present stage, the volume occupied by the traditional LC band-pass filter in the circuit is difficult to optimize, and particularly when a multi-section switch filter bank is involved, the system not only needs to segment the filter to optimize and avoid in-band spurious, but also needs to carry out-of-band spurious suppression with higher out-of-band suppression, and the volume of the switch filter bank is particularly prominent. It is therefore important to reduce the size of the filter in the circuit. Furthermore, individual bandpass filters are generally difficult to adjust after the parameters in the circuit have cured, and if the parameters are to be changed, the components need to be replaced, which is difficult to achieve in a practical circuit.
Disclosure of Invention
The invention aims to provide an LC band-pass filter with an adjustable transmission zero, which mainly solves the problems that the size of a traditional switch filter bank is large, and the frequency band and the transmission zero are difficult to tune.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
an LC band-pass filter with an adjustable transmission zero comprises a first zero circuit, a first tuning circuit and a zero bias circuit, wherein the input end of the first zero circuit is connected with a port P1, the input end of the first tuning circuit is connected with one output end of the first zero circuit, one output end of the zero bias circuit is connected with the other input end of the first zero circuit, one end of the zero bias circuit is connected with an inductor L2 connected with the output end of the first tuning circuit, and the input end of the second tuning circuit is connected with the other end of the inductor L2 and the output end of the second tuning circuit is connected with the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1.
Further, the invention also comprises a second zero circuit; the second zero circuit consists of a varactor D2, a varactor D4 and an inductor L3 which are mutually connected in parallel; the varactors D2 and D4 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L3 and the cathode of the varactor diode D4 are used as the output end of the second zero circuit to be connected with the port P2, and the other end of the inductor L3 is used as one input end of the second zero circuit to be connected with the output end of the second tuning circuit; the negative pole of the varactor diode D4 is also connected to the other output terminal of the zero bias circuit.
Further, the invention also includes a capacitor C1 connected between the port P1 and the input terminal of the first zero circuit and a capacitor C2 connected between the port P2 and the inductor L3 as the output terminal of the second zero circuit.
Further, in the present invention, the first zero circuit is composed of a varactor D1, a varactor D3, and an inductance L1 connected in parallel with each other; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit.
Further, in the invention, the first tuning circuit is composed of an inductor L4 and a capacitor C3, one end of the inductor L4 is connected with one end of the inductor L1 serving as an output end of the first zero circuit, and the other end of the inductor L1 is grounded; one end of the capacitor C3 is connected with one end of the inductor L1 serving as the output end of the first zero circuit, and the other end of the capacitor C is grounded; the common terminal of the inductor L4 and the capacitor C3 is connected to one terminal of the inductor L2.
Further, in the present invention, the second tuning circuit is composed of an inductor L5 and a capacitor C4, one end of the inductor L5 is connected to one end of the inductor L3 serving as an input end of the second zero circuit, and the other end is grounded; one end of the capacitor C4 is connected with one end of the inductor L3 serving as an input end of the second zero circuit, and the other end of the capacitor C is grounded; the common terminal of the inductor L5 and the capacitor C4 is connected to the other terminal of the inductor L2.
Further, in the invention, the zero bias circuit is composed of a resistor R1, a resistor R2 and a resistor R3; one end of a resistor R2 is used as one output end of a zero bias circuit and is connected with the cathode of a varactor diode D1 in a first zero circuit, one end of a resistor R3 is connected with the other end of the resistor R2, and the other end of the resistor R3 is used as the other output end of the zero bias circuit and is connected with the cathode of the varactor diode D2 in a second zero circuit; one end of the resistor R1 is connected with the common end of the resistor R2 and the resistor R3, and the other end of the resistor R1 is connected with the zero bias voltage VT1.
Further, the invention also comprises a tuning bias circuit connected with the first tuning circuit and the second tuning circuit, a capacitor C1 connected between the port P1 and the input end of the first zero circuit, and an inductor L3 and a capacitor C2 connected between the port P2 and the output end of the second tuning circuit after being connected in series;
the tuning bias circuit consists of a resistor R4, a resistor R5 and a resistor R6; one end of the resistor R4 is used as one output end of the tuning bias circuit to be connected with the first tuning circuit, one end of the resistor R5 is connected with the other end of the resistor R4, and the other end of the resistor R5 is used as the other output end of the tuning bias circuit to be connected with the second tuning circuit; one end of the resistor R6 is connected with the common end of the resistor R4 and the resistor R5, and the other end of the resistor R6 is connected with the tuning bias voltage VT2;
the first zero circuit consists of a varactor D1, a varactor D3 and an inductor L1 which are mutually connected in parallel; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit;
the first tuning circuit consists of a capacitor C5, a varactor diode D6, a varactor diode D7, a capacitor C3 and an inductor L4; one end of the inductor L4 is connected with one end of the inductor L1 serving as the other output end of the first zero circuit, the other end of the inductor L4 is grounded, one end of the capacitor C3 is connected with one ungrounded end of the inductor L4, and the capacitor C5, the varactor diode D6 and the varactor diode D7 are connected in parallel, and one end of the capacitor D7 is connected with the other end of the capacitor C3 and the other end of the capacitor D is grounded after the capacitor D is connected in parallel; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D5 is grounded; the common end of the inductor L4 and the capacitor C3 is connected with one end of the inductor L2; the cathode of the varactor diode D5 is connected with one end of a resistor R4 in the tuning bias circuit;
the second tuning circuit consists of a capacitor C6, a varactor diode D8, a varactor diode D9, a varactor diode D10, a capacitor C4 and an inductor L5; one end of the inductor L5 is connected with one end of the inductor L3, the other end of the inductor L3 is grounded, and one end of the capacitor C4 is connected with one ungrounded end of the inductor L5; one end of the capacitor C6, the varactor diode D8, the varactor diode D9 and the varactor diode D10 are connected in parallel, and the other end of the capacitor is connected with the other end of the capacitor C4 in parallel and is grounded; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D9 is grounded; the cathode of the varactor diode D9 is connected with one end of a resistor R5 in the tuning bias circuit; the common end of the capacitor C4 and the inductor L5 is connected with the other end of the inductor L2;
the zero bias circuit consists of a resistor R1 and a resistor R2; one end of the resistor R2 is used as an output end of the zero bias circuit and connected with the cathode of the varactor diode D1 in the first zero circuit, one end of the resistor R1 is connected with the other end of the resistor R2, and the other end of the resistor R1 is connected with the zero bias voltage VT1.
Further, the invention also comprises a tuning bias circuit connected with the first tuning circuit and the second tuning circuit;
the tuning bias circuit consists of a resistor R4, a resistor R5 and a resistor R6; one end of the resistor R4 is used as one output end of the tuning bias circuit to be connected with the first tuning circuit, one end of the resistor R5 is connected with the other end of the resistor R4, and the other end of the resistor R5 is used as the other output end of the tuning bias circuit to be connected with the second tuning circuit; one end of the resistor R6 is connected with the common end of the resistor R4 and the resistor R5, and the other end of the resistor R6 is connected with the tuning bias voltage VT2;
the first tuning circuit consists of a capacitor C5, a varactor diode D6, a varactor diode D7, a capacitor C3 and an inductor L4; one end of the inductor L4 is connected with one end of the inductor L1 serving as the other output end of the first zero circuit, the other end of the inductor L4 is grounded, one end of the capacitor C3 is connected with one ungrounded end of the inductor L4, and the capacitor C5, the varactor diode D6 and the varactor diode D7 are connected in parallel, and one end of the capacitor D7 is connected with the other end of the capacitor C3 and the other end of the capacitor D is grounded after the capacitor D is connected in parallel; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D5 is grounded; the common end of the inductor L4 and the capacitor C3 is connected with one end of the inductor L2; the cathode of the varactor diode D5 is connected with one end of a resistor R4 in the tuning bias circuit;
the second tuning circuit consists of a capacitor C6, a varactor diode D8, a varactor diode D9, a varactor diode D10, a capacitor C4 and an inductor L5; one end of the inductor L5 is connected with one end of the inductor L3, the other end of the inductor L3 is grounded, and one end of the capacitor C4 is connected with one ungrounded end of the inductor L5; one end of the capacitor C6, the varactor diode D8, the varactor diode D9 and the varactor diode D10 are connected in parallel, and the other end of the capacitor is connected with the other end of the capacitor C4 in parallel and is grounded; the varactors D8, D9 and D10 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactors D9 is grounded; the cathode of the varactor diode D9 is connected with one end of a resistor R5 in the tuning bias circuit; the common end of the capacitor C4 and the inductor L5 is connected with the other end of the inductor L2;
the zero bias circuit consists of a resistor R1, a resistor R2 and a resistor R3; one end of a resistor R2 is used as one output end of a zero bias circuit and is connected with the cathode of a varactor diode D1 in a first zero circuit, one end of a resistor R3 is connected with the other end of the resistor R2, and the other end of the resistor R3 is used as the other output end of the zero bias circuit and is connected with the cathode of the varactor diode D2 in a second zero circuit; one end of the resistor R1 is connected with the common end of the resistor R2 and the resistor R3, and the other end of the resistor R1 is connected with the zero bias voltage VT1.
Compared with the prior art, the invention has the following beneficial effects:
(1) The adjustable LC band-pass filter with the adjustable transmission zero has the same frequency band and out-of-band transmission zero adjustable function, and can realize the function index of the switch filter set only by the size of a single filter in the switch filter set, thereby having obvious volume advantages.
(2) According to the adjustable LC band-pass filter with the adjustable transmission zero point, the voltage is tuned, so that the passband and the out-of-band transmission zero point of the filter are adjusted, the working band of the current filter is ensured, the out-of-band inhibition of the current filter is ensured, and the passband and the out-of-band zero point of a single LC band-pass filter are adjustable.
(3) The adjustable LC band-pass filter with the adjustable transmission zero is easy to solidify for hardware parameters of a working bandwidth, can change frequency response by changing tuning voltage, and has higher use flexibility in an actual circuit.
(4) The adjustable LC band-pass filter with the adjustable transmission zero has the advantages that the insertion loss of a passband is small, and the insertion loss is less than 2.5dB; the suppression at the out-of-band transmission zero is high with greater than 80dB suppression.
Drawings
Fig. 1 is a schematic circuit diagram of an embodiment 1 of the present invention.
Fig. 2 is a schematic circuit diagram of embodiment 2 of the present invention.
Fig. 3 is a schematic circuit diagram of embodiment 3 of the present invention.
Fig. 4 is a frequency response curve obtained by adjusting the zero bias voltage VT1 and the tuning bias voltage VT2 simultaneously according to the present invention-example 3.
Detailed Description
The invention will be further illustrated by the following description and examples, which include but are not limited to the following examples.
Example 1
As shown in fig. 1, the LC band-pass filter of the present embodiment is suitable for an environment where passband adjustability is not required. The LC band-pass filter comprises a first zero circuit, a first tuning circuit and a zero bias circuit, wherein the input end of the first tuning circuit is connected with one output end of the first zero circuit, one output end of the first tuning circuit is connected with the other input end of the first zero circuit, one end of the first tuning circuit is connected with an inductor L2 of the output end of the first tuning circuit, and the input end of the second tuning circuit is connected with the other end of the inductor L2 and the output end of the second tuning circuit is connected with the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1.
In this embodiment, the LC band pass filter further includes a second zero circuit; the second zero circuit consists of a varactor D2, a varactor D4 and an inductor L3 which are mutually connected in parallel; the varactors D2 and D4 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L3 and the cathode of the varactor diode D4 are used as the output end of the second zero circuit to be connected with the port P2, and the other end of the inductor L3 is used as one input end of the second zero circuit to be connected with the output end of the second tuning circuit; the negative pole of the varactor diode D4 is also connected to the other output terminal of the zero bias circuit.
The embodiment further includes a capacitor C1 connected between the port P1 and the input terminal of the first zero circuit and a capacitor C2 connected between the port P2 and the output terminal of the inductor L3 as the second zero circuit. The capacitors C1 and C2 not only play a role in blocking, but also the capacitor C1 isolates the direct current of the first zero circuit from the port P1, and the capacitor C2 isolates the direct current of the second zero circuit from the port P2.
In this embodiment, the first zero circuit is composed of a varactor D1, a varactor D3, and an inductor L1 that are connected in parallel with each other; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit.
In this embodiment, the first tuning circuit is composed of an inductor L4 and a capacitor C3, where one end of the inductor L4 is connected to one end of the inductor L1 serving as an output end of the first zero circuit, and the other end of the inductor L1 is grounded; one end of the capacitor C3 is connected with one end of the inductor L1 serving as the output end of the first zero circuit, and the other end of the capacitor C is grounded; the common terminal of the inductor L4 and the capacitor C3 is connected to one terminal of the inductor L2.
In this embodiment, the second tuning circuit is composed of an inductor L5 and a capacitor C4, where one end of the inductor L5 is connected to one end of the inductor L3 serving as an input end of the second zero circuit, and the other end is grounded; one end of the capacitor C4 is connected with one end of the inductor L3 serving as an input end of the second zero circuit, and the other end of the capacitor C is grounded; the common terminal of the inductor L5 and the capacitor C4 is connected to the other terminal of the inductor L2.
In this embodiment, the zero bias circuit is composed of a resistor R1, a resistor R2, and a resistor R3; one end of a resistor R2 is used as one output end of a zero bias circuit and is connected with the cathode of a varactor diode D1 in a first zero circuit, one end of a resistor R3 is connected with the other end of the resistor R2, and the other end of the resistor R3 is used as the other output end of the zero bias circuit and is connected with the cathode of the varactor diode D2 in a second zero circuit; one end of the resistor R1 is connected with the common end of the resistor R2 and the resistor R3, and the other end of the resistor R1 is connected with the zero bias voltage VT1. The resistances of the resistor R2 and the resistor R3 are generally 10kΩ, and the resistance of the resistor R1 is generally 200kΩ. The resistor R2 and the resistor R3 in the T-shaped structure apply zero bias voltage VT1 to the cathodes of the varactors in the first zero circuit and the second zero circuit respectively, and C1 and C2 play a role in isolating the zero bias voltage.
In this embodiment, the resistors are all precise high-frequency resistors ARF03FTCW series resistors, the capacitors are all GRM 1885C1H series high-frequency capacitors of village Tian Zhushi, the inductors are all 0603HP series high-frequency wound inductors of wire arts, and the varactors are all BB202 of NXP company.
Example 2
As shown in fig. 2, the LC band-pass filter of this embodiment is suitable for a scenario with low requirement for out-of-band rejection, and the second zero circuit may be omitted. The LC band-pass filter comprises a first zero circuit, a first tuning circuit and a zero bias circuit, wherein the input end of the first tuning circuit is connected with one output end of the first zero circuit, one output end of the first tuning circuit is connected with the other input end of the first zero circuit, one end of the first tuning circuit is connected with an inductor L2 of the output end of the first tuning circuit, and the input end of the second tuning circuit is connected with the other end of the inductor L2 and the output end of the second tuning circuit is connected with the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1.
The embodiment further comprises a tuning bias circuit connected with the first tuning circuit and the second tuning circuit, a capacitor C1 connected between the port P1 and the input end of the first zero circuit, and an inductor L3 and a capacitor C2 connected between the port P2 and the output end of the second tuning circuit after being connected in series.
In this embodiment, the tuning bias circuit is a T-shaped structure formed by a resistor R4, a resistor R5 and a resistor R6, J2 is an input end of a tuning bias voltage VT2, the tuning bias voltage VT2 is connected with the first tuning circuit and the second tuning circuit through R4 and R5 respectively, and connection points are respectively at serial connection positions of the varactor diode and the capacitor.
In this embodiment, the first zero circuit is composed of a varactor D1, a varactor D3, and an inductor L1 that are connected in parallel with each other; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit.
In this embodiment, the first tuning circuit is composed of a capacitor C5, a varactor D6, a varactor D7, a capacitor C3, and an inductor L4; one end of the inductor L4 is connected with one end of the inductor L1 serving as the other output end of the first zero circuit, the other end of the inductor L4 is grounded, one end of the capacitor C3 is connected with one ungrounded end of the inductor L4, and the capacitor C5, the varactor diode D6 and the varactor diode D7 are connected in parallel, and one end of the capacitor D7 is connected with the other end of the capacitor C3 and the other end of the capacitor D is grounded after the capacitor D is connected in parallel; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D5 is grounded; the common end of the inductor L4 and the capacitor C3 is connected with one end of the inductor L2; the negative pole of the varactor diode D5 is connected with one end of a resistor R4 in the tuning bias circuit.
In this embodiment, the second tuning circuit is composed of a capacitor C6, a varactor D8, a varactor D9, a varactor D10, a capacitor C4, and an inductor L5; one end of the inductor L5 is connected with one end of the inductor L3, the other end of the inductor L3 is grounded, and one end of the capacitor C4 is connected with one ungrounded end of the inductor L5; one end of the capacitor C6, the varactor diode D8, the varactor diode D9 and the varactor diode D10 are connected in parallel, and the other end of the capacitor is connected with the other end of the capacitor C4 in parallel and is grounded; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D9 is grounded; the cathode of the varactor diode D9 is connected with one end of a resistor R5 in the tuning bias circuit; the common terminal of the capacitor C4 and the inductor L5 is connected with the other end of the inductor L2.
In this embodiment, the zero bias circuit is composed of a resistor R1 and a resistor R2; one end of the resistor R2 is used as an output end of the zero bias circuit and connected with the cathode of the varactor diode D1 in the first zero circuit, one end of the resistor R1 is connected with the other end of the resistor R2, and the other end of the resistor R1 is connected with the zero bias voltage VT1.
Example 3
As shown in fig. 3, the LC band-pass filter includes a first zero circuit having an input terminal connected to the port P1, a first tuning circuit having an input terminal connected to one output terminal of the first zero circuit, a zero bias circuit having an output terminal connected to the other input terminal of the first zero circuit, an inductor L2 having one terminal connected to the output terminal of the first tuning circuit, and a second tuning circuit having an input terminal connected to the other terminal of the inductor L2 and an output terminal connected to the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1.
In this embodiment, the LC band pass filter further includes a second zero circuit; the second zero circuit consists of a varactor D2, a varactor D4 and an inductor L3 which are mutually connected in parallel; the varactors D2 and D4 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L3 and the cathode of the varactor diode D4 are used as the output end of the second zero circuit to be connected with the port P2, and the other end of the inductor L3 is used as one input end of the second zero circuit to be connected with the output end of the second tuning circuit; the negative pole of the varactor diode D4 is also connected to the other output terminal of the zero bias circuit.
The embodiment further includes a capacitor C1 connected between the port P1 and the input terminal of the first zero circuit and a capacitor C2 connected between the port P2 and the output terminal of the inductor L3 as the second zero circuit. The capacitors C1 and C2 not only play a role in blocking, but also the capacitor C1 isolates the direct current of the first zero circuit from the port P1, and the capacitor C2 isolates the direct current of the second zero circuit from the port P2.
In this embodiment, the first zero circuit is composed of a varactor D1, a varactor D3, and an inductor L1 that are connected in parallel with each other; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit.
The embodiment also comprises a tuning bias circuit connected with the first tuning circuit and the second tuning circuit; the tuning bias circuit is of a T-shaped structure formed by a resistor R4, a resistor R5 and a resistor R6, J2 is an input end of tuning bias voltage VT2, the tuning bias voltage VT2 is respectively connected with the first tuning circuit and the second tuning circuit through R4 and R5, and connection points are respectively at serial connection positions of the varactors and the capacitors. The resistances of the resistor R4 and the resistor R5 are generally 10kΩ, and the resistance of the resistor R6 is generally 100kΩ.
The first tuning circuit consists of a capacitor C5, a varactor diode D6, a varactor diode D7, a capacitor C3 and an inductor L4; one end of the inductor L4 is connected with one end of the inductor L1 serving as the other output end of the first zero circuit, the other end of the inductor L4 is grounded, one end of the capacitor C3 is connected with one ungrounded end of the inductor L4, and the capacitor C5, the varactor diode D6 and the varactor diode D7 are connected in parallel, and one end of the capacitor D7 is connected with the other end of the capacitor C3 and the other end of the capacitor D is grounded after the capacitor D is connected in parallel; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D5 is grounded; the common end of the inductor L4 and the capacitor C3 is connected with one end of the inductor L2; the negative pole of the varactor diode D5 is connected with one end of a resistor R4 in the tuning bias circuit.
The second tuning circuit consists of a capacitor C6, a varactor diode D8, a varactor diode D9, a varactor diode D10, a capacitor C4 and an inductor L5; one end of the inductor L5 is connected with one end of the inductor L3, the other end of the inductor L3 is grounded, and one end of the capacitor C4 is connected with one ungrounded end of the inductor L5; one end of the capacitor C6, the varactor diode D8, the varactor diode D9 and the varactor diode D10 are connected in parallel, and the other end of the capacitor is connected with the other end of the capacitor C4 in parallel and is grounded; the varactors D8, D9 and D10 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactors D9 is grounded; the cathode of the varactor diode D9 is connected with one end of a resistor R5 in the tuning bias circuit; the common terminal of the capacitor C4 and the inductor L5 is connected with the other end of the inductor L2.
The zero bias circuit consists of a resistor R1, a resistor R2 and a resistor R3; one end of a resistor R2 is used as one output end of a zero bias circuit and is connected with the cathode of a varactor diode D1 in a first zero circuit, one end of a resistor R3 is connected with the other end of the resistor R2, and the other end of the resistor R3 is used as the other output end of the zero bias circuit and is connected with the cathode of the varactor diode D2 in a second zero circuit; one end of the resistor R1 is connected with the common end of the resistor R2 and the resistor R3, and the other end of the resistor R1 is connected with the zero bias voltage VT1. The resistances of the resistor R2 and the resistor R3 are generally 10kΩ, and the resistance of the resistor R1 is generally 200kΩ.
In this embodiment, the resistors are all precise high-frequency resistors ARF03FTCW series resistors, the capacitors are all GRM 1885C1H series high-frequency capacitors of village Tian Zhushi, the inductors are all 0603HP series high-frequency wound inductors of wire arts company, and the varactors are all BB202 of NXP company.
In this embodiment, the zero offset voltage VT1 and the tuning offset voltage VT2 are adjusted at the same time, and the obtained frequency response curve is as shown in fig. 4, where the passband and the out-of-band transmission zero frequency change substantially linearly. Increasing the voltage of VT1 and VT2 increases the frequency corresponding to the passband and zero transfer point.
The implementation results of the design and the embodiment show that the adjustable LC band-pass filter with the adjustable transmission zero is effective, is applicable to board-level circuits, particularly applicable to application scenes requiring small-size spurious suppression, and can effectively save the size of the LC band-pass filter in the board-level circuits, thereby saving the volume and the cost.
The above embodiment is only one of the preferred embodiments of the present invention, and should not be used to limit the scope of the present invention, but all the insubstantial modifications or color changes made in the main design concept and spirit of the present invention are still consistent with the present invention, and all the technical problems to be solved are included in the scope of the present invention.
Claims (1)
1. An LC band-pass filter with an adjustable transmission zero is characterized by comprising a first zero circuit, a first tuning circuit, a zero bias circuit, an inductor L2 and a second tuning circuit, wherein the input end of the first zero circuit is connected with a port P1, the input end of the first tuning circuit is connected with one output end of the first zero circuit, one output end of the zero bias circuit is connected with the other input end of the first zero circuit, one end of the inductor L2 is connected with the output end of the first tuning circuit, and the input end of the second tuning circuit is connected with the other end of the inductor L2 and the output end of the second tuning circuit is connected with the port P2; the other input end of the zero bias circuit is connected with a zero bias voltage VT1;
the device also comprises a tuning bias circuit connected with the first tuning circuit and the second tuning circuit, a capacitor C1 connected between the port P1 and the input end of the first zero circuit, and an inductor L3 and a capacitor C2 connected between the port P2 and the output end of the second tuning circuit after being connected in series;
the tuning bias circuit consists of a resistor R4, a resistor R5 and a resistor R6; one end of the resistor R4 is used as one output end of the tuning bias circuit to be connected with the first tuning circuit, one end of the resistor R5 is connected with the other end of the resistor R4, and the other end of the resistor R5 is used as the other output end of the tuning bias circuit to be connected with the second tuning circuit; one end of the resistor R6 is connected with the common end of the resistor R4 and the resistor R5, and the other end of the resistor R6 is connected with the tuning bias voltage VT2;
the first zero circuit consists of a varactor D1, a varactor D3 and an inductor L1 which are mutually connected in parallel; the varactors D1 and D3 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L1 is used as an input end of the first zero circuit and is connected with an output end of the capacitor C1, and the other end of the inductor L1 is used as an output end of the first zero circuit and is connected with an input end of the first tuning circuit; the negative electrode of the varactor diode D1 is connected with the common end of the inductor L1 and the capacitor C1 and is used as the other input end of the first zero circuit to be connected with the zero bias circuit;
the first tuning circuit consists of a capacitor C5, a varactor diode D6, a varactor diode D7, a capacitor C3 and an inductor L4; one end of the inductor L4 is connected with one end of the inductor L1 serving as the other output end of the first zero circuit, the other end of the inductor L4 is grounded, one end of the capacitor C3 is connected with one ungrounded end of the inductor L4, and the capacitor C5, the varactor diode D6 and the varactor diode D7 are connected in parallel, and one end of the capacitor D7 is connected with the other end of the capacitor C3 and the other end of the capacitor D is grounded after the capacitor D is connected in parallel; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D5 is grounded; the common end of the inductor L4 and the capacitor C3 is connected with one end of the inductor L2; the cathode of the varactor diode D5 is connected with one end of a resistor R4 in the tuning bias circuit;
the second tuning circuit consists of a capacitor C6, a varactor diode D8, a varactor diode D9, a varactor diode D10, a capacitor C4 and an inductor L5; one end of the inductor L5 is connected with one end of the inductor L3, the other end of the inductor L3 is grounded, and one end of the capacitor C4 is connected with one ungrounded end of the inductor L5; one end of the capacitor C6, the varactor diode D8, the varactor diode D9 and the varactor diode D10 are connected in parallel, and the other end of the capacitor is connected with the other end of the capacitor C4 in parallel and is grounded; the varactors D5, D6 and D7 are connected in parallel with each other in the same polarity, that is, the ports of the varactors with the same polarity are connected in parallel, and the positive electrode of the varactor D9 is grounded; the cathode of the varactor diode D9 is connected with one end of a resistor R5 in the tuning bias circuit; the common end of the capacitor C4 and the inductor L5 is connected with the other end of the inductor L2;
the zero bias circuit consists of a resistor R1 and a resistor R2; one end of a resistor R2 is used as one output end of a zero bias circuit and is connected with the cathode of a varactor diode D1 in a first zero circuit, one end of the resistor R1 is connected with the other end of the resistor R2, and the other end of the resistor R1 is connected with zero bias voltage VT1;
the second zero circuit is also included; the second zero circuit consists of a varactor D2, a varactor D4 and an inductor L3 which are mutually connected in parallel; the varactors D2 and D4 are connected in parallel with each other in the same polarity, i.e. the ports of the varactors with the same polarity are connected in parallel; one end of the inductor L3 and the cathode of the varactor diode D4 are used as the output end of the second zero circuit to be connected with the port P2, and the other end of the inductor L3 is used as one input end of the second zero circuit to be connected with the output end of the second tuning circuit; the negative pole of the varactor diode D4 is also connected to the other output terminal of the zero bias circuit.
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