CN116893818A - High-compatibility heterogeneous compiling method and heterogeneous compiler - Google Patents
High-compatibility heterogeneous compiling method and heterogeneous compiler Download PDFInfo
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Abstract
The invention relates to a high-compatibility heterogeneous compiling method and a heterogeneous compiler. Compiling a host function in a source code of a split host based on architecture information of the host, so as to generate a corresponding host byte code file based on each host source code after compiling; in the compiling of the device end, compiling the device end function in the source code of the device end obtained by splitting so as to generate a host end byte code file based on all source codes of the device end after compiling; and linking the host end byte code files generated in the device end compiling and all the generated host end byte code files in the host end compiling into host end executable files which are matched with the host end architecture information. The invention supports the use of the device end function defined in the non-native code, can realize the compatibility of general processors with different architectures, and reduces the programming difficulty and maintenance cost of heterogeneous systems.
Description
Technical Field
The present invention relates to a heterogeneous compiling method and a heterogeneous compiler, and more particularly, to a high-compatibility heterogeneous compiling method and a heterogeneous compiler.
Background
With the rapid development of computer technology, the traditional CPU (Central Processing Unit) processor system cannot meet the demands of the fields of weather forecast, engineering simulation, artificial intelligence represented by deep learning and the like on computing resources, so that the processor system of the computer is caused to revolutionarily span from single core to multi-core, isomorphic and heterogeneous.
Multicore refers to the integration of two or more complete compute engines in one processor, heterogeneous refers to the composition of two or more different types of microprocessor or microcontroller architectures. Unlike conventional homogeneous multi-core processors, heterogeneous multi-core processors are generally composed of a general purpose microprocessor (CPU) and dedicated acceleration processors (e.g., GPU (Graphics Processing Unit), MIC (Many Integrated Core), DSP (Digital Signal Processing)), and the general purpose microprocessor implements operation control and management of the dedicated acceleration processors.
The general purpose microprocessor provides general purpose computing power and control operations, is suitable for various applications, and the special purpose acceleration processor is custom designed for specific types of workload to provide powerful computing performance. In heterogeneous processors, different processors often have different instruction set structures, so that a set of compiling mechanism capable of efficiently and conveniently processing heterogeneous programming is particularly important to run in the heterogeneous processors, different processing can be performed on different architectures, and compiling processes of developers can be simplified.
Early heterogeneous programming requires a programmer to write separately the code of the general-purpose microprocessor (host side) and the code of the special-purpose processor (device side), and then manually call the corresponding compiler to compile, and the device side binary is manually embedded into the host side binary, which can be called as separate compiling. The whole compiling flow of separate compiling is complex in steps, the code writing is difficult, and the programming efficiency is low.
The heterogeneous compiling method greatly reduces the compiling flow of heterogeneous programming and simultaneously reduces the compiling difficulty of heterogeneous programs. Currently, the mainstream is mainly CUDA supporting heterogeneous programming and HIP supporting AMD, and the heterogeneous compilers corresponding to the CUDA supporting heterogeneous programming are NVCC and HIPCC. Heterogeneous compilers handle the workflow of heterogeneous programming similarly to homogeneous compilers, providing great convenience to relevant developers.
The heterogeneous compiler realizes the shielding of the variability brought by the processor isomerism at present, and the specific keywords in the source code are analyzed to distinguish a general microprocessor (host end) part and a special acceleration processor (device end) part in the source code, and the corresponding compilers are automatically called to compile respectively, so that the whole compiling process is automatically split into the compiling of the host end and the compiling of the device end.
Fig. 1 is a schematic diagram illustrating a method for compiling a heterogeneous compiler HIPCC, where the compiling process of the heterogeneous compiler NVCC is similar to the compiling method of the heterogeneous compiler HIPCC.
By the above description, the compiling flow steps of the separate compiling method are complicated, the programming efficiency is low, and the method is extremely unfriendly to code developers. The current mainstream heterogeneous compilers have effectively reduced the programming difficulty of heterogeneous systems, but there are great limitations in their use, including in particular:
1) The mainstream heterogeneous compiling method cannot meet the requirement of calling the function in the device end across source files, which results in that the same function in the device end needs to be defined for multiple times when being used in different source files, and a large amount of repeated codes can be generated. 2) The mainstream heterogeneous compiler is only suitable for specific GPUs, and can only meet the requirements of specific architectures, because of the architecture difference between different special-purpose acceleration processors, and the different architectures have unique instruction sets. Thus, heterogeneous compilers need to be redesigned and implemented for other specialized acceleration processors. 3) The special acceleration processor of some factories can be matched with general microprocessors of various structures, and each matched with one general microprocessor needs to independently maintain one set of codes, so that the cost of manpower and material resources is high and the maintenance is difficult.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provide a high-compatibility heterogeneous compiling method and a heterogeneous compiler, which support the compatibility of general processors with different structures by using a device end function defined in a non-native code, and reduce the programming difficulty and maintenance cost of a heterogeneous system.
According to the technical scheme provided by the invention, the high-compatibility heterogeneous compiling method comprises the following steps of:
providing source codes to be compiled, wherein keywords for representing attribute information of the current function are configured for the functions in the source codes;
splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the key words of each function in the source code;
based on the architecture information of the host, compiling the host function in the source code of the host obtained by splitting in the compiling of the host so as to generate a corresponding host byte code file based on each source code of the host after the compiling;
in the compiling of the device end, compiling the device end function in the source code of the device end obtained by splitting so as to generate a host end byte code file based on all source codes of the device end after compiling;
and linking the host end byte code files generated in the device end compiling and all the generated host end byte code files in the host end compiling into host end executable files which are matched with the host end architecture information.
The key words configured by the functions in the source code comprise a __ host __ key word, a __ global __ key word and a __ device __ key word, wherein the function modified by the __ global __ key word is a kernel function, the kernel function comprises a call execution entry of a device end function in the target source code, and the function modified by the __ host __ key word is a function running on a general-purpose microprocessor; the function decorated by the __ device __ key is a function which can only be called and run on a special processor;
when the same function is modified with the __ host __ key and the __ device __ key, the modified function can be executed simultaneously on both general purpose microprocessors and special purpose acceleration processor calls.
3. The high-compatibility heterogeneous compiling method according to claim 1, wherein: the architecture information of the host terminal comprises architecture name, system model and/or version information.
In host compiling, the process of compiling each host source code to generate a corresponding host byte code file includes:
preprocessing a host function in each host end source code to generate a host end preprocessing file corresponding to the host end source code;
and performing compiling front-end processing on the host-end preprocessing file to generate a host-end byte code file after the compiling front-end processing.
In device side compilation, the process of generating host side bytecode file includes:
preprocessing a device end function in each device end source code to generate a device end preprocessing file corresponding to each device end source code;
performing compiling front-end processing on each device-end processing file to generate a device-end byte code file after the compiling front-end processing;
all the device end byte code files are linked into a device end executable file;
and generating a host end byte code file based on the device end executable file.
When a host end byte code file is generated based on a device end executable file, the generation method comprises the following steps:
reading the content of the executable file at the device end into a plurality of groups of variables, and manufacturing an intermediate representation file according to a format of representing the Human-readable in the middle of the host end;
the intermediate representation file in the Human-ready format is converted into a file in the byte code format to generate a host end byte code file.
When the device end function is preprocessed, header file expansion, macro definition replacement, deletion of useless codes and/or deletion of comments in the device end function are included.
A high-compatibility heterogeneous compiler for performing a heterogeneous compilation method, the heterogeneous compiler comprising:
the host end architecture analysis module is used for analyzing and acquiring architecture information of a host end in the heterogeneous processor;
the source code analysis processing module is used for splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the keywords of each function in the source code;
the host compiling module is used for compiling the host function in the host source code obtained through splitting based on the architecture information of the host so as to generate a corresponding host byte code file based on each host source code after compiling;
the device end compiling module compiles the device function in the split device end source code to generate a host end byte code file based on all the device end source codes after compiling, wherein,
the host compiling module links all host byte code files into host executable files which are matched with the host architecture information.
The invention has the advantages that: in host compiling, host end functions are preprocessed and processed by a compiling front end to generate host byte code files sequentially, and all host byte code files are linked into host end executable files, namely, when heterogeneous compiling is performed due to deferred code generation to linking, a wider range of codes can be seen, more tasks such as interconnection, constant propagation and useless code deletion can be performed, meanwhile, the characteristic of invoking a device end function in other source files is supported, the multiplexing rate of the codes can be greatly improved when the host end functions are applied to large engineering projects, and great convenience is provided for development work and readability of the projects.
When the host end is compiled, preprocessing and compiling front end processing are carried out, the corresponding processing procedures are matched with the acquired host end architecture information, namely, the selected compiling options are matched with the host end architecture information, so that the compatibility of general microprocessors of different architectures can be realized, and the maintenance cost of source codes can be greatly reduced.
Drawings
FIG. 1 is a flow chart of an embodiment of a conventional heterogeneous compilation time.
FIG. 2 is a flow chart of an embodiment of the heterogeneous encoder according to the present invention when performing heterogeneous compilation.
Detailed Description
The invention will be further described with reference to the following specific drawings and examples.
In order to achieve compatibility to general processors with different architectures, reduce programming difficulty and maintenance cost of heterogeneous systems, and provide a high-compatibility heterogeneous compiling method, in one embodiment of the present invention, the heterogeneous compiling method includes:
providing source codes to be compiled, wherein keywords for representing attribute information of the current function are configured for the functions in the source codes;
splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the key words of each function in the source code;
based on the architecture information of the host, compiling the host function in the source code of the host obtained by splitting in the compiling of the host so as to generate a corresponding host byte code file based on each source code of the host after the compiling;
in the compiling of the device end, compiling the device end function in the source code of the device end obtained by splitting so as to generate a host end byte code file based on all source codes of the device end after compiling;
and linking the host end byte code files generated in the device end compiling and all the generated host end byte code files in the host end compiling into host end executable files which are matched with the host end architecture information.
As can be seen from the above description, the heterogeneous compiling of the present invention is to compile a source code, where the source code is a heterogeneous programming code for a heterogeneous multi-core processor, and the specific form of the source code can be encoded according to the requirements of an actual application scenario. In one embodiment of the present invention, a keyword is configured for a function in a source code, and attribute information of each function can be represented by configuring a corresponding keyword for each function, where the attribute information at least includes a function belonging to a host end, a function of a device end, or a function that can be called and executed at both the host end and the device end.
In one embodiment of the invention, the keywords configured by the functions in the source code comprise __ host __ keywords, __ global __ keywords and __ device __ keywords, wherein the functions modified by the __ global __ keywords are kernel functions and comprise call execution entries of the device end functions in the target source code, and the functions modified by the __ host __ keywords are functions running on a general-purpose microprocessor; the function decorated by the __ device __ key is a function which can only be called and run on a special processor;
when the same function is modified with the __ host __ key and the __ device __ key, the modified function can be executed simultaneously on both general purpose microprocessors and special purpose acceleration processor calls.
In specific implementation, different functions in source codes are configured by adopting a __ host __ keyword, a __ global __ keyword and a __ device __ keyword, wherein a manner and a process for configuring a function attribute in the source codes by using a_host __ keyword, a __ global __ keyword and a __ device __ keyword can be consistent with the prior art, and specifically, the compiling and executing of different functions can be satisfied.
Generally, a function modified by a __ global __ key is used as a kernel function and the kernel function is a call execution entry of a device end function in a target source code, wherein the source code to be compiled is provided as a current source code, the target source code is the current source code or other source codes outside the current source code, that is, the function modified by a __ global __ key can be used to support the device end function defined in a non-current source code, and at this time, the requirement of calling the function in the device end across source codes can be met, and the generation of repeated codes is reduced. The calling execution mode and the calling execution process of the function at the device end can be consistent with the existing method by utilizing the function decorated by the __ global __ key words, and particularly, the calling execution of the function at the device end can be realized.
The key of each function is typically configured during source code programming. Based on the key words of each function in the source code, splitting the source code into a host end function and a device end function, wherein the host end function is split into a host end function if the function is modified by using a __ host __ key word, and the device end function is split into a __ global __ key word modified function and a __ device __ key word modified function. The same function is modified by using the __ host __ key and the __ device __ key, and the function can be split into a host end function and a device end function at the same time.
In one embodiment of the present invention, the architecture information of the host includes architecture name, system model number and/or version information. Specifically, the technical means commonly used in the technical field is adopted to obtain the architecture information of the host end, so that the main purpose of obtaining the architecture information of the host end is to realize compatibility of general microprocessors with different architectures, and generally, according to architecture names in the architecture information of the host end, appropriate architecture information and corresponding compiling options can be obtained in a compiling stage, and subsequent compiling work can be performed.
In one embodiment of the present invention, in host compiling, a process of compiling each host source code to generate a corresponding host bytecode file includes:
preprocessing a host function in each host end source code to generate a host end preprocessing file corresponding to the host end source code;
and performing compiling front-end processing on the host-end preprocessing file to generate a host-end byte code file after the compiling front-end processing.
The number of the source codes of the host end obtained by splitting may be one or more, an embodiment of compiling the host end is shown in fig. 2, an embodiment of splitting to obtain n source codes of the host end is shown in fig. 2, when preprocessing, all the n source codes of the host end are preprocessed, at this time, n preprocessed files of the host end are respectively generated, specifically, the preprocessing functions are expansion of a header file, substitution of a macro definition, deletion of an useless code and/or deletion of an annotation, and a mode and a process for generating the preprocessed files of the host end after preprocessing a host function in the source codes of the host end can be consistent with the prior art. Furthermore, the number n of source codes split to form host end can be determined according to the specific situation of the source codes.
The compiling front-end processing is carried out on the obtained n host-end pretreatment files, the compiling front-end processing is used for carrying out grammar analysis and lexical analysis, whether the codes in the current host-end pretreatment files have grammar errors or not is checked, and a host-end byte code file is generated after analysis and check, at this time, n corresponding host-end byte code files can be generated, namely, one host-end byte code file corresponds to one host-end source code, and the mode and the process for realizing the compiling front-end processing and generating the host-end byte code file can be consistent with the prior art.
As can be seen from the above description, when performing host compiling, the corresponding processing procedure needs to be adapted to the obtained host architecture information when performing the preprocessing and the compiling front-end processing, that is, the selected compiling option needs to be adapted to the host architecture information, so that compatibility of general microprocessors with different architectures can be achieved.
In one embodiment of the present invention, in device-side compilation, a process for generating a host-side bytecode file includes:
preprocessing a device end function in each device end source code to generate a device end preprocessing file corresponding to each device end source code;
performing compiling front-end processing on each device-end processing file to generate a device-end byte code file after the compiling front-end processing;
all the device end byte code files are linked into a device end executable file;
and generating a host end byte code file based on the device end executable file.
Fig. 2 shows an embodiment of device side compiling, which shows that the number of source codes of the device side obtained by splitting is also n, and of course, in the implementation, the number of source codes of the device side obtained by splitting may also be other numbers, which is specifically related to the case of source codes.
Specifically, similar to host side compilation, each device side source code is pre-processed, including header file expansion within the device side function, macro-defined replacement, deletion of unwanted code, and/or deletion of annotations. Each device end source code needs to be preprocessed to generate a corresponding device end preprocessed file after preprocessing, that is, n device end source codes generate n corresponding device end preprocessed files after preprocessing.
The compiling front end is mainly used for carrying out grammar analysis and lexical analysis and checking whether the code of the device end has grammar errors or not so as to generate the byte code file of the device end after being processed by the compiling front end. When n device side preprocessing files exist, n device side byte code files are generated.
After generating n device end byte code files, adopting a link mode commonly used in the technical field to link the n device end byte code files into one device end executable file, wherein the mode and the process for forming one device end executable file by specific link can be consistent with the prior art.
In fig. 2, after a device-side executable file is generated, the device-side executable file is processed by special processing to generate a host-side bytecode file. When generating a host end byte code file based on a device end executable file, in one embodiment of the present invention, the generating method includes:
reading the content of the executable file at the device end into a plurality of groups of variables, and manufacturing an intermediate representation file according to a format of representing the Human-readable in the middle of the host end;
the intermediate representation file in the Human-ready format is converted into a file in the byte code format to generate a host end byte code file.
Specifically, the special treatment is the process of the generation method. The format of the intermediate representation file can be a Human readable intermediate representation file, such as a Human-readable format file, and after the content of the executable file at the device end is read, the read content is written into the Human-readable format file based on the rule of the Human-readable format intermediate representation file, so that the manufacture of the intermediate representation file is completed. After the intermediate representation file in the format of Human-ready is manufactured, a host end byte code file identified by a machine is generated by means of tool conversion. Of course, generating host-side bytecode files based on device-side executable files may also be implemented in other ways.
The host end byte code file generated in fig. 2 is linked with all the generated host end byte code files in the host end compiling to generate a host end executable file adapted to the host end architecture information in a linking manner commonly used in the technical field, wherein the generated host end executable file is an executable file capable of running on a host architecture platform. The Ito mode in FIG. 2 is the heterogeneous compilation method described above.
For the above-described heterogeneous compiling method, fig. 2 shows a heterogeneous compiler that executes the heterogeneous compiling method, and for a high-compatibility heterogeneous compiler, the heterogeneous compiler includes:
the host end architecture analysis module is used for analyzing and acquiring architecture information of a host end in the heterogeneous processor;
the source code analysis processing module is used for splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the keywords of each function in the source code;
the host compiling module is used for compiling the host function in the host source code obtained through splitting based on the architecture information of the host so as to generate a corresponding host byte code file based on each host source code after compiling;
the device end compiling module compiles the device function in the split device end source code to generate a host end byte code file based on all the device end source codes after compiling, wherein,
the host compiling module links all host byte code files into host executable files which are matched with the host architecture information.
Specifically, the host end architecture analysis module and the source code analysis processing module both realize preparation before compiling, wherein the host end architecture information can be obtained by analysis through the host end architecture analysis module, and the method for obtaining the host end architecture information and the specific situation of the host end architecture information can be referred to the above description.
The device end compiling module is mainly used for compiling a device end function in the device end source code to generate a host end byte code file of the device end. The device side compiling module may refer to the above description for the manner and process of generating the host side bytecode file of the device side.
The host compiling module compiles host functions in host source codes, and generates final executable files which can run on a host architecture platform based on all host byte code files, namely generates host executable files. The host compiling module compiles the host function in the host source code and generates the host executable file according to the above description.
In summary, in host compiling, host functions in host source codes are preprocessed and processed by a compiling front end to generate host byte code files sequentially, and all host byte code files are linked into host executable files, namely when heterogeneous compiling is performed due to deferred code generation to linking, at the moment, a larger range of codes can be seen, more tasks such as interconnection, constant propagation and useless code deletion can be performed, meanwhile, the characteristics of invoking device end functions in other source files are supported, the multiplexing rate of codes can be greatly improved when the host byte code files are applied to large engineering projects, and great convenience is provided for development work and readability of projects.
When the host end is compiled, preprocessing and compiling front end processing are carried out, the corresponding processing procedures are matched with the acquired host end architecture information, namely, the selected compiling options are matched with the host end architecture information, so that the compatibility of general microprocessors of different architectures can be realized, and the maintenance cost of source codes can be greatly reduced.
Claims (8)
1. A high-compatibility heterogeneous compiling method, characterized in that the heterogeneous compiling method comprises:
providing source codes to be compiled, wherein keywords for representing attribute information of the current function are configured for the functions in the source codes;
splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the key words of each function in the source code;
based on the architecture information of the host, compiling the host function in the source code of the host obtained by splitting in the compiling of the host so as to generate a corresponding host byte code file based on each source code of the host after the compiling;
in the compiling of the device end, compiling the device end function in the source code of the device end obtained by splitting so as to generate a host end byte code file based on all source codes of the device end after compiling;
and linking the host end byte code files generated in the device end compiling and all the generated host end byte code files in the host end compiling into host end executable files which are matched with the host end architecture information.
2. The high-compatibility heterogeneous compiling method according to claim 1, wherein: the key words configured by the functions in the source code comprise a __ host __ key word, a __ global __ key word and a __ device __ key word, wherein the function modified by the __ global __ key word is a kernel function, the kernel function comprises a call execution entry of a device end function in the target source code, and the function modified by the __ host __ key word is a function running on a general-purpose microprocessor; the function decorated by the __ device __ key is a function which can only be called and run on a special processor;
when the same function is modified with the __ host __ key and the __ device __ key, the modified function can be executed simultaneously on both general purpose microprocessors and special purpose acceleration processor calls.
3. The high-compatibility heterogeneous compiling method according to claim 1, wherein: the architecture information of the host terminal comprises architecture name, system model and/or version information.
4. The high-compatibility heterogeneous compiling method according to claim 1, wherein: in host compiling, the process of compiling each host source code to generate a corresponding host byte code file includes:
preprocessing a host function in each host end source code to generate a host end preprocessing file corresponding to the host end source code;
and performing compiling front-end processing on the host-end preprocessing file to generate a host-end byte code file after the compiling front-end processing.
5. The high-compatibility heterogeneous compiling method according to any one of claims 1 to 4, wherein: in device side compilation, the process of generating host side bytecode file includes:
preprocessing a device end function in each device end source code to generate a device end preprocessing file corresponding to each device end source code;
performing compiling front-end processing on each device-end processing file to generate a device-end byte code file after the compiling front-end processing;
all the device end byte code files are linked into a device end executable file;
and generating a host end byte code file based on the device end executable file.
6. The high-compatibility heterogeneous compiling method according to claim 5, wherein: when a host end byte code file is generated based on a device end executable file, the generation method comprises the following steps:
reading the content of the executable file at the device end into a plurality of groups of variables, and manufacturing an intermediate representation file according to a format of representing the Human-readable in the middle of the host end;
the intermediate representation file in the Human-ready format is converted into a file in the byte code format to generate a host end byte code file.
7. The high-compatibility heterogeneous compiling method according to claim 5, wherein: when the device end function is preprocessed, header file expansion, macro definition replacement, deletion of useless codes and/or deletion of comments in the device end function are included.
8. A high-compatibility heterogeneous compiler for performing the heterogeneous compilation method of claim 1, the heterogeneous compiler comprising:
the host end architecture analysis module is used for analyzing and acquiring architecture information of a host end in the heterogeneous processor;
the source code analysis processing module is used for splitting the source code into a plurality of host end source codes and a plurality of device end source codes based on the keywords of each function in the source code;
the host compiling module is used for compiling the host function in the host source code obtained through splitting based on the architecture information of the host so as to generate a corresponding host byte code file based on each host source code after compiling;
the device end compiling module compiles the device function in the split device end source code to generate a host end byte code file based on all the device end source codes after compiling, wherein,
the host compiling module links all host byte code files into host executable files which are matched with the host architecture information.
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