CN116881195A - Chip system facing detection calculation and chip method facing detection calculation - Google Patents
Chip system facing detection calculation and chip method facing detection calculation Download PDFInfo
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Abstract
The application provides a chip system facing detection calculation and a chip method facing detection calculation, comprising the following steps: a first computing unit array including a plurality of first computing units of a first number for performing a first computing operation during a first period of time; a second computing unit array including a plurality of second numbered second computing units for performing a second computing operation for a second period of time, the second period of time after the first period of time, the second computing operation being performed after the first computing operation is completed; a control unit for judging the number of first computing units required for performing the first computing operation and the number of second computing units required for performing the second computing operation, and numbering the first computing units and the second computing units; the first computing unit continues to execute the second computing operation after the first computing operation is executed, so that the process of data movement is reduced, and the computing efficiency is improved.
Description
Technical Field
The application relates to the field of artificial intelligent chips, in particular to a chip system facing detection calculation and a chip method facing detection calculation.
Background
In the prior art, the existing artificial intelligent chip schemes are mainly divided into two types, wherein one type is an acceleration processor specially aiming at an artificial neural network, such as a graphic processor of Injeida, a Google tensor processor of Google and the like; the other type is a general-purpose processor, such as a Central Processing Unit (CPU) of a computer, a programmable array logic (FPGA), and the like, and artificial intelligence computation is implemented by software.
In the existing scheme, transmission among calculation data in a chip follows the mapping rule of an original neural network, and a sequential rule calculation mode often brings a plurality of redundant calculation and unnecessary time delay, so that new paths are needed to solve data adjustment and transmission.
Disclosure of Invention
The embodiment of the application aims to provide a chip system facing detection calculation and a chip method facing detection calculation, which are used for realizing the technical effect of improving the calculation efficiency of an artificial intelligent chip.
In a first aspect, an embodiment of the present application provides a detection computation-oriented chip system, including: a first computing unit array including a plurality of first computing units of a first number for performing a first computing operation during a first period of time; a second computing unit array including a plurality of second numbered second computing units for performing a second computing operation for a second period of time, the second period of time after the first period of time, the second computing operation being performed after the first computing operation is completed; a control unit for judging the number of first computing units required for performing the first computing operation and the number of second computing units required for performing the second computing operation, and numbering the first computing units and the second computing units; after the first computing unit array performs the first computing operation, the control unit modifies the first number into the second number, and sets a display substitute operation identifier in the control unit, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in an active state continues to perform the second computing operation in a second time period.
In one possible implementation, the detection computation oriented chip system further includes: the active computing unit tracking unit judges whether the first computing unit is in an active state or not according to the first indication signal of the first computing unit, and judges whether the second computing unit is in an active state or not according to the second indication signal of the second computing unit; after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units is used as the input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in a second time period; if the number of second computing units required for executing the second computing operation is lower than the number of first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; and if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serves as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
In the implementation process, the first computing unit array and the second computing unit array respectively include a first computing unit and a second computing unit, and are used for respectively executing a first computing operation and a second computing operation, the second computing operation is located after the first computing operation in the second time period, the first computing unit is provided with a first number, and the second computing unit is provided with a second number. The control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units. The active computing unit tracking unit judges whether the first computing unit and the second computing unit are in an active state according to the first indicating signals of the first computing units and the second indicating signals of the second computing unit, and one feasible indicating mode is to realize the indication of the working states of all the first computing units by indicating how many continuous first computing units are occupied or not occupied, for example, A4U4 is used as a first indicating signal and can be used for indicating that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. After the execution of the first computing operation is completed, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continues to execute the second computing operation in a second time period. If the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period. The locations of the computational units used may be different between the different layers, which may result in meaningless movement of the data, since the unnecessary computational data itself has been removed. The traditional data transmission mode is that the transmission path is longer, and the data transmission mode is that a first calculation unit is a bus, a DRAM or an SRAM is a bus, a second calculation unit or a first calculation unit is a bus, a second calculation unit. In the scheme, disordered operation is adopted, output data after the calculation of the first calculation unit is used as input data of the first calculation unit, namely the data transmission mode is the first calculation unit, namely the first calculation unit is used for transmitting the data only in the first calculation unit, the system considers the first calculation unit as the second calculation unit by changing the virtual number of the first calculation unit, data flow is not carried out on the second calculation unit, meanwhile, the first calculation unit can be combined with the control unit to transmit required calculation parameters to complete calculation, the above operation is circulated until the calculation is completed, the data moving process is reduced, and the calculation efficiency is improved.
In one possible implementation manner, after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of first computing units in an active state, if the number of second computing units required for performing the second computing operation is higher than the number of first computing units in the active state, the control unit decapsulates the temporarily-capped first computing units and makes the number of first computing units in the active state consistent with the number of second computing units required for the second computing operation, the control unit modifies the first number into the second number, the output data of the first computing units is used as input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in a second period of time.
In the implementation process, after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is higher than the number of the first computing units in the active state, the control unit decapsulates the temporarily-stored first computing units, enables the first computing units to be in the active state, preferentially calls the first computing units which can be directly called, directly uses the first computing units if original data of the first computing units are available, transfers the difference value between the first computing units and new data to the first computing units if the original data of the first computing units are unavailable, performs computation on the first computing units until the number of the first computing units in the active state is consistent with the number of the second computing units required for performing the second computing operation, and the control unit modifies the first number to the second number, the output data of the first computing units serves as input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in the second time period. The first calculation unit which can be directly used is preferentially called, the calling time is reduced, and the calculation efficiency is further improved.
In one possible implementation, the method further includes: the active computing unit pre-judging unit is used for comparing the first computing operation output data of the first computing unit with various data to be processed in the database to obtain the number of second computing units required for processing the first computing operation output data.
In the implementation process, the method further comprises: the active computing unit pre-judging unit is internally preset with a database for storing the number of the computing units required by various types of to-be-processed data, the database can be arranged outside a chip system facing detection computing, and the active computing unit pre-judging unit reads first computing operation output data of the first computing unit and compares the first computing operation output data with various types of to-be-processed data in the database so as to obtain the number of second computing units required by processing the first computing operation output data, pre-judge the number of the second computing units required in advance, speed up regulating and controlling the first computing unit and improve computing efficiency.
In one possible implementation, when the plurality of first indication signals are in the continuously active state, the plurality of first computing units are indicated to be in the continuously active state, and when the plurality of first indication signals are in the continuously inactive state, the plurality of first computing units are indicated to be in the continuously inactive state
In the implementation process, one possible indication mode is to set 1bit indication for each of the first computing units and the second computing units, and another possible indication mode is to realize indication of working states of all the first computing units by indicating how many consecutive first computing units are occupied or not occupied, for example, A4U4 is used as a first indication signal to indicate that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. The method for obtaining the pre-judging data comprises the steps of carrying out logic analysis on the existing data, further obtaining the information of the computing units needing to be occupied, for example, deploying the computing units needing to be called in the computing architecture by using a CNN network, carrying out flexible deployment and coordinated calling on the computing units needing to be called, analyzing the computing operation to be processed by the pre-judging unit, and obtaining the required first computing unit expenditure in advance before the deployment of the computing operation.
In one possible implementation, the first and second arrays of computing units are used to perform training tasks or reasoning tasks.
In the implementation process, the first computing unit array and the second computing unit array can be used for executing training tasks or for executing reasoning tasks, and can also be used for executing the training tasks and the reasoning tasks in a crossed manner, so that the use is more flexible.
In a second aspect, an embodiment of the present application provides a chip method for detection computation, including:
a plurality of first numbered first computing units are arranged in the first computing unit array and used for executing first computing operation in a first time period, a plurality of second numbered second computing units are arranged in the second computing unit array and used for executing second computing operation in a second time period, and the second computing operation is executed after the first computing operation is completed in the second time period; the control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units; setting an active computing unit tracking unit, judging whether the first computing unit is in an active state or not according to a first indication signal of the first computing unit, and judging whether the second computing unit is in an active state or not according to a second indication signal of the second computing unit; after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units is used as the input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in a second time period; if the number of second computing units required for executing the second computing operation is lower than the number of first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; and if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serves as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
In the implementation process, the first computing unit array and the second computing unit array respectively include a first computing unit and a second computing unit, and are used for respectively executing a first computing operation and a second computing operation, the second computing operation is located after the first computing operation in the second time period, the first computing unit is provided with a first number, and the second computing unit is provided with a second number. The control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units. The active computing unit tracking unit judges whether the first computing unit and the second computing unit are in an active state according to the first indicating signals of the first computing units and the second indicating signals of the second computing unit, and one feasible indicating mode is to realize the indication of the working states of all the first computing units by indicating how many continuous first computing units are occupied or not occupied, for example, A4U4 is used as a first indicating signal and can be used for indicating that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. After the execution of the first computing operation is completed, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continues to execute the second computing operation in a second time period. If the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period. The locations of the computational units used may be different between the different layers, which may result in meaningless movement of the data, since the unnecessary computational data itself has been removed. The traditional data transmission mode is that the transmission path is longer, and the data transmission mode is that a first calculation unit is a bus, a DRAM or an SRAM is a bus, a second calculation unit or a first calculation unit is a bus, a second calculation unit. In the scheme, disordered operation is adopted, output data after the calculation of the first calculation unit is used as input data of the first calculation unit, namely the data transmission mode is the first calculation unit, namely the first calculation unit is used for transmitting the data only in the first calculation unit, the system considers the first calculation unit as the second calculation unit by changing the virtual number of the first calculation unit, data flow is not carried out on the second calculation unit, meanwhile, the first calculation unit can be combined with the control unit to transmit required calculation parameters to complete calculation, the above operation is circulated until the calculation is completed, the data moving process is reduced, and the calculation efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a chip system for detection calculation according to an embodiment of the present application;
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
The embodiment of the application provides a chip system facing detection calculation and a chip method facing detection calculation, please refer to fig. 1, comprising: a first computing unit array including a plurality of first computing units of a first number for performing a first computing operation during a first period of time; a second computing unit array including a plurality of second numbered second computing units for performing a second computing operation for a second period of time, the second period of time after the first period of time, the second computing operation being performed after the first computing operation is completed; a control unit for judging the number of first computing units required for performing the first computing operation and the number of second computing units required for performing the second computing operation, and numbering the first computing units and the second computing units; after the first computing unit array performs the first computing operation, the control unit modifies the first number into the second number, and sets and displays a substitute operation identifier in the control unit, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in an active state continues to perform the second computing operation in a second time period.
In one possible implementation, the detection computation oriented chip system further includes: the active computing unit tracking unit judges whether the first computing unit is in an active state or not according to the first indication signal of the first computing unit, and judges whether the second computing unit is in an active state or not according to the second indication signal of the second computing unit; after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continuously performs the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
In the implementation process, the first computing unit array and the second computing unit array respectively include a first computing unit and a second computing unit, and are used for respectively executing a first computing operation and a second computing operation, the second computing operation is located after the first computing operation in the second time period, the first computing unit is provided with a first number, and the second computing unit is provided with a second number. The control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units. The active computing unit tracking unit judges whether the first computing unit and the second computing unit are in an active state according to the first indicating signals of the first computing units and the second indicating signals of the second computing unit, and one feasible indicating mode is to realize the indication of the working states of all the first computing units by indicating how many continuous first computing units are occupied or not occupied, for example, A4U4 is used as a first indicating signal and can be used for indicating that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. After the execution of the first computing operation is completed, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continues to execute the second computing operation in a second time period. If the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period. The locations of the computational units used may be different between the different layers, which may result in meaningless movement of the data, since the unnecessary computational data itself has been removed. The traditional data transmission mode is that a first computing unit-a bus-a Dynamic Random Access Memory (DRAM) or a Static Random Access Memory (SRAM) -a bus-a second computing unit or a first computing unit-a bus-a second computing unit, and the transmission path is longer. In the scheme, disordered operation is adopted, output data after the calculation of the first calculation unit is used as input data of the first calculation unit, namely the data transmission mode is the first calculation unit, namely the first calculation unit is used for transmitting the data only in the first calculation unit, the system considers the first calculation unit as the second calculation unit by changing the virtual number of the first calculation unit, data flow is not carried out on the second calculation unit, meanwhile, the first calculation unit can be combined with the control unit to transmit required calculation parameters to complete calculation, the above operation is circulated until the calculation is completed, the data moving process is reduced, and the calculation efficiency is improved.
In one possible implementation manner, after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of first computing units in an active state, if the number of second computing units required for performing the second computing operation is higher than the number of first computing units in the active state, the control unit decapsulates the temporarily-stored first computing units and enables the first computing units to be in the active state until the number of first computing units in the active state is consistent with the number of second computing units required for the second computing operation, the control unit modifies the first number into the second number, the output data of the first computing units serves as input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in the second period.
In the implementation process, after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is higher than the number of the first computing units in the active state, the control unit decapsulates the temporarily-stored first computing units, enables the first computing units to be in the active state, preferentially calls the first computing units which can be directly called, directly uses the first computing units if original data of the first computing units are available, transfers the difference value between the first computing units and new data to the first computing units if the original data of the first computing units are unavailable, performs computation on the first computing units until the number of the first computing units in the active state is consistent with the number of the second computing units required for performing the second computing operation, and the control unit modifies the first number to the second number, the output data of the first computing units serves as input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in the second time period. The first calculation unit which can be directly used is preferentially called, the calling time is reduced, and the calculation efficiency is further improved.
In one possible implementation, the method further includes: the active computing unit pre-judging unit is used for comparing the first computing operation output data of the first computing unit with various types of data to be processed in the database and obtaining the number of second computing units required for processing the first computing operation output data.
In the implementation process, the method further comprises: the active computing unit pre-judging unit is internally preset with a database for storing the number of the computing units required by various types of to-be-processed data, the database can be arranged outside a chip system facing detection computing, and the active computing unit pre-judging unit reads first computing operation output data of the first computing unit and compares the first computing operation output data with various types of to-be-processed data in the database so as to obtain the number of second computing units required by processing the first computing operation output data, pre-judge the number of the second computing units required in advance, speed up regulating and controlling the first computing unit and improve computing efficiency.
In one possible implementation, when the plurality of first indication signals are in the continuously active state, the plurality of first computing units are indicated to be in the continuously active state, and when the plurality of first indication signals are in the continuously inactive state, the plurality of first computing units are indicated to be in the continuously inactive state
In the implementation process, one possible indication mode is to set 1bit indication for each of the first computing units and the second computing units, and another possible indication mode is to realize indication of working states of all the first computing units by indicating how many consecutive first computing units are occupied or not occupied, for example, A4U4 is used as a first indication signal to indicate that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. The method for obtaining the pre-judging data comprises the steps of carrying out logic analysis on the existing data, further obtaining the information of the calculation unit needing to be occupied, for example, deploying the calculation unit in the calculation framework by using a convolutional neural network (CNN network), flexibly deploying and coordinately calling the calculation unit needing to be called, analyzing the calculation operation to be processed by the pre-judging unit, and obtaining the required first calculation unit cost in advance before the deployment of the calculation operation.
In one possible implementation, the first and second arrays of computing units are used to perform training tasks or reasoning tasks.
In the implementation process, the first computing unit array and the second computing unit array can be used for executing training tasks or for executing reasoning tasks, and can also be used for executing the training tasks and the reasoning tasks in a crossed manner, so that the use is more flexible.
In a second aspect, an embodiment of the present application provides a chip method for detection computation, including:
a plurality of first numbered first computing units are arranged in the first computing unit array and used for executing first computing operation in a first time period, a plurality of second numbered second computing units are arranged in the second computing unit array and used for executing second computing operation in a second time period, and the second computing operation is executed after the first computing operation is completed in the second time period; the control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units; setting an active computing unit tracking unit, judging whether the first computing unit is in an active state or not according to a first indication signal of the first computing unit, and judging whether the second computing unit is in an active state or not according to a second indication signal of the second computing unit; after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continuously performs the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
In the implementation process, the first computing unit array and the second computing unit array respectively include a first computing unit and a second computing unit, and are used for respectively executing a first computing operation and a second computing operation, the second computing operation is located after the first computing operation in the second time period, the first computing unit is provided with a first number, and the second computing unit is provided with a second number. The control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units. The active computing unit tracking unit judges whether the first computing unit and the second computing unit are in an active state according to the first indicating signals of the first computing units and the second indicating signals of the second computing unit, and one feasible indicating mode is to realize the indication of the working states of all the first computing units by indicating how many continuous first computing units are occupied or not occupied, for example, A4U4 is used as a first indicating signal and can be used for indicating that the first four first computing units are occupied and activated, the second four first computing units are not occupied, A2U4A2 indicates that the first two first computing units are in an occupied and activated state, the middle four first computing units are in a non-occupied state, and the last two first computing units are in an activated state. After the execution of the first computing operation is completed, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in the active state continues to execute the second computing operation in a second time period. If the number of the second computing units required for executing the second computing operation is lower than the number of the first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period; if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serve as input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period. The locations of the computational units used may be different between the different layers, which may result in meaningless movement of the data, since the unnecessary computational data itself has been removed. The traditional data transmission mode is that the transmission path is longer, and the data transmission mode is that a first calculation unit is a bus, a DRAM or an SRAM is a bus, a second calculation unit or a first calculation unit is a bus, a second calculation unit. In the scheme, disordered operation is adopted, output data after the calculation of the first calculation unit is used as input data of the first calculation unit, namely the data transmission mode is the first calculation unit, namely the first calculation unit is used for transmitting the data only in the first calculation unit, the system considers the first calculation unit as the second calculation unit by changing the virtual number of the first calculation unit, data flow is not carried out on the second calculation unit, meanwhile, the first calculation unit can be combined with the control unit to transmit required calculation parameters to complete calculation, the above operation is circulated until the calculation is completed, the data moving process is reduced, and the calculation efficiency is improved.
Claims (7)
1. A detection-computation-oriented chip system, comprising:
a first computing unit array including a plurality of first computing units of a first number for performing a first computing operation during a first period of time;
a second computing unit array including a plurality of second numbered second computing units for performing a second computing operation for a second period of time, the second period of time after the first period of time, the second computing operation being performed after the first computing operation is completed;
a control unit for judging the number of first computing units required for performing the first computing operation and the number of second computing units required for performing the second computing operation, and numbering the first computing units and the second computing units;
after the first computing unit array performs the first computing operation, the control unit modifies the first number into the second number, and sets a display substitute operation identifier in the control unit, the output data of the first computing unit is used as the input data of the first computing unit, and the first computing unit in an active state continues to perform the second computing operation in a second time period.
2. The detection-computation-oriented chip system of claim 1, further comprising:
The active computing unit tracking unit judges whether the first computing unit is in an active state or not according to the first indication signal of the first computing unit, and judges whether the second computing unit is in an active state or not according to the second indication signal of the second computing unit;
after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units is used as the input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in a second time period;
if the number of second computing units required for executing the second computing operation is lower than the number of first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period;
And if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serves as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
3. The chip system for detecting and calculating according to claim 2, wherein after the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is higher than the number of the first computing units in an active state, the control unit decapsulates the temporarily-stored first computing units and makes the number of the first computing units in an active state until the number of the first computing units in an active state is consistent with the number of the second computing units required for the second computing operation, the control unit modifies the first number into the second number, the output data of the first computing units is used as input data of the first computing units, and the first computing units in an active state continue to perform the second computing operation in a second period of time.
4. The detection-computation-oriented chip system of claim 3, further comprising:
the active computing unit pre-judging unit is used for comparing the first computing operation output data of the first computing unit with various data to be processed in the database to obtain the number of second computing units required for processing the first computing operation output data.
5. The detection-computation-oriented chip system of claim 4, wherein when the plurality of first indication signals are in a continuously active state, the plurality of first computation units are indicated as being in a continuously active state, and wherein when the plurality of first indication signals are in a continuously inactive state, the plurality of first computation units are indicated as being in a continuously inactive state.
6. The detection-computation-oriented chip system of claim 1, wherein the first and second arrays of computing units are used to perform training tasks or reasoning tasks.
7. A detection computation oriented chip method, comprising:
a plurality of first numbered first computing units are arranged in the first computing unit array and used for executing first computing operation in a first time period, a plurality of second numbered second computing units are arranged in the second computing unit array and used for executing second computing operation in a second time period, and the second computing operation is executed after the first computing operation is completed in the second time period; the control unit is used for judging the number of first computing units required for executing the first computing operation and the number of second computing units required for executing the second computing operation, and numbering the first computing units and the second computing units; setting an active computing unit tracking unit, judging whether the first computing unit is in an active state or not according to a first indication signal of the first computing unit, and judging whether the second computing unit is in an active state or not according to a second indication signal of the second computing unit;
After the first computing unit array performs the first computing operation, the active computing unit tracking unit detects the number of the first computing units in an active state, if the number of the second computing units required for performing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units is used as the input data of the first computing units, and the first computing units in the active state continue to perform the second computing operation in a second time period;
if the number of second computing units required for executing the second computing operation is lower than the number of first computing units in an active state, the control unit temporarily seals the redundant first computing units, the control unit modifies the first number into the second number, the output data of the first computing units are used as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period;
and if the number of the second computing units required for executing the second computing operation is higher than the number of the first computing units in the active state, the control unit calls the idle first computing units into the active state until the number of the second computing units required for executing the second computing operation is consistent with the number of the first computing units in the active state, the control unit modifies the first number into the second number, the output data of the first computing units serves as the input data of the first computing units, and the first computing units in the active state continue to execute the second computing operation in a second time period.
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