CN116865771A - DRM (digital rights management) and analog broadcast transmitter adaptation board based on FPGA (field programmable Gate array) - Google Patents
DRM (digital rights management) and analog broadcast transmitter adaptation board based on FPGA (field programmable Gate array) Download PDFInfo
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- CN116865771A CN116865771A CN202310579409.2A CN202310579409A CN116865771A CN 116865771 A CN116865771 A CN 116865771A CN 202310579409 A CN202310579409 A CN 202310579409A CN 116865771 A CN116865771 A CN 116865771A
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- 230000006978 adaptation Effects 0.000 title claims description 9
- 230000005236 sound signal Effects 0.000 claims abstract description 31
- 238000012545 processing Methods 0.000 claims abstract description 9
- 238000013507 mapping Methods 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 238000001914 filtration Methods 0.000 claims description 9
- 238000003786 synthesis reaction Methods 0.000 claims description 9
- 238000009792 diffusion process Methods 0.000 claims description 6
- 230000010354 integration Effects 0.000 abstract description 5
- 238000005516 engineering process Methods 0.000 description 6
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 230000003044 adaptive effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 230000004075 alteration Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005562 fading Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/0014—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage using DSP [Digital Signal Processor] quadrature modulation and demodulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/0017—Digital filtering
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
- H04L27/2627—Modulators
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transmitters (AREA)
Abstract
The invention discloses a DRM and analog broadcast transmitter adapter plate based on FPGA, comprising: the system comprises a data input module, a signal modulation module, a clock module and a power management module; the data input module comprises: the device comprises an audio signal receiving unit, a digital signal receiving unit, a code shifting switch, an analog-to-digital converter and an interface unit; the code-shifting switch comprises two states; the signal modulation module includes: the programmable logic device comprises a programmable gate array (FPGA), a digital-to-analog converter, an output amplifier and a digital radio frequency exciter; the programmable logic device FPGA is integrated with a plurality of functional units. The code dialing switch can realize the working mode switching of the adapter plate, has strong compatibility, and a plurality of functional units are integrated in the FPGA, so that the cost is reduced, and the processing speed, the function rubbing property and the integration level are improved.
Description
Technical Field
The invention relates to the technical field of broadcasting, in particular to an adaptive board of a DRM and analog broadcasting transmitter based on an FPGA.
Background
With the rapid development of wireless communication technology, DRM (Digital Radio mobile) Digital broadcasting technology has become an important development direction of the broadcast television industry. Compared with the traditional analog broadcasting, the digital broadcasting has the advantages of higher signal transmission quality, wider coverage range, higher efficiency and the like, and more broadcasting television institutions begin to adopt digital broadcasting technology.
However, most of existing transmitters in the existing use are analog transmitters, a whole set of transmitter system is updated and replaced with a new one, so that huge cost is caused, the analog transmitters can meet the requirements under the condition that the coverage range is not very large and the transmission requirement is not very strict, and the maintenance cost of the analog transmitters is relatively low, so that users still need the analog transmitters to work in specific occasions.
The DRM transmitter adapter board on the market can only be matched with the DRM transmitter, and the compatibility is poor. In addition, most of the existing DRM transmitter adaptation board technologies are realized by putting DRM code modulators on a computer or putting channel coding modules and OFDM modules on a Digital Signal Processor (DSP), but the above technologies have higher cost, slower processing speed, and poorer function scalability and integration level.
Disclosure of Invention
The embodiment of the invention provides an FPGA-based DRM and analog broadcast transmitter adaptation board, which is used for solving the problems that the technology of the transmitter adaptation board is poor in compatibility, high in cost, low in processing speed and poor in function rubbing property and integration level, which are not reliable in the prior art.
On one hand, the embodiment of the invention provides an FPGA-based DRM and analog broadcast transmitter adaptation board, which comprises the following components:
the system comprises a data input module, a signal modulation module, a clock module and a power management module.
The data input module is used for converting external input data and then sending the converted external input data to the signal modulation module, and the data input module comprises: the device comprises an audio signal receiving unit, a digital signal receiving unit, a code shifting switch, an analog-to-digital converter and an interface unit; the code dialing switch comprises two states.
The signal modulation module is used for processing the converted data, and comprises: the programmable logic device comprises a programmable gate array (FPGA), a digital-to-analog converter, an output amplifier and a digital radio frequency exciter; the programmable logic device FPGA is integrated with a plurality of functional units.
The clock module is used for providing clock signals for the programmable logic device FPGA and controlling the functional units to cooperatively operate.
The power management module is used for supplying power to the data input module, the signal modulation module and the clock module.
In one possible implementation manner, the audio signal receiving unit and the digital signal receiving unit are electrically connected with the code dialing switch, the code dialing switch is electrically connected with the analog-to-digital converter and the interface unit respectively, the analog-to-digital converter, the interface unit, the clock module and the power management module are electrically connected with the programmable logic device FPGA, the programmable logic device FPGA is electrically connected with the digital-to-analog converter and the digital radio frequency exciter respectively, the digital-to-analog converter is electrically connected with the output amplifier, and the output amplifier and the digital radio frequency exciter are electrically connected with the transmitter.
In one possible implementation, the several functional units include:
the device comprises a digital filtering unit, a digital modulation unit, a frequency synthesis unit, an energy diffusion unit, a channel coding unit, a unit interleaving unit, a pilot generator unit, an OFDM unit mapping unit, an OFDM symbol generating unit and a modulator unit.
In one possible implementation, the FPGA-based DRM-plus-analog broadcast transmitter adapter board includes two modes of operation that are switched by adjusting two states of the dial switch; the two working modes comprise: analog broadcast mode and DRM broadcast mode.
In one possible implementation, the analog broadcast mode includes the following working steps:
the audio signal passes through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter and the output amplifier successively to obtain an output audio signal, and the output amplifier transmits the output audio signal to a transmitter.
In one possible implementation, the programmable logic device FPGA invokes the digital filtering unit, digital modulation unit and frequency synthesis unit to operate on the passing signals.
In one possible implementation, the DRM broadcast mode includes the following working steps:
the digital signal passes through the digital signal receiving unit, the interface unit and the programmable logic device FPGA successively to obtain a DRM baseband signal, wherein the DRM baseband signal is divided into two paths, one path of DRM baseband signal passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path of DRM baseband signal passes through the digital radio frequency exciter to obtain an output carrier signal, and the output amplifier and the digital radio frequency exciter respectively transmit the output audio signal and the output carrier signal to a transmitter.
In one possible implementation, the programmable logic device FPGA invokes the energy spreading unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passed signals.
The DRM and analog broadcast transmitter adaptation board based on the FPGA has the following advantages:
the proposed code shifting switch can realize the working mode switching of the adapter plate, has strong compatibility, and a plurality of functional units are integrated in the FPGA, so that the cost is reduced, and the processing speed, the function rubbing property and the integration level are improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an adaptive board and a transmitter of a DRM and analog broadcast transmitter based on an FPGA according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by one of ordinary skill in the art without undue burden on the person of ordinary skill in the art based on the embodiments of the present invention, are within the scope of the present invention.
Fig. 1 is a schematic structural diagram of an adaptive board and a transmitter of a DRM and analog broadcast transmitter based on an FPGA according to an embodiment of the present invention. The embodiment of the invention provides an FPGA-based DRM and analog broadcast transmitter adaptation board, which comprises the following components:
the system comprises a data input module, a signal modulation module, a clock module and a power management module.
The data input module is used for converting external input data and then sending the converted external input data to the signal modulation module, and the data input module comprises: the device comprises an audio signal receiving unit, a digital signal receiving unit, a code shifting switch, an analog-to-digital converter and an interface unit; the code dialing switch comprises two states.
The signal modulation module is used for processing the converted data, and comprises: the programmable logic device comprises a programmable gate array (FPGA), a digital-to-analog converter, an output amplifier and a digital radio frequency exciter; the programmable logic device FPGA is integrated with a plurality of functional units.
The clock module is used for providing clock signals for the programmable logic device FPGA and controlling the functional units to cooperatively operate.
The power management module is used for supplying power to the data input module, the signal modulation module and the clock module.
The interface unit in this embodiment is a UART serial interface, but in other possible embodiments an AES interface or an ethernet interface may also be selected.
The audio signal receiving unit and the digital signal receiving unit are electrically connected with the code shift switch, the code shift switch is electrically connected with the analog-to-digital converter and the interface unit respectively, the analog-to-digital converter, the interface unit, the clock module and the power management module are electrically connected with the programmable logic device FPGA, the programmable logic device FPGA is electrically connected with the digital-to-analog converter and the digital radio frequency exciter respectively, the digital-to-analog converter is electrically connected with the output amplifier, and the output amplifier and the digital radio frequency exciter are electrically connected with the transmitter.
Illustratively, the number of functional units includes:
the device comprises a digital filtering unit, a digital modulation unit, a frequency synthesis unit, an energy diffusion unit, a channel coding unit, a unit interleaving unit, a pilot generator unit, an OFDM unit mapping unit, an OFDM symbol generating unit and a modulator unit.
Specifically, the digital filtering unit is used for performing digital filtering operation; the digital modulation unit is used for carrying out digital modulation operation; the frequency synthesis unit is used for performing frequency synthesis operation; the energy diffusion unit is used for performing energy diffusion operation, providing randomization of digital bits, reducing unnecessary regularity in transmission signals and improving the anti-interference performance of the signals; the channel coding unit is used for carrying out channel coding processing, adding redundant bits into data in a certain defined mode so as to protect and correct errors, and defining the mapping from digital coding information to the QAM unit so as to improve the reliability and error resistance of signals; the unit interleaving unit is used for randomly arranging continuous data streams in time and frequency to cope with the dispersion of the transmission channel in time and frequency, avoid continuous error codes and improve the stability of the channel; the pilot generator unit is used for inserting a pilot frequency sequence into the signal and is used for coherent demodulation and channel estimation of a receiver so as to improve the synchronism and the multipath fading resistance of the channel; the OFDM unit mapping unit is used for mapping the transmitted QAM symbols onto different subcarriers to realize the conversion of the data sequence into signals on the time domain; the OFDM symbol generating unit is used for converting the frequency domain information of the sending channel into time domain information, adding a cyclic prefix, generating an OFDM symbol, and inserting a pilot frequency sequence into the symbol; the modulator unit is used for converting the complex form of the OFDM symbol into a time domain digital waveform that can be actually transmitted.
The DRM and analog broadcast transmitter adapter board based on the FPGA comprises two working modes, wherein the two working modes are switched by adjusting two states of the code shifting switch; the two working modes comprise: analog broadcast mode and DRM broadcast mode.
Illustratively, the analog broadcast mode includes the following operative steps:
the audio signal passes through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter and the output amplifier successively to obtain an output audio signal, and the output amplifier transmits the output audio signal to a transmitter.
Illustratively, the programmable logic device FPGA invokes the digital filtering unit, digital modulation unit and frequency synthesis unit to operate on the passed signals.
Specifically, after passing through the audio signal receiving unit, the audio signal is converted into a digital signal through an analog-to-digital converter, the digital signal is transmitted to a programmable logic device FPGA, the programmable logic device FPGA performs digital filtering, digital modulation and frequency synthesis operation on the digital signal, the signal processed by the programmable logic device FPGA is converted into an audio signal to be amplified through the digital-to-analog converter, finally, the power amplification is performed through an output amplifier, the strength and coverage range of the signal can be increased through the power amplification, and the output audio signal is obtained and transmitted to a transmitter.
Illustratively, the DRM broadcast mode includes the following operative steps:
the digital signal passes through the digital signal receiving unit, the interface unit and the programmable logic device FPGA successively to obtain a DRM baseband signal, wherein the DRM baseband signal is divided into two paths, one path of DRM baseband signal passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path of DRM baseband signal passes through the digital radio frequency exciter to obtain an output carrier signal, and the output amplifier and the digital radio frequency exciter respectively transmit the output audio signal and the output carrier signal to a transmitter.
The digital signal in this embodiment is a DRM standard format digital signal.
Illustratively, the programmable logic device FPGA invokes the energy spreading unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passed signals.
Specifically, after the digital signal passes through the digital signal receiving unit, the digital signal is transmitted to the programmable logic device FPGA through the interface unit, the programmable logic device FPGA performs operations such as energy diffusion, channel coding, unit interleaving, pilot frequency generation, OFDM unit mapping, OFDM symbol generation, modulation and the like on the digital signal to obtain a DRM baseband signal, the DRM baseband signal is divided into two paths, one path obtains an output audio signal through the digital-to-analog converter and the output amplifier, the other path obtains an output carrier signal through the digital radio frequency exciter by phase modulation, and the output amplifier and the digital radio frequency exciter respectively transmit the output audio signal and the output carrier signal to the transmitter.
The code dialing switch provided by the embodiment can realize the working mode switching of the adapter plate, has strong compatibility, and a plurality of functional units are integrated in the FPGA, so that the cost is reduced, and the processing speed, the function rubbing property and the integration level are improved.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (8)
1. DRM and analog broadcast transmitter adapter board based on FPGA, its characterized in that includes:
the system comprises a data input module, a signal modulation module, a clock module and a power management module;
the data input module is used for converting external input data and then sending the converted external input data to the signal modulation module, and the data input module comprises: the device comprises an audio signal receiving unit, a digital signal receiving unit, a code shifting switch, an analog-to-digital converter and an interface unit; the code dialing switch comprises two states;
the signal modulation module is used for processing the converted data, and comprises: the programmable logic device comprises a programmable gate array (FPGA), a digital-to-analog converter, an output amplifier and a digital radio frequency exciter; the programmable logic device FPGA is integrated with a plurality of functional units;
the clock module is used for providing a clock signal for the programmable logic device FPGA and controlling the plurality of functional units to cooperatively operate;
the power management module is used for supplying power to the data input module, the signal modulation module and the clock module.
2. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 1, wherein the audio signal receiving unit and the digital signal receiving unit are electrically connected to the code shift switch, the code shift switch is electrically connected to the analog-to-digital converter and the interface unit, respectively, the analog-to-digital converter, the interface unit, the clock module, and the power management module are electrically connected to the programmable logic device FPGA, which is electrically connected to the digital-to-analog converter and the digital radio frequency exciter, respectively, and the digital-to-analog converter is electrically connected to the output amplifier, which is electrically connected to the transmitter.
3. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 1, wherein the plurality of functional units comprises:
the device comprises a digital filtering unit, a digital modulation unit, a frequency synthesis unit, an energy diffusion unit, a channel coding unit, a unit interleaving unit, a pilot generator unit, an OFDM unit mapping unit, an OFDM symbol generating unit and a modulator unit.
4. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 3, comprising two modes of operation that are switched by adjusting two states of the dial switch; the two working modes comprise: analog broadcast mode and DRM broadcast mode.
5. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 4, wherein the analog broadcast mode comprises the following working steps:
the audio signal passes through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter and the output amplifier successively to obtain an output audio signal, and the output amplifier transmits the output audio signal to a transmitter.
6. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 5, wherein the programmable logic device FPGA invokes the digital filtering unit, digital modulation unit, and frequency synthesis unit to operate on the passing signals.
7. The FPGA-based DRM and analog broadcast transmitter adapter board of claim 4, wherein the DRM broadcast mode comprises the following working steps:
the digital signal passes through the digital signal receiving unit, the interface unit and the programmable logic device FPGA successively to obtain a DRM baseband signal, wherein the DRM baseband signal is divided into two paths, one path of DRM baseband signal passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path of DRM baseband signal passes through the digital radio frequency exciter to obtain an output carrier signal, and the output amplifier and the digital radio frequency exciter respectively transmit the output audio signal and the output carrier signal to a transmitter.
8. The FPGA-based DRM and analog broadcast transmitter adaptation board of claim 7, wherein the programmable logic device FPGA invokes the energy spreading unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passing signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310579409.2A CN116865771A (en) | 2023-05-22 | 2023-05-22 | DRM (digital rights management) and analog broadcast transmitter adaptation board based on FPGA (field programmable Gate array) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310579409.2A CN116865771A (en) | 2023-05-22 | 2023-05-22 | DRM (digital rights management) and analog broadcast transmitter adaptation board based on FPGA (field programmable Gate array) |
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| CN116865771A true CN116865771A (en) | 2023-10-10 |
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| CN202310579409.2A Pending CN116865771A (en) | 2023-05-22 | 2023-05-22 | DRM (digital rights management) and analog broadcast transmitter adaptation board based on FPGA (field programmable Gate array) |
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| CN (1) | CN116865771A (en) |
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- 2023-05-22 CN CN202310579409.2A patent/CN116865771A/en active Pending
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