CN116860176A

CN116860176A - EEPROM-based data management method, device, equipment and storage medium

Info

Publication number: CN116860176A
Application number: CN202310951421.1A
Authority: CN
Inventors: 陆敬泉; 程春林; 周斌; 朱东; 耿纯洁; 陆志达
Original assignee: Dongfeng Electric Drive Systems Co Ltd
Current assignee: Dongfeng Electric Drive Systems Co Ltd
Priority date: 2023-07-31
Filing date: 2023-07-31
Publication date: 2023-10-10

Abstract

The invention provides a data management method, a device, equipment and a storage medium based on EEPROM, wherein the method comprises the following steps: copying all data in the EEPROM into mapping data blocks in the RAM, wherein mapping members in the mapping data blocks correspond to original members in the EEPROM one by one; determining a first original member and a first mapping member corresponding to data to be written, assigning values to the first mapping member by the data to be written, and assigning values to the first original member by the data of the first mapping member; and determining a second original member and a second mapping member corresponding to the data to be read, and reading the data of the second mapping member, wherein the data of the second mapping member is identical to the data of the second original member. According to the invention, the EEPROM is not required to be accessed when the data is read, so that the access frequency of the EEPROM is reduced, the time loss of the system is reduced, the read-write efficiency is obviously improved, the read time sequence is not required only when the data is written, the time-sharing management and arbitration are not required by two time sequences, and the complexity of a software module is greatly reduced.

Description

EEPROM-based data management method, device, equipment and storage medium

Technical Field

The present invention relates to the field of data management technologies, and in particular, to a data management method, device, equipment and storage medium based on EEPROM.

Background

Nowadays, with the popularization of informatization and intelligence of automobiles, various automobile electronic units bear more and more complex and efficient execution functions, and some key data and information need to be stored in a power-off mode. Therefore, most automobile electronic units have data storage functions, which are usually implemented by external EEPROM or by simulating EEPROM using FLASH inside the processor. The traditional data management method accesses the EEPROM before the EEPROM read-write operation, judges whether the EEPROM is in a busy state or not, and executes the operation instruction after waiting for not busy. This is because it takes a while to update data after the EEPROM invokes the write operation, and the device cannot be read or written during the data update. Therefore, frequent access to the EEPROM increases system time loss, resulting in low read-write efficiency of the data management method.

Disclosure of Invention

The invention mainly aims to provide a data management method, device and equipment based on EEPROM and a storage medium, and aims to solve the technical problem that the data management method based on EEPROM in the prior art is low in reading and writing efficiency.

In a first aspect, the present invention provides an EEPROM-based data management method, the EEPROM-based data management method comprising:

copying all data in the EEPROM into mapping data blocks in the RAM, wherein mapping members in the mapping data blocks are in one-to-one correspondence with original members in the EEPROM;

determining a first original member and a first mapping member corresponding to data to be written, assigning values to the first mapping member by the data to be written, and assigning values to the first original member by the data of the first mapping member;

and determining a second original member and a second mapping member corresponding to the data to be read, and reading the data of the second mapping member, wherein the data of the second mapping member is identical to the data of the second original member.

Further, in an embodiment, an enumeration table and a configuration information table are stored in the FLASH;

the enumeration members in the enumeration table are used for carrying out abstract statement on the mapping members in the mapping data block and the corresponding original members in the EEPROM;

each configuration member in the configuration information table is used for storing the RAM address and the data length of the corresponding mapping member, and the enumeration member is also used for locating the configuration member.

Further, in an embodiment, the determining a first original member and a first mapping member corresponding to the data to be written, assigning the first mapping member with the data to be written, and assigning the first original member with the data of the first mapping member includes:

determining a first enumeration member corresponding to data to be written, the length of the data to be written and a writing storage address in a RAM, wherein the first enumeration member is used for carrying out abstract statement on a first original member and a first mapping member;

storing the data to be written in the writing storage address;

if the length of the data stored by the target configuration member positioned by the first enumeration member is equal to the length of the data to be written, acquiring a target RAM address stored by the target configuration member, wherein the target RAM address is used for storing the first mapping member;

if the data in the target RAM address is different from the data in the writing storage address, copying the data in the writing storage address into the target RAM address;

according to the target RAM address and the RAM address stored by the first configuration member in the configuration information table, calculating to obtain a target EEPROM address, wherein the target EEPROM address is used for storing the first original member;

Copying the data in the target RAM address to the target EEPROM address.

Further, in an embodiment, the step of copying the data in the target RAM address to the target EEPROM address includes:

if the FIFO memory is not full, inputting the target RAM address and the target EEPROM address into the FIFO memory;

copying the data in the target RAM address to the target EEPROM address through the FIFO memory.

Further, in an embodiment, after the step of calculating the target EEPROM address according to the target RAM address and the RAM address stored by the first configuration member in the configuration information table, the step of storing the first original member by using the target EEPROM address further includes:

and if the FIFO memory is full, attempting to input the target RAM address and the target EEPROM address into the FIFO memory again after waiting for a preset time.

Further, in an embodiment, the step of determining a second original member and a second mapping member corresponding to the data to be read, and reading the data of the second mapping member, where the data of the second mapping member is the same as the data of the second original member includes:

Determining a second enumeration member corresponding to data to be read, the length of the data to be read and a read storage address in a RAM, wherein the second enumeration member is used for carrying out abstract statement on a second original member and a second mapping member;

if the length of the data stored by the target configuration member positioned by the second enumeration member is equal to the length of the data to be read, acquiring a target RAM address stored by the target configuration member, wherein the target RAM address is used for storing the second mapping member;

copying the data in the target RAM address to the reading storage address to read the data of the second mapping member, wherein the data of the second mapping member is identical to the data of the second original member.

Further, in an embodiment, the original member in the EEPROM is sequentially a data BOOT, a data HEAD, a plurality of intermediate data members, and a data TAIL;

after the step of copying all data in the EEPROM into the mapped data block in the RAM, further comprises:

if the data BOOT in the mapping data block is different from the BOOT special word, judging that the EEPROM is a new EEPROM, and determining that the data to be written is the BOOT special word, the HEAD special word, the TAIL special word and a plurality of first preset data, wherein the first preset data are used for assigning values to the intermediate data members;

If the data BOOT in the mapping data block is the same as the BOOT special word, and the data HEAD in the mapping data block is different from the HEAD special word, judging that the data of the EEPROM is invalid, and determining that the data to be written is the HEAD special word, the TAIL special word and a plurality of second preset data, wherein the second preset data is used for assigning values to the intermediate data members;

if the data BOOT in the mapping data block is the same as the BOOT special word, the data HEAD in the mapping data block is the same as the HEAD special word, and the data TAIL in the mapping data block is different from the TAIL special word, judging that the data of the EEPROM is invalid, and determining the data to be written into to be the TAIL special word and a plurality of second preset data.

In a second aspect, the present invention also provides an EEPROM-based data management apparatus, comprising:

the initialization module is used for copying all data in the EEPROM into mapping data blocks in the RAM, wherein mapping members in the mapping data blocks are in one-to-one correspondence with original members in the EEPROM;

the writing module is used for determining a first original member and a first mapping member corresponding to data to be written, assigning values to the first mapping member by the data to be written, and assigning values to the first original member by the data of the first mapping member;

And the reading module is used for determining a second original member and a second mapping member corresponding to the data to be read and reading the data of the second mapping member, wherein the data of the second mapping member is the same as the data of the second original member.

In a third aspect, the present invention also provides an EEPROM-based data management apparatus comprising a processor, a memory, and an EEPROM-based data management program stored on the memory and executable by the processor, wherein the EEPROM-based data management program, when executed by the processor, implements the steps of the EEPROM-based data management method described above.

In a fourth aspect, the present invention further provides a storage medium, where an EEPROM-based data management program is stored, where the EEPROM-based data management program, when executed by a processor, implements the steps of the EEPROM-based data management method described above.

The invention ensures that the mapping data block is identical with the data of the mapping member and the original member corresponding to each other in the EEPROM in the initial state by copying all the data in the EEPROM into the mapping data block in the RAM. When data is written, the mapping members are assigned with the data to be written, and then the original members are assigned with the data of the mapping members, so that the data of the mapping members and the data of the original members corresponding to each other are kept the same after the data is written. When the data is read, the data of the mapping member is directly read, and the corresponding original data in the EEPROM can be read.

By the invention, the EEPROM is not required to be accessed when the data is read, and the access frequency of the EEPROM is reduced, so that the time loss of the system is reduced, and the read-write efficiency is obviously improved. In addition, in the periodic task execution process of the system, only the writing time sequence does not exist, the reading time sequence does not need to be carried out time-sharing management and arbitration for the reading time sequence and the writing time sequence, and the complexity of the software module is greatly reduced.

Drawings

FIG. 1 is a flow chart of an EEPROM-based data management method according to an embodiment of the invention;

FIG. 2 is a schematic diagram of a software architecture of an EEPROM-based data management method of the present invention;

FIG. 3 is a diagram illustrating a data structure of mapping data blocks and EEPROMs in accordance with an embodiment of the present invention;

FIG. 4 is a diagram illustrating a data structure of an enumeration table according to an embodiment of the present invention;

FIG. 5 is a schematic diagram showing a data structure of a configuration information table according to an embodiment of the present invention;

FIG. 6 is a flow chart of data writing using a data management layer according to an embodiment of the invention;

FIG. 7 is a flow chart of FIFO data input in the data transfer layer according to an embodiment of the invention;

FIG. 8 is a flow chart of FIFO data output from the data transfer layer according to an embodiment of the invention;

FIG. 9 is a flow chart illustrating data reading by the data management layer according to an embodiment of the invention;

FIG. 10 is a flow chart of data verification and repair using a data management layer according to an embodiment of the invention;

fig. 11 is a schematic hardware structure of an EEPROM-based data management apparatus according to an embodiment of the present invention.

The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.

Detailed Description

It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.

In a first aspect, an embodiment of the present invention provides an EEPROM-based data management method.

Fig. 1 is a flow chart of an EEPROM-based data management method according to an embodiment of the present invention.

Referring to fig. 1, in one embodiment, the EEPROM-based data management method includes the steps of:

s11, copying all data in the EEPROM into mapping data blocks in the RAM, wherein mapping members in the mapping data blocks correspond to original members in the EEPROM one by one;

FIG. 2 is a schematic diagram of a software architecture of an EEPROM-based data management method of the present invention; FIG. 3 is a diagram showing a data structure of mapping data blocks to EEPROMs in accordance with one embodiment of the present invention.

Referring to fig. 2, the software architecture is divided into an application data management layer, a data transfer layer, and an EEPROM driving layer. The application data management layer is the topmost layer and is mainly responsible for configuring and managing storage data, and provides data writing and reading functions of the EEPROM for other application layers. The data transmission layer is an intermediate layer and is responsible for transferring data of the application data management layer to the EEPROM driving layer. The EEPROM driving layer is the bottommost layer and is mainly responsible for peripheral driving and time sequence implementation of communication of EEPROM hardware chips of different types (such as the EEPROM of different communication types or storage spaces of iic and spi). The method is mainly specifically described for an application data management layer and a data transmission layer.

Referring to fig. 3, in this embodiment, an application data management layer takes a part of RAM as a RAM mapping area for configuring and managing data to be stored, copies all data in EEPROM to the RAM mapping area, and forms a mapped data block. The data members stored in the EEPROM are defined as original members, the corresponding data members copied from the original members in the mapping data block are defined as mapping members, and the mapping data block is defined as data initialization. The data initializing operation ensures that the mapping data block in the initial state is identical to the data (contents) of the mapping member and the original member corresponding to each other in the EEPROM. For example, original member 1 in the EEPROM corresponds to map member 1 in the map data block, both of which are data a.

S12, determining a first original member and a first mapping member corresponding to data to be written, assigning values to the first mapping member by the data to be written, and assigning values to the first original member by the data of the first mapping member;

in this embodiment, the purpose of writing data is to modify the data of a certain original member in the EEPROM, and the original member corresponds to a certain mapping member, so both the original member and the mapping member corresponding to the data to be written can be determined. When data is written, the mapping members are assigned with the data to be written, and then the original members are assigned with the data of the mapping members, so that the data of the mapping members and the data of the original members corresponding to each other are kept the same after the data is written. For example, with continued reference to fig. 3, if the user wishes to modify the data of the original member 1 in the EEPROM to data X, the data to be written is data X, corresponding to the original member 1 and the map member 1, and after the write operation, the data of both the original member 1 and the map member 1 are changed to data X from data a.

S13, determining a second original member and a second mapping member corresponding to the data to be read, and reading the data of the second mapping member, wherein the data of the second mapping member is identical to the data of the second original member.

In this embodiment, the purpose of data reading is to read the data of a certain original member in the EEPROM, and the original member corresponds to a certain mapping member, so both the original member and the mapping member corresponding to the data to be read can be determined. The foregoing initialization operation and write operation ensure that the data of the map member and the original member corresponding to each other remains the same all the time. Therefore, when the data is read, the data of the mapping member can be directly read to finish the reading of the corresponding original data in the EEPROM. For example, if the user wants to read the data of the original member 2 in the EEPROM, the data to be read corresponds to the original member 2 and the mapping member 2, and the data read to the mapping member 2 is data B and data C, which is equivalent to the data read from the original member 2.

Therefore, through the embodiment, the EEPROM is not required to be accessed when data is read, so that the access frequency of the EEPROM is reduced, the time loss of a system is reduced, and the read-write efficiency is remarkably improved. In addition, in the periodic task execution process of the system, only the writing time sequence does not exist, the reading time sequence does not need to be carried out time-sharing management and arbitration for the reading time sequence and the writing time sequence, and the complexity of the software module is greatly reduced.

It should be noted that, since the data in the RAM is lost after power-off, step S11 is required to be executed after each power-up to complete data initialization. Step S12 and step S13 have no specific timing, and according to the operation determination of the user at the time of power-up, step S12 is executed when the user invokes the data writing interface, and step S13 is executed when the user invokes the data reading interface.

FIG. 4 is a diagram of a data structure of an enumeration table according to an embodiment of the present invention; fig. 5 is a schematic diagram showing a data structure of a configuration information table according to an embodiment of the present invention.

Referring to fig. 4 and 5, in a further embodiment, the FLASH stores an enumeration table and a configuration information table. The enumeration members in the enumeration table are used for carrying out abstract statement on the mapping members in the mapping data block and the original members in the corresponding EEPROM. Each configuration member in the configuration information table is used for storing the RAM address and the data length of the corresponding mapping member, and the enumeration member is also used for locating the configuration member.

With continued reference to FIG. 3, the RAM space size occupied by the map members within the map data block is determined by the size of each store data. Optionally, a character array is used to define the data length, so as to avoid the problem of discontinuous address distribution of different members of the mapping data block in the RAM. In FIG. 3, map member 1 contains data A, which is 1 byte in size, and the data length is defined as uint8[1]. Map member 2 contains data B and data C, taking two bytes, and the data length is defined as uint8[2]. Mapping member 3 contains data D, data E, and data F, taking 3 bytes, and the data length is defined as uint8[3].

In this embodiment, through abstract declaration, other modules may directly use enumeration members to substitute the argument when calling the stored data of the EEPROM. The configuration information table is an array of structure types, and the structure (configuration member) contains both address and length members. There is also a one-to-one correspondence between configuration members and enumeration members, so configuration members can be located by enumeration members. Specifically, the configuration members are found by enumerating the IDs, and corresponding configuration information is obtained. For example, the configuration information stored by the configuration member found by enumerating ID "member 1" is the RAM address and data length of mapping member 1.

It should be noted that, although the data content of some original members in the EEPROM may change due to the data writing operation, the storage address and the data length of each original member may remain unchanged under normal conditions, and the storage address and the data length of each mapping member in the corresponding mapping data block also remain unchanged. Therefore, by storing the enumeration table and the configuration information table in the FLASH, the data cannot be lost after power failure, the data can be directly adopted after power is on each time, the data is not required to be acquired again and the parameter table is not required to be established, and the convenience of data management and maintenance is improved. Optionally, the enumeration table and the configuration information table are of a CONST type, and are stored in FLASH as read-only data after compiling the software.

Further, in an embodiment, step S12 specifically includes:

determining a first enumeration member corresponding to data to be written, the length of the data to be written and a writing storage address in the RAM, wherein the first enumeration member is used for carrying out abstract statement on a first original member and a first mapping member;

storing the data to be written in a writing storage address;

if the data in the target RAM address is different from the data written in the storage address, copying the data written in the storage address into the target RAM address;

copying the data in the target RAM address to the target EEPROM address.

In this embodiment, two comparison operations are set, the first is to compare the length of data stored by the target configuration member (the length of data of the first mapping member) with the length of data to be written, and the second is to compare the data in the target RAM address (the data of the first mapping member) with the data written in the storage address (the data to be written). The length comparison is to determine the validity of the data length, for example, the length of the data to be written is 2 bytes, but the data length of the first mapping member is 3 bytes, in which case it is determined that the length is wrong, and the writing operation is not allowed. The data comparison is to determine the necessity of the data writing operation, for example, the data to be written is data X, and the data of the first mapping member is also data X, which means that the data of the first original member is also data X, so that the subsequent copying operation is not required, and system resources and time are saved.

In this embodiment, the write-in storage address is a section of address in the RAM applied to the user, and is used for temporarily storing data to be written. The write address, the target RAM address, and the EEPROM address in this embodiment all refer to a section of address that matches the data length, and are usually obtained by the head address and the data length in actual operation. The address of the first original member in the EEPROM is 0, and the address of the first mapping member in the mapping data table is determined by the allocation of the RAM mapping area, but the target EEPROM address can be converted through the offset of the target RAM address relative to the RAM address of the first mapping member. For example, when the RAM address of the first mapping member is m and the target RAM addresses are (m+10) to (m+12), the target EEPROM addresses are converted to 10 to 12.

FIG. 6 is a flow chart of data writing using a data management layer according to an embodiment of the invention.

Referring to fig. 6, in one embodiment, the application data management layer performs the related operations of data writing through the write function write (). Enumeration IDs, buff and length are input parameters of a write function, the enumeration IDs are IDs of first enumeration members corresponding to data to be written, the buff is a first address in RAM applied to a user, and the length is the length of the data to be written. The target RAM address is determined by the RAM head addresses a and length, the parameter buff address is determined by the buff pointer and length, and the target EEPROM address is determined by the EEPROM head addresses x and length.

Specifically, in each data writing operation of step S12, the step of copying the data in the target RAM address into the target EEPROM address is not performed by the application data management layer, but by the EEPROM driving layer, and all that the application data management layer needs to do is to transfer the data (RAM head address a, EEPROM head address x, and length) required for the copy operation to the EEPROM driving layer through the data transfer layer.

FIG. 7 is a flow chart of FIFO data input by the data transfer layer according to one embodiment of the invention; FIG. 8 is a flow chart of FIFO data output from the data transfer layer according to one embodiment of the invention.

Further, in one embodiment, the step of copying the data in the target RAM address to the target EEPROM address includes:

the data in the target RAM address is copied to the target EEPROM address by the FIFO memory.

In this embodiment, the write timing is managed by using a FIFO (first in, first out) memory, and the FIFO memory is used as a buffer link, so that a user program calling the data storage module can perform the read-write operation of the EEPROM anytime and anywhere, and the problem of read-write collision is not considered when the user program is called.

Specifically, referring to fig. 7, the data transmission layer uses the FIFO memory for data input and output, the FIFO data input of the data transmission layer is real-time, the data is pushed into the FIFO memory in real time, and the application layer does not need to process the stored data later unless the FIFO memory is full. Referring to fig. 8, FIFO data output of the data transfer layer is periodic, waiting time reaches t1 after last writing data into the EEPROM, and then writing data into the next time (excluding the time occupied by writing itself), t1 needs to be set according to BUSY time (self-erasing time) t2 after writing data of the specifically used EEPROM, and it needs to be ensured that t1> t2. And each time a cycle is executed, data in the FIFO memory are transmitted to the EEPROM driving layer, the EEPROM driving layer sequentially writes the data into the EEPROM in a byte unit until the writing operation corresponding to the current FIFO data is completed, and after the EEPROM driving layer returns that the writing operation is successful, the data transmission layer spits the current FIFO data from the FIFO memory. If the writing error occurs and the count exceeds three times, the current FIFO data is recorded and the data is forcedly spitted out for eliminating the problems of software and hardware.

If the FIFO memory is full, the target RAM address and the target EEPROM address are tried to be input into the FIFO memory again after waiting for the preset time.

In this embodiment, when the FIFO memory is full, the user program may make an identification record and attempt to write again at the next execution cycle. For the application data management layer, it is to wait for a predetermined time before attempting to input the relevant data into the FIFO memory again. The preset time is determined according to an execution period of the user program.

Further, in an embodiment, step S13 specifically includes:

determining a second enumeration member corresponding to the data to be read, the length of the data to be read and a read storage address in the RAM, wherein the second enumeration member is used for carrying out abstract statement on a second original member and a second mapping member;

copying the data in the target RAM address to the read deposit address to read the data of the second mapping member, wherein the data of the second mapping member is identical to the data of the second original member.

In this embodiment, the data length stored by the target configuration member (the data length of the second mapping member) is compared with the length of the data to be read, so as to determine the validity of the data length. For example, the length of the data to be read is 2 bytes, but the data length of the second mapping member is 3 bytes, in which case it is determined that the length is wrong, and the read operation is not allowed. The read deposit address is an address in the RAM applied to the user and is used for temporarily storing the data in the read target RAM address, because the mapping data block is accessed inside the memory module, and is protected and not declared to the outside. The read deposit address and the target RAM address in this embodiment both refer to a segment of address that matches the data length, and are usually obtained by the head address and the data length in actual operation.

FIG. 9 is a flow chart of data reading by the application data management layer according to an embodiment of the invention.

Referring to fig. 9, in one embodiment, the application data management layer performs related operations of data reading through a read function read (). Enumeration IDs, buff and length are input parameters of a read function, the enumeration IDs are IDs of second enumeration members corresponding to data to be read, the buff is a first address in RAM applied to a user, and the length of the data to be read is length. The target RAM address is determined by the RAM head address a and length, and the parameter buff address is determined by the buff pointer and length. Each data reading operation of step S13 is performed by the application data management layer.

FIG. 10 is a flow chart of data verification and repair using a data management layer according to an embodiment of the invention.

Referring to fig. 3 and 10, further, in one embodiment, the original member in the EEPROM is sequentially data BOOT, data HEAD, a plurality of intermediate data members, and data TAIL. The step of copying all data in the EEPROM into the mapped data block in the RAM is followed by:

if the data BOOT in the mapping data block is different from the BOOT special word, judging that the EEPROM is a new EEPROM, and determining that the data to be written is the BOOT special word, the HEAD special word, the TAIL special word and a plurality of first preset data, wherein the first preset data is used for assigning values to the intermediate data members;

if the data BOOT in the mapping data block is the same as the BOOT special word, and the data HEAD in the mapping data block is different from the HEAD special word, judging that the data of the EEPROM is invalid, and determining that the data to be written is the HEAD special word, the TAIL special word and a plurality of second preset data, wherein the second preset data is used for assigning values to intermediate data members;

In this embodiment, the BOOT is the BOOT data of the 0X0000 address of the EEPROM memory segment, and a special word, for example, 0XFE or other special word, may be set in the software. Typically the default data for the 0X0000 address of the new EEPROM is 0XFF. After copying, the EEPROM can be judged whether to be a new EEPROM or not by reading the data BOOT in the mapping data block and comparing the data BOOT with the set BOOT special word. Similarly, the HEAD and TAIL are special words of the HEAD and TAIL addresses of the data storage section, after the BOOT special word is compared, the HEAD special word and the TAIL special word are compared, if any of the HEAD special word and the TAIL special word is different, the EEPROM is considered to be the EEPROM used by the software, but the data length of the data storage section is changed, so that the data invalidation of the EEPROM is judged.

After the data verification, the data is restored by the data writing function provided in step S12 for the EEPROM judged to be new and invalid. Both cases require correction of the data BOOT, the data HEAD and the data TAIL to the corresponding set special words. For a new EEPROM, all intermediate data members (original members 1, 2, 3, etc. in fig. 3) need to be modified to the first preset data, and for an EEPROM that is not data-valid, all intermediate data members need to be modified to the second preset data. The first preset data and the second preset data are different, for example, the first preset data are all 0, the second preset data are data in an array A, and the array A is CONST type and is used for defining local default data. After data restoration, the automobile electronic unit can generate different display conditions when being externally connected with the two EEPROMs.

In a second aspect, the embodiment of the invention further provides a data management device based on the EEPROM.

In one embodiment, an EEPROM-based data management apparatus includes:

the initialization module is used for copying all data in the EEPROM into mapping data blocks in the RAM, wherein mapping members in the mapping data blocks correspond to original members in the EEPROM one by one;

the writing module is used for determining a first original member and a first mapping member corresponding to the data to be written, assigning the first mapping member with the data to be written, and assigning the first original member with the data of the first mapping member;

the enumeration members in the enumeration table are used for carrying out abstract statement on the mapping members in the mapping data block and the original members in the corresponding EEPROM;

Further, in an embodiment, the writing module is configured to:

storing the data to be written in a writing storage address;

copying the data in the target RAM address to the target EEPROM address.

Further, in an embodiment, the writing module is configured to:

Further, in an embodiment, the writing module is further configured to:

Further, in an embodiment, the reading module is configured to:

Further, in one embodiment, the original member in the EEPROM is sequentially a data BOOT, a data HEAD, a plurality of intermediate data members, and a data TAIL;

The EEPROM-based data management device further comprises a verification and repair module for:

The function implementation of each module in the EEPROM-based data management device corresponds to each step in the EEPROM-based data management method embodiment, and the function and implementation process thereof are not described in detail herein.

In a third aspect, embodiments of the present invention provide an EEPROM-based data management apparatus, which may be a personal computer (personal computer, PC), a notebook computer, a server, or the like, having a data processing function.

Fig. 11 is a schematic diagram showing a hardware configuration of an EEPROM-based data management apparatus in an embodiment of the present invention.

Referring to fig. 11, in an embodiment of the present invention, an EEPROM-based data management apparatus may include a processor 1001 (e.g., a central processor Central Processing Unit, a CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. Wherein the communication bus 1002 is used to enable connected communications between these components; the user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard); the network interface 1004 may optionally include a standard wired interface, a WIreless interface (e.g., WIreless-FIdelity, WI-FI interface); the memory 1005 may be a high-speed random access memory (random access memory, RAM) or a stable memory (non-volatile memory), such as a disk memory, and the memory 1005 may alternatively be a storage device independent of the processor 1001. Those skilled in the art will appreciate that the hardware configuration shown in fig. 11 is not limiting of the invention and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.

With continued reference to FIG. 11, an operating system, a network communication module, a user interface module, and an EEPROM-based data management program may be included in memory 1005, FIG. 11, which is one type of computer storage medium. The processor 1001 may call an EEPROM-based data management program stored in the memory 1005 and execute the EEPROM-based data management method provided by the embodiment of the present invention.

In a fourth aspect, an embodiment of the present invention further provides a storage medium.

The storage medium of the present invention stores an EEPROM-based data management program, wherein the EEPROM-based data management program, when executed by a processor, implements the steps of the EEPROM-based data management method described above.

The method implemented when the EEPROM-based data management program is executed may refer to various embodiments of the EEPROM-based data management method of the present invention, and will not be described herein.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.

The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.

From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as described above, comprising several instructions for causing a terminal device to perform the method according to the embodiments of the present invention.

The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.

Claims

1. An EEPROM-based data management method, comprising:

2. The EEPROM-based data management method according to claim 1, wherein an enumeration table and a configuration information table are stored in the FLASH;

3. The EEPROM-based data management method according to claim 2, wherein the step of determining a first original member and a first mapping member corresponding to the data to be written, assigning the first mapping member with the data to be written, and assigning the first original member with the data of the first mapping member comprises:

storing the data to be written in the writing storage address;

copying the data in the target RAM address to the target EEPROM address.

4. The EEPROM-based data management method of claim 3, wherein the step of copying the data in the target RAM address into the target EEPROM address comprises:

5. The EEPROM-based data management method according to claim 4, wherein after the step of calculating a target EEPROM address from the target RAM address and the RAM address stored by the first configuration member in the configuration information table, the target EEPROM address is further included:

6. The EEPROM-based data management method of claim 2, wherein the step of determining a second original member and a second mapping member corresponding to the data to be read, reading the data of the second mapping member, the data of the second mapping member being identical to the data of the second original member, includes:

7. The EEPROM-based data management method of claim 1, wherein the original member in the EEPROM is sequentially data BOOT, data HEAD, a plurality of intermediate data members, and data TAIL;

8. An EEPROM-based data management apparatus, characterized in that the EEPROM-based data management apparatus comprises:

9. An EEPROM-based data management device, characterized in that it comprises a processor, a memory, and an EEPROM-based data management program stored on the memory and executable by the processor, wherein the EEPROM-based data management program, when executed by the processor, implements the steps of the EEPROM-based data management method according to any one of claims 1 to 7.

10. A storage medium having stored thereon an EEPROM-based data management program, wherein the EEPROM-based data management program, when executed by a processor, implements the steps of the EEPROM-based data management method of any one of claims 1 to 7.