CN116841750A - Edge computing device integrating encryption algorithm - Google Patents

Edge computing device integrating encryption algorithm Download PDF

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Publication number
CN116841750A
CN116841750A CN202311091890.7A CN202311091890A CN116841750A CN 116841750 A CN116841750 A CN 116841750A CN 202311091890 A CN202311091890 A CN 202311091890A CN 116841750 A CN116841750 A CN 116841750A
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polymorphic
state
bit
edge computing
subtask
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CN116841750B (en
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关涛
唐圣潘
张璇
赵旸
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Henghui Xinda Technology Co ltd
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Henghui Xinda Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5072Grid computing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/602Providing cryptographic facilities or services
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0869Generation of secret information including derivation or calculation of cryptographic keys or passwords involving random numbers or seeds

Abstract

The invention relates to the technical field of encryption, in particular to edge computing equipment integrating an encryption algorithm. The apparatus comprises: the system comprises a distribution computing center, a mapping storage center and a plurality of edge computing units connected in series; the distribution computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each edge computing space corresponds to one proportion item in the set proportion, and each edge computing space at least comprises two edge computing units; after receiving the task to be encrypted, the edge computing center divides the task to be encrypted according to a set proportion to obtain a plurality of subtasks and encrypts the subtasks; and the mapping storage center performs polymorphic decryption on the stored subtask encryption result in the decryption stage. The invention ensures the safety and privacy protection of the data by converting the data into the polymorphic state for encryption.

Description

Edge computing device integrating encryption algorithm
Technical Field
The invention belongs to the technical field of encryption, and particularly relates to edge computing equipment integrating an encryption algorithm.
Background
With the rapid development of information technology, edge computing has been increasingly attracting attention as an emerging computing paradigm. Edge computing brings lower delay, faster response speed and higher bandwidth utilization for various application scenarios by transferring computing and data processing from traditional centralized cloud computing mode to edge devices close to the data source. However, with the rapid popularity of edge computing, new challenges are presented, especially with respect to data security and privacy protection.
To address data security and privacy issues in edge computing environments, researchers are beginning to focus on new encryption techniques. Among them, polymorphic encryption has attracted a wide range of interests as an emerging security technology. Polymorphic encryption increases the difficulty of an attacker to crack by converting data from one state to another and encrypting it in a constantly changing form. In addition, the polymorphic encryption algorithm generally has lighter calculation burden, is suitable for the calculation resource limitation of the edge equipment, and can better meet the real-time requirement.
However, the application of multi-state encryption techniques in the field of edge computing presents challenges. For example, how to provide efficient encryption and decryption services for edge devices and edge servers without affecting real-time performance; how to protect the data privacy and simultaneously ensure the integrity and the transmission efficiency of the data; how to realize seamless integration of the multi-state encryption algorithm and the existing edge computing architecture, etc.
Disclosure of Invention
The invention mainly aims to provide the edge computing equipment integrating the encryption algorithm, which not only ensures the safety and privacy protection of data, but also adapts to the instantaneity and resource limitation of an edge computing environment by converting the data into a polymorphic state for encryption, and provides an innovative solution for the combination of the data safety and the edge computing.
In order to solve the problems, the technical scheme of the invention is realized as follows:
an edge computing device integrating an encryption algorithm, the device comprising: the system comprises a distribution computing center, a mapping storage center and a plurality of edge computing units connected in series; the distribution computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each edge computing space corresponds to one proportion item in the set proportion, and each edge computing space at least comprises two edge computing units; after receiving the task to be encrypted, the edge computing center performs task segmentation according to a set proportion to obtain a plurality of subtasks, each subtask corresponds to one proportion item, then the subtasks are distributed into an edge computing space which is the same as the proportion items, after receiving the subtasks, the edge computing space firstly performs feature extraction on the subtasks to obtain subtask features, then uses an address mapping function to map the subtask features to one storage address in a mapping storage center, uses the storage address as an encryption storage address of the subtasks, finally, performs multi-state encryption on an edge computing unit in each edge computing space to obtain a subtask encryption result, stores the subtask encryption result into the corresponding encryption storage address, and then deletes the subtask and the subtask encryption result from the edge computing space; and the mapping storage center performs polymorphic decryption on the stored subtask encryption result in the decryption stage to obtain a subtask decryption result, and then re-maps the subtask decryption result back to the corresponding edge calculation space.
Further, the edge computation space is connected with the mapping storage center through a multi-state channel, and the subtask features are mapped to one storage address in the mapping storage center through the multi-state channel by using a hash mapping function.
Further, the polymorphic encryption process specifically includes:
step S1: each subtask is expressed in binary form to obtain a corresponding binary sequence, and for each bit in the binary sequence, a corresponding polymorphic bit sequence is generated and expressed as, wherein />Is the number of bits; random +.>Shaft(s)>Shaft and->The shaft rotates to generate a random rotation sequenceIs provided with->1 to->Integer of->Is a rotation operation;
step S2: for each multi-state bitApplying its corresponding rotation operation +.>Obtaining transformed multi-state bits
Step S3: combining all transformed polymorphic bits into a mixed stateThe method comprises the steps of carrying out a first treatment on the surface of the Application of polymorphic transformation->To->To obtain the transformed state +.>
Step S4: applying a phase shift gate to each polymorphic bit based on a preselected key bit sequenceIs provided with->1 to->Integer of->Is 0 or 1, resulting in a transformed state +. >
Step S5: circularly permuting the polymorphic bit sequence according to a set permutation mode to obtain a shifted polymorphic bit sequence
Step S6: repeating steps S2 to S4, and executingSecond, generate->Different substitution sequencesObtain->Status of polymorphism->
Step S7: is provided with1 to->For the polymorphic state +.>Applying an encryption algorithmUse of a pre-shared key +.>Generating an encrypted state->As a subtask encryption result.
Further, the polymorphic decryption process specifically includes:
step A1: using pre-shared decryption keysFor each encrypted polymorphic bit +.>Applying decryption algorithm +.>Obtaining the decrypted state->
Step A2: for decrypted polymorphic bit sequencesAccording to the substitution sequencePerforming cyclic permutation to obtain decrypted polymorphic bit sequence
Step A3: for each decrypted polymorphic bit sequenceThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted +.>
Step A4: for each decrypted state of the polymorphismInverse manipulation using polymorphic transformations ++>Obtaining the decrypted state->
Step A5: for each decrypted state of the polymorphismApplying every rotation operation +. >Is the inverse of (2) to obtain the decrypted state +.>
Step A6: for each decrypted state of the polymorphismCombining them into a decrypted polymorphic bit sequence
Step A7: using pre-shared decryption keysFor a pair ofDecrypted polymorphic bit sequence->Applying decryption algorithm +.>Obtaining the final decrypted polymorphic state +.>
Step A8: for decrypted polymorphic bit sequencesAccording to the substitution sequencePerforming cyclic permutation to obtain decrypted polymorphic bit sequence
Step A9: for each decrypted polymorphic bit sequenceThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted state->
Step A10: for each decrypted state of the polymorphismInverse manipulation using polymorphic transformations ++>Obtaining the final decrypted state->As a result of the subtask decryption.
Further, the polymorphic transformationThe specific process of (2) comprises:
for any one multi-state bitPolymorphic transformation is applied to bring it from the ground state +.> and />Transforming into a uniformly distributed superposition state; the polymorphic transformations act on a single polymorphic bit, the matrix of which is represented as follows:
is a multi-state bit->The number of polymorphic bits in the polymorphic bit sequence of the composition, the state after polymorphic transformation is applied +. >Expressed as:
when (when)When the polymorphism is used, the state is +.>I.e. a uniform filling state; when (when)When using polymorphismThe state after conversion is->I.e. in the reverse superimposed state.
Further, when the distribution computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each proportion term in the set proportion satisfies the following constraint relation:
the set proportion is as follows:; wherein ,/>Are proportional terms;
wherein ,;/>;/>
further, after receiving the subtask, the edge computing space firstly performs feature extraction on the subtask to obtain subtask features, and then uses an address mapping function to map the subtask features to one storage address in a mapping storage center, and the method comprises the following steps: and performing data splicing on the received time of the subtask and the length of the subtask to serve as a subtask feature, and then mapping the subtask feature to one storage address in a mapping storage center by using an address mapping function.
Further, the step S7 specifically includes: for each multi-state bitWhich represents a polymorphismResults obtained through measurement and polymorphic operation; multi-state bit->Conversion to classical bits->The method comprises the steps of carrying out a first treatment on the surface of the For each classical bit- >Classical bits should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>The method comprises the steps of carrying out a first treatment on the surface of the The encrypted character->Conversion back to polymorphic bit->The method comprises the steps of carrying out a first treatment on the surface of the Combining all encrypted polymorphic bits ++>Obtaining encrypted polymorphism->
Further, for each classical bitClassical bits should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>The process of (1) is thatThe expression is as follows:
wherein ,is a classical bit, +.>Is a secret key.
Further, the multi-state bitConversion to classical bits->The method of (1) comprises: multi-state bit->Mapping to classical bit "A", polymorphic bit +.>Mapping to classical bit "B", and so on, complete the polymorphic bit +.>Conversion to classical bits->
The edge computing device integrating the encryption algorithm has the following beneficial effects:
1. the polymorphic encryption technology is tightly combined with edge computing to meet the challenges of data security in an edge computing environment. The multi-state encryption converts data from one state to another state for encryption through multi-state transformation, so that the difficulty of cracking by an attacker is increased. The encryption method not only ensures the security of the data, but also can cope with the limitation of computing resources and the real-time requirement in the edge computing environment. The data transmitted between the edge device and the edge server can be still protected after encryption, so that more powerful security guarantee is provided for edge calculation.
2. The polymorphic encryption method not only can protect the security of the data, but also can guarantee the privacy of the data. By converting the data into the polymorphic state, an attacker is difficult to restore the original information, and the risk of data leakage is effectively prevented. In addition, the polymorphic encryption method fully considers the requirement on real-time performance in edge calculation in design. The lightweight computing characteristic of the system enables encryption and decryption operations to be completed in a short time, so that the requirement of real-time data processing is met, for example, in industrial automation, intelligent transportation and other scenes.
3. The multi-state encryption algorithm adopted by the invention is lightweight and can be operated efficiently under limited computing resources. Compared with the traditional complex encryption algorithm, the multi-state encryption method not only saves the computing resource, but also reduces the energy consumption. The edge device can keep higher performance when the encryption and decryption operation is executed, and the execution of other important tasks cannot be influenced due to encryption burden. Meanwhile, the polymorphic encryption method can also cope with the continuously emerging large-scale data transmission demands in the edge computing environment, and the high efficiency and the safety of data transmission are ensured.
Drawings
Fig. 1 is a schematic device structure diagram of an edge computing device integrated with an encryption algorithm according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
The following will describe in detail.
The terms "first," "second," "third," "fourth" and the like in the description and in the claims and in the above drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein.
Referring to fig. 1, example 1: an edge computing device integrating an encryption algorithm, the device comprising: the system comprises a distribution computing center, a mapping storage center and a plurality of edge computing units connected in series; the distribution computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each edge computing space corresponds to one proportion item in the set proportion, and each edge computing space at least comprises two edge computing units; after receiving the task to be encrypted, the edge computing center performs task segmentation according to a set proportion to obtain a plurality of subtasks, each subtask corresponds to one proportion item, then the subtasks are distributed into an edge computing space which is the same as the proportion items, after receiving the subtasks, the edge computing space firstly performs feature extraction on the subtasks to obtain subtask features, then uses an address mapping function to map the subtask features to one storage address in a mapping storage center, uses the storage address as an encryption storage address of the subtasks, finally, performs multi-state encryption on an edge computing unit in each edge computing space to obtain a subtask encryption result, stores the subtask encryption result into the corresponding encryption storage address, and then deletes the subtask and the subtask encryption result from the edge computing space; and the mapping storage center performs polymorphic decryption on the stored subtask encryption result in the decryption stage to obtain a subtask decryption result, and then re-maps the subtask decryption result back to the corresponding edge calculation space.
Specifically, the number of edge computation spaces is plural, and is not limited to the 4 shown in fig. 1. The edge computation unit in the edge computation space first performs feature extraction on the subtasks, which helps to better describe the contents of the subtasks. The address mapping function then maps the subtask features to memory addresses in the mapped memory center as encrypted memory addresses for the subtasks. This means that the original content of the subtask is not directly exposed to the edge computation unit. The core task of the distributed computing center is to partition the edge environment into multiple edge computing spaces. This division is done according to a set scale for better management and distribution of tasks. Each edge computation space contains a number of edge computation units. The segmentation and organization mode enables tasks to be distributed among the edge computing units more effectively, and the utilization rate of computing resources is improved. And after the task to be encrypted is received by the distribution computing center, performing task segmentation according to the set proportion. The proportional terms of these subtasks match the previous segmentation, ensuring that each edge computation space gets the proper number of tasks. The effect of this step is to subdivide the big task into small tasks so that each edge computing unit can process the tasks in parallel, improving the response speed of the system. After feature extraction, the subtask features are mapped to one storage address in the mapped storage center using an address mapping function. The key to this step is to translate the subtask content into a storage location rather than directly exposing the original data. The edge computation unit then encrypts the subtasks using a polymorphic encryption algorithm. The core idea of polymorphic encryption is to introduce randomness and variability, so that the encryption result is more difficult to crack, and meanwhile, the confidentiality of data is ensured.
Example 2: on the basis of the above embodiment, the edge computation space is connected with the mapping storage center through a multi-state channel, and the subtask features are mapped to one storage address in the mapping storage center through the multi-state channel by using a hash mapping function.
Specifically, the hash mapping function is a mathematical algorithm that converts data of arbitrary length (input) into hash values of fixed length (output). This function has the following characteristics: given the same input, the same output will always be obtained; but even if the input changes slightly, the output will be quite different. In this patent, the hash mapping function functions to map the characteristics of a subtask to a memory address in a mapped memory center. In the edge computation space, subtask features are mapped to a storage address by a hash mapping function. This procedure guarantees the privacy of the feature because the hash function is unidirectional and cannot restore the original feature by the hash value. Meanwhile, due to the irreversibility of the hash function, similar subtask features can be mapped to different storage addresses, so that the safety of data is improved.
Polymorphic channels are a secure communication channel that uses polymorphic techniques to change the content of a communication at each transmission. This technique prevents an attacker from capturing sensitive information by monitoring the traffic. In this patent, the application of polymorphic channels is to connect the edge computation space with a mapping storage center for mapping and storage of subtask features.
And in the decryption stage, the mapping storage center performs polymorphic decryption on the stored subtask encryption result to obtain a subtask decryption result. These decryption results then need to be remapped back to the original edge computation space for subsequent processing or transmission. This process ensures that the data is properly restored to its original edge computing environment after decryption for subsequent processing.
In remapping the decryption results, a method is needed to map the decryption results back to the original edge computation space: in each subtask of the edge computation space, a unique index or identification is assigned. This index may be a number, classical bit string, or other unique identifier. This index will be used as an identification of the subtask for the subsequent mapping. In the mapping storage center, a mapping relation table is maintained, and the mapping relation between the decryption result of each subtask and the corresponding edge calculation space is recorded. The mapping table may be a database, hash table, or other data structure, where each record contains the decrypted subtask results and corresponding indices. In the decryption stage, after the mapping storage center obtains the decryption result of the subtask, the mapping storage center searches the mapping relation table to find the index corresponding to the decryption result. Then, the mapping storage center remaps the decryption result back to the original edge computation space according to the index. Once the decrypted results are mapped back into the edge computation space, the edge computation unit may further process the decrypted results, such as data analysis, computation, transmission, etc.
Example 3: on the basis of the above embodiment, the polymorphic encryption process specifically includes:
step S1: each subtask is expressed in binary form to obtain a corresponding binary sequence, and for each bit in the binary sequence, a corresponding polymorphic bit sequence is generated and expressed as, wherein />Is the number of bits; random +.>Shaft(s)>Shaft and->The shaft rotates to generate a random rotation sequenceIs provided with->1 to->Integer of->Is a rotation operation;
step S2: for each multi-state bitApplying its corresponding rotation operation +.>Obtaining transformed multi-state bits
Step S3: combining all transformed polymorphic bits into a mixed stateThe method comprises the steps of carrying out a first treatment on the surface of the Application of polymorphic transformation->To->To obtain the transformed state +.>
Step S4: applying a phase shift gate to each polymorphic bit based on a preselected key bit sequenceIs provided with->1 to->Integer of->Is 0 or 1, resulting in a transformed state +.>
Step S5: circularly permuting the polymorphic bit sequence according to a set permutation mode to obtain a shifted polymorphic bit sequence
Step S6: repeating steps S2 to S4, and executing Second, generate->Different onesSubstitution sequencesObtain->Status of polymorphism->
Step S7: is provided with1 to->For the polymorphic state +.>Applying an encryption algorithmUse of a pre-shared key +.>Generating an encrypted state->As a subtask encryption result.
Specifically, the polymorphic encryption process exploits the polymorphism, randomness, and irreversibility of the quantum states based on the nature of quantum computation. It first represents the original data as a binary sequence and then generates a series of polymorphic bit sequences by random rotation operations and the application of phase shift gates. These multi-state bits have different states in different implementations so that the same input data exhibits different quantum properties under different conditions. Then, a plurality of multi-state bits are combined into a mixed state, and then the multi-state bits are subjected to cyclic permutation and repeated encryption operation, so that the complexity and the randomness of the data are further increased. Finally, the pre-shared secret key is applied to the polymorphism by using an encryption algorithm, so that an encrypted state is obtained and is used as an encryption result of the subtask.
Through the random rotation and the introduction of the phase shift gate, the quantum state of the data presents randomness in different encryption execution, so that an attacker is difficult to predict the specific property of the quantum state, and the confidentiality of the data is enhanced. The cyclic permutation and repeated encryption operations increase the complexity of the data, and an attacker needs to encrypt, confuse and transform multiple times to obtain useful information about the data, thereby increasing the difficulty of decrypting the key. The polymorphism is introduced to enable the same data to show different quantum characteristics in different states, so that an attacker cannot accurately understand the actual state of the data, and the confidentiality of the data is enhanced. The encryption algorithm is applied to use the pre-shared secret key, so that only people with the correct secret key can decrypt and access the data, and the access control of the data is realized.
Example 4: on the basis of the above embodiment, the process of polymorphic decryption specifically includes:
step A1: using pre-shared decryption keysFor each encrypted polymorphic bit +.>Applying decryption algorithm +.>Obtaining the decrypted state->
Step A2: for decrypted polymorphic bit sequencesAccording to the substitution sequencePerforming cyclic permutation to obtain decrypted polymorphic bit sequence
Step A3: for each solutionPost-cipher polymorphic bit sequencesThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted +.>
Step A4: for each decrypted state of the polymorphismInverse manipulation using polymorphic transformations ++>Obtaining the decrypted state->
Step A5: for each decrypted state of the polymorphismApplying every rotation operation +.>Is the inverse of (2) to obtain the decrypted state +.>
Step A6: for each decrypted state of the polymorphismCombining them into a decrypted polymorphic bit sequence
Step A7: using pre-shared decryption keysFor decrypted polymorphismBit sequence->Applying decryption algorithm +.>Obtaining the final decrypted polymorphic state +.>
Step A8: for decrypted polymorphic bit sequencesAccording to the substitution sequencePerforming cyclic permutation to obtain decrypted polymorphic bit sequence
Step A9: for each decrypted polymorphic bit sequenceThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted state->
Step A10: for each decrypted state of the polymorphismInverse manipulation using polymorphic transformations ++>Obtaining the final decrypted state->As a result of the subtask decryption.
Specifically, the polymorphic decryption process is to reverse process the encrypted data to recover the original data. This process involves reverse operations including reverse permutation, reverse phase shift gate operation, reverse polymorphic transformation, and reverse rotation operation. Through the reverse operations, the decryption process gradually cancels the transformation and the replacement in the encryption process, and finally obtains the original quantum state representation and restores the original quantum state representation to the original data.
The polymorphic decryption process may reverse recover the encrypted data from the encrypted state to the original data. This ensures that the data is properly restored and used when it needs to be accessed. The polymorphic decryption process uses a pre-shared decryption key to ensure that only the person holding the correct key can decrypt the data. This decryption method provides access control while ensuring data privacy. The transformation and replacement in the encryption process are reversed in the polymorphic decryption process, so that the data obtained after decryption is an accurate representation of the original data and is not tampered or damaged. Using pre-shared decryption keys For the encrypted polymorphic bit sequence +.>Applying decryption algorithm +.>Obtaining the decrypted state->. By reverse substitution sequence->Reverse operations, including the inverse of phase shift gate, multi-state transformation and rotation operations, are performed step by step to recover the quantum state representation of the original data step by step. Gradually reverting the decrypted polymorphic bit sequence to the original binary representation by reverse operation, then using the pre-shared decryption key +.>Applying a decryption algorithm to the decrypted polymorphic bit sequence>The final decrypted polymorphic state is obtained.
Imagine a subtask is banking data protected with a polymorphic encryption method. The encrypted polymorphic bit sequences are gradually restored into the original transaction data through a polymorphic decryption process. Pre-shared decryption keyPlays a key role in the decryption process, and ensures that only users legally authorized by banks can recover data. The specific operations include the application of the reverse substitution sequence +.>Reverse phase shifting gates, polymorphic transformations, and rotation operations, ultimately restoring the polymorphic bit sequence to the quantum state representation of the original transaction data. The process ensures that the bank transaction data is accurately restored during decryption, and simultaneously protects the privacy and the safety of the data.
Example 5: on the basis of the above embodiment, the polymorphic transformationThe specific process of (2) comprises:
for any one multi-state bitPolymorphic transformation is applied to bring it from the ground state +.> and />Transforming into a uniformly distributed superposition state; the polymorphic transformations act on a single polymorphic bit, the matrix of which is represented as follows:
is a multi-state bit->The number of polymorphic bits in the polymorphic bit sequence of the composition, the state after polymorphic transformation is applied +.>Expressed as:
when (when)When the polymorphism is used, the state is +.>I.e. a uniform filling state; when (when)When the polymorphism is used, the state is +.>I.e. in the reverse superimposed state.
Specifically, polymorphic transformationIs a quantum operation, acts on the polymorphic bit, and is added with the polymorphic bit from the ground state> and />The transformation is to a uniformly distributed superposition state. The matrix representation of the transformation is a hadamard matrix, and by applying the transformation, the coherence of the quantum states is improved, so that the quantum ratioSpecial-> and />The probabilities between them become equal.
Polymorphic transformationsCan transform the qubit from the ground state to the superposition state, i.e. uniformly distributed +.> and />Between them. The superposition state plays an important role in quantum computation and quantum communication, and increases the information capacity of quantum bits. Due to polymorphic transformation- >The states of the qubits can be evenly distributed, which helps extract information in the qubits. In quantum computing, this transformation provides convenience for performing coherent state operations. Polymorphic transformation->Is one of the key steps in many quantum algorithms, and can optimize the execution efficiency and accuracy of the algorithm, for example, in a quantum search algorithm.
Polymorphic transformationsIs a hadamard matrix. It will be the ground state of the multi-state bit +.> and />The transformation is to a uniformly distributed superposition state. For single multi-state bit->Using polymorphic transformations->Obtaining the transformed state. wherein ,/>Is a multi-state bit->The number of polymorphic bits in the composed polymorphic bit sequence. When->When the polymorphism is used, the state is +.>I.e. a uniform filling state; when->When the polymorphism is used, the state is +.>I.e. in the reverse superimposed state.
Consider a quantum system comprising two polymorphic bits, the states of which areI.e. the first multi-state bit is in ground +.>The second polymorphic bit is in the excited state +.>. Application of polymorphic transformation->The ground state of the first multi-state bit is changed to a uniform superposition state +.>The excited state of the second polymorphic bit is converted to an inverted superimposed state . This process increases the coherence of the qubit such that the states of the two polymorphic bits become uniformly distributed between the ground and excited states.
Example 6: on the basis of the above embodiment, when the allocation computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each proportion term in the set proportion satisfies the following constraint relation:
the set proportion is as follows:; wherein ,/>Are proportional terms;
wherein ,;/>;/>
example 7: on the basis of the above embodiment, after receiving the subtask, the edge computing space firstly performs feature extraction on the subtask to obtain a subtask feature, and then uses an address mapping function to map the subtask feature to a storage address in a mapping storage center, where the method includes: and performing data splicing on the received time of the subtask and the length of the subtask to serve as a subtask feature, and then mapping the subtask feature to one storage address in a mapping storage center by using an address mapping function.
Specifically, in the edge computing environment, the edge computing environment is divided into a plurality of edge computing spaces, wherein each edge computing space corresponds to a proportion term in a set proportion. These proportional terms satisfy a series of constraint relationships including a sum of 100%, a difference in proportion between adjacent proportional terms of not less than 1.3 times, and a maximum proportional term of not more than 10 times the minimum proportional term.
By dividing and setting the proportion of the edge environment, the allocation of resources can be optimized according to actual demands, and it is ensured that each edge computing space can obtain enough computing and storage resources. The constraint of the set proportion ensures that the resource allocation among the edge computing spaces has certain balance, so that the system can adapt to different types of task demands and improves the flexibility of the system. The constraint condition can prevent a certain edge calculation space from excessively occupying resources, thereby avoiding the waste of resources and performance degradation and improving the overall performance of the system.
Setting the ratio, wherein />Is a proportional term. The constraint conditions include: />Ensuring that the maximum proportion term does not exceed 10 times the minimum proportion term; />Ensuring that the sum of the proportion terms is 100%; />The ratio difference of adjacent ratio items is limited to not less than 1.3 times.
Assuming an edge computing environment, the computing environment needs to be divided into three edge computing spaces, and the proportion is set as follows. According to the constraint conditions, firstly, the constraint which is satisfied by each proportion term is calculated, and the sum is 100%, namely +.>. Then checking that the ratio of adjacent proportional terms is not less than 1.3 times, i.e. +.> and />. Then check that the maximum proportion term does not exceed 10 times the minimum proportion term, i.e. >. Thus, the ratio is set +.>All constraint conditions are met, and the resource allocation and performance requirements of the system are met.
Example 8: on the basis of the above embodiment, the step S7 specifically includes: for each multi-state bitWhich represents polymorphism->Results obtained through measurement and polymorphic operation; multi-state bit->Conversion to classical bits->The method comprises the steps of carrying out a first treatment on the surface of the For each classical bit->Classical bits should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>The method comprises the steps of carrying out a first treatment on the surface of the The encrypted character->Conversion back to polymorphic bit->The method comprises the steps of carrying out a first treatment on the surface of the Combining all encrypted polymorphic bits ++>Obtaining the encrypted polymorphism ++>
Specifically, step S7 is a key step in the polymorphic encryption process, which involves performing a series of operations on the polymorphic bits, including measurement, polymorphic operation, classical bit encryption, and generation of the polymorphism. This step ensures the security and confidentiality of the encrypted polymorphism.
The multi-state bit is measured and multi-state operation is carried out, then the multi-state bit is converted into a classical bit, and the classical bit is encrypted and then converted back into the multi-state bit, so that confidentiality of the encrypted multi-state is ensured, and information leakage is prevented. By using keys Classical bit encryption increases the complexity of encryption and only the person holding the correct key can decrypt and restore the original data. Through a series of operations, finally, the encrypted polymorphism ++>This polymorphism contains encrypted subtask data that can be securely stored and transmitted.
For polymorphismObtaining polymorphic bit through measurement and polymorphic operation>. Multi-state bit->Conversion to classical bits->. For each classical bit->The character should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>. The encrypted character->Conversion back to polymorphic bit->. Combining all encrypted polymorphic bits ++>Obtaining the encrypted polymorphism ++>
Taking an encrypted subtask into consideration, and obtaining polymorphism after polymorphic operationAccording to step S7, this polymorphism is converted into a polymorphic bit +.>Then converted into classical bit +.>. For each classical bit->Use key +.>Encrypting to obtain encrypted character ++>. Then the encrypted character ++>Conversion back to multi-state bits. Finally, all encrypted polymorphic bits ++>Combining to generate encrypted polymorphism. The encrypted polymorphism can be stored and transmitted safely, and only people with correct keys can decrypt and restore the original data.
Example 9: on the basis of the above embodiment, for each classical bitClassical bits should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>The procedure of (2) is expressed using the following formula:
wherein ,is a classical bit, +.>Is a secret key.
In particular, it is assumed that a piece of text information "HELLO" is to be encrypted, which is converted into a corresponding classical bit sequence. Let key->3. The encryption operation is performed for each classical bit according to the encryption formula:
for the following,/>I.e. the encrypted character is "K". For->I.e. the encrypted character is "H". For->I.e. the encrypted character is "O". For->I.e. the encrypted character is "O". For->I.e. the encrypted character is "R". Thus, the encrypted text "HELLO" is converted to "KHOOR". To decrypt, only the same key is used +.>And performing corresponding decryption operation.
Example 10: based on the above embodiment, the multi-state bit isConversion to classical bits->The method of (1) comprises: multi-state bit->Mapping to classical bit "A", polymorphic bit +.>Mapping to classical bit "B", and so on, complete the polymorphic bit +. >Conversion to classical bits->
Edge computing environments require immediate response and processing of data, but conventional encryption algorithms may compromise processing speed. The multi-state encryption algorithm is relatively light, is suitable for being rapidly executed on edge equipment, and does not influence the real-time requirement while guaranteeing the data safety. Computing resources of edge devices are typically limited, and complex encryption algorithms may consume significant computing power. The polymorphic encryption algorithm can more effectively utilize limited computing resources on the premise of ensuring safety. Edge computing involves the transmission and processing of sensitive data, requiring protection of data privacy. Polymorphic encryption is carried out by converting data into a polymorphic state, so that even if the data is intercepted, an attacker cannot restore the original data, and confidentiality of the data is ensured. The transmission and processing of data in an edge environment may be at risk of tampering. Polymorphic encryption may use a hash function to verify data integrity while protecting the data from tampering. Combining polymorphic encryption with edge computation can provide omnidirectional data protection. Polymorphic encryption ensures the privacy, integrity and security of data throughout the process from its generation to its transmission and processing. Polymorphic encryption encrypts data at an edge device while providing a corresponding decryption process. This simplifies the secure transfer and processing of data between the edge device and the edge server, without requiring complex decryption operations at the server side.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only memory (ROM), a random access memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. An edge computing device integrating an encryption algorithm, the device comprising: the system comprises a distribution computing center, a mapping storage center and a plurality of edge computing units connected in series; the distribution computing center divides the edge environment into a plurality of edge computing spaces according to a set proportion, each edge computing space corresponds to one proportion item in the set proportion, and each edge computing space at least comprises two edge computing units; after receiving the task to be encrypted, the edge computing center performs task segmentation according to a set proportion to obtain a plurality of subtasks, each subtask corresponds to one proportion item, then the subtasks are distributed into an edge computing space which is the same as the proportion items, after receiving the subtasks, the edge computing space firstly performs feature extraction on the subtasks to obtain subtask features, then uses an address mapping function to map the subtask features to one storage address in a mapping storage center, uses the storage address as an encryption storage address of the subtasks, finally, performs multi-state encryption on an edge computing unit in each edge computing space to obtain a subtask encryption result, stores the subtask encryption result into the corresponding encryption storage address, and then deletes the subtask and the subtask encryption result from the edge computing space; and the mapping storage center performs polymorphic decryption on the stored subtask encryption result in the decryption stage to obtain a subtask decryption result, and then re-maps the subtask decryption result back to the corresponding edge calculation space.
2. The edge computing device of an integrated encryption algorithm of claim 1, wherein the edge computing space is connected to the mapping memory center through a multi-state channel through which subtask features are mapped to one memory address in the mapping memory center using a hash-map function.
3. The edge computing device integrating encryption algorithms according to claim 2, wherein the process of polymorphic encryption comprises in particular:
step S1: each subtask is expressed in binary form to obtain a corresponding binary sequence, and for each bit in the binary sequence, a corresponding polymorphic bit sequence is generated and expressed as, wherein />Is the number of bits; random +.>Shaft(s)>Shaft and->The shaft rotates to generate a random rotation sequenceIs provided with->1 to->Integer of->Is a rotation operation;
step S2: for each multi-state bitApplying its corresponding rotation operation +.>Obtaining transformed multi-state bits
Step S3: combining all transformed polymorphic bits into a mixed stateThe method comprises the steps of carrying out a first treatment on the surface of the Using polymorphic transformationsTo->To obtain the transformed state +.>
Step S4: applying a phase shift gate to each polymorphic bit based on a preselected key bit sequence Is provided with->1 to->Integer of->Is 0 or 1, resulting in a transformed state +.>
Step S5: circularly permuting the polymorphic bit sequence according to a set permutation mode to obtain a shifted polymorphic bit sequence
Step S6: repeating steps S2 to S4, and executingSecond, generate->A different substitution sequence->Obtain->Status of polymorphism->
Step S7: is provided with1 to->For each polymorphic state +.>An encryption algorithm is applied->Use of a pre-shared key +.>Generating an encrypted state->As a subtask encryption result.
4. An edge computing device integrating an encryption algorithm as claimed in claim 3, wherein the process of polymorphic decryption specifically comprises:
step A1: using pre-shared decryption keysFor each encrypted polymorphic bit +.>Applying decryption algorithm +.>Obtaining the decrypted state->
Step A2: for decrypted polymorphic bit sequencesAccording to the substitution sequencePerforming cyclic permutation to obtain decrypted polymorphic bit sequence
Step A3: for each decrypted polymorphic bit sequenceThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted +.>
Step A4: for each decrypted state of the polymorphism Inverse operation using polymorphic transformationsObtaining the decrypted state->
Step A5: for each decrypted state of the polymorphismApplying each rotation operationIs the inverse of (2) to obtain the decrypted state +.>
Step A6: for each decrypted state of the polymorphismCombining them into a decrypted polymorphic bit sequence
Step A7: using pre-shared decryption keysFor the decrypted polymorphic bit sequence +.>Applying decryption algorithm +.>Obtaining the final decrypted polymorphic state +.>
Step A8: for decrypted polymorphic bit sequencesAccording to the substitution sequence->Performing cyclic permutation to obtain decrypted polymorphic bit sequence
Step A9: for each decrypted polymorphic bit sequenceThe inverse operation of the phase shift gate is applied, according to the key bit sequence +.>Obtaining the decrypted state->
Step A10: for each decrypted state of the polymorphismInverse operation using polymorphic transformationsObtaining the final decrypted state->As a result of the subtask decryption.
5. The edge computing device of integrated encryption algorithm of claim 4, wherein the polymorphic transformation isThe specific process of (2) comprises:
for any one multi-state bitPolymorphic transformation is applied to bring it from the ground state +. > and />Transforming into a uniformly distributed superposition state; the polymorphic transformations act on a single polymorphic bit, the matrix of which is represented as follows:
is a multi-state bit->The number of polymorphic bits in a constituent polymorphic bit sequence, the state after polymorphic transformation being appliedExpressed as:
when (when)When the polymorphism is used, the state is +.>I.e. a uniform filling state; when (when)When the polymorphism is used, the state is +.>I.e. in the reverse superimposed state.
6. The edge computing device of claim 5, wherein the distribution computing center, when dividing the edge environment into a plurality of edge computing spaces according to a set proportion, each proportion term in the set proportion satisfies the following constraint relation:
the set proportion is as follows:; wherein ,/>Are proportional terms;
wherein ,;/>;/>
7. the edge computing device of claim 6, wherein the edge computing space, upon receiving the subtask, first performs feature extraction on the subtask to obtain subtask features, and then uses an address mapping function to map the subtask features to a storage address in a mapping storage center, the method comprising: and performing data splicing on the received time of the subtask and the length of the subtask to serve as a subtask feature, and then mapping the subtask feature to one storage address in a mapping storage center by using an address mapping function.
8. The edge computing device integrated with the encryption algorithm according to claim 7, wherein the step S7 specifically includes: for each multi-state bitWhich represents polymorphism->Results obtained through measurement and polymorphic operation; multi-state bit->Conversion to classical bits->The method comprises the steps of carrying out a first treatment on the surface of the For each classical bit->Classical bits should be +.>According to the secret keyPerforming right offset encryption to obtain encrypted character +.>The method comprises the steps of carrying out a first treatment on the surface of the The encrypted character->Conversion back to multi-state bitsThe method comprises the steps of carrying out a first treatment on the surface of the Combining all encrypted polymorphic bits ++>Obtaining the encrypted polymorphism ++>
9. An edge computing device integrating an encryption algorithm according to claim 8, wherein for each classical bitClassical bits should be +.>According to the key->Performing right offset encryption to obtain encrypted character +.>The procedure of (2) is expressed using the following formula:
wherein ,is a classical bit, +.>Is a secret key.
10. The edge computing device integrating encryption algorithms of claim 9, wherein multi-state bits are to be encodedConversion to classical bits->The method of (1) comprises: multi-state bit->Mapping to classical bit "A", polymorphic bit +.>Mapping to classical bit "B", and so on, complete the polymorphic bit +. >Conversion to classical bits->
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