CN116828898A - Display panel and preparation method thereof - Google Patents

Abstract

The present application relates to a display panel and a preparation method thereof. The display panel includes an array substrate, a pixel defining layer and a light-emitting functional layer sequentially formed on the array substrate, and a plurality of auxiliary electrodes located on the side of the pixel defining layer away from the array substrate. The second electrode layer corresponding to two adjacent sub-pixels is disconnected at the edge of the auxiliary electrode. The auxiliary electrode includes a conductive part and a covering part located on the side of the conductive part away from the array substrate. The extension direction of the metal line formed by the conductive part is consistent with the first One direction is vertical, and the first direction is the evaporation direction of the display panel. The orthographic projection of the covering part on the array substrate covers the orthographic projection of the conductive part on the array substrate; the pixel defining layer also forms a groove to accommodate the conductive part. The groove Extend at least along the first direction, so that the distance between two adjacent sub-pixels decreases at least along the first direction. This display panel can not only reduce the cathode signal transmission resistance and eliminate device crosstalk between light-emitting sub-pixels, but also increase the pixel aperture ratio.

Description

Display panel and preparation method thereof

Technical field

The present application relates to the field of display technology, and in particular to a display panel and a preparation method thereof.

Background technique

As the size of organic electroluminescent diode (OLED) display panels increases, the area of the cathode layer of the light-emitting element will also increase. The cathode layer of a top-emitting OLED display panel needs to meet the light transmittance requirements and not be too thick. Such a large-area cathode layer will inevitably lead to a drop in in-plane voltage (IR-Drop), affecting the brightness uniformity of the display screen. For this reason, related technologies usually provide auxiliary electrodes on the pixel defining layer so that they can overlap with the cathode layer, and use the auxiliary electrodes to reduce the overall resistance of the cathode layer. In addition, light-emitting devices usually use fine metal masks as shields, and three-color sub-pixels are deposited through an evaporation process. However, for large-size OLED display panels, the metal mask sags too much, and the area bridged by the fine mask opening also limits the effective area for evaporation of the pixel light-emitting area, which is not conducive to improving the aperture ratio.

Contents of the invention

The present application aims to provide a display panel and a preparation method thereof, which can reduce the cathode signal transmission resistance and eliminate device crosstalk between light-emitting sub-pixels, while also increasing the pixel aperture ratio.

In a first aspect, an embodiment of the present application proposes a display panel. The display panel includes an array substrate and a pixel defining layer and a light-emitting functional layer sequentially formed on the array substrate. A plurality of first pixels arranged in an array are formed on the array substrate. electrode, the pixel defining layer includes a plurality of pixel openings, and the pixel openings expose at least part of the first electrode; the light-emitting functional layer includes a plurality of pixel units, the pixel units include a plurality of sub-pixels, and the sub-pixels include a light-emitting structure located on the first electrode and a light-emitting structure located on the first electrode. The second electrode layer on the light-emitting structure; the display panel also includes a plurality of auxiliary electrodes located on the side of the pixel defining layer facing away from the array substrate. The second electrode layers corresponding to the two adjacent sub-pixels are disconnected at the edges of the auxiliary electrodes. The electrode includes a conductive part and a covering part located on the side of the conductive part away from the array substrate. The extending direction of the metal line formed by the conductive part is perpendicular to the first direction. The first direction is the evaporation direction of the display panel. The covering part is on the side of the array substrate. The orthographic projection covers the orthographic projection of the conductive part on the array substrate; wherein, the pixel defining layer is also formed with a groove for accommodating the conductive part, and the groove extends at least along the first direction, so that the distance between two adjacent sub-pixels is at least decrease along the first direction.

In a possible implementation, the depth of the groove is h, the thickness of the pixel defining layer is t, and the following conditions are met: h=(1/3˜1/2)*t.

In a possible implementation, the groove penetrates the pixel defining layer.

In a possible implementation, the groove also extends along the second direction, so that the distance between two adjacent sub-pixels decreases along the second direction, and the second direction intersects the first direction.

In a possible implementation, the display panel further includes a planarization layer, the planarization layer is located between the array substrate and the plurality of first electrodes, the planarization layer is provided with a plurality of via holes, and the via holes are on the front side of the array substrate. The projection is located between the orthographic projections of two adjacent first electrodes on the array substrate.

In a second aspect, embodiments of the present application also provide a method for preparing a display panel, including: providing an array substrate on which a plurality of first electrodes arranged in an array are formed; and forming patterned pixel definitions on the array substrate. layer, the pixel defining layer includes a plurality of pixel openings, the pixel openings expose at least part of the first electrode; a plurality of auxiliary electrodes are formed on the pixel defining layer, the auxiliary electrodes include a conductive part and a covering part located on a side of the conductive part away from the array substrate, The extension direction of the metal lines formed by the conductive part is perpendicular to the first direction, which is the evaporation direction of the display panel. The orthographic projection of the covering part on the array substrate covers the orthographic projection of the conductive part on the array substrate; in the pixel defining layer and a luminescent functional layer evaporated on a plurality of auxiliary electrodes. The luminescent functional layer includes a plurality of pixel units. The pixel unit includes a plurality of sub-pixels. The sub-pixels include a luminescent structure located on the first electrode and a second electrode layer located on the luminescent structure. And the second electrode layers corresponding to the two adjacent sub-pixels are disconnected at the edge of the auxiliary electrode; wherein, a groove for accommodating the conductive part is also formed on the pixel defining layer, and the groove extends at least along the first direction, so that the phase The distance between two adjacent sub-pixels decreases at least along the first direction.

In a possible implementation, the groove is a blind groove; or, the groove penetrates the pixel defining layer.

In a possible implementation, the groove also extends along the second direction, so that the distance between two adjacent sub-pixels decreases along the second direction, and the second direction intersects the first direction.

In a possible implementation, before forming a plurality of first electrodes arranged in an array on the array substrate, the method further includes: forming a patterned planarization layer on the array substrate, and the planarization layer is provided with a plurality of via holes. , the orthographic projection of the via hole on the array substrate is located between the orthographic projections of two adjacent first electrodes on the array substrate.

In a possible implementation, forming a plurality of auxiliary electrodes on the pixel defining layer includes: forming a conductive layer on the pixel defining layer; forming an eaves layer on the conductive part; etching the eave layer and the conductive layer simultaneously to form respectively The covering portion and the conductive portion of the plurality of auxiliary electrodes.

According to a display panel and a preparation method thereof provided in an embodiment of the present application, the display panel includes an array substrate, a pixel defining layer, a light-emitting functional layer sequentially formed on the array substrate, and a plurality of pixel defining layers located on a side of the pixel defining layer away from the array substrate. Auxiliary electrodes, a plurality of first electrodes arranged in an array are formed on the array substrate, the pixel defining layer includes a plurality of pixel openings, and the pixel openings expose at least part of the first electrodes; the light-emitting functional layer includes a plurality of pixel units, and the pixel units include a plurality of pixel units. Sub-pixel; the sub-pixel includes a light-emitting structure located on the first electrode and a second electrode layer located on the light-emitting structure; the second electrode layers corresponding to the two adjacent sub-pixels are disconnected at the edge of the auxiliary electrode; the auxiliary electrode includes a conductive and a covering portion located on the side of the conductive portion away from the array substrate. The extension direction of the metal lines formed by the conductive portion is perpendicular to the first direction. The first direction is the evaporation direction of the display panel. The orthographic projection of the covering portion on the array substrate covers Orthographic projection of the conductive part on the array substrate; by forming a groove for accommodating the conductive part on the pixel defining layer, the groove extends at least along the first direction, so that the spacing between two adjacent sub-pixels is at least along the first direction. direction decreases. As a result, the film layer where the conductive part is located can be lowered, and the height between the covering part and the pixel defining layer above the first electrode can be lowered, thereby reducing the distance between two adjacent sub-pixels and reducing the cathode signal transmission resistance. , while eliminating device crosstalk between light-emitting sub-pixels, it can also increase the pixel aperture ratio.

Description of the drawings

The features, advantages and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, identical components have the same reference numerals. The drawings are not drawn to actual proportions and are only used to illustrate relative positional relationships. The layer thicknesses in certain locations are exaggerated for easier understanding. The layer thicknesses in the accompanying drawings do not represent the proportional relationships of actual layer thicknesses.

Figure 1 shows a schematic cross-sectional structural diagram of a display panel in the related art;

Figure 2 shows a schematic top view of the structure of the display panel in Figure 1;

Figure 3 shows a schematic diagram of the distribution of evaporation material gas emitted from the evaporation source along the first direction;

Figure 4 shows a schematic diagram of the distribution of the evaporation material gas along the second direction in Figure 3;

Figure 5 shows a schematic structural diagram of a display panel provided by the first embodiment of the present application;

Figure 6 shows a schematic top structural view of the display panel shown in Figure 5;

Figure 7 shows a schematic structural diagram of a display panel provided by the second embodiment of the present application;

Figure 8 shows a schematic structural diagram of a display panel provided by the third embodiment of the present application;

FIG. 9 shows a flow chart of a method for manufacturing a display panel provided by the fourth embodiment of the present application.

Explanation of reference symbols:

1. Array substrate; 1a, substrate; 1b, driving array layer; 11. first electrode; 2. pixel defining layer; 21. pixel opening; 3. light-emitting functional layer; Px, sub-pixel; 31. light-emitting structure; 32 , second electrode layer; 4. auxiliary electrode; 41. conductive part; 42. covering part; 5. planarization layer; 6. touch layer; H. via hole; 7. encapsulation layer; θ, evaporation angle.

Detailed ways

Features and exemplary embodiments of various aspects of the application are described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the application. However, it will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of the present application by illustrating examples of the present application. In the drawings and the following description, at least some of well-known structures and techniques are not shown to avoid unnecessarily obscuring the present application; and, the dimensions of regional structures may be exaggerated for clarity. Furthermore, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.

The directional words appearing in the following description are the directions shown in the figures and do not limit the specific structure of the present application. In the description of this application, it should also be noted that, unless otherwise clearly stated and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection. Or integrally connected; it can be directly connected or indirectly connected. For those of ordinary skill in the art, the specific meanings of the above terms in this application may be understood based on specific circumstances.

Currently, there are usually three mass production methods for light-emitting devices in OLED display panels: one is to use a fine metal mask as a mask to deposit three-color sub-pixels through an evaporation process; the other is to use an inkjet printing process to print different positions of the light-emitting devices. The sub-pixels are accurately printed; the third is to use an evaporation process to form a film on the entire surface, and then use a photolithography process to etch the film-formed substrate to separate the three-color sub-pixels. With the increasing popularity of large-size display panels, the metal mask sags too much when using the first method. Therefore, using the third method of combining evaporation and etching has become an industry trend. That is, the evaporation process is first used to form a film on the entire surface. With the special structure of the evaporation source, the cathode end of the sub-pixel can form an overlap with the auxiliary electrode, and then the film-formed substrate is etched through the photolithography process. , separate three-color sub-pixels.

FIG. 1 shows a schematic cross-sectional structural view of a display panel in the related art; FIG. 2 shows a schematic top structural view of the display panel in FIG. 1 .

As shown in Figure 1, a display panel in the related art includes an array substrate 1 and a pixel defining layer 2 and a light-emitting functional layer 3 sequentially formed on the array substrate 1. A plurality of first electrodes arranged in an array are formed on the array substrate 1. 11. The pixel defining layer 2 includes a plurality of pixel openings 21, which expose at least part of the first electrode 11; the light-emitting functional layer 3 includes a plurality of pixel units, the pixel units include a plurality of sub-pixels Px, and the sub-pixels Px include The light-emitting structure 31 on the electrode 11 and the second electrode layer 32 located on the light-emitting structure 31; the display panel also includes a plurality of auxiliary electrodes 4 located on the side of the pixel defining layer 2 facing away from the array substrate 1, and the two adjacent sub-pixels Px correspond to The second electrode layer 32 is disconnected at the edge of the auxiliary electrode 4. The auxiliary electrode 4 includes a conductive part 41 and a covering part 42 located on the side of the conductive part 41 away from the array substrate 1. The extension direction of the metal line formed by the conductive part 41 is consistent with The first direction X is vertical, and the first direction

As shown in Figure 2, the pixel unit of the display panel includes three sub-pixels, namely red sub-pixels, blue sub-pixels and green sub-pixels. The light-emitting functional layer 3 of the display panel covers the first electrode 11 , the second electrode layer 32 covers the light-emitting functional layer 3 , and the second electrode layers 32 of the two adjacent sub-pixels Px are disconnected at the edge of the auxiliary electrode 4 , and is electrically connected to the conductive part 41 . Each sub-pixel of the light-emitting functional layer 3 is formed on the entire surface using an evaporation process.

FIG. 3 shows a schematic distribution diagram of the evaporation material gas emitted from the evaporation source along the first direction; FIG. 4 shows a schematic distribution diagram of the evaporation material gas emitted from the evaporation source along the second direction in FIG. 3 .

As shown in FIGS. 3 and 4 , the first direction X is the evaporation direction of the display panel (which can also be called the Nozzle direction), and the second direction Y is the moving direction (which can also be called the Scan direction). When actually evaporating luminescent materials, since the evaporation source forms an evaporation cloud in the first direction The plate controls the evaporation angle of the material.

As shown in FIG. 1 , the vertical distance between the edge of the pixel defining layer 2 and the edge of the covering part 42 of the adjacent auxiliary electrode 4 is a, and the vertical distance between the edge of the covering part 42 and the middle part of the conductive part 41 is b. , different evaporation angles have different influences on the a value in the first direction X or the second direction Y. Since the film thickness in the a-value region is uneven, it cannot be used for device light emission. The opening 21 of the pixel defining layer 2 must avoid this region to eliminate device crosstalk between light-emitting sub-pixels. Therefore, the spacing between adjacent sub-pixels must be >2(a+b), and the spacing between adjacent sub-pixels along the first direction X is greater than the spacing along the second direction Y.

At the same time, the wiring resistance of the second electrode layer 32 in the display area is large, resulting in a voltage difference between the near-end and far-end signals, resulting in uneven display within the plane. Reducing the wiring resistance of the second electrode layer 32 needs to be solved from the design end.

In view of this, various embodiments of the present application provide a display panel that can reduce the cathode signal transmission resistance and eliminate device crosstalk between light-emitting sub-pixels, while also increasing the pixel aperture ratio.

First embodiment

FIG. 5 shows a schematic structural diagram of the display panel provided by the first embodiment of the present application; FIG. 6 shows a schematic structural diagram of the display panel shown in FIG. 5 .

As shown in Figures 5 and 6, the display panel provided by the first embodiment of the present application includes an array substrate 1 and a pixel defining layer 2 and a light-emitting functional layer 3 sequentially formed on the array substrate 1. An array is formed on the array substrate 1. A plurality of first electrodes 11 are arranged, the pixel defining layer 2 includes a plurality of pixel openings 21, and the pixel openings 21 expose at least part of the first electrodes 11; the light-emitting functional layer 3 includes a plurality of pixel units, and the pixel unit includes a plurality of sub-pixels Px , the sub-pixel Px includes a light-emitting structure 31 located on the first electrode 11 and a second electrode layer 32 located on the light-emitting structure 31 .

The display panel also includes a plurality of auxiliary electrodes 4 located on the side of the pixel defining layer 2 facing away from the array substrate 1. The second electrode layer 32 corresponding to the two adjacent sub-pixels Px is disconnected at the edge of the auxiliary electrode 4. The auxiliary electrode 4 includes The conductive part 41 and the covering part 42 located on the side of the conductive part 41 away from the array substrate 1 . The extending direction of the metal lines formed by the conductive part 41 is perpendicular to the first direction X. The first direction X is the evaporation direction of the display panel. The covering part The orthographic projection of 42 on the array substrate 1 covers the orthographic projection of the conductive portion 41 on the array substrate 1 .

Wherein, the pixel defining layer 2 is also formed with a groove 22 for accommodating the conductive portion 41. The groove 22 extends at least along the first direction X, so that the distance between two adjacent sub-pixels Px is reduced at least along the first direction X. .

In this embodiment, the display panel has a top-emission structure, the first electrode 11 is an anode, and the second electrode layer 32 is a cathode laid on the entire surface. The second electrode layer 32 corresponding to two adjacent sub-pixels is on the auxiliary electrode 4 The edge is disconnected so that the edge of the auxiliary electrode 4 can be overlapped with the conductive portion 41 of the auxiliary electrode 4 , so that the auxiliary electrode 4 can be used to reduce the overall resistance of the second electrode layer 32 .

Optionally, an auxiliary electrode 4 is provided on at least one sub-pixel in at least one pixel unit. The greater the number of auxiliary electrodes 4 , the smaller the voltage drop of the overall resistance of the second electrode layer 32 is, which is beneficial to improving the brightness uniformity of the display panel.

Optionally, the shape of the sub-pixel is any one of a circle, an ellipse, and a polygon, or at least a combination of the two. The polygon may be, for example, but not limited to, a triangle, a trapezoid, a rectangle, a quadrilateral, a pentagon, a hexagon, and the like. In a pixel unit, the shapes of each sub-pixel can be the same or different, depending on the specific pixel arrangement structure.

As shown in FIG. 5 , since the pixel defining layer 2 is also formed with a groove 22 for accommodating the conductive portion 41 , and the groove 22 extends along the first direction X, the conductive portion 41 of the auxiliary electrode 4 sinks as a whole along the first direction X. , further reducing the height between the covering portion 42 of the auxiliary electrode 4 and the pixel defining layer 2 above the first electrode 11 , so that the edge of the pixel defining layer 2 can be closer to the edge of the covering portion 42 of the adjacent auxiliary electrode 4 The vertical distance a value between them decreases, thereby reducing the spacing between adjacent sub-pixels along the first direction X, increasing the occupied space of the sub-pixels, thereby increasing the pixel aperture ratio.

The display panel provided by the first embodiment of the present application forms a groove 22 for accommodating the conductive portion 41 in the pixel defining layer 2, and the groove 22 extends at least along the first direction X, so that the space between two adjacent sub-pixels is The spacing decreases at least along the first direction X. As a result, the film layer where the conductive portion 41 is located can be lowered, and the height between the covering portion 42 and the pixel defining layer 2 above the first electrode 11 can be lowered, thereby reducing the spacing between adjacent sub-pixels and reducing the cathode signal. While transmitting resistance and eliminating device crosstalk between light-emitting sub-pixels, it can also increase the pixel aperture ratio.

In some embodiments, the depth of the groove 22 is h, the thickness of the pixel definition layer 2 is t, and the following conditions are met: h=(1/3˜1/2)*t.

As shown in FIG. 5 , the pixel defining layer 2 is formed with a groove 22 , and the groove 22 is a blind groove with a preset depth, so that the overall height of the auxiliary electrode 4 is reduced by a distance corresponding to the preset depth.

In some embodiments, the groove 22 also extends along the second direction Y, so that the distance between two adjacent sub-pixels Px is reduced along the second direction Y, and the second direction Y intersects the first direction X.

Since the evaporation angle of the sub-pixel along the second direction Y is limited by the limiting plate, the smaller the evaporation angle, the lower the utilization rate of the evaporation material. When the groove 22 still extends in the second direction Y, the pixel aperture ratio can be kept unchanged while ensuring that the performance of the light-emitting device meets the requirements, and the evaporation angle can be increased to improve the utilization rate of the evaporation material.

In some embodiments, the display panel further includes a planarization layer 5 located between the array substrate 1 and the plurality of first electrodes 11 . The array substrate 1 includes a substrate and a driving array layer located on the substrate. The driving array layer includes a pixel circuit. The planarization layer 5 covers the surface of the array substrate 1 so that the surface of the array substrate 1 is in a flattened state to facilitate subsequent planarization. A plurality of first electrodes 11 are prepared on layer 5 . The material of the substrate can be glass or polyimide.

Optionally, the light-emitting functional layer 3 also includes a first common layer and a second common layer. The first common layer includes a hole injection layer (Hole Injection Layer, HIL) located on the first electrode 11 and a hole transport layer (Hole Transport Layer, HTL) located on a side surface of the hole injection layer facing away from the array substrate 1 . The second common layer includes an electron transport layer (ETL) located on the surface of the light-emitting structure 31 and an electron injection layer (EIL) located on the surface of the electron transport layer facing away from the light-emitting structure 31 .

Furthermore, the display panel also includes an encapsulation layer (not shown in the figure), and the encapsulation layer covers the light-emitting functional layer 3 and the plurality of auxiliary electrodes 4 . The encapsulation layer includes a first inorganic layer, an organic layer and a second inorganic layer that are sequentially arranged in a direction away from the array substrate 1 . Wherein, the first inorganic layer and the second inorganic layer are both transparent inorganic film layers, and their materials may include one or more of the following materials: Al ₂ O ₃ , TiO ₂ , ZrO ₂ , MgO, HFO ₂ , Ta ₂ O ₅ , Si ₃ N ₄ , AlN, SiN, SiNO, SiO, SiO ₂ , SiC, SiCNx, ITO, IZO. These inorganic materials have both good light transmission properties and good water and oxygen barrier properties. The organic layer is made of transparent organic conductive resin, specifically including transparent matrix resin, conductive molecules and/or conductive ions. Specifically, it can be a transparent conductive resin formed by stirring and completely dissolving organic acid-doped polyaniline, cross-linking monomer, toluene, etc.; or, adding conductive molecules, such as polyaniline, etc. to the above-mentioned transparent conductive resin; or, adding conductive molecules, such as polyaniline, etc. Conductive ions, such as nanoscale antimony-doped SiO ₂ , are added to the above-mentioned transparent conductive resin. Nanoscale conductive ions such as nanoscale indium tin oxide or nanosilver can also be used.

The first inorganic layer and the second inorganic layer made of inorganic materials completely cover the light-emitting functional layer 3 and the plurality of auxiliary electrodes 4, which can prevent water vapor from intruding from the side and affecting the electrical performance of the light-emitting functional layer 3. The patterned organic layer has high elasticity and is sandwiched between the first inorganic layer and the second inorganic layer. It can not only inhibit the cracking of the inorganic film, release the stress between the inorganic materials, but also improve the strength of the entire encapsulation layer. Flexibility, enabling reliable flexible packaging.

Second embodiment

FIG. 7 shows a schematic structural diagram of a display panel provided by the second embodiment of the present application.

As shown in FIG. 7 , the display panel provided by the second embodiment of the present application has a similar structure to the display panel provided by the first embodiment, except that the structure of the pixel defining layer 2 is different.

Specifically, the groove 22 of the pixel defining layer 2 penetrates the pixel defining layer 2 , that is, the groove 22 is a through groove for accommodating the conductive portion 41 of the auxiliary electrode 4 , and the groove 22 extends along the first direction The conductive portion 41 of the electrode 4 sinks as a whole along the first direction X, thereby reducing the height between the covering portion 42 of the auxiliary electrode 4 and the pixel defining layer 2 above the first electrode 11 . Compared with the first embodiment, the height between the covering portion 42 of the auxiliary electrode 4 and the pixel defining layer 2 above the first electrode 11 is lower, so that the edge of the pixel defining layer 2 can be covered with the adjacent auxiliary electrode 4 The vertical distance a between the edges of the portion 42 is smaller, thereby further reducing the spacing between adjacent sub-pixels along the first direction X, increasing the occupied space of the sub-pixels, thereby increasing the pixel aperture ratio.

Further, the groove 22 also extends along the second direction Y, so that the distance between two adjacent sub-pixels Px decreases along the second direction Y, and the second direction Y intersects the first direction X.

Since the evaporation angle of the sub-pixel along the second direction Y is limited by the limiting plate, the smaller the evaporation angle, the lower the utilization rate of the evaporation material. When the groove 22 still extends in the second direction Y, the pixel aperture ratio can be kept unchanged while ensuring that the performance of the light-emitting device meets the requirements, and the evaporation angle can be increased to improve the utilization rate of the evaporation material.

Third embodiment

FIG. 8 shows a schematic structural diagram of a display panel provided by the third embodiment of the present application.

As shown in FIG. 8 , the display panel provided by the third embodiment of the present application has a similar structure to the display panel provided by the first embodiment or the second embodiment, except that the structure of the planarization layer 5 is different.

Specifically, the planarization layer 5 is provided with a plurality of via holes 51 , and the orthographic projection of the via holes 51 on the array substrate 1 is located between the orthographic projections of two adjacent first electrodes 11 on the array substrate 1 . Since the pixel defining layer 2 is located on the side of the planarization layer 5 facing away from the array substrate 1 , the pixel defining layer 2 can be filled in the via hole 51 , causing a groove 22 to be formed on the side of the pixel defining layer 2 facing away from the array substrate 1 , thereby allowing the auxiliary The conductive portion 41 of the electrode 4 is accommodated in the groove 22 , so that the height between the covering portion 42 of the auxiliary electrode 4 and the pixel defining layer 2 above the first electrode 11 is reduced. The groove 22 may be a blind groove or a through groove, which will not be described again.

Fourth embodiment

FIG. 9 shows a flow chart of a method for manufacturing a display panel provided by the fourth embodiment of the present application.

As shown in FIG. 9 , the preparation method of a display panel provided by the fourth embodiment of the present application includes steps S1 to S4.

Step S1: Provide an array substrate 1 on which a plurality of first electrodes 11 arranged in an array are formed;

Step S2: Form a patterned pixel definition layer 2 on the array substrate 1. The pixel definition layer 2 includes a plurality of pixel openings 21, and the pixel openings 21 expose at least part of the first electrode 11;

Step S3: Form a plurality of auxiliary electrodes 4 on the pixel defining layer 2. The auxiliary electrode 4 includes a conductive part 41 and a covering part 42 located on the side of the conductive part 41 away from the array substrate 1. The extending direction of the metal lines formed by the conductive part 41 is consistent with The first direction X is vertical, and the first direction

Step S4: Evaporate the luminescent functional layer 3 on the pixel defining layer 2 and the plurality of auxiliary electrodes 4. The luminescent functional layer 3 includes a plurality of pixel units, the pixel unit includes a plurality of sub-pixels Px, and the sub-pixels Px include a plurality of sub-pixels Px located on the first electrode 11. The light-emitting structure 31 and the second electrode layer 32 located on the light-emitting structure 31, and the second electrode layers 32 corresponding to the two adjacent sub-pixels Px are disconnected at the edge of the auxiliary electrode 4;

Among them, the pixel defining layer 2 is also formed with a groove 22 for accommodating the conductive portion 41. The groove 22 extends at least along the first direction X, so that the distance between two adjacent sub-pixels Px is reduced at least along the first direction X. Small. Since the groove 22 extends at least along the first direction The spacing between pixels at least along the first direction

Optionally, the groove 22 is a blind groove; or, optionally, the groove 22 penetrates the pixel defining layer 2 .

Furthermore, the groove 22 also extends along the second direction Y, so that the distance between two adjacent sub-pixels is reduced along the second direction Y, and the second direction Y intersects the first direction X.

Since the evaporation angle of the sub-pixel along the second direction Y is limited by the limiting plate, the smaller the evaporation angle, the lower the utilization rate of the evaporation material. When the groove 22 still extends in the second direction Y, the pixel aperture ratio can be kept unchanged while ensuring that the performance of the light-emitting device meets the requirements, and the evaporation angle can be increased to improve the utilization rate of the evaporation material.

Further, before the plurality of first electrodes 11 arranged in an array are formed on the array substrate 1, it also includes:

Step S0: Form a patterned planarization layer 5 on the array substrate 1. The planarization layer 5 is provided with a plurality of via holes 51. The orthographic projection of the via holes 51 on the array substrate 1 is located at the two adjacent first electrodes 11. between the orthographic projections on the array substrate 1.

Step S4, that is, forming a plurality of auxiliary electrodes 4 on the pixel defining layer 2 includes:

Step S41: Form a conductive layer on the pixel defining layer 2;

Step S42: Form an eaves layer on the conductive part 41;

Step S43: Etch the eaves layer and the conductive layer simultaneously to form the covering portions 42 and the conductive portions 41 of the plurality of auxiliary electrodes 4 respectively.

In this embodiment, the first electrode 11 is first etched on one side of the array substrate 1, and then deposited to form the pixel defining layer 2. Then, a plurality of auxiliary electrodes 4 are formed on the pixel defining layer 2, and then the light-emitting functional layer 3 is evaporated. During evaporation, the evaporation source is above the array substrate 1 and the fine metal mask, first evaporates the light-emitting structure 31, and then evaporates the second electrode layer 32. The second electrode layer 32 corresponding to two adjacent sub-pixels will be disconnected at the covering portion 42 of the auxiliary electrode 4, so that the second electrode layer 32 is overlapped and connected to the conductive portion 41 according to the adjusted evaporation angle θ. The specific etching process can refer to the existing technology and will not be described again.

According to a method for manufacturing a display panel provided by an embodiment of the present application, a groove 22 for accommodating the conductive part 41 is formed in the pixel defining layer 2, and the groove 22 extends at least along the first direction X, so that two adjacent The spacing between sub-pixels decreases at least along the first direction X. As a result, the film layer where the conductive portion 41 is located can be lowered, and the height between the covering portion 42 and the pixel defining layer 2 above the first electrode 11 can be lowered, thereby reducing the spacing between adjacent sub-pixels and reducing the cathode signal. While transmitting resistance and eliminating device crosstalk between light-emitting sub-pixels, it can also increase the pixel aperture ratio.

It should be readily understood that "on," "over," and "over" in this application should be construed in the broadest manner, so that "on" does not only mean " "directly on something" also includes the meaning of "on something" with intermediate features or layers in between, and "on..." or "on..." not only includes "on something" or "on something" The meaning of "on" may also include the meaning of "over" or "over" something without intervening features or layers (i.e., directly on something).

The term "substrate" as used herein refers to the material to which subsequent layers of material are added. The substrate itself can be patterned. The material added on top of the substrate may be patterned, or may remain unpatterned. Additionally, the substrate may include a wide range of materials, such as silicon, germanium, gallium arsenide, indium phosphide, and the like. Alternatively, the substrate may be made of a non-conductive material (eg, glass, plastic, or sapphire wafer, etc.).

The term "layer" as used herein may refer to a portion of material that includes a region of thickness. A layer may extend over the entire underlying or overlying structure, or may have an extent that is smaller than the extent of the underlying or overlying structure. Furthermore, a layer may be a region of a homogeneous or non-homogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of the continuous structure or between any pairs of transverse planes at the top and bottom surfaces. The layers may extend laterally, vertically and/or along tapered surfaces. The array substrate may be a layer, may include one or more layers therein, and/or may have one or more layers on, above, and/or below it. A layer may include multiple layers. For example, interconnect layers may include one or more conductor and contact layers within which contacts, interconnect lines, and/or vias are formed, and one or more dielectric layers.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present application, but not to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features can be equivalently replaced; and these modifications or substitutions do not deviate from the essence of the corresponding technical solutions from the technical solutions of the embodiments of the present application. scope.

Claims (10)

1. A display panel, comprising an array substrate and a pixel defining layer and a light-emitting functional layer sequentially formed on the array substrate. A plurality of first electrodes arranged in an array are formed on the array substrate. The pixel defining layer including a plurality of pixel openings, the pixel openings exposing at least part of the first electrode; the light-emitting functional layer including a plurality of pixel units, the pixel units including a plurality of sub-pixels, the sub-pixels including A light-emitting structure on the electrode and a second electrode layer located on the light-emitting structure; characterized in that, The display panel also includes a plurality of auxiliary electrodes located on a side of the pixel defining layer facing away from the array substrate, and the second electrode layers corresponding to two adjacent sub-pixels are at the edges of the auxiliary electrodes. disconnected, the auxiliary electrode includes a conductive part and a covering part located on the side of the conductive part away from the array substrate, the extension direction of the metal line formed by the conductive part is perpendicular to the first direction, and the first direction is In the evaporation direction of the display panel, the orthographic projection of the covering portion on the array substrate covers the orthographic projection of the conductive portion on the array substrate; Wherein, the pixel defining layer is further formed with a groove for accommodating the conductive part, and the groove extends at least along the first direction, so that the distance between two adjacent sub-pixels is reduced at least along the first direction. Small. 2. The display panel according to claim 1, wherein the depth of the groove is h, the thickness of the pixel defining layer is t, and the following conditions are met: h=(1/3～1/2 )*t. 3. The display panel according to claim 1, wherein the groove penetrates the pixel defining layer. 4. The display panel according to any one of claims 1 to 3, wherein the groove also extends along the second direction so that the spacing between two adjacent sub-pixels extends along the second direction. decreases, the second direction intersects the first direction. 5. The display panel according to claim 4, further comprising a planarization layer located between the array substrate and the plurality of first electrodes, the planarization layer being provided with A plurality of via holes, the orthographic projection of the via hole on the array substrate is located between the orthographic projections of two adjacent first electrodes on the array substrate. 6. A method for preparing a display panel, characterized by comprising: Provide an array substrate on which a plurality of first electrodes arranged in an array are formed; forming a patterned pixel defining layer on the array substrate, the pixel defining layer including a plurality of pixel openings exposing at least a portion of the first electrode; A plurality of auxiliary electrodes are formed on the pixel defining layer. The auxiliary electrodes include a conductive portion and a covering portion located on a side of the conductive portion away from the array substrate. The extending direction of the metal line formed by the conductive portion is consistent with the first One direction is vertical, the first direction is the evaporation direction of the display panel, and the orthographic projection of the covering portion on the array substrate covers the orthographic projection of the conductive portion on the array substrate; A light-emitting functional layer is evaporated on the pixel defining layer and the plurality of auxiliary electrodes. The light-emitting functional layer includes a plurality of pixel units. The pixel unit includes a plurality of sub-pixels. The sub-pixels include a plurality of sub-pixels located on the first a light-emitting structure on the electrode and a second electrode layer located on the light-emitting structure, and the second electrode layers corresponding to two adjacent sub-pixels are disconnected at the edge of the auxiliary electrode; Wherein, a groove for accommodating the conductive part is also formed on the pixel defining layer, and the groove extends at least along the first direction, so that the distance between two adjacent sub-pixels is at least along the first direction. decrease. 7. The preparation method according to claim 6, wherein the groove is a blind groove; or, the groove penetrates the pixel defining layer. 8. The preparation method according to claim 6 or 7, characterized in that the groove also extends along the second direction, so that the distance between two adjacent sub-pixels decreases along the second direction, The second direction intersects the first direction. 9. The preparation method according to claim 8, characterized in that, before forming a plurality of first electrodes arranged in an array on the array substrate, it further includes: A patterned planarization layer is formed on the array substrate. The planarization layer is provided with a plurality of via holes. The orthographic projection of the via holes on the array substrate is located at two adjacent first electrodes. between orthographic projections on the array substrate. 10. The preparation method according to claim 6, wherein forming a plurality of auxiliary electrodes on the pixel defining layer includes: forming a conductive layer on the pixel defining layer; forming an eaves layer on the conductive part; The eaves layer and the conductive layer are etched simultaneously to form the covering portions and the conductive portions of a plurality of auxiliary electrodes respectively.