CN116802813A

CN116802813A - Solid-state image pickup device and electronic apparatus

Info

Publication number: CN116802813A
Application number: CN202280014218.5A
Authority: CN
Inventors: 唐仁原裕树
Original assignee: Sony Semiconductor Solutions Corp
Current assignee: Sony Semiconductor Solutions Corp
Priority date: 2021-02-18
Filing date: 2022-02-03
Publication date: 2023-09-22
Also published as: EP4297093A1; WO2022176626A1; TW202236656A; JPWO2022176626A1; KR20230144536A; US20240113145A1

Abstract

The present invention suppresses narrowing of a signal range in which phase difference detection is possible. The solid-state image pickup device according to the present invention includes a semiconductor layer having one surface serving as a light incident surface and the other surface serving as an element forming surface. The semiconductor layer has a plurality of photoelectric conversion units including a first photoelectric conversion portion, a second photoelectric conversion portion, an isolation portion provided between the first photoelectric conversion portion and the second photoelectric conversion portion and capable of forming a first potential barrier, a charge accumulation region, a first transfer transistor that transfers signal charges from the first photoelectric conversion portion to the charge accumulation region and is capable of forming a second potential barrier higher than the first potential barrier when the signal charges are not transferred, and a second transfer transistor that transfers signal charges from the second photoelectric conversion portion to the charge accumulation region and is capable of forming the second potential barrier when the signal charges are not transferred. The isolation part includes: a first region formed of an insulating material and extending from the element formation face side in the thickness direction of the semiconductor layer; and a second region disposed on the light incidence surface side of the first region and including a semiconductor region of the first conductivity type implanted with impurities.

Description

Solid-state image pickup device and electronic apparatus

Technical Field

The present technology (technology according to the present disclosure) relates to a solid-state image pickup device and an electronic apparatus, and particularly relates to a solid-state image pickup device and an electronic apparatus having phase difference detection pixels.

Background

Conventionally, there is a method of performing pupil division by embedding a plurality of photoelectric conversion elements under one on-chip lens, and for example, the method is used as a solid-state image pickup device of a single-lens reflex camera or a built-in smartphone camera (for example, see patent literature 1).

Further, some solid-state image pickup devices perform phase difference detection by independently reading signal charges photoelectrically converted by a plurality of photodiodes disposed under one on-chip lens as signals at the time of phase difference detection, and add the signals as signals of one pixel at the time of image pickup to perform processing. In a solid-state image pickup device having such an image plane phase difference detection function, in the case where there is a difference in sensitivity or an incident light amount between a plurality of photoelectric conversion elements to be added, linearity of the added signal may not be maintained. In order to maintain linearity after addition, a structure is known in which the height of a potential barrier between a plurality of photodiodes is made lower than the height of a potential barrier under a transfer gate (for example, patent document 2).

List of citations

Patent literature

Patent document 1: japanese patent application laid-open No. 2002-165126

Patent document 2: japanese patent application laid-open No. 2018-142739

Disclosure of Invention

Technical problem to be solved by the invention

In the phase difference detection pixel described in patent document 2, it is important to control the height of the potential barrier between the plurality of photodiodes. This is because a trade-off is made between a signal range in which linearity is maintained with respect to the amount of light at the time of addition and a signal range for phase difference detection according to the height of the potential barrier.

In addition, in the case of miniaturization of the pixel size, the distance between the isolation region, which isolates the plurality of photodiodes from each other, and the transfer gate may be close. Therefore, an isolation region that isolates the plurality of photodiodes from each other is adjusted under the influence of the on/off operation of the transfer gate, and the barrier height may vary.

An object of the present technology is to provide a solid-state image pickup device and an electronic apparatus capable of suppressing narrowing of a signal range in which phase difference detection can be performed.

Solution to the technical problem

A solid-state image pickup device according to one aspect of the present technology includes a semiconductor layer having one surface that is a light incidence surface and the other surface that is an element formation surface, the semiconductor layer including a plurality of photoelectric conversion units including a first photoelectric conversion portion, a second photoelectric conversion portion, and an isolation portion that is provided between the first photoelectric conversion portion and the second photoelectric conversion portion and that is capable of forming a first potential barrier, a charge accumulation region, a first transfer transistor that is capable of transferring signal charges from the first photoelectric conversion portion to the charge accumulation region and that forms a second potential barrier higher than the first potential barrier when the signal charges are not transferred, and a second transfer transistor that is capable of transferring signal charges from the second photoelectric conversion portion to the charge accumulation region and that forms the second potential barrier when the signal charges are not transferred; and the isolation portion includes a first region formed of an insulating material extending from the element formation face side in a thickness direction of the semiconductor layer; and a second region provided on the light incidence face side of the first region and formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted.

An electronic apparatus according to another aspect of the present technology includes a solid-state image pickup device and an optical system that causes the solid-state image pickup device to form an image of image light from a subject.

Drawings

Fig. 1 is a chip layout diagram showing a configuration example of a solid-state imaging device according to a first embodiment of the present technology.

Fig. 2 is a block diagram showing a configuration example of a solid-state imaging device according to the first embodiment of the present technology.

Fig. 3 is an equivalent circuit diagram of a pixel of the solid-state image pickup device according to the first embodiment of the present technology.

Fig. 4A is a lateral cross-sectional view showing the relative relationship between the respective components when a plurality of pixels of the solid-state image pickup device according to the first embodiment of the present technology are observed in a cross section of a first plane.

Fig. 4B is a schematic diagram showing a relationship of potential distribution of each component along the line D-D of fig. 4A.

Fig. 5 is a longitudinal sectional view showing a sectional structure of a pixel of a solid-state image pickup device according to a first embodiment of the present technology.

Fig. 6A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the first embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 6B is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line A-A of fig. 6A.

Fig. 6C is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line B-B of fig. 6A.

Fig. 7 is a graph showing the output of the photoelectric conversion portion of the solid-state image pickup device according to the first embodiment of the present technology with respect to the amount of incident light.

Fig. 8A is a schematic diagram showing a change in the amount of signal charge accumulated in the photoelectric conversion portion of the solid-state image pickup device according to the first embodiment of the present technology.

Fig. 8B is a schematic diagram showing a variation after fig. 8A.

Fig. 8C is a schematic diagram showing a variation after fig. 8B.

Fig. 8D is a schematic diagram showing a variation after fig. 8C.

Fig. 9A is a schematic diagram showing a change in potential barrier and a movement of signal charge in the case where the first transfer transistor is turned on and off in the solid-state image pickup device according to the first embodiment of the present technology.

Fig. 9B is a schematic diagram showing the change of the potential barrier and the movement of the signal charge after fig. 9A.

Fig. 9C is a schematic diagram showing the change of the potential barrier and the movement of the signal charge after fig. 9B.

Fig. 10A is a process cross-sectional view showing a method of manufacturing a solid-state imaging device according to the first embodiment of the present technology.

Fig. 10B is a process cross-sectional view after fig. 10A.

Fig. 10C is a process cross-sectional view after fig. 10B.

Fig. 10D is a process cross-sectional view after fig. 10C.

Fig. 10E is a process cross-sectional view after fig. 10D.

Fig. 10F is a process cross-sectional view after fig. 10E.

Fig. 11A is a schematic diagram showing a relationship of potential distribution of each component in the case where the first potential barrier is set high in the conventional solid-state image pickup device.

Fig. 11B is a graph showing the output of the photoelectric conversion portion with respect to the amount of incident light in the case where the first barrier fluctuation becomes larger in the setting of the first barrier in fig. 11A.

Fig. 11C is a schematic diagram showing a relationship of potential distribution of each component in the case where the first potential barrier is set low in the conventional solid-state image pickup device.

Fig. 11D is a graph showing the output of the photoelectric conversion portion with respect to the amount of incident light when the first potential barrier is provided in fig. 11C.

Fig. 12A is a schematic diagram showing a change in potential barrier and a movement of signal charge in the case where the first transfer transistor is turned on and off in the conventional solid-state image pickup device.

Fig. 12B is a schematic diagram showing the change of the potential barrier and the movement of the signal charge after fig. 12A.

Fig. 12C is a schematic diagram showing the change of the potential barrier and the movement of the signal charge after fig. 12B.

Fig. 13 is a process cross-sectional view showing another manufacturing method for a solid-state imaging device according to the first embodiment of the present technology.

Fig. 14A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the second embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 14B is a longitudinal sectional view showing a main portion of the sectional structure along the line A-A of fig. 14A.

Fig. 14C is a longitudinal sectional view showing a main portion of the sectional structure along the line B-B of fig. 14A.

Fig. 14D is a transverse sectional view showing a sectional structure along the line C-C of fig. 14B.

Fig. 15A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the third embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 15B is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line A-A of fig. 15A.

Fig. 15C is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line B-B of fig. 15A.

Fig. 15D is a transverse sectional view showing a sectional structure along the line C-C of fig. 15B.

Fig. 16A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the fourth embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 16B is a longitudinal sectional view showing a main portion of the sectional structure along the line A-A of fig. 16A.

Fig. 16C is a longitudinal sectional view showing a main portion of the sectional structure along the line B-B of fig. 16A.

Fig. 17A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the fifth embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 17B is a longitudinal sectional view showing a main portion of the sectional structure along the line B-B of fig. 17A.

Fig. 18A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the sixth embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 18B is a longitudinal sectional view showing a main portion of the sectional structure along the line B-B of fig. 18A.

Fig. 19A is a process cross-sectional view showing a method of manufacturing a solid-state imaging device according to a sixth embodiment of the present technology.

Fig. 19B is a process cross-sectional view after fig. 19A.

Fig. 20A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the seventh embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 20B is a longitudinal sectional view showing a main portion of the sectional structure along the line A-A of fig. 20A.

Fig. 20C is a longitudinal sectional view showing a main portion of the sectional structure along the line B-B of fig. 20A.

Fig. 21A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the eighth embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 21B is a longitudinal sectional view showing a main portion of the sectional structure along the line A-A of fig. 21A.

Fig. 21C is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line B-B of fig. 21A.

Fig. 22A is a process cross-sectional view showing a method of manufacturing a solid-state imaging device according to an eighth embodiment of the present technology.

Fig. 22B is a process cross-sectional view after fig. 22A.

Fig. 22C is a process cross-sectional view after fig. 22B.

Fig. 22D is a process cross-sectional view after fig. 22C.

Fig. 22E is a process cross-sectional view after fig. 22D.

Fig. 22F is a process cross-sectional view after fig. 22E.

Fig. 22G is a process cross-sectional view after fig. 22F.

Fig. 22H is a process cross-sectional view after fig. 22G.

Fig. 22I is a process cross-sectional view after fig. 22H.

Fig. 23 is a transverse cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the ninth embodiment of the present technology is viewed in a cross-section of a first plane.

Fig. 24A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the tenth embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 24B is a longitudinal cross-sectional view showing a part of the cross-sectional structure along the line E-E of fig. 24A.

Fig. 25A is a lateral cross-sectional view showing a relative relationship between respective components when a pixel of a solid-state image pickup device according to an eleventh embodiment of the present technology is viewed in a cross section of a first plane.

Fig. 25B is a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line B-B of fig. 25A.

Fig. 26 is an equivalent circuit diagram of a pixel of a solid-state image pickup device according to an eleventh embodiment of the present technology.

Fig. 27A is a lateral cross-sectional view showing the relative relationship between the respective components when the pixel of the solid-state image pickup device according to the twelfth embodiment of the present technology is viewed in a cross-section of a first plane.

Fig. 27B is a longitudinal sectional view showing a main portion of the sectional structure along the line F-F of fig. 27A.

Fig. 28 is an equivalent circuit diagram of a pixel of a solid-state image pickup device according to a twelfth embodiment of the present technology.

Fig. 29 is a longitudinal sectional view showing a main part of a section of a stacked structure of a solid-state imaging device according to a thirteenth embodiment of the present technology.

Fig. 30 is a longitudinal sectional view showing a main part of a section of a stacked structure of a solid-state image pickup device according to a fourteenth embodiment of the present technology.

Fig. 31 is a block diagram showing a configuration example of an image pickup apparatus mounted on an electronic device.

Fig. 32 is a block diagram showing an example of a schematic configuration of the vehicle control system.

Fig. 33 is an explanatory diagram showing an example of mounting positions of the outside-vehicle information detection unit and the image pickup section.

Fig. 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

Fig. 35 is a block diagram showing an example of the functional constitution of the camera head and the Camera Control Unit (CCU).

Detailed Description

Preferred embodiments for implementing the present technology will be described below with reference to the accompanying drawings. Meanwhile, the embodiments described below show examples of representative embodiments of the present technology, and the scope of the present technology should not be interpreted narrowly according to these embodiments.

In the following drawings, the same or similar components are denoted by the same or similar reference numerals. It should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio between layers, and the like are different from actual ones. Accordingly, the specific thickness and dimensions should be determined in consideration of the following description. Furthermore, it is needless to say that the drawings include portions having different dimensional relationships and ratios.

Further, the first to fourteenth embodiments described below each show examples of an apparatus and a method for realizing the technical idea of the present technology, and in the technical idea of the present technology, materials, shapes, structures, arrangements, and the like of components are not limited to those described below. Various modifications can be made to the technical idea of the present technology within the technical scope defined in the claims.

The following procedure will be described.

1. First embodiment

2. Second embodiment

3. Third embodiment

4. Fourth embodiment

5. Fifth embodiment

6. Sixth embodiment

7. Seventh embodiment

8. Eighth embodiment

9. Ninth embodiment

10. Tenth embodiment

11. Eleventh embodiment

12. Twelfth embodiment

13. Thirteenth embodiment

14. Fourteenth embodiment

15. Application example

1. Application examples of electronic devices

2. Application example of moving body

3. Application example of endoscopic surgical System

First embodiment

In this first embodiment, an example will be described in which the present technology is applied to a solid-state image pickup device that is a back-illuminated Complementary Metal Oxide Semiconductor (CMOS) image sensor.

General constitution of solid-state imaging device

First, the overall configuration of the solid-state image pickup device 1 will be described. As shown in fig. 1, a solid-state image pickup device 1 according to a first embodiment of the present technology mainly includes a semiconductor chip 2 having a rectangular two-dimensional planar shape in a plan view. That is, the solid-state imaging device 1 is mounted on the semiconductor chip 2. As shown in fig. 31, the solid-state image pickup device 1 captures image light (incident light 111) from an object via an optical system (optical lens) 102, converts the light quantity of the incident light 111 formed on an image pickup surface into an electric signal in units of pixels, and outputs the electric signal as a pixel signal.

As shown in fig. 1, the semiconductor chip 2 on which the solid-state image pickup device 1 is mounted includes a rectangular pixel region 2A provided at a central portion and a peripheral region 2B provided outside the pixel region 2A so as to surround the pixel region 2A in a two-dimensional plane including an X direction and a Y direction intersecting each other.

For example, the pixel region 2A is a light receiving surface that receives light condensed by the optical system 102 shown in fig. 31. Further, in the pixel region 2A, a plurality of pixels 3 are arranged in a matrix form on a two-dimensional plane including the X direction and the Y direction. In other words, the pixels 3 are repeatedly arranged in each of the X direction and the Y direction intersecting each other in the two-dimensional plane. Note that in this embodiment, as an example, the X direction and the Y direction are orthogonal to each other. The direction perpendicular to both the X direction and the Y direction is the Z direction (thickness direction).

As shown in fig. 1, a plurality of bonding pads 14 are provided in the peripheral region 2B. Each of the plurality of bonding pads 14 is arranged along one of four sides of a two-dimensional plane of the semiconductor chip 2, for example. Each of the plurality of bonding pads 14 is an input-output terminal used when the semiconductor chip 2 is electrically connected to an external device.

< logic Circuit >

As shown in fig. 2, the semiconductor chip 2 includes a logic circuit 13, and the logic circuit 13 includes a vertical driving circuit 4, a column signal processing circuit 5, a horizontal driving circuit 6, an output circuit 7, a control circuit 8, and the like. The logic circuit 13 includes, for example, a Complementary MOS (CMOS) circuit including an n-channel conductive Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and a p-channel conductive MOSFET as field effect transistors.

The vertical driving circuit 4 includes, for example, a shift register. The vertical driving circuit 4 sequentially selects a desired pixel driving line 10, supplies a pulse for driving the pixels 3 to the selected pixel driving line 10, and drives the pixels 3 row by row. That is, the vertical driving circuit 4 selectively scans the respective pixels 3 in the pixel region 2A in sequence in the vertical direction row by row, and supplies the pixel signals from the pixels 3 based on the signal charges generated by the photoelectric conversion elements of the respective pixels 3 according to the received light amounts to the column signal processing circuit 5 through the vertical signal lines 11.

The column signal processing circuit 5 is arranged on each column of the pixels 3, for example, and performs signal processing such as noise removal on signals output from the pixels 3 of one row for each pixel column. For example, the column signal processing circuit 5 performs signal processing such as Correlated Double Sampling (CDS) for removing pixel-specific fixed pattern noise and analog-to-digital (AD) conversion. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 5 to be connected to the horizontal signal line 12.

The horizontal driving circuit 6 includes, for example, a shift register. The horizontal driving circuit 6 sequentially outputs horizontal scanning pulses to the column signal processing circuits 5 to sequentially select each of the column signal processing circuits 5, and causes each of the column signal processing circuits 5 to output the signal-processed pixel signals to the horizontal signal lines 12.

The output circuit 7 performs signal processing on pixel signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal lines 12, and outputs the processed signals. As the signal processing, for example, buffering, black level adjustment, column change correction, various types of digital signal processing, and the like can be used.

The control circuit 8 generates a clock signal and a control signal serving as a reference for the operation of the vertical driving circuit 4, the column signal processing circuit 5, the horizontal driving circuit 6, and the like based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock signal. Then, the control circuit 8 outputs the generated clock signal and control signal to the vertical driving circuit 4, the column signal processing circuit 5, the horizontal driving circuit 6, and the like.

< Pixel >

As shown in fig. 3, each pixel 3 includes a photoelectric conversion unit 21. The photoelectric conversion unit 21 includes photoelectric conversion elements PD1 and PD2, charge accumulation regions (floating diffusion) FD1 and FD2 that accumulate (hold) signal charges photoelectrically converted by the photoelectric conversion elements PD1 and PD2, and transfer transistors TR1 and TR2 that transfer the signal charges photoelectrically converted by the photoelectric conversion elements PD1 and PD2 to the charge accumulation regions FD1 and FD2. Further, each of the plurality of pixels 3 includes a photoelectric conversion unit 21 and a readout circuit 15 electrically connected to the charge accumulation regions FD1 and FD2.

Each of the two photoelectric conversion elements PD1 and PD2 generates a signal charge corresponding to the amount of received light. The photoelectric conversion elements PD1 and PD2 also temporarily accumulate (hold) the generated signal charges. The photoelectric conversion element PD1 has a cathode side electrically connected to a source region of the transfer transistor TR1 and an anode side electrically connected to a reference potential line (e.g., ground). The photoelectric conversion element PD2 has a cathode side electrically connected to the source region of the transfer transistor TR2 and an anode side electrically connected to a reference potential line (e.g., ground). For example, photodiodes are used as the photoelectric conversion elements PD1 and PD2.

In the two transfer transistors TR1 and TR2, the drain region of the transfer transistor TR1 is electrically connected to the charge accumulating region FD1. The gate electrode of the transfer transistor TR1 is electrically connected to a transfer transistor drive line (refer to fig. 2) among the pixel drive lines 10. The drain region of the transfer transistor TR2 is electrically connected to the charge accumulating region FD2. The gate electrode of the transfer transistor TR is electrically connected to a transfer transistor drive line among the pixel drive lines 10.

The charge accumulation region FD1 of the two charge accumulation regions FD1 and FD2 temporarily accumulates and holds the signal charge transferred from the photoelectric conversion element PD1 via the transfer transistor TR 1. The charge accumulation region FD2 temporarily accumulates and holds the signal charge transferred from the photoelectric conversion element PD2 via the transfer transistor TR 2.

The readout circuit 15 reads the signal charges accumulated in the charge accumulation regions FD1 and FD2, and outputs a pixel signal based on the signal charges. Although not limited thereto, the readout circuit 15 includes, for example, an amplifying transistor AMP, a selection transistor SEL, and a reset transistor RST as pixel transistors. These transistors (AMP, SEL and RST) comprise, for example, a transistor having a silicon oxide film (SiO ₂ Film), a gate insulating film, a gate electrode, and a MOSFET serving as a pair of main electrode regions of a source region and a drain region. In addition, these transistors may be such that the gate insulating film is a silicon nitride film (Si ₃ N ₄ Film) or a stacked film of a silicon nitride film and a silicon oxide film.

The amplifying transistor AMP has a source region electrically connected to the drain region of the selection transistor SEL and a drain region electrically connected to the power supply line Vdd and the drain region of the reset transistor. Then, the gate of the amplifying transistor AMP is electrically connected to the charge accumulating regions FD1 and FD2 and the source region of the reset transistor RST.

The selection transistor SEL has a source region electrically connected to the vertical signal line 11 (VSL) and a drain electrically connected to the source region of the amplifying transistor AMP. Then, the gate electrode of the selection transistor SEL is electrically connected to a selection transistor drive line (refer to fig. 2) among the pixel drive lines 10.

The reset transistor RST has a source region electrically connected to the charge accumulation regions FD1 and FD2 and the gate electrode of the amplifying transistor AMP and a drain region electrically connected to the power supply line Vdd and the drain region of the amplifying transistor AMP. The gate of the reset transistor RST is electrically connected to a reset transistor drive line (refer to fig. 2) among the pixel drive lines 10.

An electronic apparatus including the solid-state image pickup device 1 reads signal charges from each of the two photoelectric conversion elements PD1 and PD2, and detects a phase difference thereof. In the case of focusing, there is no difference in the amounts of signal charges accumulated in the photoelectric conversion element PD1 and the photoelectric conversion element PD 2. On the other hand, in the case of defocus, for example, in the range between 0 and L1 in the light amount as shown in fig. 7, a difference occurs between the amount Q1 of the signal charge accumulated in the photoelectric conversion element PD1 and the amount Q2 of the signal charge accumulated in the photoelectric conversion element PD 2. In the case of defocus, the electronic apparatus performs an operation such as operating the objective lens to match the line of Q1 and the line of Q2 in a range of light amounts between 0 and L1, and matches the two lines. This is auto-focus.

Then, for example, if focusing is completed, the electronic apparatus generates an image using the added signal charges Q3 accumulated in the range of light amounts of 0 to L3 in fig. 7. Here, the added signal charge Q3 is the sum of Q1 and Q2 (q3=q1+q2).

Specific constitution of solid-state imaging device

Next, a specific configuration of the solid-state image pickup device 1 will be described with reference to fig. 4A, 4B, 5, and 6A to 6C.

< stacked Structure of solid-State imaging device >

As shown in fig. 5, the solid-state image pickup device 1 includes a semiconductor layer 20 having a first surface S1 and a second surface S2 located opposite to each other, a multilayer wiring layer 30 including an interlayer insulating film 31 and a wiring layer 32 provided in this order from the first surface S1 side of the semiconductor layer 20, and a support substrate 41. In addition, on the second surface S2 side of the semiconductor layer 20, the semiconductor chip 2 includes known members such as a color filter 42 and a microlens (on-chip lens) layer 43. Here, illustration of known members other than the color filter 42 and the microlens layer 43 is omitted. Further, the microlens layer 43 includes a plurality of microlenses 43a.

The semiconductor layer 20 includes, for example, a monocrystalline silicon substrate. Then, a p-type well region is provided in the semiconductor layer 20.

As shown in fig. 4A and 5, each of the color filters 42 and the microlenses 43a is provided for each pixel 3. The color filter 42 performs color separation of incident light that is incident from the light incident surface side of the semiconductor chip 2 and passes through the microlens 43 a. The microlens 43a condenses the irradiation light, and allows the condensed light to efficiently enter the pixel 3. Further, one color filter 42 and one microlens 43a are provided to cover both the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R, which will be described later.

Here, the first surface S1 of the semiconductor layer 20 is sometimes referred to as an element forming surface or a main surface, and the second surface S2 side is sometimes referred to as a light incident surface or a back surface. In the solid-state image pickup device 1 according to the first embodiment, light incident from the second surface (light incident surface, back surface) S2 side of the semiconductor layer 20 is photoelectrically converted by a first photoelectric conversion portion 23L and a second photoelectric conversion portion 23R provided in the semiconductor layer 20, which will be described later.

< active region >

As shown in fig. 4A, the semiconductor layer 20 has an island-shaped active region (element forming region) 20a defined by the cell isolation portion 22. The active region 20a is provided for each pixel 3. The semiconductor layer 20 includes a plurality of such cell spacers 22. In fig. 4A, a total of four pixels 3 repeatedly arranged in the X direction and the Y direction are shown, but the number of pixels 3 is not limited thereto.

< photoelectric conversion Unit >

As shown in fig. 4A, photoelectric conversion units 21 are provided in the respective active regions 20a provided for the respective pixels 3. That is, the semiconductor layer 20 includes a plurality of photoelectric conversion units 21 provided for the respective pixels 3. Further, the adjacent photoelectric conversion units 21 are isolated from each other by the unit isolation portions 22 provided in the semiconductor layer 20. Further, since the plurality of pixels 3 are arranged in a matrix form, one photoelectric conversion unit 21 is surrounded by the unit isolation portion 22.

Each photoelectric conversion unit 21 includes a first photoelectric conversion portion 23L (photoelectric conversion element PD 1), a second photoelectric conversion portion 23R (photoelectric conversion element PD 2), an isolation portion 50, a first transfer transistor 24L, a second transfer transistor 24R, a first charge accumulation region (FD 1) 25L, and a second charge accumulation region (FD 2) 25R provided in the active region 20 a.

(photoelectric conversion portion)

Each of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R photoelectrically converts light incident from the second surface (light incident surface, back surface) S2 side of the semiconductor layer 20 to generate signal charges. In addition, each of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R also serves as a charge accumulation region that temporarily accumulates the generated signal charge. The first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R are arranged in the first direction of the photoelectric conversion unit 21. Here, the first direction is described as the X direction, but may be a direction other than the X direction as long as it is a direction perpendicular to the thickness direction. In addition, each of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R includes a semiconductor region of the second conductivity type (for example, n-type).

(pass transistor)

The first transfer transistor 24L shown in fig. 4A, fig. 5, and the like corresponds to the transfer transistor TR1 of fig. 3. As shown in fig. 4A and 5, the first transfer transistor 24L is provided on the first surface S1 side of the semiconductor layer 20, and is, for example, an n-channel MOSFET. The first transfer transistor 24L is provided to form a channel in an active region between the first photoelectric conversion portion 23L and the first charge accumulation region 25L, and includes a gate insulating film (not shown) and a transfer gate electrode TRG1 stacked in order on the first surface S1. The first transfer transistor 24L may transfer or not transfer signal charges from the first photoelectric conversion portion 23L serving as a source region to the first charge accumulation region 25L serving as a drain region by being turned on and off according to a voltage between the gate and the source. Here, explanation will be given assuming that the signal charge is transferred when the first transfer transistor 24L is turned on, and that the signal charge is not transferred when the first transfer transistor 24L is turned off.

As shown in fig. 4B, when the first transfer transistor 24L is turned off, that is, when the signal charge is not transferred from the first photoelectric conversion portion 23L to the first charge accumulation region 25L, a second potential barrier P2 higher than a first potential barrier P1 to be described later may be formed. If the first transfer transistor 24L is turned on, the second potential barrier P2 is lowered by modulation, and the signal charge flows from the first photoelectric conversion portion 23L to the first charge accumulation region 25L.

The second transfer transistor 24R shown in fig. 4A, fig. 5, and the like corresponds to the transfer transistor TR2 of fig. 3. As shown in fig. 4A and 5, the second transfer transistor 24R is provided on the first surface S1 side of the semiconductor layer 20, and is, for example, an n-channel MOSFET. The second transfer transistor 24R is provided to form a channel in an active region between the second photoelectric conversion portion 23R and the second charge accumulation region 25R, and includes a gate insulating film (not shown) and a transfer gate electrode TRG2 stacked in order on the first surface S1. The second transfer transistor 24R may transfer or not transfer signal charges from the second photoelectric conversion portion 23R serving as a source region to the second charge accumulation region 25R serving as a drain region by being turned on and off according to a voltage between the gate and the source. Here, explanation will be given assuming that the signal charge is transferred when the second transfer transistor 24R is turned on, and that the signal charge is not transferred when the second transfer transistor 24R is turned off.

As shown in fig. 4B, when the second transfer transistor 24R is turned off, that is, when the signal charge is not transferred from the second photoelectric conversion portion 23R to the second charge accumulation region 25R, a second potential barrier P2 higher than a first potential barrier P1 to be described later may be formed. If the second transfer transistor 24R is turned on, the second potential barrier P2 is lowered by modulation, and the signal charge flows from the second photoelectric conversion portion 23R to the second charge accumulation region 25R.

(Charge accumulation region)

The first charge accumulation region 25L is a charge accumulation region provided closer to the first surface S1 side of the semiconductor layer 20, and temporarily accumulates the signal charges transferred from the first photoelectric conversion portion 23L. The first charge accumulation region 25L is a floating diffusion region of a second conductivity type (for example, n-type). The second charge accumulation region 25R is a charge accumulation region provided closer to the first surface S1 side of the semiconductor layer 20, and temporarily accumulates the signal charges transferred from the second photoelectric conversion portion 23R. The second charge accumulation region 25R is a floating diffusion region of a second conductivity type (for example, n-type).

(isolation part)

As shown in fig. 6A, 6B, and 6C, the isolation portion 50 is an in-pixel cell isolation portion that is provided between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R, and isolates the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R from each other. As shown in fig. 4B, the isolation portion 50 may form a first potential barrier P1 lower than the above-described second potential barrier P2. Since the first potential barrier P1 is formed between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R through the isolation portion 50, each of the first photoelectric conversion portion 23L and the first photoelectric conversion member 23R can independently accumulate signal charges up to the height of the first potential barrier P1. Then, if the amount of the accumulated signal charges exceeds the height of the first potential barrier P1, the signal charges flow from one of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R to the other via an overflow path provided between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. The height of the first potential barrier P1 is controlled by the concentration of the impurity.

As shown in fig. 6B, the isolation portion 50 includes a first region 51, the first region 51 being formed of an insulating material and extending from the first surface S1 side in the thickness direction of the semiconductor layer 20; and a second region 52, the second region 52 being provided on the second face S2 side of the first region 51 in the thickness direction and formed of a semiconductor region in which impurities exhibiting the first conductivity type are implanted. As shown in fig. 6A, the spacer 50 further includes a third region 53, and in a plan view, the third region 53 protrudes in a protruding shape from the unit spacer 22 disposed in the X direction toward the first region 51 and the second region 52 and is formed of a semiconductor region in which impurities exhibiting the first conductivity type are implanted. In the region other than the second portion 522 serving as the overflow path of the isolation portion 50, which will be described later, it is preferable to suppress movement of the signal charge between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23 as much as possible.

As shown in fig. 6B, the semiconductor layer 20 is provided with a groove 26 extending from the first surface S1 in the thickness direction of the semiconductor layer 20. The first region 51 is formed of an insulating material embedded (provided) in the groove 26 of the semiconductor layer 20, and serves as an insulator isolation region that suppresses movement of signal charges between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. The first region 51 is a Shallow Trench Isolation (STI) disposed in the semiconductor layer 20. The insulating material is, for example, silicon oxide (SiO) ₂ )。

As shown in fig. 6B, the groove 26 has a size of 26X in the X direction, a size of 26Z in the Z direction (thickness direction of the semiconductor layer 20), and a size of 26Y in the Y direction as shown in fig. 6C. The dimension 26Z of the recess 26 in the Z direction is smaller than the dimension of the semiconductor layer 20 in the thickness direction. More specifically, as shown in fig. 6B, the dimension 26Z of the groove 26 in the Z direction is smaller than the dimension of the semiconductor layer 20 of each of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R in the thickness direction. The dimensions of the portion of the first region 51 embedded in the semiconductor layer 20 in the X direction, the Y direction, and the Z direction are substantially the same as the dimensions of the groove 26.

As shown in fig. 6B, the second region 52 is formed of, for example, a semiconductor region in which a p-type impurity is implanted as an impurity, wherein the semiconductor region exhibits the first conductivity type. The second region 52 includes a first portion 521 and a second portion 522, where the concentration of the p-type impurity (impurity exhibiting the first conductivity type) in the first portion 521 is a first concentration, and the concentration of the p-type impurity (impurity exhibiting the first conductivity type) in the second portion 522 is a second concentration lower than the first concentration. As shown in fig. 6B, in the second portion 522, one end 522L in the X direction, which is the arrangement direction of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R, is electrically conductive with the first photoelectric conversion portion 23L And the other end 522R in the X direction is in conductive contact with the second photoelectric conversion portion 23R. Then, when the signal charge moves between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R, the second portion 522 functions as an overflow path (channel) through which the signal charge passes. The second concentration as the concentration of the p-type impurity in the second portion 522 is, for example, 1e15cm ^-3 To 1e17cm ^-3 。

The first portion 521 serves as an impurity isolation region that suppresses movement of signal charges between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. That is, the first concentration, which is the concentration of the p-type impurity in the first portion 521, is set higher than the second degree so as to suppress movement of the signal charge. Then, in the thickness direction of the semiconductor layer 20, the second portion 522 is provided on the second surface S2 side of the first region 51, and the first portion 521 is provided on the second surface S2 side of the second portion 522. More specifically, the second portion 522 is in contact with the first region 51 in the thickness direction of the semiconductor layer 20. In other words, in the thickness direction of the semiconductor layer 20, the second portion 522 is provided on the second surface S2 side of the groove 26 in which the first region 51 is provided. More specifically, the second portion 522 is in contact with the bottom 26a of the groove 26 provided with the first region 51.

The second portion 522 is provided at a position distant from the first surface S1 in the thickness direction of the semiconductor layer 20. More specifically, the second portion 522 is provided at a position distant from the transfer gate electrodes TRG1 and TRG2 (i.e., the first transfer transistor 24L and the second transfer transistor 24R) in the thickness direction of the semiconductor layer 20. More specifically, the second portion 522 is provided on the light incident surface side with respect to the center in the thickness direction of the semiconductor layer 20. The distance between the second portion 522 and the first face S1 (transfer gate electrodes TRG1 and TRG 2) is equal to the dimension 26Z of the groove 26 in the Z direction in the thickness direction of the semiconductor layer 20.

In the second portion 522, the boundary of the adjacent semiconductor regions (e.g., the first portion 521 and the third region 53) is clear, that is, the variation in impurity concentration at the boundary is clear. In addition, since the first region 51 is formed of an insulating material, the boundary between the second portion 522 and the first region 51 is also clear. Therefore, the second portion 522 is provided at a position designed in the X direction, the Y direction, and the Z direction with high accuracy. As will be described in detail later in the manufacturing method, after the groove 26 is formed in the semiconductor layer 20, the second portion 522 is formed by implanting impurities into the bottom 26a of the groove 26 in a state where nothing is embedded in the groove 26. Therefore, since the second portion 522 is provided at a shallower position with respect to the bottom portion 26a, the second portion 522 with a clear boundary of the density distribution can be provided as compared with the case where the second portion 522 is provided at a deeper position from the surface. Further, by manufacturing in this way, the distance between the second portion 522 and the first face S1 (transfer gate electrodes TRG1 and TRG 2) can be made equal to the dimension 26Z of the groove 26 in the Z direction. Therefore, the position of the second portion 522 in the thickness direction of the semiconductor layer 20 can be determined at a position corresponding to the dimension 26Z of the groove 26 in the Z direction. In addition, the dimension of the second portion 522 in the X direction may be formed to correspond to the dimension 26X of the groove 26 in the X direction, and the dimension of the second portion 522 in the Y direction may be formed to correspond to the dimension 26Y of the groove 26 in the Y direction. Therefore, the variation of the second portion 522 (variation of the position, the size, and the definition of the boundary with the adjacent semiconductor region) is small.

Two third regions 53 protruding from the cell isolation portion 22 in the X direction are provided for one photoelectric conversion cell 21. Two unit spacers 22 in the X direction are provided for one photoelectric conversion unit 21 so as to face each other. The third region 53 protrudes in a protruding shape from each unit spacer 22 in the X direction toward the first region 51 and the second region 52.

The third region 53 is formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, and serves as an impurity isolation region that suppresses movement of signal charges between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. The third region 53 is formed of, for example, a semiconductor region in which a p-type impurity is implanted as an impurity exhibiting the first conductivity type. The impurity concentration of the third region 53 is, for example, a first concentration identical to the impurity concentration of the first portion 521. Further, as shown in fig. 6C, the third region 53 is provided integrally with the second region 52 (the first portion 521) and the unit isolation portion 22.

(cell isolation portion)

As shown in fig. 4A, the cell isolation portion 22 is provided between two adjacent photoelectric conversion cells 21, and isolates the two adjacent photoelectric conversion cells 21 from each other. The cell isolation portion 22 is provided between two photoelectric conversion units 21 adjacent in the X direction and between two photoelectric conversion units 21 adjacent in the Y direction.

The cell isolation portion 22 is formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, and serves as an impurity isolation region that suppresses movement of signal charges between two adjacent photoelectric conversion units 21. The cell isolation portion 22 is formed of, for example, a semiconductor region in which a p-type impurity is implanted as an impurity exhibiting the first conductivity type. The cell isolation portion 22 may form a third potential barrier higher than the above-described first potential barrier P1 and second potential barrier P2. Since the third potential barrier is formed between two adjacent photoelectric conversion units 21 by the unit isolation portion 22, the signal charges accumulated in the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R can be prevented from leaking to the adjacent photoelectric conversion units 21.

< readout Circuit >

In each active region 20a (fig. 4A) provided for each pixel 3, a reset transistor RST, an amplifying transistor AMP, and a selection transistor SEL of the readout circuit 15 are provided. Note that in the drawings other than fig. 3, illustrations of the reset transistor RST, the selection transistor SEL, and the amplifying transistor AMP are omitted.

(reset transistor)

The reset transistor RST is, for example, an n-channel MOSFET. The reset transistor RST includes a gate insulating film and a reset gate electrode (not shown) stacked in this order on the first surface S1. The reset transistor RST is turned on and off according to a voltage between the gate and the source. Then, if the reset transistor RST is turned on, the potentials of the first charge accumulation region 25L (FD 1) and the second charge accumulation region 25R (FD 2) are reset to a predetermined potential.

(selection transistor)

The selection transistor SEL is, for example, an n-channel MOSFET. The selection transistor SEL includes a gate insulating film and a selection gate electrode (not shown) stacked in this order on the first surface S1. The selection transistor SEL is turned on and off according to a voltage between the gate and the source. Then, the pixel signal is output from the readout circuit 15 at the timing when the selection transistor SEL is turned on.

(amplifying transistor)

The amplifying transistor AMP is, for example, an n-channel MOSFET. The amplifying transistor AMP includes a gate insulating film and an amplifying gate electrode (not shown) stacked in this order on the first surface S1. The amplifying transistor AMP amplifies the potential of the first charge accumulation region 25L and/or the second charge accumulation region 25R if the selection transistor SEL is on.

Operation of solid-state imaging device

Hereinafter, the operation of the solid-state image pickup device 1 according to the first embodiment of the present technology will be described with reference to the drawings. If light enters the solid-state image pickup device 1, the light passes through the microlens 43a, the color filter 42, and the like, and enters the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23. Then, an output Q1 is obtained from the first photoelectric conversion portion 23L and an output Q2 is obtained from the second photoelectric conversion portion 23R according to the amount of incident light. Then, autofocus is performed based on the outputs Q1 and Q2, and an image is generated based on the addition signal Q3 (q3=q1+q2) that is the sum of Q1 and Q2. In fig. 7, the horizontal axis represents the amount of incident light, and the vertical axis represents the output of the photoelectric conversion portion. Fig. 7 shows an output Q1 of the first photoelectric conversion portion 23L, an output Q2 of the second photoelectric conversion portion 23R, and an addition signal Q3 (q3=q1+q2) that is the sum of Q1 and Q2. In addition, a region of light quantity from 0 to L1 is referred to as a first range, a region of light quantity from L1 to L2 is referred to as a second range, a region of light quantity from L2 to L3 is referred to as a third range, and a region of light quantity from L3 is referred to as a fourth range. In addition, fig. 7 shows an example in which the first photoelectric conversion portion 23L is saturated before the second photoelectric conversion portion 23R.

In the first range shown in fig. 7, no overflow occurs between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. This is a state as shown in fig. 8A, and the signal charge generated by the first photoelectric conversion portion 23L and the signal charge generated by the second photoelectric conversion portion 23R are not mixed. Phase difference detection for auto-focusing is performed in the first range. More specifically, the phase difference detection is performed in a first range in which both the output Q1 of the first photoelectric conversion portion 23L and the output Q2 of the second photoelectric conversion portion 23 remain linear with respect to the light amount.

In the second range shown in fig. 7, the first photoelectric conversion portion 23L is saturated before the second photoelectric conversion portion 23R, and a part of the signal charge of the first photoelectric conversion portion 23L flows to the second photoelectric conversion portion 23R beyond the first potential barrier P1 of the isolation portion 50. This is an overflow (fig. 8B). The phase difference detection cannot be performed in the second range and subsequent ranges.

In the third range shown in fig. 7, the second photoelectric conversion portion 23R is also saturated. This is a state as shown in fig. 8C, and the signal charges are accumulated beyond the first potential barrier P1 of the isolation portion 50 without distinguishing the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R. Then, until the charges overflow beyond the second potential barrier P2 to the first charge accumulation region 25L and the second charge accumulation region 25, the outputs of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23 increase.

In the fourth range shown in fig. 7, the signal charges overflow into the first charge accumulation region 25L and the second charge accumulation region 25R beyond the second potential barrier P2 of the first transfer transistor 24L and the second transfer transistor 24R (fig. 8D). The overflowed signal charges are erased by the reset transistor RST.

Image formation is performed using the addition signal Q3 from the first range to the third range. More specifically, image formation is performed in the first to third ranges in which linearity of the addition signal Q3 with respect to the amount of light is maintained.

Then, since the variation of the second portion 522 is small, the variation of the height of the first potential barrier P1 is also small. Therefore, even in the case where the first potential barrier P1 is designed to be high, the occurrence of the pixel 3 in which the first potential barrier P1 exceeds the second potential barrier P2 due to manufacturing variations can be suppressed. Therefore, the occurrence of the pixel 3 of linear degradation of the addition signal Q3 with respect to the light amount can be suppressed. Further, since the first potential barrier P1 can be designed to be high, narrowing of the signal range in which phase difference detection can be performed can be suppressed. Note that setting high means that the first potential barrier P1 is lower than the second potential barrier P2, but the width of the drop from the second potential barrier P2 is relatively small.

In addition, the second portion 522 of the isolation portion 50 is provided at a position distant from the first surface S1 in the thickness direction of the semiconductor layer 20. Therefore, as described in patent document 2, even in the case where the first transfer transistor 24L or the second transfer transistor 24R is turned on, the second portion 522 is less affected by modulation of the first transfer transistor 24L and the second transfer transistor 24R than the P-type semiconductor region 306 serving as a potential barrier.

A case will be considered in which the first transfer transistor 24L is turned on in a state in which signal charges are accumulated in the first charge accumulation region 25L and the second charge accumulation region 25R shown in fig. 9A. As shown in fig. 9B, if the first transfer transistor 24L is turned on, the second potential barrier P2 of the first transfer transistor 24L is lowered, and the signal charge accumulated in the first photoelectric conversion portion 23L is transferred to the first charge accumulation region 25L. However, the second portion 522 of the isolation portion 50 is less affected by the modulation of the first pass transistor 24L. Therefore, the height of the first potential barrier P1 is also less affected by the modulation of the first transfer transistor 24L. Then, as shown in fig. 9C, the first transfer transistor 24L is turned off again. Since the height of the first potential barrier P1 is less affected by the modulation, even if the amount of signal charges accumulated in the second charge accumulation region 25R changes before and after a series of operations, the amount of change is small. Therefore, a decrease in the accuracy of phase difference detection can be suppressed. Further, since the first potential barrier P1 is less affected by modulation, the height of the potential barrier can be used in a state close to design, and narrowing of the signal range in which phase difference detection can be performed can be suppressed.

Method for manufacturing solid-state imaging device

Next, a method of manufacturing the solid-state image pickup device 1 according to the first embodiment of the present technology will be described with reference to fig. 10A to 10F. In the first embodiment, the manufacturing steps of the first photoelectric conversion portion 23L, the second photoelectric conversion portion 23R, the isolation portion 50, and the unit isolation portion 22 included in the manufacturing steps of the solid-state image pickup device 1 will be mainly described. Then, the manufacturing method of other components of the solid-state imaging device 1 is omitted.

First, as shown in fig. 10A, a silicon oxide film (SiO) is formed on the first surface S1 side of the semiconductor layer 20 having the first surface S1 and the second surface S2 located on the opposite side ₂ Film) 60. Then, as shown in fig. 10B, the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R are formed in the semiconductor layer 20 at regular intervals. The first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R are formed by injecting n-type impurities at intervals in the X direction. Then, the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23 are formed for each pixel 3.

Next, as shown in fig. 10C, impurities are injected into the semiconductor layer 20 between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R and a portion of the semiconductor layer 20 that serves as a boundary region between the photoelectric conversion units 21 (adjacent photoelectric conversion units 21) including a set of the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R to form first impurity regions 61 and 62 whose impurity concentration is the first concentration. More specifically, for example, p-type impurities are implanted into the above-described region of the semiconductor layer 20 to form first impurity regions 61 and 62 whose concentration of the p-type impurities is a first concentration. A depth 61z of the first impurity region 61 formed between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R in the z direction may be at least a bottom 26a of the groove 26 formed in the next step capable of being in contact with the first impurity region 61. In addition, the first impurity region 62 is formed in a portion serving as a boundary region between the photoelectric conversion units 21.

Then, as shown in fig. 10D, a groove 26 is formed in the semiconductor layer 20. More specifically, in the semiconductor layer 20 between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R, a groove 26 is formed in the thickness direction of the semiconductor layer 20 from the first surface S1 side. At this time, the groove 26 is formed so as to overlap the first impurity region 61 between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R in the thickness direction of the semiconductor layer 20. Then, the bottom 26a of the groove 26 reaches the first impurity region 61. Therefore, the portion of the semiconductor layer 20 in contact with the bottom portion 26a is the first impurity region 61, and the concentration of the p-type impurity is the first concentration.

The recess 26 is formed using a dry etching process, and for example, a silicon nitride film is used(Si ₃ N ₄ Film) 63 as a hard mask 63 for etching. The dimensions of the recess 26 in the X-direction and the Y-direction need only be determined according to the design of the second portion 522. In addition, the size of the groove 26 in the Z direction only needs to be determined according to the design how far the second portion 522 is separated from the transfer gate electrodes TRG1 and TRG2 in the Z direction.

Next, as shown in fig. 10E, impurities are selectively implanted into the bottom portion 26a of the groove 26 from the first surface S1 side, and a second impurity region 64 (second portion 522) having a second concentration lower than the first concentration of impurities is selectively formed in the semiconductor layer 20 adjacent to the bottom portion 26 a. This selective impurity implantation is achieved by implanting impurities in the presence of the hard mask 63 used to form the recess 26. That is, in this step, the hard mask 63 for forming the recess 26 is also reused, and impurities are selectively implanted. In addition, the recess 26 itself is provided to form the STI, but the recess 26 is used to form the second portion 522 prior to the step of embedding the insulating material in the recess 26. In this way, the second portion 522 is formed by using self-alignment of the step for forming the STI (first region 51).

In addition, in order to set the concentration of the p-type impurity in the second portion 522 to the second concentration, the n-type impurity is implanted into the first impurity region 61 of the portion 64 in contact with the bottom portion 26 a. Thus, the concentration of the p-type impurity is diluted from the first concentration to the second concentration. The second portion 522 is provided in a region shallow in the thickness direction as viewed from the bottom portion 26 a. Thus, the implantation energy for impurity implantation can be kept low.

Further, after this step, the first impurity region 61 which holds the impurity concentration of the first concentration becomes the first portion 521 and the third region 53 which are not illustrated in fig. 10E, and serves as an impurity isolation region. Further, the first impurity region 62 which maintains the impurity concentration of the first concentration becomes the unit isolation portion 22, and serves as an impurity isolation region.

Then, as shown in fig. 10F, the first region 51 is formed by embedding an insulating material such as silicon oxide in the groove 26. Then, the hard mask 63 is removed. Then, by performing necessary known manufacturing steps, the solid-state image pickup device 1 shown in fig. 5 is almost completed.

Principal effects of the first embodiment >

Here, first, a conventional spacer 50' will be considered. As described in patent document 2, the conventional isolation portion 50' is, for example, a P-type semiconductor region 306 serving as a potential barrier. In the case where the potential barrier (first potential barrier P1) of the conventional isolation portion 50' is made lower than the potential barrier (second potential barrier P2) of the transfer transistor, it is important to set the height of the first potential barrier P1. The height setting of the first potential barrier P1 will be described below with reference to fig. 11A to 11D.

The first potential barrier P1 shown by the solid line in fig. 11A is set high. In this case, although the signal range (first range) capable of performing phase difference detection shown in fig. 11B can be widened, there is a possibility that the pixel 3 that cannot maintain linearity of the addition signal Q3 with respect to the light amount occurs due to manufacturing variations. More specifically, in the conventional manufacturing method, depending on the pixel 3 due to the manufacturing variation, the first potential barrier P1 of fig. 11A may rise to a position shown by a broken line and exceed the second potential barrier P2. In such a pixel 3, as shown in fig. 11B, the linearity of the addition signal Q3 with respect to the amount of light cannot be maintained. Therefore, in designing the height of the first potential barrier P1, it is necessary to provide a difference from the height of the second potential barrier P2 to some extent in consideration of process variations.

Further, the pixels 3 that perform phase difference detection are disposed on the entire pixel region 2A. Therefore, in all of the plurality of pixels 3 provided in the pixel region 2A, it is necessary to obtain a phase difference for auto-focusing, and further obtain an addition signal Q3 for image creation.

Although it is desirable to widen the signal range in which phase difference detection can be performed by designing the first potential barrier P1 high, there is a possibility that linear deterioration of the addition signal Q3 with respect to the light amount will occur in at least one of the pixel region 2A, the wafer surface, and the wafer due to manufacturing variations. Therefore, it is necessary to design the first potential barrier P1 to be low to some extent to prevent the occurrence of the pixel 3 in which the addition signal Q3 is linearly deteriorated with respect to the light amount. However, as a result, as described below, the signal range in which phase difference detection can be performed becomes narrow.

The conventional first potential barrier P1 shown in fig. 11C is designed to be sufficiently low. In this case, even if the height of the first potential barrier P1 fluctuates due to manufacturing variations, the height does not exceed the height of the second potential barrier P2. Therefore, as shown in fig. 11D, narrowing of the range in which the addition signal Q3 that is linear with respect to the light amount can be obtained in each pixel 3 can be suppressed. On the other hand, however, the signal range (first range) in which phase difference detection can be performed is narrowed. Comparing fig. 11B with fig. 11D, it can be seen that by designing the first potential barrier P1 to be low, the signal range (first range) in which phase difference detection can be performed becomes narrow.

In the solid-state imaging device 1 according to the first embodiment, the variation of the second portion 522 of the partition 50 is small. Therefore, even in the case where the first potential barrier P1 is designed to be high, the occurrence of the pixel 3 in which the addition signal Q3 is linearly deteriorated with respect to the light amount can be suppressed. Further, since the first potential barrier P1 can be designed to be high, narrowing of the signal range in which phase difference detection can be performed can be suppressed.

Further, in the manufacturing method of the solid-state image pickup device 1 according to the first embodiment, since the second portion 522 is formed in a self-aligned manner (i.e., by using the step for forming the first region 51), it is possible to reduce the variation of the second portion 522a and also reduce the variation of the first potential barrier P1. More specifically, in the first embodiment, impurities are implanted into the bottom 26a of the groove 26 using the groove 26 and the hard mask 63 for forming the groove 26. Since the formation accuracy of the groove 26 is higher than that of normal impurity implantation, the second portion 522 can be formed with high accuracy. In addition, since the groove 26 is used to implant impurities, the second portion 522 can be formed at a position shallower than the bottom 26a of the groove 26. Therefore, compared with the case where impurities are implanted into the deep position of the semiconductor layer 20 in a state where the grooves 26 are not provided, the implantation energy can be kept low. Further, since impurities can be implanted more accurately, the impurity concentration, formation position, and range of the second portion 522 can be controlled stably. Therefore, the variation of the first potential barrier P1 of the plurality of pixels 3 can be suppressed.

In addition, the P-type semiconductor region 306 described in patent document 2 extends from the element formation surface along the photoelectric conversion portion in the thickness direction. For example, if the pixel is miniaturized, the first and second transfer transistors 24L and 24R are close to the isolation portion 50 'on the element forming face, i.e., the distance between the first and second transfer transistors 24 and 24R and the isolation portion 50' is reduced. Then, when the first transfer transistor 24L and the second transfer transistor 24R are turned on and off, there is a possibility that the height of the first potential barrier P1 of the isolation portion 50' varies due to the influence of modulation. Next, a case where the first potential barrier P1 of the conventional isolation portion 50' is affected by modulation of the first transfer transistor 24L and the second transfer transistor 24R will be described with reference to fig. 9A and 12A to 12C.

If the first transfer transistor 24L is turned on from the state of fig. 9A, the second potential barrier P2 corresponding to the first transfer transistor 24L is lowered, and the signal charge accumulated in the first photoelectric conversion portion 23L flows to the first charge accumulation region 25L. The first potential barrier P1 of the isolation portion 50' is also affected by the modulation of the first transfer transistor 24L, and the height of the potential barrier is reduced, as indicated by the arrow in fig. 12A. As shown in fig. 12B, since the first potential barrier P1 is lowered, some of the signal charges accumulated in the second photoelectric conversion portion 23R exceed the first potential barrier P1 and flow to the first charge accumulating region 25L. Then, the first transfer transistor 24L is turned off, and the first potential barrier P1 and the second potential barrier P2 return to the original heights (heights shown in fig. 9A). However, since some of the signal charges have flowed out, as indicated by the arrow in fig. 12C, the amount of signal charges accumulated in the second photoelectric conversion portion 23R decreases.

In this way, in the conventional isolation portion 50', the signal charge accumulated in the first photoelectric conversion portion 23L and the signal charge accumulated in the second photoelectric conversion portion 23R are mixed, and the accuracy of phase difference detection may be lowered, or phase difference detection may be infeasible. The amount of signal charge reliably not exceeding the first potential barrier P1 is the amount after the decrease shown in fig. 12C. This is an amount smaller than the maximum amount by which the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23 can be individually accumulated. Since the first potential barrier P1 is thus affected by the modulation of the transfer transistor, a signal range (light amount range) in which phase difference detection can be performed becomes narrow.

On the other hand, the partition 50 included in the solid-state image pickup device 1 according to the first embodiment includes a first region 51 formed of an insulating material extending from the first surface S1 side in the thickness direction of the semiconductor layer 20, and a second portion 522 provided on the second surface S2 side of the first region 51 and serving as an overflow path.

With the above-described configuration, the second portion 522 can be separated from the transfer gate electrodes TRG1 and TRG2 in the thickness direction of the semiconductor layer 20. In particular, in the case of the miniaturized pixel 3, the size of the pixel in the X-Y plane becomes small, and thus it may be difficult to provide the second portion 522 and the transfer gate electrodes TRG1 and TRG2 separated from each other in the direction along the X-Y plane. In the first embodiment, since both can be provided apart from each other in the thickness direction of the semiconductor layer 20, the distance between them can be increased. Therefore, the first potential barrier P1 of the isolation portion 50 is less affected by the modulation of the first transfer transistor 24L and the second transfer transistor 24R. Therefore, a decrease in the accuracy of phase difference detection can be suppressed. Further, since the first potential barrier P1 is less affected by modulation, the height of the potential barrier can be used in a state close to design, and narrowing of the signal range in which phase difference detection can be performed can be suppressed.

Here, in general, the height of the potential barrier is controlled by the concentration of the impurity. Therefore, it is necessary to control the impurity concentration in the overflow path. However, in the conventional method, since impurities are injected from the surface (the first surface S1 or the second surface S2) of the semiconductor layer 20, it is particularly difficult to precisely form an overflow path at a position deeper from the surface of the semiconductor layer 20 in the thickness direction. In order to implant impurities at deep positions in the thickness direction, it is necessary to increase the implantation energy. Therefore, it is necessary to increase the thickness of the resist provided for selective implantation. If a thick resist is provided, the variation in the line width of the resist increases, or the resist cross-sectional shape is tapered. Due to such characteristics of the thick resist, there is a possibility that the amount of impurities injected into the overflow path may vary, and the position and range in which the overflow path is formed may also vary.

In the manufacturing method of the solid-state imaging device 1 according to the first embodiment, in order to provide the second portion 522 of the isolation portion 50 at the deep position of the semiconductor layer 20, first, the groove 26 is formed, impurities are implanted using the groove 26 to form the second portion 522, and then, an insulating material is embedded in the groove 26 to form the first region 51. Therefore, the second portion 522 can be formed accurately at a deep position in the thickness direction of the semiconductor layer 20. This is because, since the second portion 522 is formed at a shallower position as viewed from the bottom 26a of the groove 26, the implantation energy can be kept low, and furthermore, it is not necessary to provide a thick resist layer, so that the impurity concentration is less likely to vary. Further, since the formation accuracy of the groove 26 is higher than the accuracy of impurity implantation, the size of the groove 26 in the Z direction and the size of the groove 26 (bottom 26 a) in the X direction and the Y direction can be accurately controlled, and the second portion 522 can be accurately formed at a position corresponding to the groove 26 (bottom 26 a). Therefore, even at a deep position in the thickness direction of the semiconductor layer 20, the second portion 522 having a small variation in the first potential barrier P1 can be formed.

Note that in the first embodiment, when the impurity is implanted to form the second portion 522, as shown in fig. 10E, the n-type impurity is implanted into the p-type first impurity region 61, and the concentration of the p-type impurity in the first impurity region is relatively diluted from the first concentration to the second concentration, but the disclosure is not limited thereto. For example, as shown in fig. 13, the first impurity region 61 may be formed to have a small depth 61Z in the Z direction, and a p-type impurity may be implanted into the semiconductor layer 20 between the first impurity region 61 and the groove 26 to form a second portion 522 having an impurity concentration of a second concentration. In this manner, the second portion 522 may be formed by a variety of methods. Note that in the case of the manufacturing method shown in fig. 10D and the like, the second concentration (concentration of p-type impurity) is a net impurity concentration obtained by subtracting the n-type impurity concentration from the p-type impurity concentration. Even if the second portion 522 is formed by a different manufacturing method, for example, the manufacturing method shown in fig. 13, the second concentration is the same. That is, the impurity concentrations such as the first concentration and the second concentration here are concentrations of holes and electrons in consideration of the mutual offset. In addition, in any manufacturing method, the function of the second portion 522 as the overflow path is the same.

Second embodiment

A second embodiment of the present technology shown in fig. 14A to 14D will be described below. The solid-state image pickup device 1 according to the second embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that a part of the unit isolation portion 22 is formed of an insulating material, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< cell isolation portion >

The solid-state image pickup device 1 includes a unit isolation section 22A instead of the unit isolation section 22. The cell isolation portion 22A is formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, and includes a cell isolation portion 22A1 and a cell isolation portion 22A2, the cell isolation portion 22A1 being a portion serving as an impurity isolation region that suppresses movement of signal charges, the cell isolation portion 22A2 being a portion formed of an insulating material. In the thickness direction of the semiconductor layer 20, the cell isolation portion 22A has a cell isolation portion 22A1 closer to the first surface S1 side and a cell isolation portion 22A2 closer to the second surface S2 side.

The cell isolation portion 22A1 serves as an impurity isolation region that suppresses movement of signal charges between two adjacent photoelectric conversion cells 21. The cell isolation portion 22A1 is formed of, for example, a semiconductor region in which a p-type impurity is implanted as an impurity exhibiting the first conductivity type. The concentration of the p-type impurity in the cell isolation portion 22A1 is the first concentration.

The cell isolation portion 22A2 is formed of an insulating material embedded (provided) in a groove formed in the semiconductor layer 20, and serves as an insulator isolation region that suppresses movement of signal charges between two adjacent photoelectric conversion units 21. Here, the recess is provided in the semiconductor layer 20 within a range of the depth d from the second surface S2 side of the semiconductor layer 20. That is, the cell isolation portion 22A2 is the first from the semiconductor layer 20The two-sided S2 side is provided to a Shallow Trench Isolation (STI) of depth d in the thickness direction of the semiconductor layer 20. The insulating material is, for example, silicon oxide (SiO) ₂ )。

In addition, as shown in fig. 14D, the cell isolation portion 22A2 surrounds a portion of the photoelectric conversion unit 21 closer to the second surface S2 side in the thickness direction of the semiconductor layer 20. More specifically, in the photoelectric conversion unit 21, a range from the second surface S2 to the depth d in the thickness direction of the semiconductor layer 20 is surrounded by the unit isolation portion 22 A2.

Principal effects of the second embodiment

Even if the solid-state image pickup device 1 according to the second embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, the solid-state image pickup device 1 according to the second embodiment has the unit isolation portion 22A2 formed of an insulating material near the second surface S2 side, and the unit isolation portion 22A2 surrounds a portion of the photoelectric conversion unit 21 closer to the second surface S2 side. Accordingly, it is possible to further suppress leakage of the generated signal charges to the adjacent photoelectric conversion units 21, and suppress degradation of image quality due to color mixing.

Note that the relative relationship between the dimension of the unit isolation portion 22A1 in the Z direction and the dimension of the unit isolation portion 22A2 in the Z direction is not limited to the illustrated relationship.

Third embodiment

A third embodiment of the present technology shown in fig. 15A to 15D will be described below. The solid-state imaging device 1 according to the third embodiment is different from the solid-state imaging device 1 according to the first embodiment described above in that a part of the third region 53 of the isolation portion 50 is formed of an insulating material, and, instead of the unit isolation portion 22, the unit isolation portion 22A of the second embodiment is included. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< isolation portion >

The solid-state image pickup device 1 includes the partition 50B instead of the partition 50. The isolation portion 50B is provided in the same region of the semiconductor layer 20 as the isolation portion 50 of the first embodiment. The partition 50B includes a first region 51, a second region 52, and a third region 53B. The third region 53B is formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, and includes a third region 53B1 and a third region 53B2. The third region 53B1 is a portion serving as an impurity isolation region that suppresses movement of signal charges, and the third region 53B2 is a portion formed of an insulating material. The third region 53B has a third region 53B1 closer to the first surface S1 side and a third region 53B2 closer to the second surface S2 side in the thickness direction of the semiconductor layer 20.

The third region 53B1 serves as an impurity isolation region that suppresses movement of signal charges. The third region 53B1 is formed of, for example, a semiconductor region in which a p-type impurity is implanted as an impurity exhibiting the first conductivity type. The concentration of the p-type impurity in the third region 53B1 is the first concentration.

The third region 53B2 is formed of an insulating material embedded (provided) in a groove formed in the semiconductor layer 20, and serves as an insulator isolation region that suppresses movement of signal charges. Here, the recess is provided in the semiconductor layer 20 within a depth d from the second surface S2 side of the semiconductor layer 20. That is, the third region 53B2 is a Shallow Trench Isolation (STI) provided from the second surface S2 side of the semiconductor layer 20 to a depth d in the thickness direction of the semiconductor layer 20. The insulating material is, for example, silicon oxide (SiO) ₂ )。

Further, as shown in fig. 15C and 15D, the third region 53B2 is formed integrally with the unit isolation portion 22A2 to the depth D. Then, as shown in fig. 15D, the third region 53B2 protrudes from the cell isolation portion 22A2 in a range from the second surface S2 to the depth D in the thickness direction of the semiconductor layer 20.

Principal effects of the third embodiment >

Even if the solid-state image pickup device 1 according to the third embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the region of the isolation portion 50B other than the second portion 522 serving as the overflow path, movement of the signal charge between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R is preferably suppressed as much as possible. Since the solid-state image pickup device 1 according to the third embodiment includes the third region 53B2 formed of the insulating material, movement of the generated signal charge between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R via the third region 53B2 can be further suppressed. Therefore, the phase difference detection accuracy can be improved without deteriorating the color mixture generated between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R of the photoelectric conversion unit 21.

Further, the partition 50B of the solid-state imaging device 1 according to the third embodiment has a third region 53B2 formed of an insulating material near the second surface S2 side. Therefore, reflection and scattering of light condensed by the microlens 43a can be suppressed, and color mixture between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R can be suppressed.

Fourth embodiment

A fourth embodiment of the present technology shown in fig. 16A to 16C will be described below. The solid-state image pickup device 1 according to the fourth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the entire unit partition 22 is formed of an insulating material, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< cell isolation portion >

The solid-state image pickup device 1 includes a unit isolation portion 22C instead of the unit isolation portion 22. In the thickness direction of the semiconductor layer 20, the cell isolation portion 22C is formed of an insulating material provided from one of the second surface S2 and the first surface S1 to the other. The cell isolation portion 22C is formed of an insulating material embedded (provided) in a groove formed in the semiconductor layer 20, and serves as an insulator isolation region that suppresses movement of signal charges between two adjacent photoelectric conversion units 21. Here, one of the second surface S2 and the first surface S1 of the semiconductor layer 20 The other sets the groove to the other. That is, the cell isolation portion 22C is a Full Trench Isolation (FTI) provided in the semiconductor layer 20. The insulating material is, for example, silicon oxide (SiO) ₂ )。

Principal effects of the fourth embodiment >

Even if the solid-state image pickup device 1 according to the fourth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state imaging device 1 according to the fourth embodiment, the peripheral portion of the photoelectric conversion unit 21 is insulated and isolated by the FTI. Therefore, the adjacent photoelectric conversion units 21 are completely electrically isolated from each other, that is, a potential barrier formed between the adjacent photoelectric conversion units 21 by the FTI is increased. Therefore, occurrence of charge overflow (blooming) between the photoelectric conversion units 21 can be suppressed, thereby suppressing deterioration of image quality. In addition, since the potential barrier formed between the photoelectric conversion units 21 is increased, the second potential barrier P2, which is a potential barrier of the transfer transistor, can also be increased. If the potential barrier P2 can be increased, the first potential barrier P1 between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R can also be increased. Therefore, both the signal range in which phase difference detection can be performed and the signal range in which image formation is performed can be enlarged.

[ fifth embodiment ]

A fifth embodiment of the present technology shown in fig. 17A and 17B will be described below. The solid-state image pickup device 1 according to the fifth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the second portion 522 of the isolation portion is provided at a position distant from the first transfer transistor 24L and the second transfer transistor 24R in the Y direction, and includes a cell isolation portion 22C instead of the cell isolation portion 22. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted. Note that a longitudinal cross-sectional view showing a main portion of the cross-sectional structure along the line A-A of fig. 17A is the same as that in fig. 16B, and therefore an explanation is omitted here.

< isolation portion >

The solid-state image pickup device 1 includes the isolation portion 50D instead of the isolation portion 50. The partition 50D includes a first region 51, a second region 52, and a third region 53D. The first region 51 and the second region 52 are related to the positions of the first transfer transistor 24L and the second transfer transistor 24R, and are provided at positions different from those in the first embodiment described above. More specifically, in a plan view, the first transfer transistor 24L and the second transfer transistor 24R are provided closer to one side of the photoelectric conversion unit 21 in a Y direction (second direction) intersecting the X direction (first direction), and the first region 51 and the second region 52 are provided closer to the other side of the photoelectric conversion unit 21 in the second direction. More specifically, the first region 51 and the second region 52 are disposed closer to the other side in the second direction than the center of the photoelectric conversion unit 21 in the second direction. Further, the first region 51 and the second region 52 are provided at positions excluding the center of the photoelectric conversion unit 21 in the second direction. Other configurations of the first region 51 and the second region 52 are the same as those of the first region 51 and the second region 52 of the first embodiment.

The partition 50D includes a third region 53D instead of the third region 53 of the first embodiment. The third region 53D includes third regions 531 and 532. As shown in fig. 17B, the dimensions of the third areas 531 and 532 in the Y direction are different from those of the third area 53. In addition, the dimension 531Y in the Y direction of the third region 531 disposed near one side in the Y direction is larger than the dimension 532Y in the Y direction of the third region 532 disposed near the other side in the Y direction. The other constitution of the third regions 531 and 532 is the same as that of the third region 53.

In this way, the second portion 522 is provided at a position distant from the transfer gate electrodes TRG1 and TRG2 in the thickness direction of the semiconductor layer 20, and is also provided at a position distant from the transfer gate electrodes TRG1 and TRG2 in the Y direction of the semiconductor layer.

Principal effects of the fifth embodiment >

Even if the solid-state image pickup device 1 according to the fifth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, the second portion 522 is provided at a position distant from the transfer gate electrodes TRG1 and TRG2 in the thickness direction of the semiconductor layer 20, and is also provided at a position distant from the transfer gate electrodes TRG1 and TRG2 in the Y direction of the semiconductor layer 20. With the above configuration, the second portion 522 can be further away from the transfer gate electrodes TRG1 and TRG2. Accordingly, the distance between the second portion 522 and the transfer gate electrodes TRG1 and TRG2 can be further increased. Therefore, the first potential barrier P1, which is a potential barrier of the isolation portion 50D, is less likely to be affected by the modulation of the first transfer transistor 24L and the second transfer transistor 24R. Therefore, a decrease in the accuracy of the phase difference detection can be further suppressed. Further, since the first potential barrier P1 is less likely to be affected by modulation, the height of the potential barrier can be used in a state close to design, and narrowing of the signal range in which phase difference detection can be performed can be further suppressed.

Sixth embodiment

A sixth embodiment of the present technology shown in fig. 18A and 18B will be described below. The solid-state image pickup device 1 according to the sixth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the entire isolation portion 50 (third region 53E) is formed of an insulating material, and includes the unit isolation portion 22C instead of the unit isolation portion 22. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted. Note that a longitudinal sectional view showing a main portion of the sectional structure along the line A-A in fig. 18A is the same as that in fig. 16B, and therefore an explanation is omitted here.

< isolation portion >

The solid-state image pickup device 1 includes the partition 50E instead of the partition 50. The partition 50E includes a first region 51, a second region 52, and a third region 53E. In the thickness direction of the semiconductor layer 20, the third region 53E is formed of an insulating material provided from one of the second face S2 and the first face S1 to the other. The third region 53E is formed of an insulating material embedded (provided) in a recess formed in the semiconductor layer 20, And serves as an insulator isolation region that suppresses movement of signal charges. Here, the grooves are provided from one of the second face S2 and the first face S1 of the semiconductor layer 20 to the other. That is, the third region 53E is a Full Trench Isolation (FTI) provided in the semiconductor layer 20. The insulating material is, for example, silicon oxide (SiO) ₂ )。

Method for manufacturing solid-state imaging device 1

Next, a method of manufacturing the solid-state image pickup device 1 according to the sixth embodiment will be described with reference to the drawings. Note that, here, only the differences from the manufacturing method of the solid-state image pickup device 1 described in the first embodiment will be described. First, the steps shown in fig. 10A of the first embodiment are performed, and then, as shown in fig. 19A, the cell spacers 22C are formed in the semiconductor layer 20. In this step, although not illustrated in fig. 19A, the third region 53E is also formed.

Then, as shown in fig. 19B, the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R are formed. Since the subsequent steps are the same as those of the solid-state image pickup device 1 described in the first embodiment, a description thereof will be omitted here.

Principal effects of the sixth embodiment >

Even if the solid-state image pickup device 1 according to the sixth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, since the entire third region 53E is formed of an insulating material, the solid-state imaging device 1 according to the sixth embodiment can further suppress movement of generated signal charges between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R via the third region 53E, as compared with the third region 53 of the first embodiment and the third region 53B of the third embodiment described above. Therefore, the phase difference detection accuracy can be improved without deteriorating the color mixture occurring between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R of the photoelectric conversion unit 21.

Seventh embodiment

A seventh embodiment of the present technology shown in fig. 20A to 20C will be described below. The solid-state image pickup device 1 according to the seventh embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the partition includes a hole accumulation region including the third region 53E instead of the third region 53, and includes a unit partition 22C instead of the unit partition 22. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< isolation portion >

The solid-state image pickup device 1 includes a partition 50F instead of the partition 50. The partition 50F includes a first region 51, a second region 52, a third region 53E, and a hole accumulation region 54. The hole accumulation region 54 is provided on the second surface S2 side of the first region 51 in the thickness direction of the semiconductor layer 20. More specifically, the hole accumulation region 54 is provided near the end 51a of the first region 51 on the second surface S2 side. Further, in the thickness direction of the semiconductor layer 20, the second portion 522 is provided on the second surface S2 side of the hole accumulation region 54, and the first portion 521 is provided on the second surface S2 side of the second portion 522.

In order to allow the signal charge to overflow, the second portion 522 needs to have a low impurity concentration exhibiting p-type, but on the other hand, there is a possibility that occurrence of white spots and dark current is induced due to depletion of STI. By providing the hole accumulation region 54, the interface between the insulating material and silicon is hole-pinned. Therefore, depletion of the interface between the second portion 522 and the first region 51 is suppressed, thereby suppressing occurrence of white spots and dark currents. The hole accumulation region 54 exhibits an impurity of the first conductivity type, for example, p-type impurity, at a concentration of, for example, only 1e18cm ^-3 To 1e20cm ^-3 。

The hole accumulation region 54 is provided by impurity implantation in the same step as the second portion 522. That is, the hole accumulation region 54 is provided in a step before the first region 51 is embedded in the groove 26. Note that the hole accumulation region 54 is provided before or after the second portion 522 is provided. Note that, in order to provide the cap-shaped hole accumulation region 54 as shown with respect to the end 51a of the first region 51, impurities are injected into the groove 26 from an oblique direction. Thus, impurities can also be implanted into the sidewalls of the recess 26. In addition, since impurities are implanted near the surface of the groove 26, the implantation is performed using low energy.

Principal effects of the seventh embodiment >

Even if the solid-state image pickup device 1 according to the seventh embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, since the solid-state image pickup device 1 according to the seventh embodiment includes the hole accumulation region 54, occurrence of white spots and dark currents can be suppressed.

Eighth embodiment

An eighth embodiment of the present technology shown in fig. 21A to 21C will be described below. The solid-state image pickup device 1 according to the eighth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the isolation portion (third region 53G) and the unit isolation portion are formed of an insulating material, and the width of the isolation portion and the width of the unit isolation portion are different in the thickness direction of the semiconductor layer 20. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< isolation portion >

The solid-state image pickup device 1 includes the isolation portion 50G instead of the isolation portion 50. The isolation portion 50G includes a first region 51, a second region 52, and a third region 53G. The width of the third region 53G, more specifically, the width of the third region 53G in plan view (the dimension in the direction perpendicular to the Z direction) varies according to the thickness direction of the semiconductor layer 20. More specifically, the width of the portion of the third region 53G near the second face S2 is narrower than the width of the portion near the first face S1. More specifically, the width of the portion of the third region 53G near the second face S2 is slightly narrower than the width of the portion near the first face S1.

The third region 53G includes a third region 53G2 on the light incident surface side and a third region 53G1 having a width different from the width of the third region 53G2 on the element forming surface side. More specifically, the width of the third region 53G2 is slightly narrower than the width of the third region 53G1. In addition, in the thickness direction of the semiconductor layer 20, the third region 53G has a third region 53G1 closer to the first surface S1 side and a third region 53G2 closer to the second surface S2 side.

< cell isolation portion >

The solid-state image pickup device 1 includes a unit isolation portion 22G instead of the unit isolation portion 22. The width of the unit isolation portion 22G, more specifically, the width of the unit isolation portion 22G (the dimension in the direction perpendicular to the Z direction) in a plan view varies according to the thickness direction of the semiconductor layer 20. More specifically, the width of the portion of the unit isolation portion 22G near the second surface S2 is narrower than the width of the portion near the first surface S1. More specifically, the width of the portion of the unit isolation portion 22G near the second surface S2 is slightly narrower than the width of the portion near the first surface S1.

The unit isolation portion 22G includes a unit isolation portion 22G2 on the light incidence surface side and a unit isolation portion 22G1 having a width different from that of the unit isolation portion 22G2 on the element formation surface side. More specifically, the width of the unit isolation portion 22G2 is slightly narrower than the width of the unit isolation portion 22G1. In addition, in the thickness direction of the semiconductor layer 20, the cell isolation portion 22G has a cell isolation portion 22G1 closer to the first surface S1 side and a cell isolation portion 22G2 closer to the second surface S2 side.

Method for manufacturing solid-state imaging device

Next, a method of manufacturing the solid-state image pickup device 1 according to the eighth embodiment will be described with reference to the drawings. Note that, here, only differences from the manufacturing method of the solid-state image pickup device 1 described in the first embodiment will be described. First, the steps shown in fig. 10A and 10B of the first embodiment are performed. Next, as shown in fig. 22A, in the photoelectric conversion unit 21, impurities are injected into the semiconductor layer 20 between the first photoelectric conversion portion 23L and the second photoelectric conversion portion 23R to form a first impurity region 61 whose impurity concentration is a first concentration.

Then, as shown in fig. 22B, a silicon nitride film (Si ₃ N ₄ Film) 63 and oxidationSilicon film (SiO) ₂ Film) 65. These films are then selectively etched using, for example, a resist mask to form a hard mask. Then, as shown in fig. 22C, first dry etching is performed using a hard mask to form a recess 26 and a recess 261 in the semiconductor layer 20. The recess 261 is formed in the semiconductor layer 20 between adjacent photoelectric conversion units 21.

Next, as shown in fig. 22D, only the grooves 26 in the grooves 26 and 261 are filled with the resist 66, and then the silicon nitride film 67 is deposited. A silicon nitride film 67 is deposited in the region including the inner wall of the recess 261. More specifically, the silicon nitride film 67 is deposited in the region including the bottom 261a and the side walls 261b of the recess 261. Since the silicon nitride film 67 is deposited on the side wall 261b of the recess 261, the cavity portion of the recess 261 is smaller than that before deposition in plan view.

Then, if the bottom 261a is subjected to dry etching for the second time in the state shown in fig. 22D, a recess 262 is formed as shown in fig. 22E. The groove 262 is formed to have a smaller size in plan view than the groove 261.

Then, as shown in fig. 22F, the silicon nitride film 67 and the resist 66 are removed. Next, as shown in fig. 22G, a second portion 522 is formed. Then, as shown in fig. 22H, a silicon oxide film (SiO ₂ Film) 68 and fills the interiors of grooves 26, 261, and 262 with silicon oxide film 68.

Next, the excess silicon oxide film 68 is removed by, for example, etching back or the like, and then the excess silicon nitride film 63 is removed. Thus, the state shown in fig. 22I is obtained. Thus, the unit spacers 22G1 and 22G2 and the first region 51 are obtained. As shown in fig. 22I, the unit isolation portion 22G1 is formed in the groove 261, and the unit isolation portion 22G2 is formed in the groove 262 having a smaller size than the groove 261 in a plan view. Through such a step, the width of the unit isolation portion 22G2 is formed smaller than the width of the unit isolation portion 22G 1.

Note that, although not illustrated here, the third regions 53G1 and 53G2 are also formed in the same step as the unit spacers 22G1 and 22G2 in the same manner. Further, since the subsequent steps are the same as those of the solid-state image pickup device 1 described in the first embodiment, a description thereof will be omitted here.

Principal effects of the eighth embodiment >

Even if the solid-state image pickup device 1 according to the eighth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state image pickup device 1 according to the eighth embodiment, the width of the portion of the third region 53G and the unit isolation portion 22G on the side closer to the second surface S2 is smaller than the width of the portion on the side closer to the first surface S1. Therefore, even if the pixel is miniaturized, the narrowing of the active region where the photoelectric conversion unit 21 is formed can be suppressed, and the narrowing of the regions of the first charge accumulation region 25L and the second charge accumulation region 256R can be suppressed. Therefore, even in the case of miniaturizing the pixel, the reduction in the number of saturated electrons in the first and second charge accumulation regions 25L and 25R can be suppressed. Therefore, even in the case of miniaturization of pixels, narrowing of the signal range in which phase difference detection can be performed and the signal range in which linearity of the addition signal Q3 with respect to the amount of light can be maintained can be suppressed.

Further, in the solid-state image pickup device 1 according to the eighth embodiment, even if the pixels are miniaturized, narrowing of the active region where the photoelectric conversion units 21 are formed is suppressed, and therefore, the second portion 522 of the isolation portion 50G and the transfer gate electrodes TRG1 and TRG2 can be further away from each other. Accordingly, fluctuation in the height of the first potential barrier P1, which is a potential barrier of the isolation portion 50G, due to the on/off operation of the first transfer transistor 24L and the second transfer transistor 24R can be further suppressed.

Further, in the manufacturing method of the solid-state imaging device 1 according to the eighth embodiment, the second dry etching is also performed on the bottom 261a of the groove 261 formed by the first dry etching to form the groove 262. Therefore, the cell isolation portion 22G2 can be formed while suppressing misalignment with respect to the cell isolation portion 22G 1. The third regions 53G1 and 53G2 are also formed in the same manner in the same step as the unit spacers 22G1 and 22G2. Therefore, the third region 53G2 can be formed while suppressing misalignment with respect to the third region 53G 1.

[ ninth embodiment ]

A ninth embodiment of the present technology shown in fig. 23 will be described below. The solid-state image pickup device 1 according to the ninth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that each of the first transfer transistor 24L and the first charge accumulation region 25L and the second transfer transistor 24R and the second charge accumulation region 25R is disposed near the corner of the photoelectric conversion unit 21, includes the third region 53E instead of the third region 53, and includes the cell isolation portion 22C instead of the cell isolation portion 22. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted. Note that the longitudinal sectional view of the main part of the sectional structure shown along the line a_a in fig. 23 is the same as in fig. 16B, and the longitudinal sectional view of the main part of the sectional structure shown along the line B-B is the same as in fig. 18B, so that the explanation is omitted here.

< first transfer transistor and first Charge accumulation region >

The first transfer transistor 24L and the first charge accumulation region 25L are disposed near the corner of the photoelectric conversion unit 21. In other words, the first transfer transistor 24L and the first charge accumulation region 25L are disposed near the corner of the active region 20a where the photoelectric conversion unit 21 is disposed. The photoelectric conversion unit 21 (active region 20 a) includes four corner portions 271, 272, 273, and 274. The first transfer transistor 24L and the first charge accumulation region 25L are disposed closer to the corner side of the first photoelectric conversion portion 23L side in the X direction. Fig. 23 shows an example in which the first transfer transistor 24L and the first charge accumulation region 25L are disposed closer to the corner 271 side of the corners 271 and 273 on the first photoelectric conversion portion 23L side. Further, among the first transfer transistor 24L and the first charge accumulation region 25L, the first charge accumulation region 25L is provided at a position closer to the corner 271. In addition, the first charge accumulation region 25L is provided in a triangular shape in plan view.

With such a configuration, the signal charges generated in the first photoelectric conversion portion 23L pass through the channel region of the first transfer transistor 24L provided in the vicinity of the corner 271, and flow into the first charge accumulation region 25L provided in the vicinity of the corner 271.

< second transfer transistor and second Charge accumulation region >

The second transfer transistor 24R and the second charge accumulation region 25R are disposed near the corner of the photoelectric conversion unit 21. In other words, the second transfer transistor 24R and the second charge accumulation region 25R are disposed near the corner of the active region 20a where the photoelectric conversion unit 21 is disposed. The second transfer transistor 24R and the second charge accumulation region 25R are disposed closer to the corner side of the second photoelectric conversion portion 23R side in the X direction. Fig. 23 shows an example in which the second transfer transistor 24R and the second charge accumulation region 25R are disposed closer to the corner 272 side of the corners 272 and 274 on the second photoelectric conversion portion 23R side. Further, in the second transfer transistor 24R and the second charge accumulation region 25R, the second charge accumulation region 25R is provided at a position closer to the corner 272. In addition, the second charge accumulation region 25R is provided in a triangular shape in a plan view.

With such a configuration, the signal charges generated in the second photoelectric conversion portion 23R pass through the channel region of the second transfer transistor 24R provided in the vicinity of the corner portion 272, and flow into the second charge accumulation region 25R provided in the vicinity of the corner portion 272.

Principal effects of the ninth embodiment >

Even if the solid-state image pickup device 1 according to the ninth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state image pickup device 1 according to the ninth embodiment, since each of the first transfer transistor 24L and the first charge accumulation region 25L, and the second transfer transistor 24R and the second charge accumulation region 25R is provided in the vicinity of the corner portion of the photoelectric conversion unit 21, the second portion 522 of the isolation portion 50E and the transfer gate electrodes TRG1 and TRG2 can be further separated from each other. Accordingly, fluctuation in the height of the first potential barrier P1, which is a potential barrier of the isolation portion 50E, due to the on/off operation of the first transfer transistor 24L and the second transfer transistor 24R can be further suppressed.

Tenth embodiment

A tenth embodiment of the present technology shown in fig. 24A and 24B will be described below. The solid-state image pickup device 1 of the tenth embodiment is different from the solid-state image pickup device 1 of the first embodiment described above in that each of the first transfer transistor 24L and the second transfer transistor 24R is provided in the vicinity of the corner of the photoelectric conversion unit 21, includes a third region 53E instead of the third region 53, and includes a unit isolation portion 22C instead of the unit isolation portion 22. The other constitution of the solid-state image pickup device 1 is substantially similar to that of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted. Note that a longitudinal sectional view showing a main part of the sectional structure along the line A-A in fig. 24A is the same as in fig. 16B, and a longitudinal sectional view showing a main part of the sectional structure along the line B-B is the same as in fig. 18B, so that the explanation is omitted here.

< first pass transistor >

The first transfer transistor 24L is disposed near the corner of the photoelectric conversion unit 21. In other words, the first transfer transistor 24L is disposed near the corner of the active region 20a where the photoelectric conversion unit 21 is disposed. The first transfer transistor 24L is provided on the corner side closer to the first photoelectric conversion portion 23L side in the X direction. Fig. 24A shows an example in which the first transfer transistor 24L is disposed closer to the corner 271 side of the corners 271 and 273 on the first photoelectric conversion portion 23L side. In addition, the first transfer transistor 24L is provided in a triangular shape in a plan view.

Further, as shown in fig. 24B, the first transfer transistor 24L is a vertical transistor, and includes a vertical transfer gate electrode TRG1 formed by digging into the semiconductor layer 20. The channel region of the first transfer transistor 24L is formed along the sidewall portion of the vertical transfer gate electrode TRG1. As shown in fig. 24B, the signal charge (e ^- ) Along a line disposed near the corner 271A sidewall portion of the vertical transfer gate electrode TRG1 of the first transfer transistor 24L is formed, and signal charges pass through the channel region and flow into the first charge accumulation region 25L.

< second pass transistor >

The second transfer transistor 24R is disposed near the corner of the photoelectric conversion unit 21. In other words, the second transfer transistor 24R is disposed near the corner of the active region 20a where the photoelectric conversion unit 21 is disposed. The second transfer transistor 24R is disposed closer to the corner side of the second photoelectric conversion portion 23R side in the X direction. Fig. 24A shows an example in which the second transfer transistor 24R is disposed closer to the corner 272 side of the corners 272 and 274 on the second photoelectric conversion portion 23R side. In addition, the second transfer transistor 24R is provided in a triangular shape in a plan view.

Further, although not illustrated in fig. 24B, the second transfer transistor 24R is a vertical transistor similar to the first transfer transistor 24L, and includes a vertical transfer gate electrode TRG2 formed by digging into the semiconductor layer 20. A channel region of the second transfer transistor 24R is formed along a sidewall portion of the vertical transfer gate electrode TRG2. The signal charges generated in the second photoelectric conversion portion 23R are formed along the sidewall portion of the vertical transfer gate electrode TRG2 of the second transfer transistor 24R provided near the corner portion 272, pass through the channel region, and flow into the second charge accumulation region 25R.

Principal effects of the tenth embodiment >

Even if the solid-state image pickup device 1 according to the tenth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state image pickup device 1 according to the tenth embodiment, each of the first transfer transistor 24L and the second transfer transistor 24R is provided near the corner of the photoelectric conversion unit 21, and the first transfer transistor 24L and the second transfer transistor 24R are vertical transistors. Accordingly, the second portion 522 of the isolation portion 50E and the transfer gate electrodes TRG1 and TRG2 can be further apart from each other than in the case of the above-described ninth embodiment. Accordingly, fluctuation in the height of the first potential barrier P1, which is a potential barrier of the isolation portion 50E, due to the on/off operation of the first transfer transistor 24L and the second transfer transistor 24R can be further suppressed.

Further, in the solid-state image pickup device 1 according to the tenth embodiment, since the transfer gate electrodes TRG1 and TRG2 are vertical transistors, the gate length can be increased as compared with the case of planar transistors. Therefore, even in the case of miniaturization of the pixel 3, the transmission capability is easily maintained.

Note that in the case where a vertical transistor electrode is used for the transfer gate, particularly in the transfer of signal charges, a strong electric field is applied between the charge accumulation region and the transfer gate electrode, and white spots may occur. In order to suppress occurrence of white spots, a sidewall structure may be provided by embedding an insulator in the semiconductor layer 20 between the charge accumulation region and the transfer gate electrode.

[ eleventh embodiment ]

An eleventh embodiment of the present technology shown in fig. 25A, 25B, and 26 will be described below. The solid-state image pickup device 1 according to the eleventh embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the first charge accumulating region 25L and the second charge accumulating region 25 provided separately for each photoelectric conversion unit are integrated to form one charge accumulating region 25, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

The charge accumulating region 25 penetrates the third regions 53 of the two third regions 53 disposed in the Y direction that are closer to the transfer gate electrodes TRG1 and TRG 2. Then, the first transfer transistor 24L is provided to form a channel in the active region between the first photoelectric conversion portion 23L and the charge accumulating region 25. The second transfer transistor 24R is provided to form a channel in the active region between the second photoelectric conversion portion 23R and the charge accumulating region 25. Therefore, the charge accumulating region 25 includes a function of the first charge accumulating region 25L and a function of the second charge accumulating region 25R provided separately from the first charge accumulating region 25L. This configuration is also shown in the equivalent circuit diagram of fig. 26.

Principal effects of the eleventh embodiment >

Even if the solid-state image pickup device 1 according to the eleventh embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, since the solid-state image pickup device 1 according to the eleventh embodiment has a configuration including one charge accumulating region 25, wiring for electrically connecting the charge accumulating regions is not required as compared with the case where the first charge accumulating region 25L and the second charge accumulating region 25R are separately provided. Accordingly, parasitic capacitances such as parasitic capacitances between wirings and a substrate can be prevented from being superimposed on the charge accumulating region 25. Therefore, a decrease in conversion efficiency can be suppressed.

Twelfth embodiment

A twelfth embodiment of the present technology shown in fig. 27A, 27B, and 28 will be described below. The solid-state image pickup device 1 according to the twelfth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the first charge accumulation region 25L and the second charge accumulation region 25 provided separately for each photoelectric conversion unit are integrated to form one charge accumulation region 25, and the plurality of photoelectric conversion units 21 (pixels 3) share one charge accumulation region 25, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted. Note that a longitudinal sectional view showing a main portion of the sectional structure along the line a_a of fig. 27 is the same as that in fig. 6B, and therefore, an explanation is omitted here.

The charge accumulating region 25 passes through the third regions 53 closer to the transfer gate electrodes TRG1 and TRG2 of the two third regions 53 disposed in the Y direction and the cell isolation portion 22. Then, the first transfer transistor 241 is provided to form a channel in the active region between the first photoelectric conversion portion 231 and the charge accumulating region 25. The second transfer transistor 242 is provided to form a channel in the active region between the second photoelectric conversion portion 232 and the charge accumulating region 25. The third transfer transistor 243 is provided to form a channel in the active region between the third photoelectric conversion portion 233 and the charge accumulating region 25. The fourth transfer transistor 244 is provided to form a channel in the active region between the first photoelectric conversion portion 234 and the charge accumulating region 25. This configuration is also shown in the equivalent circuit diagram of fig. 28.

Principal effects of the twelfth embodiment >

Even if the solid-state image pickup device 1 according to the twelfth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state image pickup device 1 according to the twelfth embodiment, the plurality of photoelectric conversion units 21 (pixels 3) share the charge accumulating region 25. That is, by increasing the number of pixels 3 sharing the charge accumulation region 25, the number of reset transistors RST, amplifying transistors AMP, and selection transistors SEL for driving the pixels 3 can be reduced. Accordingly, a structure corresponding to further miniaturization can be obtained.

Thirteenth embodiment

A thirteenth embodiment of the present technology shown in fig. 29 will be described below. The solid-state image pickup device 1 according to the thirteenth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the solid-state image pickup device 1 has a structure in which two semiconductor substrates are bonded, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< stacked Structure of solid-State imaging device >

The solid-state image pickup device 1 includes a light receiving substrate 70A and a pixel circuit substrate 70B superimposed on the light receiving substrate 70. That is, the solid-state image pickup device 1 is a stacked CMOS Image Sensor (CIS).

The light receiving substrate 70A includes a semiconductor layer 20A having a first surface S1 and a second surface S2 located opposite to each other, and a multilayer wiring layer 30A provided on the first surface S1 side of the semiconductor layer 20A. On the second surface S2 side of the semiconductor layer 20A, known members such as the color filter 42 and the microlens layer 43 are provided as in the case of the first embodiment, but the illustration thereof is omitted here. The photoelectric conversion unit 21 is provided in the semiconductor layer 20A.

The pixel circuit substrate 70B includes a semiconductor layer 20B and a multilayer wiring layer 30B provided on one surface side of the semiconductor layer 20B. The semiconductor layer 20B is provided with a readout circuit 15. Further, the other surface of the semiconductor layer 20B is superimposed on the surface of the multilayer wiring layer 30A on the side opposite to the semiconductor layer 20A side. Then, the readout circuit 15 and the photoelectric conversion unit 21 are electrically connected via the through-electrode 80.

Principal effects of the thirteenth embodiment >

Even if the solid-state image pickup device 1 according to the thirteenth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above can be obtained.

Further, in the solid-state image pickup device 1 according to the thirteenth embodiment, the readout circuit 15 and the photoelectric conversion unit 21 are provided on separate substrates. Accordingly, a margin is generated in the element arrangement space of the photoelectric conversion unit 21, and the second portion 522 of the isolation portion 50 and the transfer gate electrodes TRG1 and TRG2 can be further away from each other. Accordingly, fluctuation in the height of the first potential barrier P1, which is a potential barrier of the isolation portion 50, due to the on/off operation of the first transfer transistor 24L and the second transfer transistor 24R can be further suppressed.

Note that the photoelectric conversion unit 21 is not limited to the photoelectric conversion unit 21 described in the first embodiment described above, and may be any one of the photoelectric conversion units 21 described in the second to twelfth embodiments described above.

Fourteenth embodiment

A fourteenth embodiment of the present technology shown in fig. 30 will be described below. The solid-state image pickup device 1 according to the fourteenth embodiment is different from the solid-state image pickup device 1 according to the first embodiment described above in that the solid-state image pickup device 1 has a structure in which three semiconductor substrates are bonded, and other configurations of the solid-state image pickup device 1 are substantially similar to those of the solid-state image pickup device 1 according to the first embodiment described above. Note that the components that have been described are denoted by the same reference numerals, and description thereof will be omitted.

< stacked Structure of solid-State imaging device >

The solid-state image pickup device 1 includes a light receiving substrate 70A, a pixel circuit substrate 70B superimposed on the light receiving substrate 70A, and a logic circuit substrate 70C superimposed on the pixel circuit substrate 70B. That is, the solid-state image pickup device 1 is a stacked CMOS Image Sensor (CIS).

The logic circuit board 70C includes a semiconductor layer 20C and a multilayer wiring layer 30C provided on one surface side of the semiconductor layer 20C. In the semiconductor layer 20C, a transistor group 16 constituting the logic circuit 13 of fig. 2 is provided. In addition, a multilayer wiring layer 30C is superimposed on the multilayer wiring layer 30B. The electrode pad 17 is required on the surface of the multilayer wiring layer 30C on the multilayer wiring layer 30B side. Then, the electrode pad 18 is required on the surface of the multilayer wiring layer 30B on the multilayer wiring layer 30C side. Since the electrode pad 17 and the electrode pad 18 are bonded, the pixel circuit substrate 70B and the logic circuit substrate 70C are electrically connected.

Principal effects of the fourteenth embodiment >

Even if the solid-state image pickup device 1 according to the fourteenth embodiment is used, effects similar to those of the solid-state image pickup device 1 according to the first embodiment described above and the solid-state image pickup device 1 according to the thirteenth embodiment described above can be obtained.

Application example

<1. Application example of electronic device >

Further, for example, each of the above-described solid-state image pickup apparatuses 1 is applicable to various electronic devices including an image pickup system such as a digital still camera and a digital video camera, a mobile phone having an image pickup function, and other apparatuses having an image pickup function.

As shown in fig. 31, the image pickup apparatus 101 includes an optical system 102, a solid-state image pickup apparatus 103, and a Digital Signal Processor (DSP) 104, is configured by connecting the DSP 104, a display apparatus 105, an operating system 106, a memory 108, a recording apparatus 109, and a power supply system 110 via a bus 107, and is capable of capturing still images and moving images.

The optical system 102 has one or more lenses, and guides image light (incident light 111) from a subject to the solid-state image pickup device 103 to form an image on a light receiving surface (sensor portion) of the solid-state image pickup device 103.

As the solid-state image pickup device 103, the solid-state image pickup device 1 of any one of the above configuration examples is applied. Electrons are accumulated in the solid-state image pickup device 103 for a certain time in accordance with an image formed on the light receiving surface via the optical system 102. Then, a signal corresponding to electrons accumulated in the solid-state image pickup device 103 is supplied to the DSP 104.

The DSP 104 performs various types of signal processing on the signal from the solid-state image pickup device 103 to acquire an image, and temporarily stores data of the image in the memory 108. The image data stored in the memory 108 is recorded in the recording device 109 or is supplied to the display device 105 to display an image. Further, the operating system 106 receives various operations by the user, and supplies operation signals to the blocks of the image pickup apparatus 101, and the power supply system 110 supplies power necessary for driving the blocks of the image pickup apparatus 101.

< application example of moving object >

The technique according to the present disclosure (the present technique) can be applied to various products. For example, the technology according to the present disclosure may also be implemented as an apparatus mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid automobile, a motorcycle, a bicycle, a personal mobile device, an airplane, an unmanned aerial vehicle, a ship, and a robot.

Fig. 32 is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure can be applied.

The vehicle control system 12000 includes a plurality of electronic control units connected to each other through a communication network 12001. In the example shown in fig. 32, the vehicle control system 12000 includes a drive system control unit 12010, a vehicle body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as the functional constitution of the integrated control unit 12050, a microcomputer 12051, an audio/image output section 12052, and an in-vehicle network interface (I/F) 12053 are shown.

The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various types of programs. For example, the drive system control unit 12010 functions as a control device of: a driving force generating device such as an internal combustion engine, a driving motor, or the like for generating driving force of a vehicle, a driving force transmitting mechanism that transmits driving force to wheels, a steering mechanism that adjusts a steering angle of the vehicle, a braking device that generates braking force of the vehicle, or the like.

The vehicle body system control unit 12020 controls the operations of various types of devices provided on the vehicle body according to various types of programs. For example, the vehicle body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as a headlight, a back-up lamp, a brake lamp, a turn lamp, a fog lamp, and the like. In this case, radio waves transmitted from the mobile device that replaces the key or signals of various switches may be input to the vehicle body system control unit 12020. The vehicle body system control unit 12020 receives input of these radio waves or signals, and controls a door lock device, a power window device, a lamp, or the like of the vehicle.

The outside-vehicle information detection unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detection unit 12030 is connected to the image pickup section 12031. The vehicle exterior information detection unit 12030 causes the image pickup portion 12031 to image an image of the outside of the vehicle, and receives the imaged image. Based on the received image, the outside-vehicle information detection unit 12030 may perform detection processing on an object such as a person, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or perform detection processing of a distance from the object.

The image pickup section 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of the received light. The image pickup section 12031 may output an electric signal as an image, or may output an electric signal as information on a measured distance. Further, the light received by the image pickup section 12031 may be visible light, or may be invisible light such as infrared light.

The in-vehicle information detection unit 12040 detects information related to the interior of the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection unit 12041 that detects a driver state. The driver state detection unit 12041 includes, for example, a camera that photographs the driver. Based on the detection information input from the driver state detection portion 12041, the in-vehicle information detection unit 12040 may calculate the fatigue degree of the driver or the concentration degree of the driver, or may determine whether the driver is dozing.

The microcomputer 12051 may calculate a control target value of the driving force generating device, steering mechanism, or braking device based on information on the inside or outside of the vehicle acquired by the outside-vehicle information detecting unit 12030 or the inside-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 may perform cooperative control aimed at realizing functions of an Advanced Driver Assistance System (ADAS), which includes collision avoidance or impact mitigation for a vehicle, following driving based on a following distance, vehicle speed keeping driving, vehicle collision warning, or vehicle lane departure warning, or the like.

Further, the microcomputer 12051 can execute cooperative control for realizing automatic driving or the like for autonomously running the vehicle independently of the operation of the driver by controlling the driving force generating device, the steering mechanism, the braking device, or the like based on the information on the outside or inside of the vehicle acquired by the outside-vehicle information detecting unit 12030 or the inside-vehicle information detecting unit 12040.

Further, the microcomputer 12051 may output a control command to the vehicle body system control unit 12020 based on the information outside the vehicle acquired by the vehicle outside information detection unit 12030. For example, the microcomputer 12051 may perform cooperative control aimed at preventing glare by controlling the headlamps to change from high beam to low beam, for example, according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030.

The audio/video output unit 12052 transmits an output signal of at least one of audio and video to an output device capable of visually or audibly notifying a passenger of the vehicle or the outside of the vehicle. In the example of fig. 32, an audio speaker 12061, a display 12062, and a dashboard 12063 are shown as output devices. The display 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

Fig. 33 is a diagram illustrating an example of the mounting position of the imaging unit 12031.

In fig. 33, a vehicle 12100 includes an image pickup unit 12101, an image pickup unit 12102, an image pickup unit 12103, an image pickup unit 12104, and an image pickup unit 12105 as an image pickup unit 12031.

For example, the imaging unit 12101, the imaging unit 12102, the imaging unit 12103, the imaging unit 12104, and the imaging unit 12105 are provided at positions of a front nose, a rear view mirror, a rear bumper, and a rear door of the vehicle 12100, and at positions of an upper portion of a windshield in the vehicle. An imaging unit 12101 provided in the front nose and an imaging unit 12105 provided in the upper portion of the windshield in the vehicle mainly acquire images in front of the vehicle 12100. The image pickup units 12102 and 12103 provided in the rear view mirror mainly acquire images of both sides of the vehicle 12100. The image pickup unit 12104 provided in the rear bumper or the rear door mainly acquires an image of the rear of the vehicle 12100. The front images obtained by the image pickup sections 12101 and 12105 are mainly used for detecting a vehicle in front, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, and the like.

Note that fig. 33 shows an example of the imaging ranges of the imaging unit 12101 to the imaging unit 12104. The imaging range 12111 indicates an imaging range of the imaging unit 12101 provided in the nose. The imaging ranges 12112 and 12113 respectively indicate imaging ranges of the imaging unit 12102 and the imaging unit 12103 provided in the rear view mirror. The imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or the rear door. For example, a bird's eye image of the vehicle 12100 viewed from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104.

At least one of the image pickup sections 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image pickup sections 12101 to 12104 may be a stereoscopic camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

For example, based on the distance information acquired from the image pickup section 12101 to the image pickup section 12104, the microcomputer 12051 may determine the distance to each three-dimensional object within the image pickup range 12111 to the image pickup range 12114 and the change over time of the distance (relative to the relative speed of the vehicle 12100), and thereby extract, as the preceding vehicle, the closest three-dimensional object that is particularly on the travel path of the vehicle 12100 and travels in the substantially same direction as the vehicle 12100 at a predetermined speed (for example, equal to or greater than 0 km/h). Further, the microcomputer 12051 may set in advance the following distance held in front of the preceding vehicle, and perform automatic braking control (including following stop control), automatic acceleration control (including following start control), and the like. Accordingly, cooperative control such as automatic driving, which aims to make the vehicle run autonomously independent of the operation of the driver, can be performed.

For example, based on the distance information acquired from the image pickup section 12101 to the image pickup section 12104, the microcomputer 12501 may classify three-dimensional object data about a three-dimensional object into three-dimensional object data of two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 recognizes an obstacle around the vehicle 12100 as an obstacle that the driver of the vehicle 12100 can visually recognize and an obstacle that the driver of the vehicle 12100 has difficulty in visually recognizing. The microcomputer 12051 then determines a collision risk for representing the risk of collision with each obstacle. In the case where the collision risk is equal to or higher than the set value and there is thus a possibility of collision, the microcomputer 12051 gives a warning to the driver via the audio speaker 12061 or the display portion 12062, and performs forced deceleration or avoidance steering by the drive system control unit 12010. The microcomputer 12051 can thus assist driving to avoid collision.

At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images imaged by the imaging sections 12101 to 12104, for example. For example, this identification of pedestrians is performed by: a step of extracting feature points in the imaged images of the imaging sections 12101 to 12104 as infrared cameras; and a step of performing pattern matching processing on a series of feature points representing the outline of the object to determine whether or not it is a pedestrian. If the microcomputer 12051 determines that there is a pedestrian in the imaged images of the imaging sections 12101 to 12104, and thus a pedestrian is recognized, the sound/image output section 12052 controls the display section 12062 so that a square outline for emphasis is displayed to be superimposed on the recognized pedestrian. Further, the sound/image outputting section 12052 may control the display section 12062 so as to display an icon or the like representing a pedestrian at a desired position.

Examples of vehicle control systems to which the techniques of the present disclosure may be applied have been described above. The technique according to the present disclosure can be applied to the image pickup section 12031 in the above configuration. Specifically, any of the solid-state image pickup devices described in the first to fourteenth embodiments described above may be applied to the image pickup section 12031. By applying the technique according to the present disclosure to the image pickup section 12031, a better photographed image can be obtained, so that fatigue of the driver can be reduced.

<3. Application example of endoscopic surgical System >

The technique according to the present disclosure (the present technique) can be applied to various products. For example, techniques according to the present disclosure may be applied to endoscopic surgical systems.

Fig. 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technique according to the present disclosure (the present technique) can be applied.

In fig. 34, a state in which a surgeon (doctor) 11131 is performing an operation for a patient 11132 on a hospital bed 11133 using an endoscopic surgical system 11000 is shown. As shown, the endoscopic surgical system 11000 includes an endoscope 11100, other surgical tools 11110 (e.g., a pneumoperitoneum tube 11111 and an energy device 11112), a support arm device 11120 (upon which the endoscope 11100 is supported), and a cart 11200, with various devices for endoscopic surgery being loaded on the cart 11200.

The endoscope 11100 includes a lens barrel 11101 and a camera 11102 connected to a proximal end of the lens barrel 11101, the lens barrel 11101 having a region for insertion into a body cavity of the patient 11132 of a predetermined length from a distal end thereof. In the illustrated example, the endoscope 11100 is shown as including a rigid endoscope as having a rigid barrel 11101. However, the endoscope 11100 may also be configured as a flexible endoscope having a flexible lens barrel 11101.

The lens barrel 11101 has an opening portion at its distal end to which an objective lens is attached. The light source device 11203 is connected to the endoscope 11100 such that light generated by the light source device 11203 is guided to the distal end of the lens barrel through a light guide extending inside the lens barrel 11101 and irradiated to an observation target in the body cavity of the patient 11132 through an objective lens. Note that the endoscope 11100 may be a front view endoscope, or may be a squint endoscope or a side view endoscope.

An optical system and an image pickup element are provided inside the camera 11102 such that reflected light (observation light) from an observation target is collected on the image pickup element by the optical system. The image pickup element photoelectrically converts observation light to generate an electric signal corresponding to the observation light, that is, an image signal corresponding to an observation image. The image signal is transmitted as raw data to a Camera Control Unit (CCU) 11201.

The CCU 11201 includes a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), and the like, and integrally controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102, and performs various image processes for displaying an image based on the image signal, such as a development process (demosaicing process), for the image signal.

The display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201 under the control of the CCU 11201.

For example, the light source device 11203 includes a light source such as a Light Emitting Diode (LED), and supplies irradiation light to the endoscope 11100 when imaging an operation region or the like.

The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can perform input of various types of information or instructions input to the endoscopic surgery system 11000 through the input device 11204. For example, the user inputs an instruction or the like to change the image capturing condition (the type of irradiation light, the magnification, the focal length, or the like) of the endoscope 11100.

The treatment tool control device 11205 controls actuation of the energy device 11112 for cauterizing or incising tissue, sealing blood vessels, and the like. The pneumoperitoneum device 11206 delivers gas into the body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to inflate the body cavity to ensure the field of view of the endoscope 11100 and to ensure the working space of the surgeon. The recorder 11207 is a device capable of recording various types of information related to a surgery. The printer 11208 is a device capable of printing various types of information related to surgery in various forms (e.g., text, images, or charts).

It is noted that the light source device 11203 that provides illumination light to the endoscope 11100 when the surgical field is to be imaged may include, for example, a white light source including an LED, a laser light source, or a combination thereof. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensities and output timings of the respective colors (respective wavelengths) can be controlled with high accuracy, white balance adjustment of a captured image can be performed by the light source device 11203. In addition, in this case, if the laser beams from each of the RGB laser light sources are irradiated to the observation object in a time-division manner (time-division) and the driving of the image pickup element of the camera 11102 is controlled in synchronization with the irradiation timing, images corresponding to the colors R, G and B, respectively, can also be photographed in a time-division manner. According to this method, a color image can be obtained even if no color filter is provided for the image pickup element.

In addition, the light source device 11203 may be controlled so as to change the intensity of the output light at a predetermined time. By controlling the driving of the image pickup device of the camera 11102 in synchronization with the timing of the change in light intensity, thereby acquiring images in a time-division manner and synthesizing the images, it is possible to produce a high dynamic range image free from underexposed shadow and overexposed high light.

In addition, the light source device 11203 may be configured to provide light of a predetermined wavelength band that can be used for special light observation. In special light observation, for example, narrow-band observation (narrow-band imaging) of imaging a predetermined tissue such as a blood vessel of a mucosal surface layer portion is performed with high contrast by irradiating light in a narrower band region than that of irradiation light of ordinary observation (i.e., white light) with wavelength dependence of light absorption in human tissue. Alternatively, in special light observation, fluorescence observation for obtaining an image by irradiating fluorescence generated by excitation light may be performed. In the fluorescence observation, fluorescence from a body tissue may be observed by irradiating excitation light onto the body tissue (autofluorescence observation) or a fluorescence image may be obtained by locally injecting an agent such as indocyanine green (ICG: indocyanine green) into the body tissue and irradiating excitation light corresponding to the fluorescence wavelength of the agent onto the body tissue. The light source device 11203 may be configured to provide narrow-band light and/or excitation light suitable for the above-described special light observation.

Fig. 35 is a block diagram showing a functional configuration example of the camera 11102 and CCU 11201 shown in fig. 34.

The camera 11102 includes a lens unit 11401, a camera unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405.CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and CCU 11201 are connected to each other for communication through a transmission cable 11400.

The lens unit 11401 is an optical system provided at a position connected to the lens barrel 11101. The observation light taken from the distal end of the lens barrel 11101 is guided to the camera 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses including a zoom lens and a focus lens.

The imaging unit 11402 includes an imaging element. The number of image pickup elements included in the image pickup unit 11402 may be one (single-plate type) or a plurality of (multi-plate type). For example, in the case where the image capturing unit 11402 is configured in a multi-plate type, image signals corresponding to each of R, G and B are generated by the image capturing element, and these image signals can be synthesized to obtain a color image. Alternatively, the image capturing unit 11402 may also be configured to have a pair of image capturing elements for respectively acquiring an image signal for the right eye and an image signal for the left eye, thereby being used for three-dimensional (3D) display. If the 3D display is performed, the surgeon 11131 can grasp the depth of the living tissue in the operation region more accurately. It should be noted that in the case where the image capturing unit 11402 is configured in a multi-plate type, a plurality of lens units 11401 are provided corresponding to the respective image capturing elements.

Further, the imaging unit 11402 may not be necessarily provided on the camera 11102. For example, an imaging unit 11402 may be provided immediately behind the objective lens inside the lens barrel 11101.

The driving unit 11403 includes an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

The communication unit 11404 includes a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the image capturing unit 11402 as RAW data to the CCU 11201 through a transmission cable 11400.

In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and supplies the control signal to the camera control unit 11405. The control information includes information such as information related to the imaging condition, for example, information specifying a frame rate of a captured image, information specifying an exposure value at the time of capturing the image, and/or information specifying a magnification and focus of the captured image.

It should be noted that image capturing conditions such as a frame rate, an exposure value, a magnification, or a focus may be specified by a user or may be automatically set by the control unit 11413 of the CCU 11201 based on the obtained image signal. In the latter case, the endoscope 11100 has built-in an Auto Exposure (AE) function, an Auto Focus (AF) function, and an Auto White Balance (AWB) function.

The camera control unit 11405 controls driving of the camera 11102 based on a control signal from the CCU 11201 received through the communication unit 11404.

The communication unit 11411 includes a communication device for transmitting and receiving various types of information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted thereto from the camera 11102 through the transmission cable 11400.

Further, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted by electric communication, optical communication, or the like.

The image processing unit 11412 performs various image processings on the image signal in the form of RAW data transmitted thereto from the camera 11102.

The control unit 11413 performs various types of control related to imaging of an operation region or the like by the endoscope 11100 and displaying of a captured image obtained by imaging of the operation region or the like. For example, the control unit 11413 generates a control signal for controlling the driving of the camera 11102.

Further, the control unit 11413 controls the display device 11202 to display a subject image that images a surgical area or the like based on the image signal that has been subjected to the image processing by the image processing unit 11412. Accordingly, the control unit 11413 can recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can identify a surgical tool such as forceps, a specific living body region, bleeding, mist when the energy device 11112 is used, and the like by detecting the shape, color, and the like of the edge of the object included in the captured image. When the control unit 11413 controls the display device 11202 to display the photographed image, the control unit 11413 may display various types of operation support information in a manner overlapping with the image of the operation region using the result of the recognition. In the case where the operation support information is displayed in an overlapping manner and presented to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can perform the operation reliably.

The transmission cable 11400 connecting the camera 11102 and the CCU 11201 to each other is an electric signal cable capable of being used for electric signal communication, an optical fiber capable of being used for optical communication, or a composite cable capable of being used for electric communication and optical communication.

Here, although in the illustrated example, communication is performed by wired communication using the transmission cable 11400, communication between the camera 11102 and the CCU 11201 may also be performed by wireless communication.

One example of an endoscopic surgical system to which techniques according to the present disclosure may be applied has been described above. The technique according to the present disclosure can be applied to the image capturing unit 11402 in the above configuration. Specifically, any of the solid-state imaging devices described in the first to fourteenth embodiments described above may be applied to the imaging unit 11402. By applying the technique according to the present disclosure to the imaging unit 11402, for example, a clearer image of the surgical region can be obtained, so that the operator can reliably examine the surgical region.

Note that here, an endoscopic surgery system is described as an example, but the technique according to the present disclosure may be applied to, for example, a microsurgical system or the like.

Other embodiments

As described above, the present technology has been explained by the first to fourteenth embodiments, but should not be construed as limiting the present technology by the description and drawings forming a part of the present disclosure. Various alternative embodiments, examples, and operational techniques will be apparent to those skilled in the art in light of this disclosure.

For example, the technical ideas described in the first to fourteenth embodiments may be combined with each other. For example, in the solid-state image pickup device 1 according to the fifth embodiment described above, the second portion 522 is provided at a position distant from the transfer gate electrodes TRG1 and TRG2 in the Y direction of the semiconductor layer 20, but the same idea may be combined with the solid-state image pickup device 1 according to the first to fourth embodiments and the solid-state image pickup device 1 according to the sixth to fourteenth embodiments. Further, for example, the technical ideas of disposing each of the transfer gate electrodes TRG1 and TRG2 near the corners of the photoelectric conversion unit 21 described in the solid-state image pickup device 1 according to the ninth embodiment and the solid-state image pickup device 1 according to the tenth embodiment may be applied to the solid-state image pickup device 1 according to the first to eighth embodiments and the eleventh to fourteenth embodiments, and various combinations according to the respective technical ideas are possible.

As described above, of course, the present technology includes various embodiments and the like not described herein. Accordingly, the technical scope of the present technology is defined only by matters for defining the invention described in claims deemed appropriate in the light of the above description.

Further, the effects described herein are merely illustrative, and not restrictive, and other effects may be present.

It is to be noted that the present technology may also have the following constitution.

(1)

A solid-state image pickup device includes a semiconductor layer having one surface on which light is incident and the other surface on which an element is formed,

wherein the semiconductor layer includes a plurality of photoelectric conversion units including a first photoelectric conversion portion, a second photoelectric conversion portion, an isolation portion provided between the first photoelectric conversion portion and the second photoelectric conversion portion and capable of forming a first potential barrier, a charge accumulation region, a first transfer transistor capable of transferring signal charges from the first photoelectric conversion portion to the charge accumulation region and forming a second potential barrier higher than the first potential barrier when the signal charges are not transferred, and a second transfer transistor capable of transferring signal charges from the second photoelectric conversion portion to the charge accumulation region and forming the second potential barrier when the signal charges are not transferred; and is also provided with

The isolation portion includes a first region formed of an insulating material extending from the element formation face side in a thickness direction of the semiconductor layer; and a second region provided on the light incidence face side of the first region and formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted.

(2)

The solid-state image pickup device according to (1),

wherein the semiconductor layer has a groove extending from the element forming surface in a thickness direction of the semiconductor layer, and

the first region is formed of the insulating material embedded in the recess.

(3)

The solid-state image pickup device according to (1) or (2), wherein in a thickness direction of the semiconductor layer, the second region includes a first portion in which a concentration of an impurity exhibiting the first conductivity type is a first concentration; and a second portion in which a concentration of the impurity exhibiting the first conductivity type is a second concentration lower than the first concentration.

(4)

The solid-state image pickup device according to (3), wherein the second portion is provided on a light incident surface side of the first region in a thickness direction of the semiconductor layer, and the first portion is provided on a light incident surface side of the second portion.

(5)

The solid-state image pickup device according to (3),

wherein the spacer includes a hole accumulation region provided on the light incidence surface side of the first region in a thickness direction of the semiconductor layer, and

the second portion is provided on a light incidence surface side of the hole accumulation region in a thickness direction of the semiconductor layer, and the first portion is provided on the light incidence surface side of the second portion.

(6)

The solid-state image pickup device according to any one of (3) to (5), wherein when the signal charge moves between the first photoelectric conversion portion and the second photoelectric conversion portion, the second portion is a channel through which the signal charge passes, and the first portion is an impurity isolation region that suppresses movement of the signal charge between the first photoelectric conversion portion and the second photoelectric conversion portion.

(7)

The solid-state image pickup device according to any one of (1) to (6),

wherein the first photoelectric conversion portion and the second photoelectric conversion portion are arranged in a first direction in a plan view,

the first transfer transistor and the second transfer transistor are disposed closer to one side of the photoelectric conversion unit in a second direction intersecting the first direction in the plan view, and

The first region and the second region are disposed closer to the other side of the photoelectric conversion unit in the second direction.

(8)

The solid-state image pickup device according to any one of (1) to (6), wherein each of the first transfer transistor and the second transfer transistor is provided near a corner of the photoelectric conversion unit.

(9)

The solid-state image pickup device according to any one of (1) to (8),

wherein the charge accumulating region includes a first charge accumulating region and a second charge accumulating region provided separately from the first charge accumulating region,

the first charge accumulation region accumulates the signal charges transferred from the first photoelectric conversion portion by the first transfer transistor, and

the second charge accumulation region accumulates the signal charge transferred from the second photoelectric conversion portion by the second transfer transistor.

(10)

The solid-state image pickup device according to any one of (1) to (9),

the semiconductor layer includes a cell isolation portion that isolates adjacent photoelectric conversion cells from each other, an

The spacer includes a third region protruding in a protruding shape from the unit spacer disposed in the first direction toward the first region and the second region.

(11)

The solid-state image pickup device according to (10), wherein the cell isolation portion and the third region are formed of a semiconductor region in which an impurity exhibiting the first conductivity type is injected, and are impurity isolation regions that suppress movement of signal charges.

(12)

The solid-state image pickup device according to (10), wherein in a thickness direction of the semiconductor layer, the unit isolation portion is formed of an insulating material provided from one of the light incident surface and the element forming surface to the other.

(13)

The solid-state image pickup device according to (12), wherein the third region is formed of an insulating material provided from one of the light incident surface and the element forming surface to the other.

(14)

The solid-state image pickup device according to (12), wherein the widths of the unit spacers are different in the thickness direction of the semiconductor layer.

(15)

The solid-state image pickup device according to (13), wherein a width of the third region is different in a thickness direction of the semiconductor layer.

(16)

The solid-state image pickup device according to (10),

wherein the cell isolation portion is formed of a semiconductor region in which an impurity exhibiting a first conductivity type is implanted, and includes a portion serving as an impurity isolation region that suppresses movement of signal charges and a portion formed of an insulating material, and

in the thickness direction of the semiconductor layer, the unit isolation portion has a portion formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, closer to the element formation face side, and has a portion formed of an insulating material, closer to the light incidence face side.

(17)

The solid-state image pickup device according to (16),

wherein the third region is formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted, and includes a portion functioning as an impurity isolation region which suppresses movement of signal charges and a portion formed of an insulating material, and

the third region has a portion formed of a semiconductor region into which impurities are implanted closer to the element forming face side and a portion formed of an insulating material closer to the light incident face side in a thickness direction of the semiconductor layer.

(18)

The solid-state image pickup device according to any one of (1) to (17), wherein the insulating material is silicon oxide.

(19)

An electronic device, comprising:

a solid-state image pickup device; and

an optical system that causes the solid-state image pickup device to form an image of image light from an object,

wherein the solid-state image pickup device includes a semiconductor layer having one surface that is a light incident surface and the other surface that is an element forming surface,

the semiconductor layer includes a plurality of photoelectric conversion units including: a first photoelectric conversion section; a second photoelectric conversion section; an isolation portion that is provided between the first photoelectric conversion portion and the second photoelectric conversion portion and is capable of forming a first potential barrier; a charge accumulation region; a first transfer transistor capable of transferring signal charges from the first photoelectric conversion portion to the charge accumulation region and forming a second potential barrier higher than the first potential barrier when the signal charges are not transferred; and a second transfer transistor capable of transferring signal charges from the second photoelectric conversion portion to the charge accumulation region and forming the second potential barrier when the signal charges are not transferred; and is also provided with

(20)

A method of manufacturing a solid-state image pickup device, the method comprising:

forming a first photoelectric conversion portion and a second photoelectric conversion portion in a semiconductor layer having one surface which is a light incidence surface and the other surface which is an element formation surface;

forming a first impurity region in the semiconductor layer between the first photoelectric conversion portion and the second photoelectric conversion portion, the concentration of an impurity exhibiting a first conductivity type in the first impurity region being a first concentration;

forming a groove in the semiconductor layer between the first photoelectric conversion portion and the second photoelectric conversion portion from the element forming surface in a thickness direction of the semiconductor;

selectively forming a second impurity region in the semiconductor layer adjacent to a bottom of the groove from the element formation face side, the second impurity region exhibiting a second concentration of the impurity of the first conductivity type lower than the first concentration; and

An insulating material is embedded in the recess.

The scope of the present technology is not limited to the exemplary embodiments illustrated and described, and includes all embodiments that provide an effect equivalent to that which the present technology is intended to provide. Furthermore, the scope of the present technology is not limited to the combination of features of the present invention as defined by the claims, and may be defined by any desired combination of specific features among all of the disclosed features.

List of reference numerals

1 solid-state image pickup device

2 semiconductor chip

2A pixel region

2B peripheral region

3 pixels

4 vertical driving circuit

5-column signal processing circuit

6 horizontal driving circuit

7 output circuit

8 control circuit

10 pixel driving line

11 vertical signal line

12 horizontal signal line

13 logic circuit

14 bond pads

15 circuit

16 transistor group

17 electrode pad

18 electrode pad

20. 20A, 20B, 20C semiconductor layers

20a active area

21 photoelectric conversion unit

22. 22A, 22A1, 22A2, 22B, 22C, 22G1, 22G2 cell spacers

23L first photoelectric conversion part

23R second photoelectric conversion part

24L first pass transistor

24R second pass transistor

25 charge accumulation region

25L of first charge accumulation region

25R second charge accumulation region

26 groove

26a bottom

30. 30A, 30B, 30C interlayer wiring layer

31 interlayer insulating film

32 wiring layer

41 support substrate

42 color filter

43 microlens layer

43a micro lens

50. 50B, 50D, 50E, 50F, 50G spacers

51 first region

51a end

52 second region

521. First part

522. Second part

53 third region

Third regions 53B, 53B1, 53B2, 53E, 53G1, 53G2

54 hole accumulation region

70A light receiving substrate

70B pixel circuit substrate

70C logic circuit substrate

80 through the electrode.

Claims

1. A solid-state image pickup device includes a semiconductor layer having one surface on which light is incident and the other surface on which an element is formed,

wherein the semiconductor layer includes a plurality of photoelectric conversion units including: a first photoelectric conversion section; a second photoelectric conversion section; an isolation portion provided between the first photoelectric conversion portion and the second photoelectric conversion portion and capable of forming a first potential barrier; a charge accumulation region; a first transfer transistor that transfers signal charges from the first photoelectric conversion portion to the charge accumulation region, and is capable of forming a second potential barrier higher than the first potential barrier when the signal charges are not transferred; and a second transfer transistor that transfers signal charges from the second photoelectric conversion portion to the charge accumulation region, and is capable of forming the second potential barrier when the signal charges are not transferred; and is also provided with

2. The solid-state image pickup device according to claim 1,

the first region is formed of the insulating material embedded in the recess.

3. The solid-state image pickup device according to claim 1, wherein in a thickness direction of the semiconductor layer, the second region includes a first portion in which a concentration of an impurity exhibiting the first conductivity type is a first concentration; and a second portion in which a concentration of the impurity exhibiting the first conductivity type is a second concentration lower than the first concentration.

4. A solid-state image pickup device according to claim 3, wherein the second portion is provided on the light incident surface side of the first region in a thickness direction of the semiconductor layer, and the first portion is provided on the light incident surface side of the second portion.

5. The solid-state image pickup device according to claim 3,

the second portion is provided on the light incidence surface side of the hole accumulation region in the thickness direction of the semiconductor layer, and the first portion is provided on the light incidence surface side of the second portion.

6. The solid-state image pickup device according to claim 3, wherein when signal charges move between the first photoelectric conversion portion and the second photoelectric conversion portion, the second portion is a channel through which the signal charges pass, and the first portion is an impurity isolation region that suppresses movement of the signal charges between the first photoelectric conversion portion and the second photoelectric conversion portion.

7. The solid-state image pickup device according to claim 1,

8. The solid-state image pickup device according to claim 1, wherein each of the first transfer transistor and the second transfer transistor is provided near a corner of the photoelectric conversion unit.

9. The solid-state image pickup device according to claim 1,

10. The solid-state image pickup device according to claim 1,

the semiconductor layer includes a cell isolation portion that isolates adjacent ones of the photoelectric conversion cells from each other, an

11. The solid-state image pickup device according to claim 10, wherein the cell isolation portion and the third region are formed of a semiconductor region in which an impurity exhibiting the first conductivity type is injected, and are impurity isolation regions that suppress movement of signal charges.

12. The solid-state image pickup device according to claim 10, wherein the unit isolation portion is formed of an insulating material provided from one of the light incident surface and the element forming surface to the other in a thickness direction of the semiconductor layer.

13. The solid-state image pickup device according to claim 12, wherein the third region is formed of an insulating material provided from one of the light incident surface and the element forming surface to the other.

14. The solid-state image pickup device according to claim 12, wherein a width of a portion of the unit isolation portion closer to the light incident surface is narrower than a width of a portion of the unit isolation portion closer to the element forming surface.

15. The solid-state image pickup device according to claim 13, wherein a width of a portion of the third region closer to the light incident surface is narrower than a width of a portion of the third region closer to the element forming surface.

16. The solid-state image pickup device according to claim 10,

the unit isolation portion has the portion formed of the semiconductor region in which the impurity exhibiting the first conductivity type is implanted, closer to the element formation face side, and has the portion formed of the insulating material, closer to the light incidence face side, in the thickness direction of the semiconductor layer.

17. The solid-state image pickup device according to claim 16,

The third region has the portion formed of the semiconductor region in which impurities are implanted, on a side closer to the element forming face, and has the portion formed of an insulating material on a side closer to the light incident face in a thickness direction of the semiconductor layer.

18. The solid-state image pickup device according to claim 1, wherein the insulating material is silicon oxide.

19. An electronic device, comprising:

a solid-state image pickup device; and

the semiconductor layer includes a plurality of photoelectric conversion units including: a first photoelectric conversion section; a second photoelectric conversion section; an isolation portion that is provided between the first photoelectric conversion portion and the second photoelectric conversion portion and is capable of forming a first potential barrier; a charge accumulation region; a first transfer transistor that transfers signal charges from the first photoelectric conversion portion to the charge accumulation region, and is capable of forming a second potential barrier higher than the first potential barrier when the signal charges are not transferred; and a second transfer transistor that transfers signal charges from the second photoelectric conversion portion to the charge accumulation region, and is capable of forming the second potential barrier when the signal charges are not transferred; and is also provided with

The isolation portion includes: a first region formed of an insulating material and extending from the element formation surface side in a thickness direction of the semiconductor layer; and a second region provided on the light incidence face side of the first region and formed of a semiconductor region in which an impurity exhibiting the first conductivity type is implanted.