CN116783822A

CN116783822A - Resonant device and method of manufacturing the same

Info

Publication number: CN116783822A
Application number: CN202180092165.4A
Authority: CN
Inventors: 福光政和; 樋口敬之
Original assignee: Murata Manufacturing Co Ltd
Current assignee: Murata Manufacturing Co Ltd
Priority date: 2021-02-04
Filing date: 2021-09-27
Publication date: 2023-09-19
Also published as: WO2022168363A1; US20230361741A1; JPWO2022168363A1

Abstract

The method for manufacturing a resonance device (1) of the present invention comprises: preparing an aggregate substrate (100) having a plurality of first power supply terminals (ST 1) electrically connected to upper electrodes (125) of the plurality of resonators (10), and a first connection line (LL) electrically connecting at least two of the plurality of first power supply terminals (ST 1); and dividing the aggregate substrate (100) into a plurality of resonant devices (1), wherein the plurality of first power supply terminals (ST 1) are composed of a first metal layer (ML 1) and a second metal layer (ML 2) covering the first metal layer (ML 1), the first connecting wiring (LL) is composed of a portion of the first metal layer (ML 1) extending and protruding from a region covered by the second metal layer (ML 2), and the method for manufacturing the resonant devices (1) further comprises: before dividing the aggregate substrate (100) into a plurality of resonant devices (1), the first metal layer (ML 1) is removed from the region covered by the second metal layer (ML 2) by a portion that extends and protrudes.

Description

Resonant device and method of manufacturing the same

Technical Field

The present invention relates to a resonance device and a method of manufacturing the same.

Background

Devices manufactured using MEMS (Micro Electro Mechanical Systems: microelectromechanical systems) technology, for example, have been popular in the past. For example, after a plurality of devices are formed on a collective substrate (wafer), the wafer is divided and singulated (chipped) into devices.

For example, patent document 1 discloses a method for manufacturing a resonant device, in which a frequency adjustment step of applying a predetermined driving voltage to a resonator to adjust a resonant frequency is performed in a singulated state.

Patent document 1: international publication No. 2017/212677

In the resonance device manufactured by the method disclosed in patent document 1, in order to perform the frequency adjustment process, it is necessary to connect a probe to a terminal of each resonance device and apply a driving voltage, and it takes time to perform frequency adjustment for all the resonance devices.

As a method for shortening the time for frequency adjustment to improve productivity, it is considered to provide connection wirings for electrically connecting terminals of each of the resonance devices on the wafer, and to perform frequency adjustment at once before dividing the wafer into the resonance devices. However, in the case where the terminal and the connection wiring of each resonator device are formed separately, productivity is lowered due to an increase in the manufacturing process. In addition, in the case where the terminal and the connection wiring of each resonator device are integrally formed, the connection wiring on the dividing line is deformed in the step of dividing into each resonator device. In this case, the deformed connection wiring may be short-circuited with other terminals of the resonator device, and defective products may be generated, thereby reducing productivity.

Disclosure of Invention

The present invention has been made in view of such circumstances, and an object thereof is to provide a resonator device with improved productivity and a method for manufacturing the same.

A method for manufacturing a resonant device according to an aspect of the present invention includes:

preparing an aggregate substrate including a first substrate having a plurality of resonators and a second substrate bonded to a plurality of resonators of the first substrate, the plurality of resonators having upper electrodes and lower electrodes, respectively, the aggregate substrate having a plurality of first power supply terminals electrically connected to the upper electrodes of the plurality of resonators, and a first connection wiring electrically connecting at least two of the plurality of first power supply terminals; and

dividing the aggregate substrate into a plurality of resonant devices,

the plurality of first power supply terminals are composed of a first metal layer arranged on the opposite side of the second substrate from the first substrate, and a second metal layer covering the first metal layer,

the first connecting wiring is constituted by a portion of the first metal layer extending and protruding from the region covered by the second metal layer,

the method for manufacturing the resonance device further comprises the following steps: before dividing the aggregate substrate into a plurality of resonant devices, portions of the first metal layer extending and protruding from the region covered by the second metal layer are removed.

A resonance device according to another aspect of the present invention includes:

a first substrate having a resonator having an upper electrode and a lower electrode; and

a second substrate bonded to the resonator side of the first substrate,

the second substrate has:

a semiconductor substrate;

a first power supply terminal and a second power supply terminal provided on the opposite side of the semiconductor substrate from the first substrate, electrically connected to a part of the upper electrode, and insulated from each other;

a ground terminal provided on the opposite side of the semiconductor substrate from the first substrate and electrically connected to the lower electrode; and

an insulating layer disposed between the semiconductor substrate and the first power terminal and between the semiconductor substrate and the second power terminal,

the insulating layer has a central region separated from the outer edge of the second substrate when the second substrate is viewed from the opposite side of the first substrate, and a connecting region extending from the central region and reaching the outer edge of the second substrate.

According to the present invention, a resonator device with improved productivity and a method of manufacturing the same can be provided.

Drawings

Fig. 1 is a perspective view schematically showing an external appearance of a resonance device according to an embodiment.

Fig. 2 is an exploded perspective view schematically showing the structure of the resonance device shown in fig. 1.

Fig. 3 is a plan view schematically showing the structure of the resonator shown in fig. 1.

Fig. 4 is a cross-sectional view schematically showing a structure of a cross section along line IV-IV of the resonance device shown in fig. 1.

Fig. 5 is a plan view schematically showing the resonator shown in fig. 1 and wiring around the resonator.

Fig. 6 is a plan view schematically showing the structure of the upper cover shown in fig. 1.

Fig. 7 is an exploded perspective view schematically showing the external appearance of the aggregate substrate in one embodiment.

Fig. 8 is a partially enlarged view of the region a shown in fig. 7.

Fig. 9 is a partially enlarged view of the region B shown in fig. 7.

Fig. 10 is a flowchart showing a method of manufacturing a resonant device according to an embodiment.

Fig. 11 is a cross-sectional view schematically showing the structure of the aggregate substrate after the upper substrate and the lower substrate are bonded.

Fig. 12 is a cross-sectional view schematically showing the structure of the aggregate substrate before division.

Fig. 13 is a cross-sectional view schematically showing a structure of the aggregate substrate in one embodiment.

Fig. 14 is a plan view schematically showing a structure of the aggregate substrate in one embodiment.

Detailed Description

Embodiments of the present invention are described below. In the description of the drawings below, the same or similar constituent elements are denoted by the same or similar reference numerals. The drawings are illustrative, and the size and shape of each part are schematic, and the technical scope of the present invention should not be construed as being limited to the embodiment.

< resonance device >

First, a schematic configuration of a resonance device 1 according to an embodiment of the present invention will be described with reference to fig. 1 and 2. Fig. 1 is a perspective view schematically showing an external appearance of a resonance device according to an embodiment of the present invention. Fig. 2 is an exploded perspective view schematically showing the structure of the resonance device shown in fig. 1.

As shown in fig. 1 and 2, the resonator device 1 includes a resonator 10, and a lower cover 20 and an upper cover 30 that form a vibration space in which the resonator 10 vibrates. That is, the resonator device 1 is configured by stacking the lower cover 20, the resonator 10, a joint 60 described later, and the upper cover 30 in this order. The MEMS substrate 50 (the lower cover 20 and the resonator 10) of the present embodiment corresponds to an example of the "first substrate" of the present invention, and the upper cover 30 of the present embodiment corresponds to an example of the "second substrate" of the present invention.

Hereinafter, each structure of the resonance device 1 will be described. In the following description, the side of the resonator device 1 on which the upper cover 30 is provided is referred to as the upper (or front) side, and the side on which the lower cover 20 is provided is referred to as the lower (or rear) side.

The resonator 10 is a MEMS resonator manufactured using MEMS technology. The resonator 10 and the upper cover 30 are joined via a joint 60. The resonator 10 and the lower cover 20 are formed using silicon (Si) substrates (hereinafter, referred to as "Si substrates"), respectively, and the Si substrates are bonded to each other. The resonator 10 and the lower cover 20 may be formed using an SOI substrate.

The upper cover 30 is formed in a flat plate shape along the XY plane, and a flat rectangular parallelepiped concave portion 31 is formed at the lower side thereof, for example. The recess 31 is surrounded by the side wall 33, and forms a part of a vibration space which is a space in which the resonator 10 vibrates. The upper cover 30 may have a flat plate shape without the concave portion 31. Further, an air-absorbing layer for absorbing the exhaust gas may be formed on the surface of the recess 31 of the upper cover 30 on the side of the resonator 10.

Two power supply terminals ST1, ST2, a ground terminal GT, and a dummy terminal DT are provided on the upper surface of the upper cover 30. The power supply terminals ST1 and ST2 are configured to supply a drive signal (drive voltage) to the resonator 10. The power supply terminals ST1 and ST2 are electrically connected to upper electrodes 125A, 125B, 125C, and 125D of the resonator 10 described later. The ground terminal GT is used to provide a reference potential to the resonator 10. The ground terminal GT is electrically connected to a lower electrode 129 of the resonator 10 described later. In contrast, the dummy terminal DT is not electrically connected to the resonator 10. The power supply terminal ST1 of the present embodiment corresponds to an example of the "first power supply terminal" of the present invention, and the power supply terminal ST2 of the present embodiment corresponds to an example of the "second power supply terminal" of the present invention.

The power supply terminals ST1 and ST2, the ground terminal GT, and the dummy terminal DT are formed by stacking the metal layer ML1 and the metal layer ML2 in this order from the Si wafer L3 side. The metal layer ML1 is connected to the through electrodes V1 and V2, and the metal layer ML2 covers the metal layer ML1. The metal layer ML1 is a seed film for plating, and is formed by stacking, for example, a Cu seed and a Ti barrier metal formed by sputtering in this order from the Si wafer L3 side. The metal layer ML1 corresponds to an example of the "first metal layer" of the present invention, and the metal layer ML2 corresponds to an example of the "second metal layer" of the present invention.

The lower cover 20 has a rectangular flat plate-like bottom plate 22 provided along the XY plane, and side walls 23 extending from the peripheral edge portion of the bottom plate 22 in the Z-axis direction, that is, in the stacking direction of the cover 20 and the resonator 10. In the lower cover 20, a recess 21 formed by the upper surface of the bottom plate 22 and the inner surface of the side wall 23 is formed on the surface facing the resonator 10. The recess 21 forms a part of the vibration space of the resonator 10. The lower cover 20 may have a flat plate shape without the concave portion 21. Further, a getter layer for adsorbing exhaust gas may be formed on the surface of the recess 21 of the lower cover 20 on the side of the resonator 10.

Next, a schematic configuration of the resonator element 10 in the resonator device 1 according to an embodiment of the present invention will be described with reference to fig. 3. Fig. 3 is a plan view schematically showing the structure of the resonator shown in fig. 1.

As shown in fig. 3, the resonator 10 is a MEMS resonator manufactured using MEMS technology. The resonator 10 has an upper surface and a lower surface extending on an XY plane in an orthogonal coordinate system of fig. 3, and performs out-of-plane flexural vibration with respect to the XY plane. The resonator 10 is not limited to a resonator using the out-of-plane bending vibration mode. The resonator of the resonator device 1 may be, for example, a resonator using an extended vibration mode, a thickness longitudinal vibration mode, a lamb wave vibration mode, an in-plane bending vibration mode, or a surface wave vibration mode. These vibrators are used in, for example, timing devices, RF filters, diplexers, ultrasonic transducers, gyroscopic sensors, acceleration sensors, and the like. In addition, the present invention can be applied to a piezoelectric mirror having an actuator function, a piezoelectric gyroscope, a piezoelectric microphone having a pressure sensor function, an ultrasonic vibration sensor, and the like. Further, the present invention can be applied to electrostatic MEMS elements, electromagnetic drive MEMS elements, and piezoresistance MEMS elements.

Resonator 10 includes vibrating section 120, holding section 140, and holding arm 110. The resonator 10 is formed to be plane-symmetrical with respect to a virtual plane P parallel to the YZ plane, for example. That is, the shape of each of the vibrating portion 120, the holding portion 140, and the holding arm 110 is substantially plane-symmetrical with respect to the virtual plane P as a symmetry plane.

The vibration part 120 is provided inside the holding part 140, and a space is formed between the vibration part 120 and the holding part 140 at a predetermined interval. In the example shown in fig. 3, the vibrating portion 120 includes a base 130 and four vibrating arms 135A to 135D (hereinafter, also referred to as "vibrating arms 135"). The number of vibrating arms is not limited to four, and is set to any number of three or more, for example. In the present embodiment, each of the vibrating arms 135A to 135D is integrally formed with the base 130.

When the upper surface of the resonator 10 is viewed in plan (hereinafter, simply referred to as "plan"), the base 130 has long sides 131a and 131b extending in the X-axis direction and short sides 131c and 131d extending in the Y-axis direction. The long side 131A is one side of the front end surface (hereinafter, also referred to as "front end surface 131A") of the base 130, and the long side 131B is one side of the rear end surface (hereinafter, also referred to as "rear end surface 131B") of the base 130. The short side 131C is one side of a surface of one end of the base 130 (hereinafter, also referred to as "left end surface 131C"), and the short side 131C is one side of a surface of the other end of the base 130 (hereinafter, also referred to as "right end surface 131D"). In the base 130, the front end surface 131A and the rear end surface 131B are provided so as to face each other, and the left end surface 131C and the right end surface 131D are provided so as to face each other.

The base 130 is connected to the vibrating arm 135 at a front end surface 131A and is connected to a holding arm 110 described later at a rear end surface 131B. The midpoints of the long sides 131a, 131b, respectively, lie on a virtual plane P. In the example shown in fig. 3, the base 130 has a substantially rectangular shape in a plan view, but is not limited thereto. The base 130 may be formed to be substantially plane-symmetrical with respect to the virtual plane P. For example, the base 130 may have a trapezoid shape having a longer side 131b than 131a, or may have a semicircular shape having a longer side 131a as a diameter. The surfaces of the base 130 are not limited to a flat surface, and may be curved surfaces.

In the base 130, the base length, which is the longest distance between the front end surface 131A and the rear end surface 131B in the direction from the front end surface 131A to the rear end surface 131B, is about 35 μm. In addition, in the width direction orthogonal to the base longitudinal direction, the base width, which is the longest distance between the side ends of the base 130, is about 265 μm.

The vibrating arms 135 extend in the Y-axis direction and have the same size, respectively. The vibrating arms 135 are provided between the base 130 and the holding portion 140 in parallel with the Y-axis direction, and have one end connected to the front end surface 131A of the base 130 to be a fixed end and the other end to be an open end. The vibrating arms 135 are arranged in parallel at predetermined intervals in the X-axis direction. The width of the vibrating arm 135 in the X-axis direction (hereinafter, also simply referred to as "width") is, for example, about 50 μm, and the length in the Y-axis direction (hereinafter, also simply referred to as "length") is about 450 μm.

For example, the width of the vibrating arm 135 at a portion of about 150 μm in the Y-axis direction from the open end is wider than the width of the other portion of the vibrating arm 135. The portion where the width is widened is called a weight G. The weight G protrudes to the left and right in the X-axis direction by, for example, 10 μm compared with other portions of the vibrating arm 135, and has a width of, for example, about 70 μm. The hammer G and the vibrating arm 135 are integrally formed in the same process. By forming the weight G, the weight per unit length in the vibrating arm 135 is heavier on the open end side than on the fixed end side. Accordingly, the vibration arms 135 each have the weight G at the open end side, and thus the amplitude of the vibration in the up-down direction in each vibration arm can be increased.

A protective film 235, which will be described later, is formed on the upper surface (surface facing the upper cover 30) of the vibration portion 120 so as to cover the entire surface thereof. Further, frequency adjustment films 236 are formed on the upper surfaces of the protective films 235 in the front ends of the open end sides of the vibrating arms 135A to 135D, respectively. The frequency adjustment film 236 is provided on, for example, substantially the entire upper surface of the weight G. The resonance frequency of the vibration part 120 can be adjusted by removing the trimming protective film 235 and the frequency adjusting film 236 from the upper surface side.

The holding portion 140 is formed in a rectangular frame shape so as to surround the outside of the vibration portion 120 along the XY plane. The holding portion 140 includes a front frame 141a provided on the +y axis direction side of the vibrating portion 120, a rear frame 141b provided on the-Y axis direction side of the vibrating portion 120, a left frame 141c provided on the-X axis direction side of the vibrating portion 120, and a right frame 141d provided on the +x axis direction side of the vibrating portion 120. The holding portion 140 may be provided at least in a part of the periphery of the vibration portion 120, and is not limited to a frame-like shape.

The holding arm 110 is provided inside the holding portion 140, and connects the vibration portion 120 and the holding portion 140. The holding arm 110 holds the vibration portion 120 such that the base portion 130 can perform out-of-plane bending vibration. The holding arm 110 has a left holding arm 110a and a right holding arm 110b. For example, one end of the left holding arm 110a is connected to the rear end surface 131B of the base 130, and the other end of the left holding arm 110a is connected to the left frame 141c of the holding portion 140. One end of the right holding arm 110B is connected to the rear end surface 131B of the base 130, and the other end of the right holding arm 110B is connected to the right frame 141d of the holding portion 140. The width of the portion of each of the left and right holding arms 110a and 110b connected to the base 130 is smaller than the width of the base 130.

Next, a laminated structure of the resonance device 1 according to an embodiment of the present invention will be described with reference to fig. 4. Fig. 4 is a cross-sectional view schematically showing a structure of a cross section along line IV-IV of the resonance device 1 shown in fig. 1.

As shown in fig. 4, the resonator device 1 engages the resonator 10 on the lower cover 20, and further engages the resonator 10 and the upper cover 30. In this way, the resonator 10 is held between the lower cover 20 and the upper cover 30, and a vibration space in which the vibration portion 120 vibrates is formed by the lower cover 20, the upper cover 30, and the holding portion 140 of the resonator 10.

The lower cover 20 is integrally formed of a silicon (Si) wafer (hereinafter, referred to as "Si wafer") L1. The thickness of the lower cover 20 defined in the Z-axis direction is, for example, about 150 μm. The Si wafer L1 is formed using nondegenerated silicon, and has a resistivity of, for example, 16mΩ·cm or more.

The holding portion 140, the base portion 130, the vibrating arm 135, and the holding arm 110 in the resonator 10 are integrally formed in the same process. The resonator 10 is formed with a lower electrode 129 on a silicon (Si) substrate (hereinafter, referred to as "Si substrate") F2 as an example of a substrate so as to cover the upper surface of the Si substrate F2. A piezoelectric film F3 is formed on the lower electrode 129 so as to cover the lower electrode 129. Four upper electrodes 125A, 125B, 125C, 125D (hereinafter, also referred to as "upper electrodes 125") are laminated on the piezoelectric film F3. A protective film 235 is laminated on the upper electrode 125 so as to cover the upper electrode 125. The protective film 235 is provided with a conductive layer CL and upper wirings UW1 and UW2, and is electrically separated from each other.

The lower electrode 129 is formed on the upper surface of the Si substrate F2 substantially entirely and extends to the outer edge of the resonator 10. In this way, in the state of the aggregate substrate 100 described below before singulation (dicing), the lower electrodes 129 of the adjacent resonator devices 1 are connected to each other, whereby the lower electrodes 129 of the plurality of resonator devices 1 can be turned on.

The Si substrate F2 may be formed of, for example, a degenerate n-type silicon (Si) semiconductor having a thickness of about 6 μm. Degenerate silicon (Si) can contain phosphorus (P), arsenic (As), antimony (Sb), etc. As n-type dopants. The resistance value of degenerate silicon (Si) used for the Si substrate F2 is, for example, less than 16mΩ·cm, and more preferably 1.2mΩ·cm or less. Further, as an example of the temperature characteristic correction layer, silicon oxide (for example, siO ₂ ) A layer.

Since the Si substrate F2 is degenerate silicon (Si) in this way, for example, the Si substrate F2 itself can be made to function as the lower electrode by using a degenerate silicon substrate having a low resistance value, and the lower electrode 129 can be omitted. In this case, in the state of the aggregate substrate 100, by sharing the Si substrate F2 with the adjacent resonator devices 1, the lower electrodes, which are Si substrates F2 of the plurality of resonator devices 1, can be turned on.

The thickness of the lower electrode 129 and the upper electrode 125 is, for example, about 0.1 μm or more and 0.2 μm or less, and is patterned into a desired shape by etching or the like. The lower electrode 129 and the upper electrode 125 are made of a metal having a crystal structure of a body centered cubic structure. Specifically, the lower electrode 129 and the upper electrode 125 are formed using Mo (molybdenum), tungsten (W), or the like.

The piezoelectric film F3 is a film of a piezoelectric body that converts electric energy and mechanical energy into each other. The piezoelectric thin film F3 is formed using a material having a wurtzite-type hexagonal crystal structure, and can be composed of, for example, a nitride or an oxide such as aluminum nitride (AlN), scandium aluminum nitride (scann), zinc oxide (ZnO), gallium nitride (GaN), or indium nitride (InN). The scandium aluminum nitride is formed by substituting scandium for part of aluminum in the aluminum nitride, and may be substituted with two elements such as magnesium (Mg) and niobium (Nb), magnesium (Mg) and zirconium (Zr), instead of scandium. The piezoelectric film F3 has a thickness of, for example, 1 μm, but may have a thickness of about 0.2 μm or more and 2 μm or less.

The piezoelectric film F3 expands and contracts in the Y-axis direction in the in-plane direction of the XY plane in accordance with the electric field applied to the piezoelectric film F3 by the lower electrode 129 and the upper electrode 125. By the expansion and contraction of the piezoelectric film F3, the vibrating arms 135 are displaced toward the inner surfaces of the lower cover 20 and the upper cover 30, and vibrate in an out-of-plane flexural vibration mode.

In the present embodiment, the phases of the electric fields applied to the upper electrodes 125A, 125D of the outer vibrating arms 135A, 135D and the phases of the electric fields applied to the upper electrodes 125B, 125C of the inner vibrating arms 135B, 135C are set to be opposite to each other. Thus, the outer vibrating arms 135A and 135D and the inner vibrating arms 135B and 135C are displaced in opposite directions. For example, if the outer vibrating arms 135A and 135D displace the free ends toward the inner surface of the upper cover 30, the inner vibrating arms 135B and 135C displace the free ends toward the inner surface of the lower cover 20. Thereby, a first rotational moment is generated about a rotational axis extending in the Y-axis direction between the outer vibrating arm 135A and the inner vibrating arm 135B. In addition, a second rotational moment opposite to the first rotational moment direction is generated about the rotation axis extending in the Y-axis direction between the outer vibrating arm 135D and the inner vibrating arm 135C. The first and second rotational moments also act on the base 130, and the base 130 displaces the left end surface 131C and the right end surface 131D thereof toward the inner surfaces of the lower cover 20 and the upper cover 30, and vibrates in an out-of-plane bending vibration mode.

The protective film 235 prevents oxidation of the upper electrode 125. The protective film 235 is preferably formed of a material whose rate of decrease based on the mass of etching is slower than that of the frequency adjustment film 236. The mass reduction rate is represented by the etching rate, that is, the product of the thickness and the density removed per unit time. The protective film 235 is made of, for example, aluminum nitride (AlN), scandium aluminum nitride (scann), zinc oxide (ZnO), gallium nitride (GaN), indium nitride (InN), or silicon nitride (SiN), silicon oxide (SiO) ₂ ) Alumina (Al) ₂ O ₃ ) And forming an insulating film. The thickness of the protective film 235 is, for example, about 0.2 μm.

The frequency adjustment film 236 is formed on substantially the entire surface of the vibration portion 120, and then is formed only in a predetermined region by processing such as etching. The frequency adjustment film 236 is formed of a material that decreases faster than the protective film 235 based on the mass of etching. Specifically, the frequency adjustment film 236 is formed using a metal such as molybdenum (Mo), tungsten (W), gold (Au), platinum (Pt), nickel (Ni), or titanium (Ti).

The magnitude relationship between the etching rate and the protective film 235 and the frequency adjustment film 236 is arbitrary as long as the relationship between the mass reduction rates is as described above.

The conductive layer CL is formed to be in contact with the lower electrode 129. Specifically, in the connection between the conductive layer CL and the lower electrode 129, a part of the piezoelectric film F3 and the protective film 235 stacked on the lower electrode 129 is removed to expose the lower electrode 129, and a through hole is formed. The inside of the through hole is filled with the same material as the lower electrode 129, and the lower electrode 129 and the conductive layer CL are connected.

The upper wiring UW1 is electrically connected to the upper electrodes 125B and 125C of the inner vibrating arms 135B and 135C via a lower wiring (lower wiring LW1, which will be described later) not shown. The upper wiring UW2 is electrically connected to the upper electrodes 125A, 125D of the outer vibrating arms 135A, 135D via a lower wiring (lower wiring LW2, described later) not shown. The upper wirings UW1 and UW2 are formed using a metal such as aluminum (Al), gold (Au), and tin (Sn).

Between the resonator 10 and the upper cover 30, the joint 60 is formed in a substantially rectangular ring shape along the XY plane. The bonding portion 60 bonds the MEMS substrate 50 and the upper cover 30 so as to seal the vibration space of the resonator 10. Thereby, the vibration space is hermetically sealed, and a vacuum state is maintained.

The joint 60 has conductivity and is formed of a metal such as aluminum (Al), germanium (Ge), an alloy formed by eutectic bonding of aluminum (Al) and germanium (Ge), for example. The bonding portion 60 may be formed of a gold (Au) film, a tin (Sn) film, or the like, or may be formed of a combination of gold (Au) and silicon (Si), gold (Au) and gold (Au), copper (Cu), tin (Sn), or the like. In order to improve the adhesion, the joint portion 60 may be formed by sandwiching thin titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), or the like between the stacked layers.

The bonding portion 60 is arranged on the upper surface of the MEMS substrate 50 (the lower cover 20 and the resonator 10) so as to be spaced apart from the outer edge by a predetermined distance, for example, about 20 μm. This can suppress product failure of the resonance device 1, such as a protrusion (burr) or a collapse, which may occur due to a defective division when the joint 60 is not spaced apart by a predetermined distance.

The upper lid 30 is formed of a Si wafer L3 having a predetermined thickness. The Si wafer L3 corresponds to an example of the "semiconductor substrate" of the present invention. The upper cover 30 is joined to the resonator 10 at its peripheral portion (side wall 33) via a joint portion 60. The upper cover 30 preferably has upper surfaces on which the power supply terminals ST1 and ST2 and the ground terminal GT are provided, lower surfaces facing the resonator 10, and side surfaces of the through electrodes V1 and V2 covered with a silicon oxide film L31. The silicon oxide film L31 is formed on the surface of the Si wafer L3 by, for example, oxidation of the surface of the Si wafer L3 or chemical vapor deposition (CVD: chemical Vapor Deposition).

The silicon oxide film L31 does not have to cover the entire surface of the upper cover 30, and may be provided at least between the Si wafer L3 and the power supply terminal ST1, between the Si wafer L3 and the power supply terminal ST2, and between the Si wafer L3 and the ground terminal GT. The silicon oxide film L31 on the upper surface of the upper cover 30 corresponds to an example of the "insulating layer" of the present invention.

The through-electrodes V1 and V2 are formed by filling a conductive material into through-holes formed in the upper cover 30. The filled conductive material is, for example, polysilicon doped with impurities (Poly-Si), copper (Cu), gold (Au), monocrystalline silicon doped with impurities, or the like. The through electrode V1 functions as a wiring for electrically connecting the power supply terminal ST1 and the terminal T1', and the through electrode V2 functions as a wiring for electrically connecting the power supply terminal ST2 and the terminal T2'.

The upper surface of the upper cover 30 (the surface opposite to the surface facing the resonator 10) is formed with power supply terminals ST1 and ST2 and a ground terminal GT. Terminals T1', T2', and a ground wiring GW are formed on the lower surface (surface facing the resonator 10) of the upper cover 30. The power supply terminal ST1, the through electrode V3, and the terminal T1' are electrically insulated from the Si wafer L3 by the silicon oxide film L31. On the other hand, when the upper cover 30 and the resonator 10 are joined, the terminal T1' is connected to the upper wiring UW1, whereby the power supply terminal ST1 is electrically connected to the upper wiring UW1. As described above, the upper wiring UW1 is electrically connected to the upper electrodes 125B and 125C, and therefore the power supply terminal ST1 is electrically connected to the upper electrodes 125B and 125C of the resonator 10.

The power supply terminal ST2 is electrically connected to the upper wiring UW2 via the through electrode V2 and the terminal T2'. The power supply terminal ST2, the through electrode V3, and the terminal T2' are electrically insulated from the Si wafer L3 by the silicon oxide film L31. On the other hand, when the upper cover 30 and the resonator 10 are joined, the terminal T2' is connected to the upper wiring UW2, whereby the power supply terminal ST2 is electrically connected to the upper wiring UW2. As described above, the upper wiring UW2 is electrically connected to the upper electrodes 125A and 125D, and therefore the power supply terminal ST2 is electrically connected to the upper electrodes 125A and 125D of the resonator 10.

The ground terminal GT is formed to contact the Si wafer L3. Specifically, a part of the silicon oxide film L31 is removed by etching or the like, and the ground terminal GT is formed on the exposed Si wafer L3. Similarly, the ground wiring GW is formed to contact the Si wafer L3. Specifically, a part of the silicon oxide film L31 is removed by etching or the like, and a ground wiring GW is formed on the exposed Si wafer L3.

The ground terminal GT and the ground wiring GW are formed of a metal such as gold (Au) or aluminum (Al). The formed metal is annealed (heat treated) to thereby bring the ground terminal GT and the ground wiring GW into ohmic contact with the Si wafer L3. Thereby, the ground terminal GT and the ground wiring GW are electrically connected via the Si wafer L3.

When the upper cover 30 and the resonator 10 are bonded, the ground wiring GW and the conductive layer CL are connected, and the ground terminal GT is electrically connected to the conductive layer CL. As described above, since the conductive layer CL is electrically connected to the lower electrode 129, the ground terminal GT is electrically connected to the lower electrode 129 of the resonator 10.

In this way, the ground terminal GT is electrically connected to the lower electrode 129 via the ground wiring GW and the conductive layer CL, and thus the ground terminal GT can easily supply (apply) the reference potential to the resonator 10.

Next, with reference to fig. 5, a description will be given of the resonator 10 and the wiring around the resonator in the resonator device 1 according to the embodiment of the present invention. Fig. 5 is a plan view schematically showing the resonator shown in fig. 1 and wiring around the resonator.

As shown in fig. 5, upper electrode 125A is provided to vibrating arm 135A, upper electrode 125B is provided to vibrating arm 135B, upper electrode 125C is provided to vibrating arm 135C, and upper electrode 125D is provided to vibrating arm 135D. The terminal T1' electrically connects the through electrode V1 of the power supply terminal ST1 formed on the upper cover 30 and the upper wiring UW1 formed on the protective film 235 of the resonator 10. The upper wiring UW1 is electrically connected to the lower wiring LW1 covered with the protective film 235. The lower wiring LW1 is routed to be electrically connected to the upper electrode 125B of the vibrating arm 135B and the upper electrode 125C of the vibrating arm 135C.

The terminal T2' electrically connects the through electrode V2 formed on the power supply terminal ST2 of the upper cover 30 and the upper wiring UW2 formed on the protective film 235 of the resonator 10. The upper wiring UW2 is electrically connected to the lower wirings LW21, LW22 covered with the protective film 235. The lower wiring LW21 is routed to be electrically connected to the upper electrode 125D of the vibrating arm 135D. The lower wiring LW22 is routed to be electrically connected to the upper electrode 125A of the vibrating arm 135A.

As is clear from fig. 5, the lengths (distances) of the upper wiring UW1 and the lower wiring LW1 electrically connecting the power supply terminal ST1 and the upper electrodes 125B and 125C are different from the lengths of the upper wiring UW2 and the lower wirings LW21 and LW22 electrically connecting the power supply terminal ST2 and the upper electrodes 125A and 125D, and thus the areas are different.

The lower wiring LW1 includes a dummy wiring DW. The dummy wiring DW is not a wiring for electrical connection, but a wiring that achieves symmetry of the lower wiring LW1 and increases the area thereof. Thereby, the symmetry of the vibration of the vibrating arm 135 can be maintained, and the unbalance of the capacitance generated by the areas of the upper wiring UW1, the lower wiring LW1, the upper wiring UW2, and the lower wirings LW21, LW22 can be adjusted by the area of the dummy wiring DW.

The through-hole electrode V3 is formed by filling a conductive material into a through-hole formed in the upper lid 30, similarly to the through-hole electrodes V1 and V2. The filled conductive material is, for example, polysilicon doped with impurities (Poly-Si), copper (Cu), gold (Au), monocrystalline silicon doped with impurities, or the like. The through electrode V3 functions as a wiring for electrically connecting the ground terminal GT formed on the upper surface of the upper cover 30 and the joint portion 60 formed in the annular shape on the resonator 10. In this way, the ground terminal GT is connected to the lower electrode 129 and electrically connected to the joint portion 60, whereby parasitic capacitance that may occur between the joint portion 60 and the lower electrode 129 can be reduced in the laminated structure shown in fig. 4.

The joint 60 includes a connecting member 65. The connecting member 65 is formed at a corner of the joint 60, for example, and extends to the outer edge of the resonator 10. In this way, in the state of the aggregate substrate 100 described later, the connection members 65 of the diagonally arranged resonator devices 1 are connected to each other, whereby the lower electrodes 129 can be electrically connected to each other via the connection members 65.

The connecting member 65 is not limited to the case of being formed at the corner of the joint 60. For example, the resonator 10 may be extended to the outer edge of the resonator while protruding from the long side or the short side of a substantially rectangular shape in a plan view. The number of the connecting members 65 included in the joint 60 is not limited to one, and may be two or more.

Next, a structure of the upper surface side of the upper cover 30 according to an embodiment of the present invention will be described with reference to fig. 6. Fig. 6 is a plan view schematically showing the structure of the upper cover shown in fig. 1.

As shown in fig. 6, the power supply terminal ST1 includes a power supply pad PD1 and a power supply wiring SL1. The power supply pad PD1 is disposed at a corner portion on the X-axis positive direction side and the Y-axis positive direction side on the upper surface of the upper cover 30. In addition, when the upper surface of the upper cover 30 is viewed in plan (hereinafter, simply referred to as "plan view" because it is the same as when the upper surface of the resonator is viewed in plan), the power supply pad PD1 has a shape including the cutout CO 1. One end (right end in fig. 6) of the power supply wiring SL1 is connected to the power supply pad PD1, and extends to the vicinity of a ground pad PD3 described later. The through electrode V1 is formed at the other end (left end in fig. 6) of the power supply line SL1.

The power supply terminal ST2 includes a power supply pad PD2. The power supply pad PD2 is disposed at a corner portion on the X-axis negative direction side and the Y-axis negative direction side on the upper surface of the upper cover 30. In addition, the power supply pad PD2 has a substantially rectangular shape in plan view. The power supply pad PD2 has a portion protruding in the X-axis positive direction. The through electrode V2 is formed in this portion.

The ground terminal GT includes a ground pad PD3 and a ground wiring GL3. The ground pad PD3 is disposed at a corner on the positive X-axis direction side and the negative Y-axis direction side on the upper surface of the upper cover 30. In addition, the ground pad PD3 has a substantially rectangular shape in plan view. One end (right end in fig. 6) of the ground line GL3 is connected to the power supply pad PD1, and the other end (left end in fig. 6) is formed with the above-described through electrode V3.

The dummy terminal DT is a terminal not electrically connected to the resonator 10. The dummy terminal DT includes only the dummy pad DD. The dummy pads DD are disposed at corners on the negative X-axis direction side and positive Y-axis direction side on the upper surface of the upper cover 30. The dummy pad DD has a substantially rectangular shape in plan view.

As is clear from fig. 6, the power supply terminal ST1 includes the power supply pad PD1 and the power supply wiring SL1, while the power supply terminal ST2 includes only the power supply pad PD2, whereby the areas of the power supply terminal ST1 and the power supply terminal ST2 are different. More specifically, the area of the power supply terminal ST1 is different from the area of the power supply terminal ST2 so that the capacitance generated between the power supply terminal ST1 and the ground terminal GT is similar to the capacitance generated between the power supply terminal ST2 and the ground terminal GT. Thereby, the absolute value of the difference between the capacitance generated between the power supply terminal ST1 and the ground terminal GT and the capacitance generated between the power supply terminal ST2 and the ground terminal GT is reduced. Therefore, unbalance between the capacitance generated between the power supply terminal ST1 and the ground terminal GT and the capacitance generated between the power supply terminal ST2 and the ground terminal GT can be suppressed.

In addition, the power supply pad PD2 of the power supply terminal ST2 has a substantially rectangular shape in plan view, whereas the power supply pad PD1 of the power supply terminal ST1 has a shape including a cutout CO 1. In this way, since the shape of the power supply terminal ST1 and the shape of the power supply terminal ST2 are different, the power supply terminal ST1 and the power supply terminal ST2 having different areas can be easily realized. At least one of the power supply pad PD2, the ground pad PD3, and the dummy pad DD may have a shape including a cutout.

The silicon oxide film L31, which is an example of the "insulating layer" of the present invention, has a central region CR separated from the upper surface of the upper lid 30, and a connection region LR extending from the central region CR and reaching the outer edge of the upper lid 30 in a plan view. The central region CR overlaps the entire surfaces of the power supply terminals ST1 and ST2, the ground terminal GT, and the dummy terminal DT. The connection region LR is provided on an extension line of a region between the power supply pad PD1 of the power supply terminal ST1, the power supply pad PD2 of the power supply terminal ST2, the ground pad PD3 of the ground terminal GT, and the dummy pad DD of the dummy terminal DT. The area of the connecting region LR is smaller than the area of the central region CR. The width of the connection region LR in the direction orthogonal to the extending protruding direction (hereinafter, simply referred to as "width") is smaller than the width of each of the pads PD1, PD2, PD3, DD and smaller than the width of the region between adjacent terminals. The width of the connection region LR may be equal to or larger than the width of the connection wirings LL1 and LL2 described later, and is preferably smaller. In a state of the aggregate substrate 100 described later, the connection region LR of the adjacent resonator devices 1 is continuous.

The "insulating layer" of the present invention may be a multilayer film composed of a plurality of insulating films. In the case of such a multilayer film, at least one insulating film may be separated from the outer edge of the upper cover 30, and other insulating films may extend to the outer edge of the upper cover 30.

< aggregate substrate >)

Next, a schematic structure of the aggregate substrate 100 according to an embodiment of the present invention will be described with reference to fig. 7 to 9. Fig. 7 is an exploded perspective view schematically showing the external appearance of the aggregate substrate 100 according to one embodiment. Fig. 8 is a partially enlarged view of the region a shown in fig. 7. Fig. 9 is a partially enlarged view of the region B shown in fig. 7. In addition, a division line LN1 shown in fig. 8 corresponds to the division line LN1 shown in fig. 9, and a division line LN2 shown in fig. 8 corresponds to the division line LN2 shown in fig. 9.

The aggregate substrate 100 of the present embodiment is used for manufacturing the above-described resonator device 1. As shown in fig. 7, the aggregate substrate 100 includes an upper substrate 13 and a lower substrate 14. The upper substrate 13 and the lower substrate 14 each have a circular shape in plan view. The lower substrate 14 includes a plurality of resonators 10. The upper substrate 13 is disposed with its lower surface facing the lower substrate 14 with the plurality of resonators 10 interposed therebetween. The lower substrate 14 of the present embodiment corresponds to an example of the "first substrate" of the present invention, and the upper substrate 13 of the present embodiment corresponds to an example of the "second substrate" of the present invention.

As shown in fig. 8, a plurality of power supply terminals ST1, ST2, a plurality of ground terminals GT, and a plurality of dummy terminals DT are formed on the upper surface of the upper substrate 13. The group of four terminals of the power supply terminal ST1, the power supply terminal ST2, the ground terminal GT, and the dummy terminal DT is arranged in an array shape over the entire upper surface of the upper substrate 13. Specifically, a plurality of the groups are arranged at predetermined intervals in the row direction (the direction along the Y axis in fig. 8) and the column direction (the direction along the X axis in fig. 8).

A plurality of connection wirings LL1 and LL2 (hereinafter, also referred to as "connection wirings LL") are formed on the upper surface of the upper substrate 13. Each connection wiring LL1 is electrically connected to the power supply terminal ST1, and extends in the column direction (direction along the X axis in fig. 8). Each connection line LL2 is electrically connected to the connection line LL1, and extends in the row direction (the direction along the Y axis in fig. 8). The plurality of connection wirings LL are formed by portions of the metal layer ML1 extending and protruding from the region covered by the second metal layer ML 2. That is, the metal layer ML1 is formed continuously over the plurality of power supply terminals ST1 and ST2, the plurality of ground terminals GT, the plurality of dummy terminals DT, and the plurality of connection wirings LL, and the metal layer ML2 covers the regions corresponding to the plurality of power supply terminals ST1 and ST2, the plurality of ground terminals GT, and the plurality of dummy terminals DT in the metal layer ML 1.

The dividing lines LN1 and LN2 (hereinafter, also collectively referred to as "dividing lines LN") shown in fig. 8 are dividing lines for dividing the upper substrate 13 and the lower substrate 14, which are the aggregate substrate 100, into a plurality of resonator devices 1 by cutting or the like, and are also called scribe lines. The width of the dividing line LN is, for example, 5 μm or more and 20 μm or less.

On the upper surface of the upper substrate 13, each connecting line LL1 extends beyond the dividing line LN2 parallel to the Y axis, and each connecting line LL2 extends beyond the dividing line LN1 parallel to the X axis. In this way, in the state of the aggregate substrate 100 before singulation (dicing), the connection wirings LL of the adjacent resonator devices 1 are connected to each other, and thus the upper electrodes 125B and 125C of the plurality of resonator devices 1 can be turned on via the power supply terminal ST1 and the connection wirings LL. Therefore, the plurality of resonance devices 1 can be energized at once by bringing the two probes into contact with the power supply terminal ST1 and the ground terminal GT, and the operation accompanied by energization, such as frequency adjustment and conduction check, can be performed in a short time and easily.

In a planar view, the connecting region LR of the insulating layer is provided at a portion overlapping the connecting line LL in the dividing line LN, whereby occurrence of short-circuit failure between the connecting line LL and the Si wafer L3 can be suppressed. Further, since the Si wafer L3 is exposed outside the portion overlapping the connecting wiring LL in the dividing line LN, the aggregate substrate 100 can be divided so as to avoid an insulating layer which is harder to be cut than the Si wafer L3. Therefore, cutting failure can be suppressed.

Fig. 8 shows an example of forming two kinds of connecting wirings, that is, a connecting wiring LL1 and a connecting wiring LL2, on the upper surface of the upper cover 30, but the present invention is not limited thereto. For example, one or three or more kinds of connection wirings may be provided. Further, a connection wiring for electrically connecting the plurality of power supply terminals ST2 to each other may be provided, or a connection wiring for electrically connecting the plurality of ground terminals GT to each other may be provided. If a connection wiring for connecting the plurality of power supply terminals ST2 is provided, the operation accompanied by the energization can be performed in the aggregate substrate 100 for a further short time and easily. Further, if connecting wires for connecting the plurality of ground terminals GT are provided, the operation accompanied by energization can be performed in the aggregate substrate 100 for a short time and easily even if the connecting member 65 is omitted.

As shown in fig. 9, a plurality of devices DE and a plurality of bonding portions 60 are formed on the upper surface of the lower substrate 14. Each device DE corresponds to a main part of the resonator 10 described above, for example, to the vibrating section 120 and the holding arm 110. Each joint 60 is provided in the region of the holding portion 140 of the resonator 10. Each joint 60 includes a connecting member 65 at each corner of the rectangular shape. The device DE and the group of bonding portions 60 are arranged in an array over the entire upper surface of the lower substrate 14. Specifically, a plurality of the groups are arranged at predetermined intervals in the row direction (the direction along the Y axis in fig. 9) and the column direction (the direction along the X axis in fig. 9).

Each connecting member 65 extends beyond the dividing line LN. That is, the coupling member 65 of one joint is coupled to the coupling member 65 of the joint 60 having the corners of the adjacent joints 60 facing each other. As a result, the plurality of joint portions 60 are electrically connected to each other by the connecting member 65.

Method for manufacturing MEMS device

Next, a method for manufacturing the resonance device 1 according to an embodiment of the present invention will be described with reference to fig. 10 to 12. Fig. 10 is a flowchart showing a method S100 for manufacturing the resonance device 1 according to the embodiment. Fig. 11 is a cross-sectional view schematically showing the structure of the aggregate substrate after the upper substrate and the lower substrate 14 are bonded. Fig. 12 is a cross-sectional view schematically showing the structure of the aggregate substrate before division.

As shown in fig. 10, first, an upper substrate 13 corresponding to the upper cover 30 of the resonance device 1 is prepared (S110).

The upper substrate 13 is formed using a Si substrate. Specifically, the upper substrate 13 is formed of a Si wafer L3 having a predetermined thickness as shown in fig. 4. The upper and lower surfaces (surfaces facing the resonator 10) of the Si wafer L3 are covered with the silicon oxide film L31 on the side surfaces of the through-electrodes V1, V2, and V3. The silicon oxide film L31 is formed on the surface of the Si wafer L3 by, for example, oxidation of the surface of the Si wafer L3 or chemical vapor deposition (CVD: chemical Vapor Deposition).

A plurality of power supply terminals ST1, ST2, a plurality of ground terminals GT, a plurality of dummy terminals DT, and a plurality of connection wirings LL are formed on the upper surface of the upper substrate 13. Specifically, a plurality of power supply terminals ST1 and ST2, a plurality of ground terminals GT, and a plurality of dummy terminals DT are formed on the central region CR of the silicon oxide film L31, and a plurality of connection wirings LL are formed from the central region CR of the silicon oxide film L31 over the connection regions LR.

In the step of forming the plurality of power supply terminals ST1, ST2, the plurality of ground terminals GT, and the plurality of dummy terminals DT, first, a metal layer ML1 as a seed film is formed by sputtering. Specifically, a Cu seed is formed on the silicon oxide film L31, and a Ti barrier metal is formed on the Cu seed. Next, the metal layer ML1 (seed film) is electroplated to form a metal layer ML2 composed of a ni—au plating film. The metal layer ML2 is formed in a region to be the plurality of power supply terminals ST1, ST2, the plurality of ground terminals GT, and the plurality of dummy terminals DT. Next, portions of the metal layer ML1 exposed from the metal layer ML2 other than portions serving as the plurality of connection wirings LL are removed by etching. That is, the plurality of connection wirings LL are formed from the first metal layer (seed film) extending and protruding from the region covered with the second metal layer (plating film). In this way, the plurality of connection wirings LL are formed by the step of forming the plurality of power supply terminals ST1 and ST2, the plurality of ground terminals GT, and the plurality of dummy terminals DT, whereby the manufacturing can be performed in a short time and with ease.

As shown in fig. 8, on the upper surface of the upper substrate 13, each connecting line LL1 extends beyond the dividing line LN2 parallel to the Y axis, and each connecting line LL2 extends beyond the dividing line LN1 parallel to the X axis. In this way, in the state of the aggregate substrate 100 before singulation (chip formation), the connection wirings LL of the adjacent resonator devices 1 are connected to each other, and therefore, the upper electrodes 125B and 125C of the plurality of resonator devices 1 can be turned on via the power supply terminal ST1 and the connection wirings LL. The connection region LR of the silicon oxide film L31 extends along each connection line LL beyond the dividing line LN, and prevents a short circuit between each connection line LL and the Si wafer L3. Since the width of the connection region LR of the silicon oxide film L31 on the dividing line LN is substantially equal to the width of each connection line LL and the central region CR is separated from the dividing line LN, it is possible to suppress a dicing defect caused by the silicon oxide film L31 which is more difficult to be cut than the Si wafer L3.

The through-electrodes V1 and V2 shown in fig. 4 and the through-electrode V3 shown in fig. 5 are formed by filling a conductive material into a through-hole formed in the upper substrate 13. The filled conductive material is, for example, polysilicon doped with impurities (Poly-Si), copper (Cu), gold (Au), monocrystalline silicon doped with impurities, or the like.

On the other hand, terminals T1', T2' and a ground wiring GW are formed on the lower surface of the upper substrate 13.

Next, the lower substrate 14 corresponding to the MEMS substrate 50 (the resonator 10 and the lower cover 20) of the resonator device 1 is prepared (S120).

The lower substrate 14 bonds the Si substrates to each other. The lower substrate 14 may be formed using an SOI substrate. As shown in fig. 4, the lower substrate 14 includes a Si wafer L1 and a Si substrate F2.

A lower electrode 129, a piezoelectric thin film F3, an upper electrode 125, a protective film 235, and a frequency adjustment film 236 are laminated on the upper surface of the Si substrate F2. The protective film 235 is provided with a joint 60 along and spaced apart from a dividing line LN shown in fig. 9 by a predetermined distance.

In addition, on the piezoelectric film F3, lower wirings LW1, LW21, LW22 and dummy wirings DW are formed in addition to the upper electrode 125. As the material of the lower wirings LW1, LW21, LW22 and the dummy wiring DW, the same kind of metal as the upper electrode 125 is used, so that the manufacturing process can be simplified. On the protective film 235, a conductive layer CL and upper wirings UW1, UW2 are formed except for the bonding portion 60. The same kind of metal as the bonding portion 60 is used as the material of the upper wirings UW1 and UW2, and thus the manufacturing process can be simplified.

In the present embodiment, the bonding portion 60 and the upper wirings UW1 and UW2 are formed on the upper surface side of the lower substrate 14, but the present invention is not limited thereto. For example, at least one of the bonding portion 60 and the upper wirings UW1 and UW2 may be formed on the lower surface side of the upper substrate 13. In the case where the bonding portion 60 is made of a plurality of materials, a material such as germanium (Ge) may be partially formed in the bonding portion 60 on the lower surface side of the upper substrate 13, and a material such as aluminum (Al) may be left in the bonding portion 60 on the upper surface side of the lower substrate 14. Similarly, when the upper wirings UW1 and UW2 are made of a plurality of materials, a part of the upper wirings UW1 and UW2 may be formed on the lower surface side of the upper substrate 13, and the rest of the upper wirings UW1 and UW2 may be formed on the upper surface side of the lower substrate 14.

In the present embodiment, the upper substrate 13 is prepared in step S110, and the lower substrate 14 is prepared in step S120, but the present invention is not limited thereto. For example, the order may be changed, and the upper substrate 13 may be prepared after the lower substrate 14 is prepared, or the preparation of the upper substrate 13 and the preparation of the lower substrate 14 may be performed in parallel.

Next, the surface of the frequency adjustment film 236 is subjected to a removal process (S130).

Specifically, the frequency adjustment film 236 of each of the plurality of resonators 10 provided on the lower substrate 14 is subjected to trimming processing by ion milling, and the frequency of the resonator 10 is adjusted by the mass change of the vibrating arm 135. At this time, the surface of the protective film 235 may be also trimmed. The present step S130 corresponds to an example of the "frequency adjustment step before sealing" or the "first frequency adjustment step".

Next, the upper substrate 13 prepared in step S110 and the lower substrate 14 prepared in step S120 are bonded (S140).

Specifically, as shown in fig. 11, the lower surface of the upper substrate 13 and the upper surface of the lower substrate 14 are eutectic bonded by the bonding portion 60. As shown in fig. 4, the positions of the upper substrate 13 and the lower substrate 14 are aligned so that the terminals T1', T2' are in contact with the upper wirings UW1, UW 2. After the alignment, the upper substrate 13 and the lower substrate 14 are sandwiched by a heater or the like, and heat treatment for eutectic bonding is performed. The temperature in the heating treatment for eutectic bonding is equal to or higher than the temperature of the confocal point, for example, equal to or higher than 424 ℃, and the heating time is, for example, equal to or higher than 10 minutes and equal to or lower than 20 minutes. At the time of heating, the upper substrate 13 and the lower substrate 14 are pressed at a pressure of, for example, about 5MPa to 25 MPa. In this way, the bonding portion 60 eutectic bonds the lower surface of the upper substrate 13 and the upper surface of the lower substrate 14. The series of steps from step S110 to step S140 corresponds to an example of the "preparation aggregate substrate" of the present invention.

Next, the tip end portion of the vibrating arm 135 is made to collide with the chamber inner wall (S150).

Specifically, an electric field is applied to the plurality of resonators 10 through the connection line LL, and the plurality of resonators 10 are excited simultaneously. At this time, an electric field having a field strength higher than that applied when the resonance device 1 is normally used is applied, and the amplitude of the resonator 10 is increased (hereinafter, also referred to as "overdrive"). The vibrating arms 135 of the respective resonators 10 after overdriven collide with the inner wall of the respective lower cover 20 or upper cover 30, and the tip ends thereof are shaved off. Thereby, the frequency of the resonator 10 is adjusted by the mass change of the vibrating arm 135. The present step S150 corresponds to an example of the "frequency adjustment step after sealing" or the "second frequency adjustment step".

Next, the connection wiring LL is removed (S160).

Specifically, the metal layer ML2 is etched using the metal layer ML1 as a mask. As a result, as shown in fig. 12, the metal layer ML1 exposed from the metal layer ML2 is removed, and the metal layer ML1 and the metal layer ML2 remain only in the regions corresponding to the power supply terminals ST1 and ST2, the ground terminal GT, and the dummy terminal DT. Thus, when dividing the aggregate substrate 100, occurrence of short-circuit failure due to deformation of the connecting wiring LL can be suppressed. In addition, since the photoresist is not required to be provided in the step of removing the connection wiring LL, the manufacturing process can be simplified.

Next, the aggregate substrate 100 is divided (S170).

Specifically, the upper substrate 13 and the lower substrate 14 are divided along the dividing line LN. The upper substrate 13 and the lower substrate 14 may be cut by dicing the upper substrate 13 and the lower substrate 14 using a dicing saw, or may be cut by using a stealth dicing technique in which laser light is condensed to form a modified layer in the substrate.

In step S170, the upper substrate 13 and the lower substrate 14 are divided along the dividing line LN, and the upper substrate 13 and the lower substrate 14 are singulated (chipped) into the respective resonator devices 1 including the upper cover 30 and the MEMS substrate 50 (the lower cover 20 and the resonators 10).

Next, a modification of the above embodiment will be described. In addition, the same or similar structures as those shown in fig. 1 to 12 are denoted by the same or similar reference numerals, and the description thereof is appropriately omitted. In addition, the same operational effects by the same structure are not mentioned successively.

(first modification)

A structure of the aggregate substrate 200 according to a first modification will be described with reference to fig. 13. Fig. 13 is a cross-sectional view schematically showing a structure of the aggregate substrate in one embodiment.

As shown in fig. 13, the upper substrate 23 further includes an organic insulating film L32 between the silicon oxide film L31 and the metal layer ML 1. The silicon oxide film L31 and the organic insulating film L32 together correspond to one example of the "insulating layer" of the present invention. The silicon oxide film L31 extends beyond the dividing line and is formed on substantially the entire upper surface of the Si wafer L3. The organic insulating film L32 has a connecting region LR extending beyond the dividing line LN and a central region CR separated from the dividing line LN. By forming the insulating layer from two insulating films (the silicon oxide film L31 and the organic insulating film L32), the power supply terminals ST1, ST2 can be formed at positions distant from the through electrodes V1, V2. Therefore, the degree of freedom of design is improved.

(second modification)

A structure of the aggregate substrate 300 according to a second modification will be described with reference to fig. 14. Fig. 14 is a plan view schematically showing a structure of the aggregate substrate in one embodiment.

As shown in fig. 14, a connection wiring LLb for electrically connecting the plurality of power supply terminals ST2 is formed on the upper substrate of the aggregate substrate 300 in addition to the connection wiring LLa for electrically connecting the plurality of power supply terminals ST 1. The connection wirings LLa, LLb are formed of portions of the first metal film ML1 extending and protruding from the region covered with the second metal film ML 2. Before dividing the aggregate substrate 300, the connection wirings LLa, LLb are removed by etching using the second metal film ML2 as a mask. In the aggregate substrate 300, the upper electrodes 125B and 125C of the plurality of resonators can be collectively turned on by the power supply terminal ST1 and the connection wiring LLa, and the upper electrodes 125A and 125D of the plurality of resonators can be collectively turned on by the power supply terminal ST2 and the connection wiring LLb. The connection wiring LLa corresponds to an example of "a first connection wiring" according to the present invention, and the connection wiring LLb corresponds to an example of "a second connection wiring" according to the present invention. The aggregate substrate 300 may further include a third connection wiring for electrically connecting the plurality of ground terminals GT. Such third connection wirings are formed of the first metal film ML1 in the same manner as the connection wirings LLa and LLb, and are removed by etching using the second metal film ML2 as a mask before dividing the aggregate substrate 300.

The above description has been given of exemplary embodiments of the present invention. A method for manufacturing a resonant device according to an embodiment of the present invention includes: preparing an aggregate substrate including a first substrate having a plurality of resonators and a second substrate bonded to a plurality of resonators of the first substrate, the plurality of resonators having upper electrodes and lower electrodes, respectively, the aggregate substrate having a plurality of first power supply terminals electrically connected to the upper electrodes of the plurality of resonators, and a first connection wiring electrically connecting at least two of the plurality of first power supply terminals; and dividing the aggregate substrate into a plurality of resonant devices, the plurality of first power supply terminals being composed of a first metal layer provided on the opposite side of the second substrate from the first substrate, and a second metal layer covering the first metal layer, the first connecting wiring being composed of a portion of the first metal layer extending and protruding from a region covered by the second metal layer, the method of manufacturing the resonant devices further comprising: before dividing the aggregate substrate into a plurality of resonant devices, portions of the first metal layer extending and protruding from the region covered by the second metal layer are removed.

In this way, when dividing the aggregate substrate, the first connecting wiring formed beyond the dividing line is removed, and thus occurrence of short-circuit failure due to deformation of the first connecting wiring caused by division can be suppressed. In addition, before the first connection wiring is removed, the plurality of resonance devices can be energized together by the first connection wiring, and the operation accompanied by energization such as frequency adjustment and conduction check can be performed in a short time and easily.

In the above-described method for manufacturing a resonant device, adjusting the frequencies of the plurality of resonators may further include: the voltage is applied to the plurality of resonators through the first connecting wiring, or the frequencies of the plurality of resonators are measured through the first connecting wiring.

In the above method for manufacturing a resonant device, the first metal layer may have a seed film for providing the second metal layer by plating.

In the above-described method for manufacturing a resonant device, the portion of the first metal layer extending from the region covered with the second metal layer may be removed to include: the first metal layer is etched using the second metal layer as a mask.

Thus, it is unnecessary to provide a photoresist or the like for etching to remove the first connection wiring, and the manufacturing process can be simplified.

In the above-described method for manufacturing a resonant device, the second substrate may include a semiconductor substrate, and at least one insulating layer provided between the semiconductor substrate and the first metal layer, and the at least one insulating layer may include a plurality of central regions separated from dividing lines of the aggregate substrate, and a plurality of connecting regions intersecting the dividing lines.

This reduces the chance of dividing the insulating layer which is harder to divide than the semiconductor substrate, and thus can suppress occurrence of a dicing failure.

In the above method for manufacturing a resonant device, the aggregate substrate may further include: a plurality of second power supply terminals electrically connected to the upper electrodes of the respective resonators and insulated from the plurality of first power supply terminals; and a second connection wiring electrically connecting at least two second power supply terminals among the plurality of second power supply terminals, the plurality of second power supply terminals being constituted by the first metal layer and the second metal layer, the second connection wiring being constituted by a portion of the first metal layer extending and protruding from a region covered by the second metal layer.

This makes it possible to perform frequency adjustment, conduction check, and other operations accompanied by energization in a short time and with ease.

In the above-described method for manufacturing a resonant device, the aggregate substrate may further include a plurality of ground terminals electrically connected to the lower electrodes of the respective resonators, and a third connecting wiring electrically connecting at least two of the plurality of ground terminals, the plurality of ground terminals being formed of the first metal layer and the second metal layer, the third connecting wiring being formed of a portion of the first metal layer extending and protruding from a region covered with the second metal layer.

Further, a resonance device according to an embodiment of the present invention includes: a first substrate having a resonator having an upper electrode and a lower electrode; and a second substrate bonded to the resonator side of the first substrate, the second substrate having: a semiconductor substrate; a first power supply terminal and a second power supply terminal provided on the opposite side of the semiconductor substrate from the first substrate, electrically connected to a part of the upper electrode, and insulated from each other; a ground terminal provided on the opposite side of the semiconductor substrate from the first substrate and electrically connected to the lower electrode; and an insulating layer provided between the semiconductor substrate and the first power supply terminal and between the semiconductor substrate and the second power supply terminal, the insulating layer having a central region separated from an outer edge of the second substrate when the second substrate is viewed from an opposite side of the first substrate, and a connection region extending from the central region and protruding to reach the outer edge of the second substrate.

As described above, according to one aspect of the present invention, a resonator device with improved productivity and a method for manufacturing the same can be provided.

The embodiments described above are for easy understanding of the present invention, and are not intended to limit the explanation of the present invention. The present invention can be modified/improved without departing from the gist thereof, and equivalents thereof are also included in the present invention. That is, a structure obtained by appropriately changing the design of the embodiment and/or the modification examples by those skilled in the art is included in the scope of the present invention as long as the structure has the features of the present invention. For example, the elements and their arrangement, materials, conditions, shapes, sizes, and the like of the embodiments and/or modifications are not limited to those shown in the examples, and may be appropriately changed. The embodiments and modifications are illustrative, and it is needless to say that partial substitutions and combinations of the structures shown in the different embodiments and/or modifications can be made, and those structures are included in the scope of the present invention as long as they include the features of the present invention.

Description of the reference numerals

1 … resonator device;

10 … harmonic oscillator;

13 … upper substrate;

14 … lower side substrate;

20 … lower cover;

30 … upper cover;

a 50 … MEMS substrate;

60 … joint;

65 … coupling members;

100 … aggregate substrate;

110 … holding arms;

120 … vibratory portion;

125. 125A, 125B, 125C, 125D … upper electrode;

129 … lower electrode;

130 … base;

135. 135A, 135B, 135C, 135D … vibrating arms;

140 … retaining portions;

235 … protective film;

236 … frequency tuning membrane;

f2 … Si substrate;

f3 … piezoelectric film;

l1, L3 … Si wafers;

l31 … silicon oxide film;

LL, LL1, LL2 … connection wirings;

LN, LN1, LN2 … dividing lines;

ST1, ST2 … power terminals;

GT … ground terminal;

DT … dummy terminals.

Claims

1. A method of manufacturing a resonant device, comprising:

preparing an aggregate substrate including a first substrate having a plurality of resonators and a second substrate bonded to the plurality of resonators of the first substrate, the plurality of resonators each having an upper electrode and a lower electrode, the aggregate substrate having a plurality of first power supply terminals electrically connected to the upper electrodes of each of the plurality of resonators, and a first connection wiring electrically connecting at least two of the plurality of first power supply terminals; and

dividing the aggregate substrate into a plurality of resonant devices,

The plurality of first power supply terminals are composed of a first metal layer provided on the opposite side of the second substrate from the first substrate, and a second metal layer covering the first metal layer,

the first connection wiring is formed of a portion of the first metal layer extending from a region covered with the second metal layer,

the method for manufacturing the resonant device further comprises the following steps: before dividing the aggregate substrate into a plurality of resonant devices, a portion of the first metal layer extending from a region covered by the second metal layer is removed.

2. The method for manufacturing a resonance device according to claim 1, wherein,

and adjusting the frequencies of the plurality of resonators,

adjusting the frequencies of the plurality of resonators includes: applying a voltage to the plurality of resonators through the first connecting line or measuring frequencies of the plurality of resonators through the first connecting line.

3. The method for manufacturing a resonance device according to claim 1 or 2, wherein,

the first metal layer has a seed film for providing the second metal layer by plating.

4. A method for manufacturing a resonant device according to any one of claims 1 to 3, wherein,

Removing the portion of the first metal layer extending from the region covered by the second metal layer includes: the first metal layer is etched using the second metal layer as a mask.

5. The method for manufacturing a resonance device according to any one of claims 1 to 4, wherein,

the second substrate has a semiconductor substrate and at least one insulating layer disposed between the semiconductor substrate and the first metal layer,

the at least one insulating layer has a plurality of central regions separated from the dividing lines of the aggregate substrate and a plurality of connecting regions intersecting the dividing lines.

6. The method for manufacturing a resonance device according to any one of claims 1 to 5, wherein,

the aggregate substrate further includes: a plurality of second power supply terminals electrically connected to upper electrodes of the plurality of resonators and insulated from the plurality of first power supply terminals; and a second connection wiring for electrically connecting at least two second power supply terminals among the plurality of second power supply terminals,

the plurality of second power supply terminals are formed of the first metal layer and the second metal layer,

the second connection wiring is formed of a portion of the first metal layer extending from a region covered with the second metal layer.

7. The method for manufacturing a resonance device according to any one of claims 1 to 6, wherein,

the aggregate substrate further includes: a plurality of ground terminals electrically connected to lower electrodes of the plurality of resonators; and a third connection wiring for electrically connecting at least two of the plurality of ground terminals,

the plurality of ground terminals are formed of the first metal layer and the second metal layer,

the third connection wiring is formed of a portion of the first metal layer extending from a region covered with the second metal layer.

8. A resonance device is provided with:

a first substrate having a resonator, the resonator having an upper electrode and a lower electrode; and

a second substrate bonded to the resonator side of the first substrate,

the second substrate includes:

a semiconductor substrate;

An insulating layer provided between the semiconductor substrate and the first power supply terminal and between the semiconductor substrate and the second power supply terminal,

the insulating layer has a central region separated from an outer edge of the second substrate when viewed from the opposite side of the second substrate from the first substrate, and a connecting region extending from the central region and reaching the outer edge of the second substrate.