CN116783806A

CN116783806A - Power supply circuit and terminal equipment

Info

Publication number: CN116783806A
Application number: CN202180089291.4A
Authority: CN
Inventors: 陈亮; 谢强; 王东旭
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2021-05-17
Filing date: 2021-05-17
Publication date: 2023-09-19
Also published as: WO2022241625A1

Abstract

The application provides a power supply circuit and terminal equipment, relates to the field of power supply voltage regulation, and can reduce the volume of the power supply circuit while realizing high-voltage input and low-voltage high-current output; the power supply circuit comprises a direct current power supply, a transformation and conversion circuit, a voltage regulating circuit, a first capacitor, a second capacitor and a signal output end; the transformation conversion circuit is configured to: converting the voltage input by the input end and outputting the converted voltage through the output end; the voltage regulating circuit is configured to: controlling the inductor to adjust the current of the first end according to the voltage of the signal output end; the first input end of the transformation and conversion circuit is electrically connected with the positive electrode of the direct current power supply, and the second input end of the transformation and conversion circuit is electrically connected with the first end of the voltage regulating circuit; the first output end of the transformation and conversion circuit is electrically connected with the signal output end, and the second output end of the transformation and conversion circuit is electrically connected to the grounding end; the second end of the voltage regulating circuit is connected with the positive electrode of the direct current power supply; the third end of the voltage regulating circuit is connected with the first output end or the second output end of the voltage transformation converting circuit.

Description

Power supply circuit and terminal equipment

Technical Field

The present application relates to the field of power supply voltage regulation, and in particular, to a power supply circuit and a terminal device.

Background

At present, the requirements for power circuits with high-voltage input and low-voltage high-current output are increasing, and meanwhile, the power circuits are generally required to have the characteristics of high efficiency, small volume (or small occupied area) and the like for equipment so as to meet the application requirements.

As shown in fig. 1, a power supply circuit of high voltage input and low voltage and high current output is provided in the related art, the power supply circuit adopts a voltage transformation circuit 1 of an open loop mode and a buck circuit 2 of a closed loop mode connected in series at a high voltage input terminal, and the voltage transformation circuit 1 and the buck circuit 2 are connected in parallel at a low voltage output terminal out. In this power supply circuit, the transformer circuit 1 is responsible for realizing a large current output function, but since it is not capable of directly regulating the output voltage Vout when operating in the open loop mode, it is necessary to regulate the output voltage Vout by the buck circuit 2 operating in the closed loop mode to ensure the stability of the output voltage.

However, for the power circuit in fig. 1, when the input voltage of the voltage transformation circuit 1 varies greatly, the buck circuit 2 needs to output all the power to the low voltage output terminal out in order to meet the regulation of the output voltage Vout, so that the current flowing through the power inductor is large, and therefore a large power inductor is needed to meet the requirement, which further limits the reduction of the volume of the power circuit.

Disclosure of Invention

The embodiment of the application provides a power circuit and terminal equipment, which can realize high-voltage input and low-voltage high-current output and reduce the volume of the power circuit.

The application provides a power supply circuit which comprises a direct current power supply, a transformation and conversion circuit, a voltage regulating circuit, a first capacitor, a second capacitor and a signal output end, wherein the transformation and conversion circuit is connected with the direct current power supply; the voltage regulating circuit comprises an inductor, a first end, a second end and a third end; the transformation conversion circuit comprises a first input end, a second input end, a first output end and a second output end; the first input end of the transformation and conversion circuit is electrically connected with the positive electrode of the direct current power supply, and the second input end of the transformation and conversion circuit is electrically connected with the first end of the voltage regulating circuit; the first output end of the transformation and conversion circuit is electrically connected with the signal output end, and the second output end of the transformation and conversion circuit is electrically connected to the grounding end; the second end of the voltage regulating circuit is electrically connected with the positive electrode of the direct current power supply; the third end of the voltage regulating circuit is electrically connected with the first output end or the second output end of the voltage transformation converting circuit; the negative electrode of the direct current power supply is electrically connected to the grounding end; the two ends of the first capacitor are electrically connected between the first input end and the second input end of the transformation and conversion circuit; the two ends of the second capacitor are electrically connected between the first output end and the second output end of the transformation and conversion circuit; the transformation conversion circuit is configured to: converting the voltages input by the first input end and the second input end and outputting the converted voltages through the first output end and the second output end; the voltage regulating circuit is configured to: the inductor is controlled to adjust the current of the first end according to the voltage of the signal output end.

In summary, in the power supply circuit provided by the embodiment of the application, the first end of the voltage regulating circuit is connected with the second input end of the voltage transformation converting circuit, the second end is connected with the positive electrode of the direct current power supply, and the third end is connected with the first output end or the second output end of the voltage transformation converting circuit; under the condition, the current of the first end can be adjusted by controlling the inductor according to the voltage of the signal output end, and under the condition that the voltage of the input end of the voltage transformation conversion circuit changes greatly (the voltage of the signal output end also can be said to change greatly), the current on the inductor is ensured not to be obviously increased (namely, the inductor is maintained at low current), so that the problem of large inductance caused by outputting all power to the signal output end out in the related art is avoided, and the size reduction of the power supply circuit is facilitated.

In some possible implementations, the voltage regulation circuit further includes a controller that controls the inductor to regulate the current at the first terminal based on the voltage at the signal output terminal.

In some possible implementations, the voltage regulation circuit is configured to: alternately conducting the first passage and the second passage according to the voltage of the signal output end so as to control the inductor to adjust the current of the first end; the first passage is a passage between the first end and the second end, and the second passage is a passage between the first end and the third end; in this case, the inductor can be powered by the second end and the third end, or the inductor can be powered by the second end, that is, part of the power of the inductor is output to the signal output end through the third end, and part of the power is output to the direct current power supply through the second end; alternatively, the whole power of the inductor is output to the direct current power supply through the second end, so that the current of the first end is regulated.

In some possible implementations, the voltage regulation circuit further includes a first transistor, a second transistor, a first control terminal, a second control terminal; the grid electrode of the first transistor is electrically connected with the first control end, the first electrode of the first transistor is electrically connected with the second end, and the second electrode of the first transistor is electrically connected with the first node; the grid electrode of the second transistor is electrically connected with the second control end, and the first electrode of the second transistor is electrically connected with the first node; the second pole of the second transistor is electrically connected with the third terminal; one end of the inductor is electrically connected with the first end, and the other end of the inductor is electrically connected with the first node.

In some possible implementations, the voltage regulation circuit includes a controller; the controller is electrically connected with the signal output end, the first control end and the second control end; the controller is configured to: according to the voltage of the signal output end, a first control signal is input to the first control end, a second control signal is input to the second control end, and the duty ratio of the first control signal and the second control end is adjusted so as to control the time length for alternately starting the first transistor and the second transistor.

In some possible implementations, the voltage regulation circuit is configured to: alternately conducting the second path and the third path according to the voltage of the signal output end so as to control the inductor to adjust the current of the first end; the second passage is a passage between a third end and the first end, and the third passage is a passage between the third end and the second end; in this case, the inductor can be power-output through the first terminal and the third terminal, or through the first terminal; namely, partial power of the inductor is output to the signal output end through the third end, and partial power is output to the first capacitor through the first end; or, outputting the whole power of the inductor to the first capacitor through the first end; to adjust the current at the first end.

In some possible implementations, the voltage regulating circuit further includes a third transistor, a fourth transistor, a third control terminal, a fourth control terminal; a gate of the third transistor is electrically connected with the third control end, a first pole of the third transistor is electrically connected with the second end, and a second pole of the third transistor is electrically connected with the second node; the grid electrode of the fourth transistor is electrically connected with the fourth control end, the first electrode of the fourth transistor is electrically connected with the first end, and the second electrode of the fourth transistor is electrically connected with the second node; one end of the inductor is electrically connected with the second node, and the other end of the inductor is electrically connected with the third terminal.

In some possible implementations, the voltage regulation circuit includes the controller; the controller is electrically connected with the signal output end, the third control end and the fourth control end; the controller is configured to: and according to the voltage of the signal output end, inputting a third control signal to the third control end, inputting a fourth control signal to the fourth control end, and adjusting the duty ratio of the third control signal and the fourth control signal to control the duration of alternately starting the third transistor and the fourth transistor.

In some possible implementations, the voltage regulation circuit is configured to: the third path, the second path and the first path are alternately conducted according to the voltage of the signal output end, and two ends of the inductor are connected to the second end so as to control the inductor to adjust the current of the first end; the third passage is a passage between the third end and the second end, the second passage is a passage between the third end and the first end, and the first passage is a passage between the first end and the second end.

In some possible implementations, the voltage regulating circuit further includes a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a fifth control terminal, a sixth control terminal, a seventh control terminal, an eighth control terminal; the grid electrode of the fifth transistor is electrically connected with the fifth control end, the first electrode of the fifth transistor is electrically connected with the second end, and the second electrode of the fifth transistor is electrically connected with the fourth node; a grid electrode of the sixth transistor is electrically connected with the sixth control end, a first electrode of the sixth transistor is electrically connected with the second end, and a second electrode of the sixth transistor is electrically connected with the third node; a grid electrode of the seventh transistor is electrically connected with the seventh control end, a first electrode of the seventh transistor is electrically connected with the first end, and a second electrode of the seventh transistor is electrically connected with the third node; a grid electrode of the eighth transistor is electrically connected with the eighth control end, a first electrode of the eighth transistor is electrically connected with the fourth node, and a second electrode of the eighth transistor is electrically connected with the third end; one end of the inductor is electrically connected with the third node, and the other end of the inductor is electrically connected with the fourth node.

In some possible implementations, the voltage regulation circuit includes a controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end; the controller is configured to: inputting a sixth control signal to a sixth control terminal, inputting a seventh control signal to a seventh control terminal, turning off the sixth transistor, and turning on the seventh transistor; and according to the voltage of the signal output end, a fifth control signal is input to the fifth control end, an eighth control signal is input to the eighth control end, and the duty ratio of the fifth control signal and the eighth control signal is adjusted so as to control the duration of alternately starting the fifth transistor and the eighth transistor.

In some possible implementations, the voltage regulation circuit includes a controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end; the controller is configured to: inputting a fifth control signal to a fifth control terminal, inputting an eighth control signal to an eighth control terminal, turning off a fifth transistor, and turning on the eighth transistor; and according to the voltage of the signal output end, inputting a sixth control signal to the sixth control end, inputting a seventh control signal to the seventh control end, and adjusting the duty ratio of the sixth control signal and the seventh control signal to control the duration of alternately turning on the sixth transistor and the seventh transistor.

In some possible implementations, the voltage regulation circuit includes a controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end; the controller is configured to: according to the voltage of the signal output end, the duty ratio of a fifth control signal is input to the fifth control end, a sixth control signal is input to the sixth control end, a seventh control signal is input to the seventh control end, an eighth control signal is input to the eighth control end, and the duty ratio of the fifth control signal, the sixth control signal, the seventh control signal and the eighth control signal is regulated so as to periodically and sequentially perform a first control stage, a second control stage, a third control stage and a fourth control stage. Wherein the first control phase comprises: turning off the fifth transistor and the seventh transistor, and controlling the duration of turning on the sixth transistor and the eighth transistor; the second control phase comprises: turning off the fifth transistor and the sixth transistor, and controlling the duration of turning on the seventh transistor and the eighth transistor; the third control phase comprises: turning off the sixth transistor and the eighth transistor, and controlling the duration of turning on the fifth transistor and the seventh transistor; the fourth control phase comprises: the seventh transistor and the eighth transistor are turned off, and the duration of turning on the fifth transistor and the sixth transistor is controlled.

The embodiment of the application also provides a terminal device which comprises a load module and the power supply circuit provided by any one of the embodiments; the power supply circuit is connected with the load module through a signal output end.

Drawings

FIG. 1 is a schematic diagram of a power circuit according to the related art of the present application;

FIG. 2a is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 2b is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 3a is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 3b is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 4a is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 4b is a schematic diagram of a power circuit according to an embodiment of the present application;

fig. 5 is a schematic diagram of current regulation of a voltage regulator circuit in a power supply circuit according to an embodiment of the present application;

fig. 6 is a schematic diagram of current regulation of a voltage regulator circuit in a power supply circuit according to an embodiment of the present application;

fig. 7 is a schematic diagram of current regulation of a voltage regulator circuit in a power supply circuit according to an embodiment of the present application;

FIG. 8a is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 8b is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 9a is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 9b is a schematic diagram of a power circuit according to an embodiment of the present application;

FIG. 10 is a schematic diagram of a power circuit according to an embodiment of the present application;

fig. 11 is a control schematic diagram of a voltage regulating circuit in a power supply circuit according to an embodiment of the present application;

fig. 12 is a schematic diagram of current regulation of a voltage regulator circuit in a power supply circuit according to an embodiment of the present application;

FIG. 13 is a schematic diagram of a power circuit according to an embodiment of the present application;

fig. 14 is a schematic diagram of a voltage transformation circuit in a power circuit according to an embodiment of the present application;

fig. 15 is a schematic diagram of a voltage transformation circuit in a power supply circuit according to an embodiment of the present application;

FIG. 16 is a schematic diagram of a controller in a power circuit according to an embodiment of the present application;

fig. 17 is a schematic diagram of related control signals of the controller in fig. 16.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be clearly described below with reference to the accompanying drawings in which it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms "first," "second," and the like in the description and in the claims and drawings are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or order. "at least one" means one or more, and "a plurality" means two or more. "connected," "coupled," and the like are used to indicate interworking or interaction between different components, devices, and may include direct coupling or indirect coupling via other components, devices. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion, such as a series of steps or elements. The method, system, article, or apparatus is not necessarily limited to those explicitly listed but may include other steps or elements not explicitly listed or inherent to such process, method, article, or apparatus. "upper", "lower", "left", "right", etc. are used merely with respect to the orientation of the components in the drawings, these directional terms are relative terms, which are used for description and clarity with respect thereto, and which may vary accordingly depending on the orientation in which the components are placed in the drawings.

The embodiment of the application provides terminal equipment which can be electronic products such as mobile phones, televisions, tablet computers, notebooks, vehicle-mounted computers, intelligent watches, intelligent bracelets and the like, and the specific form of the terminal equipment is not particularly limited.

The terminal equipment is provided with the power supply circuit and the load module connected with the signal output end of the power supply circuit, and the power supply circuit can realize the functions of high-voltage input and low-voltage large-current output so as to meet the power consumption requirement of the load module.

The arrangement form of the load module is not limited in the present application, and for example, the load module may be a chip, a power device, a processor, or the like.

In the terminal equipment provided by the embodiment of the application, the power supply circuit can output part or all of the power inductor to other ports except the signal output end while meeting the high-voltage input and low-voltage high-current output of the power supply circuit by adopting the regulation function of the power inductor, so that the current on the power inductor is kept unchanged obviously, the problem of large power inductor volume is avoided, and the small-volume requirement of the power supply circuit is further facilitated.

The following describes the configuration of the power supply circuit according to the embodiment of the present application.

Referring to fig. 2a, an embodiment of the present application provides a power supply circuit, which includes a dc power source S, a transformation circuit 01, a voltage adjusting circuit 02, a first capacitor C1, a second capacitor C2, and a signal output terminal out (which may also be referred to as a power output terminal, a voltage output terminal, etc.).

The transformation and conversion circuit 01 comprises a first input end a1, a second input end a2, a first output end b1 and a second output end b2; the voltage transformation circuit 01 is configured to transform voltages input from the first input terminal a1 and the second input terminal a2 and output the transformed voltages through the first output terminal b1 and the second output terminal b 2. Illustratively, the voltage conversion circuit 01 may be configured to perform voltage-down conversion on the voltages at the input terminals (a 1, a 2) and output the converted voltages through the output terminals (b 1, b 2), or may be configured to perform voltage-up conversion on the voltages at the input terminals (a 1, a 2) and output the converted voltages through the output terminals (b 1, b 2); the following embodiments of the present application will be described by taking the step-down conversion performed by the voltage conversion circuit 01 as an example.

As for the above-mentioned voltage transformation circuit 01, it can be understood that the voltage transformation circuit 01 itself has a certain transformation ratio, and can transform the voltage input from the input terminals (a 1, a 2) according to the transformation ratio and output the transformed voltage through the output terminals (b 1, b 2); in this case, when the voltages input from the input terminals (a 1, a 2) are increased, the voltages output from the output terminals (b 1, b 2) are correspondingly increased in accordance with the transformation ratio; when the voltages input by the input terminals (a 1, a 2) decrease, the voltages output by the output terminals (b 1, b 2) correspondingly decrease according to the transformation ratio. Of course, the magnitude of the transformation ratio of the transformation converting circuit 01 is not particularly limited in the present application; illustratively, taking the transformer ratio of the transformer circuit 01 as 45:1 as an example, when the voltage of 45V is input to the input ends (a 1, a 2) of the transformer circuit 01, the voltage output by the output ends (b 1, b 2) after the transformer circuit 01 performs the step-down conversion is 1V; when the voltage greater than 45V is input to the input terminals (a 1, a 2) of the voltage-converting circuit 01, the voltage output from the output terminals (b 1, b 2) is greater than 1V, and when the voltage less than 45V is input to the input terminals (a 1, a 2) of the voltage-converting circuit 01, the voltage output from the output terminals (b 1, b 2) is less than 1V.

Referring to fig. 2a, the voltage regulating circuit 02 includes an inductor L, a first terminal P1, a second terminal P2, and a third terminal P3. The voltage regulating circuit 02 is configured to control the inductance L to regulate the current of the first terminal P1 in accordance with the voltage of the signal output terminal out. Schematically, referring to fig. 2b, in some possible implementations, the voltage regulating circuit 02 may include a controller 20, and the inductor L is controlled by the controller 20 to regulate the current at the first terminal P1 according to the voltage at the signal output terminal out.

Referring to fig. 2a and 2b, in the power supply circuit, the relationship of electrical connection (hereinafter, abbreviated as "connection") between the dc power supply S, the voltage converting circuit 01, the voltage regulating circuit 02, the first capacitor C1, the second capacitor C2, and the signal output terminal out may be as follows:

the first input end a1 of the transformation and conversion circuit 01 is connected with the positive electrode (+) of the direct current power supply S, and the negative electrode (-) of the direct current power supply S is connected to the ground end GND; the second input end a2 of the transformation conversion circuit 01 is connected with the first end P1 of the voltage regulating circuit 02; the first output terminal b1 of the voltage transformation converting circuit 01 is connected to the signal output terminal out, and the second output terminal b2 of the voltage transformation converting circuit 01 is connected to the ground terminal GND.

The two ends of the first capacitor C1 are connected between the first input end a1 and the second input end a2 of the transformation and conversion circuit 01; in this case, a stable input voltage to the voltage conversion circuit 01 via the first input terminal a1 and the second input terminal a2 can be ensured by the first capacitor C1.

The two ends of the second capacitor C2 are connected between the first output terminal b1 and the second output terminal b2 of the transformer switching circuit 01, in which case a stable output voltage can be ensured by the transformer switching circuit 01 through the first output terminal b1 and the second output terminal b2, and further a stable power supply can be performed to the load module through the signal output terminal out.

The second terminal P2 of the voltage regulator circuit 02 is connected to the positive electrode (+) of the dc power supply S.

For the third terminal P3 of the voltage regulating circuit 02, in some possible implementations, referring to fig. 2a, the third terminal P3 may be connected to the first output terminal b1 of the voltage converting circuit 01, i.e. the third terminal P3 is connected to the signal output terminal out; in other possible implementations, the third terminal P3 may be connected to the second output terminal b2 of the voltage transformation circuit 01, i.e. the third terminal P3 is connected to the ground terminal GND by a dashed line in fig. 2 a.

The voltage adjusting circuit 02 adjusts the current of the first end P1 by controlling the charge and discharge of the inductor L, so as to adjust the voltages of the input ends (a 1, a 2) of the voltage transformation converting circuit 01, and further control the output ends (b 1, b 2) of the voltage transformation converting circuit 01 to reach a steady-state set output voltage (i.e. the signal output end out reaches a set steady-state output voltage), so as to meet the normal power supply requirement of a load module connected with the signal output end out.

In addition, in the voltage regulating circuit 02, neither the first terminal P1 nor the second terminal P2 is connected to the signal output terminal out, and the voltage regulating circuit 02 can control the inductor L to charge and discharge according to the voltage of the signal output terminal out to regulate the current of the first terminal P1, and can output part or all of the power of the inductor through the first terminal P1 or the second terminal P2 having a higher voltage (compared with the signal output terminal out of a low voltage), that is, avoid outputting all of the power of the inductor L to the signal output terminal out of a low voltage through the third terminal P3, thereby ensuring that the current on the inductor does not significantly increase (that is, the inductor is maintained at a low current).

For example, in some possible implementations, the voltage regulating circuit 02 may output power to the inductor L through the second terminal P2 and the third terminal P3, so that a part of the power of the inductor is output to the signal output terminal out through the third terminal P3, and a part of the power is output to the dc power source S through the second terminal P2, thereby ensuring that the current on the inductor L does not become significantly larger.

For another example, in some possible implementations, the voltage regulating circuit 02 may output power to the inductor only through the second terminal P2, that is, the entire power of the inductor is output to the dc power source S through the second terminal P2, in this case, therefore, compared to the case that the entire power of the inductor is output to the signal output terminal out with low voltage in the related art, the current on the inductor L is large and bulky, because the second terminal P2 is connected to the positive electrode (+) of the dc power source S, that is, the voltage of the second terminal P2 is greater than the low voltage of the signal output terminal out, by outputting the entire power of the inductor to the second terminal P2 with higher voltage, it is ensured that the current on the inductor L does not become significantly large.

In summary, in the power supply circuit provided by the embodiment of the present application, the first end of the voltage regulating circuit 02 is connected to the second input end a2 of the voltage transformation circuit 01, the second end P2 is connected to the positive electrode (+) of the dc power supply S, and the third end P3 is connected to the first output end b1 or the second output end b2 of the voltage transformation circuit 01; in this case, the inductor L can be controlled to adjust the current of the first terminal P1 according to the voltage of the signal output terminal out, and the current on the inductor is ensured not to be significantly increased (i.e. the inductor is maintained at a low current) under the condition that the voltage of the input terminal of the voltage transformation circuit 01 is greatly changed (also can be said to be greatly changed), so that the problem of large inductance caused by outputting all power to the signal output terminal out in the related art is avoided, and the size reduction of the power supply circuit is facilitated.

The specific arrangement of the voltage regulator circuit 02 and the transformer circuit 01 will be further described below.

The specific circuit configuration of the voltage regulating circuit 02 in three different arrangement modes is schematically provided below.

Setting mode one

In the first arrangement, referring to fig. 3a and 4a, the voltage adjusting circuit 02 may be configured to: according to the voltage of the signal output terminal out, the first path between the first terminal P1 and the second terminal P2 and the second path between the first terminal P1 and the third terminal P3 are alternately conducted, that is, the inductor L is alternately controlled to be located in the first path and the second path, so as to regulate the current of the first terminal P1.

Of course, as another possible implementation, as shown in fig. 3b and fig. 4b, in the case that the voltage adjusting circuit 02 includes the controller 20, the voltage adjusting circuit 02 may alternately turn on the first path between the first terminal P1 and the second terminal P2 and the second path between the first terminal P1 and the third terminal P3 according to the voltage of the signal output terminal out by the controller 20 to adjust the current of the first terminal P1.

In this case, the voltage regulator circuit 02 outputs power to the inductor L through the second terminal P2 and the third terminal P3 (refer to the voltage regulator circuit one 21 hereinafter) or outputs power to the inductor L through the second terminal P2 (refer to the voltage regulator circuit two 22 hereinafter) to regulate the current of the first terminal P1.

Illustratively, two circuit configurations (a first voltage adjusting circuit 21 and a second voltage adjusting circuit 22) capable of satisfying the adjusting function of the voltage adjusting circuit 02 in the first arrangement are provided below.

Voltage regulating circuit 21

As shown in fig. 3a, in some possible implementations, the voltage adjusting circuit 21 (02) may further include a first transistor M1, a second transistor M2, a first control terminal ctrl1, and a second control terminal ctrl2, in addition to the inductance L.

It should be noted that, in fig. 3a, the first transistor M1 and the second transistor M2 are P-type transistors, for example, P-type metal oxide semiconductor field effect transistors (positive metal oxide semiconductor field effect transistor, which may be abbreviated as PMOS transistors) are only illustrated, but the application is not limited thereto; in some embodiments, the first transistor M1 and the second transistor M2 may also be N-type transistors, for example, N-type metal oxide semiconductor field effect transistors (negative metal oxide semiconductor field effect transistor, which may be simply referred to as NMOS transistors). In addition, in the embodiment of the present application, for two poles (the first pole and the second pole) except the gate in the transistor, one is the source, and the other is the drain, and the two poles are not clearly distinguished; for example, the first electrode is the source electrode, and the second electrode is the drain electrode; alternatively, the first pole is the drain and the second pole is the source. Similarly, the other transistors referred to hereinafter are all the same and will not be described in detail.

Referring to fig. 3a, the gate of the first transistor M1 is connected to the first control terminal ctrl1, the source of the first transistor M1 is connected to the second terminal P2, and is connected to the positive electrode (+) of the dc power supply S through the second terminal P2; the drain electrode of the first transistor M1 is connected with the first node N1; the grid electrode of the second transistor M2 is connected with the second control end ctrl2, and the source electrode of the second transistor M2 is connected with the first node N1; the drain electrode of the second transistor M2 is connected to the third terminal P3, that is, the drain electrode of the second transistor M2 is connected to the signal output terminal out through the third terminal P3; the first end of the inductor L is connected to the first node N1, and the second end of the inductor L is connected to the first end P1, that is, the second end of the inductor L is connected to the second input terminal a2 of the voltage transformation circuit 01 through the first end P1.

As another alternative implementation manner of the first voltage adjusting circuit 21, as shown in fig. 3b, the first voltage adjusting circuit 21 may include a controller 20, where the controller 20 is connected to the signal output terminal out, the first control terminal ctrl1, and the second control terminal ctrl 2; other connection relationships are substantially identical to those of fig. 3a and will not be described in detail herein.

Referring to fig. 3b, for the control of the power supply circuit employing the first voltage adjusting circuit 21, the controller 20 may input a first control signal to the first control terminal ctrl1 and a second control signal to the second control terminal ctrl2 according to the voltage of the signal output terminal out, and adjust the duty ratio of the first control signal and the second control signal, and periodically control the duration of the first transistor M1 and the second transistor M2 that are alternately turned on (or turned on), so as to periodically control the duration of the charge and discharge of the inductor L on the first path between the first terminal P1 and the second terminal P2 and the second path between the first terminal P1 and the third terminal P3; in this case, the first voltage regulating circuit 21 can output power to the inductor L through the second terminal P2 and the third terminal P3, that is, part of the power of the inductor is output to the signal output terminal out through the third terminal P3, and part of the power is output to the dc power source S through the second terminal P2; and further, the current adjustment of the first terminal P1 is realized, so that the signal output terminal out reaches the set steady-state output voltage.

Voltage regulating circuit II 22

As shown in fig. 4a, in other possible implementations, the second voltage adjusting circuit 22 may connect the third terminal P3 of the first voltage adjusting circuit 21 shown in fig. 3a to the ground terminal GND; in this case, the voltage regulating circuit 02 switches and controls the path of the inductor L between the first terminal P1 and the second terminal P2 and the path between the first terminal P1 and the third terminal P3 according to the voltage of the signal output terminal out, and outputs power to the inductor L through the second terminal P2, that is, all power of the power inductor is output to the dc power source S through the second terminal P2.

The other circuit connection relationships of the second voltage adjusting circuit 22 may correspond to those described in the first voltage adjusting circuit 21, and will not be described herein.

As another alternative implementation of the second voltage adjusting circuit 22, as shown in fig. 4b, the second voltage adjusting circuit 22 may include a controller 20, where the controller 20 is connected to the signal output terminal out, the first control terminal ctrl1, and the second control terminal ctrl 2.

Referring to fig. 4b, for the control of the power supply circuit employing the second voltage adjusting circuit 22, the controller 20 may input the first control signal to the first control terminal ctrl1 and the second control signal to the second control terminal ctrl2 according to the voltage of the signal output terminal out, and adjust the duty ratio of the first control signal and the second control signal, and periodically control the duration of the first transistor M1 and the second transistor M2 that are alternately turned on (or turned on), so as to periodically control the duration of the charge and discharge of the inductor L on the first path between the first terminal P1 and the second terminal P2 and the second path between the first terminal P1 and the third terminal P3; in this case, the second voltage regulating circuit 22 can output power to the inductor L through the second terminal P1, that is, the entire power of the power inductor is output to the dc power source S through the second terminal P2, so as to regulate the current of the first terminal P1, so that the signal output terminal out reaches the set steady-state output voltage.

Illustratively, taking the first voltage adjusting circuit 21 shown in fig. 3a as an example, the following describes a charging and discharging process of the inductor L in one control period T in combination with the control of the first transistor M1 and the second transistor M2.

Referring to fig. 5, during a first T1 period of a control period T, the second transistor M2 is turned on under the control of receiving a second control signal input from the second control terminal ctrl2, the first transistor M1 is turned off (or turned off) under the control of a first control signal input from the first control terminal ctrl1, and at this time, the inductor L is charged and power is output through the third terminal P3; in this case, the current i at the first terminal P1 increases, so that the voltages at the input terminals (a 1, a 2) of the voltage transformation circuit 01 increase, and thus the voltages at the output terminals (b 1, b 2) of the voltage transformation circuit 01 are adjusted to increase.

In a control period T, in a period T2 after the period T1, the first transistor M1 is turned on under the control of a first control signal input by the first control terminal ctrl1, and the second transistor M2 is turned off under the control of a second control signal input by the second control terminal ctrl2, at which time the inductor L discharges and outputs power through the second terminal P2; in this case, the current i at the first terminal P1 decreases, so that the voltage at the input terminals (a 1, a 2) of the voltage transformation circuit 01 decreases, and thus the voltage at the output terminals (b 1, b 2) of the voltage transformation circuit 01 is adjusted to decrease.

Of course, when the current at the first terminal P1 is actually adjusted, the first transistor M1 and the second transistor M2 are periodically controlled, and the current at the first terminal P1 is adjusted by taking the average current flowing through the inductor as the actual reference current. Schematically, referring to fig. 5, if the inductor current at the end of one control period T is substantially identical to the inductor current at the beginning, the average current of the inductor is unchanged, and the current at the first terminal P1 is not changed substantially during a plurality of control periods T. Referring to fig. 6, in a plurality of control periods T, if the inductor current at the end of one control period T is greater than the inductor current at the beginning, the average current representing the inductor increases, and the current at the first terminal P1 gradually increases. Referring to fig. 7, in a plurality of control periods T, if the inductor current at the end of one control period T is smaller than the inductor current at the beginning, the average current representing the inductor decreases, and the current at the first terminal P1 gradually decreases. The process of the control signal output terminal out reaching the set steady-state output voltage is schematically described below with reference to fig. 5, 6, and 7.

First, in order to illustrate the first control signal input to the first control terminal ctrl1 and the second control signal input to the second control terminal ctrl2, fig. 5, 6, and 7 represent the first control signal as ctrl1 and the second control signal as ctrl2, and should not be regarded as unclear. In addition, it can be understood that, for the first transistor M1 and the second transistor M2 employing PMOS transistors in the power supply circuit of fig. 3a, in this case, low-level potentials in the first control signal (ctrl 1) and the second control signal (ctrl 2) are taken as effective on potentials of the transistors (M1, M2).

Referring to fig. 3a, assuming that the voltage of the dc power source S is 50V, the set output voltage of the signal output terminal out is 1V, and the voltages of the input terminals (a 1, a 2) of the voltage transformation circuit 01 are 45V; it can be understood that in the control process of the power supply circuit, the voltage adjustment for the signal output terminal out can be divided into three states:

1. when the voltage of the signal output terminal out is 1V (i.e., the set output voltage), the voltage of the signal output terminal out needs to be controlled to be stabilized at 1V, i.e., regulated.

2. When the voltage of the signal output terminal out is less than 1V (i.e., less than the set output voltage), the voltage of the signal output terminal out needs to be controlled to be increased to 1V, i.e., the boost regulation.

3. When the voltage of the signal output terminal out is greater than 1V (i.e., greater than the set output voltage), the voltage of the signal output terminal out needs to be controlled to be reduced to 1V, i.e., buck regulation.

Referring to fig. 5, taking the period t=10t of the first control signal (ctrl 1) and the second control signal (ctrl 2) as an example; in the process of performing voltage regulation, it is assumed that the duty ratio D1 of the first control signal (ctrl 1) is 0.4, and the duty ratio D2 of the second control signal (ctrl 2) is 0.6; thus, during the first 4T period of each control period T, the second transistor M2 is turned on under the low potential control of the second control signal (ctrl 2), and the first transistor M1 is turned off under the high potential control of the first control signal (ctrl 1); in the latter 6T period of each control period T, the first transistor M1 is turned on under the control of the low potential of the first control signal (ctrl 1), and the second transistor M2 is turned off under the control of the high potential of the second control signal (ctrl 2); in the voltage stabilizing and adjusting process, the average current of the inductor is not changed, so that the voltage of the signal output end out is ensured to be maintained at the set output voltage (1V).

Compared to the foregoing voltage stabilizing adjustment process, in the process of performing voltage boosting adjustment (i.e., the actual voltage of the signal output terminal out is smaller than the set output voltage 1V), referring to fig. 6, the duty ratio D1 (e.g., d1=0.5) of the first control signal (ctrl 1) may be adjusted and increased, and the duty ratio D2 (e.g., d2=0.5) of the second control signal (ctrl 2) may be decreased, so as to prolong the charging duration of the inductor L and shorten the discharging duration of the inductor L; thus, in one control period T, the on-time of the second transistor M2 under the low-potential control of the second control signal (ctrl 2) is 5T, and the on-time of the first transistor M1 under the low-potential control of the first control signal (ctrl 1) is 5T; in this case, the average current of the inductor increases and the average current of the first terminal P1 increases in a plurality of control periods T, so that the voltages of the input terminals (a 1, a 2) of the voltage transformation circuit 01 increase, and the voltage of the adjustment signal output terminal out increases to the set output voltage (1V). Of course, after the signal output terminal out increases to the set output voltage (1V), the aforementioned voltage stabilizing adjustment may be entered to ensure that the signal output terminal out stabilizes at the set output voltage (1V).

In addition, compared to the foregoing process of voltage regulation, in the process of performing voltage reduction regulation (i.e., the actual voltage of the signal output terminal out is greater than the set output voltage 1V), referring to fig. 7, the duty ratio D1 (e.g., d1=0.7) of the first control signal (ctrl 1) may be adjusted to be increased, the duty ratio D2 (e.g., d2=0.3) of the second control signal (ctrl 2) may be decreased, so as to reduce the charging duration of the inductor L and increase the discharging duration of the inductor L; thus, in one control period T, the on-time of the second transistor M2 under the low-potential control of the second control signal (ctrl 2) is 3T, and the on-time of the first transistor M1 under the low-potential control of the first control signal (ctrl 1) is 7T; in this case, the average current of the inductor decreases and the average current of the first terminal P1 decreases in a plurality of control periods T, so that the voltages of the input terminals (a 1, a 2) of the voltage transformation circuit 01 decrease, and the voltage of the adjustment signal output terminal out decreases to the set output voltage (1V). Of course, after the signal output out decreases to the set output voltage (1V), the aforementioned voltage regulation may be entered to ensure that the signal output out stabilizes at the set output voltage (1V).

It should be noted that, for the power supply circuits of the two voltage regulating circuits (21, 22) in the first arrangement, referring to fig. 3a and fig. 4a, if it is required to ensure that the voltage regulating circuit 02 can normally regulate the current of the first terminal P1, it should be ensured that the voltage of the dc power supply S is at least greater than the set voltage of the input terminals (a 1, a 2) of the voltage converting circuit 01, that is, the voltage of the first terminal P1 of the voltage regulating circuit 02 cannot be negative; assuming that the voltage at the first terminal P1 is negative, no matter the first transistor M1 is turned on or the second transistor M2 is turned on, the inductor current can only flow from the first node N1 to the third terminal P3 in one direction and is always reduced, so that the current adjustment of the first terminal P1 cannot be realized, and the voltage of the signal output terminal out cannot be controlled; that is, the power supply circuit employing the voltage adjusting circuit provided in the first setting mode can realize only positive voltage adjustment, but cannot realize negative voltage adjustment.

Arrangement mode II

In the second setting mode, referring to fig. 8a and 9a, the voltage adjusting circuit 02 may be configured to: according to the voltage of the signal output terminal out, the third path between the third terminal P3 and the first terminal P1 and the fourth path between the third terminal P3 and the second terminal P2 are alternately conducted, that is, the inductor L is alternately controlled to be located in the third path and the fourth path, so as to regulate the current of the first terminal P1.

Of course, as another possible implementation, as shown in fig. 8b and 9b, in the case that the voltage adjusting circuit 02 includes the controller 20, the voltage adjusting circuit 02 may alternately turn on the second path between the third terminal P3 and the first terminal P1 and the third path between the third terminal P3 and the second terminal P2 according to the voltage of the signal output terminal out by the controller 20 to adjust the current of the first terminal P1.

In this case, the voltage regulating circuit 02 performs power output through the first terminal P1 and the third terminal P3 (refer to a voltage regulating circuit three 23 hereinafter) or performs power output through the first terminal P1 (refer to a voltage regulating circuit four 24 hereinafter) to regulate the current of the first terminal P1.

Illustratively, two circuit configurations (a third voltage adjusting circuit 23 and a fourth voltage adjusting circuit 24) capable of satisfying the adjusting function of the voltage adjusting circuit 02 in the second setting mode are provided below.

Voltage regulating circuit III 23

As shown in fig. 8a, in some possible implementations, the voltage regulating circuit three 23 (02) may further include a third transistor M3, a fourth transistor M4, a third control terminal ctrl3, and a fourth control terminal ctrl4, in addition to the inductance L.

The gate of the third transistor M3 is connected to the third control terminal ctrl3, and the source of the third transistor M3 is connected to the second terminal P2 and is connected to the positive electrode (+) of the dc power supply S through the second terminal P2; the drain electrode of the third transistor M3 is connected with the second node N2; the gate of the fourth transistor M4 is connected to the fourth control terminal ctrl4, and the source of the fourth transistor M4 is connected to the first terminal P1, that is, the source of the fourth transistor M4 is connected to the second input terminal a2 of the voltage transformation circuit 01 through the first terminal P1; the drain electrode of the fourth transistor M4 is connected with the second node N2; the first end of the inductor L is connected to the second node N2, and the second end of the inductor L is connected to the third terminal P3, i.e. the second end of the inductor L is connected to the signal output terminal out through the third terminal P3.

As another alternative implementation of the above-mentioned voltage regulation circuit three 23, as shown in fig. 8b, the voltage regulation circuit three 23 may include a controller 20, where the controller 20 is connected to the signal output terminal out, the third control terminal ctrl3, and the fourth control terminal ctrl 4; other connection relationships are substantially identical to those of fig. 8a and will not be described in detail herein.

For the control of the power supply circuit using the voltage regulating circuit three 23, a third control signal may be input to the third control terminal ctrl3 through the controller 20, a fourth control signal may be input to the fourth control terminal ctrl4, and the duty ratio of the third control signal and the fourth control signal may be adjusted, and the duration of the third transistor M3 and the fourth transistor M4 being alternately turned on may be periodically controlled, so that the charge and discharge durations of the inductor L on the second path between the third terminal P3 and the first terminal P1 and the third path between the third terminal P3 and the second terminal P2, respectively, may be periodically controlled; in this case, the third voltage regulating circuit 23 can output power to the inductor L through the first terminal P1 and the third terminal P3, that is, a part of power of the power inductor is output to the signal output terminal out through the third terminal P3, and a part of power is output to the first capacitor C1 through the first terminal P1, so as to realize current regulation of the first terminal P1, so that the signal output terminal out reaches a set steady-state output voltage.

Voltage regulating circuit IV 24

In other possible implementations, as shown in fig. 9a, the fourth voltage regulating circuit 24 may connect the third terminal P3 of the third voltage regulating circuit 23 shown in fig. 6 to the ground terminal GND; in this case, the voltage regulating circuit 02 switches the second path of the control inductance L between the third terminal P3 and the first terminal P1 and the third path between the third terminal P3 and the second terminal P2 according to the voltage of the signal output terminal out, and performs charge and discharge on the third path, and performs power output through the first terminal P1, thereby regulating the current of the first terminal P1.

The other circuit connection relationships of the fourth voltage adjusting circuit 24 may correspond to those described with reference to the third voltage adjusting circuit 23, and will not be described herein.

As another alternative implementation of the voltage regulating circuit four 24, as shown in fig. 9b, the voltage regulating circuit four 24 may include a controller 20, where the controller 20 is connected to the signal output out, the third control terminal ctrl3, and the fourth control terminal ctrl 4.

For the control of the power supply circuit employing the voltage regulating circuit four 24, the controller 20 may input a third control signal to the third control terminal ctrl3, input a fourth control signal to the fourth control terminal ctrl4, and regulate the duty ratio of the third control signal and the fourth control signal according to the voltage of the signal output terminal out, and periodically control the duration of alternately turning on the third transistor M3 and the fourth transistor M4, so as to periodically control the duration of charging and discharging the inductor L on the third path between the third terminal P3 and the first terminal P1, and the third path between the third terminal P3 and the second terminal P2, respectively; in this case, the fourth voltage adjusting circuit 24 can output power to the inductor L through the first terminal P1, that is, the entire power of the power inductor is output to the first capacitor C1 through the first terminal P1, so as to adjust the current of the first terminal P1, so that the signal output terminal out reaches the set steady-state output voltage.

The voltage regulation, boost regulation, and buck regulation processes for the power supply circuit employing the voltage regulation circuits (23, 24) in the second setting mode may be correspondingly described with reference to fig. 5, 6, and 7 and the first setting mode, and will not be described herein.

In addition, as for the power supply circuits of the voltage adjusting circuits (23, 24) of the second embodiment, referring to fig. 8a and 9a, if it is necessary to ensure that the voltage adjusting circuit 02 normally adjusts the current side of the first terminal P1, it should be ensured that the voltage of the dc power supply S is smaller than the set voltage of the input terminals (a 1, a 2) of the voltage converting circuit 01, that is, the voltage of the first terminal P1 of the voltage adjusting circuit 02 should be negative; for example, the voltage of the dc power source S is 40v, and the set voltage of the input terminals (a 1, a 2) of the voltage transformation circuit 01 is 45v; that is, the voltage at the first end P1 of the voltage regulating circuit 02 is negative voltage of-5V; if the voltage at the first terminal P1 is positive, it is assumed that no matter the third transistor M3 is turned on or the fourth transistor M4 is turned on, the inductor current can only flow from the second node N2 to the third terminal P3 in one direction and is always increased, so that the current adjustment on the first terminal P1 cannot be realized, and the voltage at the signal output terminal out cannot be controlled; that is, the power supply circuit of the voltage adjusting circuit provided in the second setting mode can only realize negative pressure adjustment, but cannot realize positive pressure adjustment.

Setting III

In the third arrangement, referring to fig. 10 and 11, the voltage regulating circuit 01 may be configured to alternately turn on the first path between the first terminal P1 and the second terminal P2 and the second path between the first terminal P1 and the third terminal P3 according to the voltage of the signal output terminal out, that is, alternately control the inductance L to be located in the first path and the second path to regulate the current of the first terminal P1; that is, the voltage adjusting circuits 01 (21, 22) can realize the same adjusting function as the voltage adjusting circuits 01 (21, 22) provided in the first embodiment.

Meanwhile, referring to fig. 10 and 11, the voltage adjusting circuit 23 may be further configured to alternately turn on the third path between the third terminal P3 and the first terminal P1 and the fourth path between the third terminal P3 and the second terminal P2 according to the voltage of the signal output terminal out, that is, alternately control the inductor L to be located in the third path and the fourth path to adjust the current of the first terminal P1; that is, the voltage adjusting circuit 01 can realize the same adjusting function as the voltage adjusting circuit 01 (23, 24) provided in the second embodiment.

That is, the voltage regulator circuit 02 provided in the third embodiment combines the regulation functions of the voltage regulator circuits 21 and 22 in the first embodiment and the regulation functions of the voltage regulator circuits 23 and 24 in the second embodiment, so that the positive voltage regulation and the negative voltage regulation of the power supply circuit can be satisfied.

In addition, in the third setting mode, the voltage adjusting circuit 01 may be further configured to: according to the voltage of the signal output end out, a fourth path between the third end P3 and the second end P2, a second path between the third end P3 and the first end P1, a first path between the first end P1 and the second end P2, and both ends of the inductor L are sequentially and alternately conducted, that is, the inductor L is alternately controlled to be sequentially located in the fourth path, the second path, the first path, and both ends are connected to the second end P2, so as to regulate the current of the first end P1.

In this case, the voltage regulating circuit 02 outputs power to the inductor L through the second terminal P2 and the third terminal P3, or outputs power to the inductor L through the second terminal P2 to regulate the current of the first terminal P1.

Similarly, as another alternative implementation manner, the voltage adjusting circuit 02 provided in the third implementation manner may be provided with a controller 20, and the current at the first terminal P1 is adjusted by the controller 20 according to the voltage of the signal output terminal out.

As shown in fig. 10 and 11, two circuit configurations (a fifth voltage adjusting circuit 25 and a sixth voltage adjusting circuit 26) capable of satisfying the function of the voltage adjusting circuit 02 in the third setting mode are provided below.

Five 25 voltage regulating circuits

As shown in fig. 10, in some possible implementations, the voltage regulating circuit 02 (25) further includes a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a fifth control terminal ctrl5, a sixth control terminal ctrl6, a seventh control terminal ctrl7, and an eighth control terminal ctrl8, in addition to the inductance L.

The gate of the fifth transistor M5 is connected to the fifth control terminal ctrl5, and the source of the fifth transistor M5 is connected to the second terminal P2 and is connected to the positive electrode (+) of the dc power supply S through the second terminal P2; the drain of the fifth transistor M5 is connected to the fourth node N4.

The gate of the sixth transistor M6 is connected to the sixth control terminal ctrl6, and the source of the sixth transistor M6 is connected to the second terminal P2, that is, the source of the sixth transistor M6 is connected to the positive electrode (+) of the dc power supply S through the second terminal P2; the drain of the sixth transistor M6 is connected to the third node N3.

The gate of the seventh transistor M7 is connected to the seventh control terminal ctrl7, and the source of the seventh transistor M7 is connected to the first terminal P1, that is, the source of the seventh transistor M7 is connected to the second input terminal a2 of the voltage transformation circuit 01 through the first terminal P1; the drain of the seventh transistor M7 is connected to the third node N3.

The gate of the eighth transistor M8 is connected to the eighth control terminal ctrl8, the source of the eighth transistor M8 is connected to the fourth node N4, and the drain of the eighth transistor M8 is connected to the third terminal P3, that is, the drain of the eighth transistor M8 is connected to the signal output terminal out through the third terminal P3.

The first end of the inductor L is connected to the third node N3, and the second end of the inductor L is connected to the fourth node N4.

As another alternative implementation manner of the voltage regulation circuit five 25, the voltage regulation circuit five 25 may include a controller 20, where the controller 20 and the signal output terminal out, the fifth control terminal ctrl5, the sixth control terminal ctrl6, the seventh control terminal ctrl7, and the eighth control terminal ctrl8.

As shown with reference to fig. 10, for control of the power supply circuit employing this voltage regulating circuit five 25, three different control modes are provided below: control mode one, control mode two, control mode three.

Illustratively, in the control mode, the control process of the power circuit may include:

inputting a sixth control signal to the sixth control terminal ctrl6 and a seventh control signal to the seventh control terminal ctrl7 by the controller 20 according to the voltage of the signal output terminal out, turning off the sixth transistor M6, and turning on the seventh transistor M7 (i.e., controlling the inductor L to maintain a conductive state with the first terminal P1); inputting a fifth control signal to a fifth control terminal ctrl5, and inputting an eighth control signal to an eighth control terminal ctrl 8; and adjusting the duty ratio of the fifth control signal and the eighth control signal, and periodically controlling the duration of the fifth transistor M5 and the eighth transistor M8 being turned on alternately, so as to achieve the same function as the voltage adjusting circuit 21 in the first setting mode, which is described in detail with reference to the related description, and will not be repeated here.

Illustratively, in the second control mode, the control process of the power supply circuit may include:

inputting a fifth control signal to the fifth control terminal ctrl5 by the controller 20 according to the voltage of the signal output terminal out, inputting an eighth control signal to the eighth control terminal ctrl8, turning off the fifth transistor M5, and turning on the eighth transistor M8 (i.e., controlling the inductor L to maintain a conductive state with the third terminal P3); inputting a sixth control signal to a sixth control terminal ctrl6, and inputting a seventh control signal to a seventh control terminal ctrl 7; and adjusts the sixth control signal and the seventh control signal, and periodically controls the duration of the alternate turn-on of the sixth transistor M6 and the seventh transistor M7, so that the same functions as those of the voltage adjusting circuit three 23 in the second setting mode can be achieved, and specific reference may be made to the foregoing related description, which is not repeated herein.

As shown in fig. 11 (a schematic diagram of a control process of the voltage adjusting circuit five 25 in fig. 10) and fig. 12, the control process of the power supply circuit can be divided into four control stages in the control mode three: the first control stage S1, the second control stage S2, the third control stage S3, and the fourth control stage S4, and the specific control procedure may include:

Inputting a fifth control signal to the fifth control terminal ctrl5, a sixth control signal to the sixth control terminal ctrl6, a seventh control signal to the seventh control terminal ctrl7, and an eighth control signal to the eighth control terminal ctrl8 by the controller 20 according to the voltage of the signal output terminal out; and the duty ratio of the fifth control signal, the sixth control signal, the seventh control signal and the eighth control signal is adjusted, and the first control stage S1, the second control stage S2, the third control stage S3 and the fourth control stage S4 are performed periodically and sequentially.

Referring to fig. 11 (a) and 12, in the first control stage S1, under the control of the sixth control signal and the eighth control signal, the sixth transistor M6 and the eighth transistor M8 are turned on, and under the control of the fifth control signal and the seventh control signal, the fifth transistor M5 and the seventh transistor M7 are turned off, and at this time, the inductor L is charged on the path between the third terminal P3 and the second terminal P2, and the power of the inductor L is output to the signal output terminal out through the third terminal P3.

Referring to fig. 11 (b) and 12, in the second control stage S2, under the control of the seventh control signal and the eighth control signal, the seventh transistor M7 and the eighth transistor M8 are turned on, and under the control of the fifth control signal and the sixth control signal, the fifth transistor M5 and the sixth transistor M6 are turned off, and the inductor L is located on the path between the third terminal P3 and the first terminal P1; in this case, when the voltage of the first terminal P1 is greater than the voltage of the third terminal P3, the slope of the inductor current i is positive (corresponding to the solid line portion in the second control stage S2 in fig. 12), the inductor L charges, and the power of the inductor is output to the signal output terminal out through the third terminal P3 to perform positive voltage regulation on the first terminal P1. When the voltage at the first end P1 is smaller than the voltage at the third end P3, the slope of the inductor current i is negative (corresponding to the dotted line portion in the second control stage S2 in fig. 12), the inductor L discharges, and the power of the inductor is output to the first capacitor C1 through the second end P2, so as to perform negative pressure regulation on the first end P1.

Referring to fig. 11 (c) and 12, in the third control stage S3, under the control of the fifth control signal and the seventh control signal, the fifth transistor M5 and the seventh transistor M7 are turned on, and under the control of the sixth control signal and the eighth control signal, the sixth transistor M6 and the eighth transistor M8 are turned off, and at this time, the inductor L is discharged in the path between the first terminal P1 and the second terminal P2, and the power of the inductor is output to the dc power source S through the second terminal P2.

Referring to fig. 11 (d) and 12, in the fourth control stage S4, under the control of the fifth control signal and the sixth control signal, the fifth transistor M5 and the sixth transistor M6 are turned on, and under the control of the seventh control signal and the eighth control signal, the seventh transistor M7 and the eighth transistor M8 are turned off, and at this time, both ends of the inductor L are connected to the second end P2, the inductor L is neither charged nor discharged, and the current in the third control stage S3 is maintained.

Voltage regulating circuit six 26

In other possible implementations, as shown in fig. 13, the voltage regulating circuit six 26 may connect the third terminal P3 of the voltage regulating circuit five 25 shown in fig. 10 to the ground terminal GND; other connection relationships of other circuits of the voltage regulating circuit six 26 are kept unchanged, and the related circuit connection relationships may specifically correspond to those described in the foregoing voltage regulating circuit five 25, which is not described herein.

As another alternative implementation of the voltage regulating circuit six 26, the voltage regulating circuit six 26 may include a controller 20, where the controller 20 and the signal output out, the fifth control terminal ctrl5, the sixth control terminal ctrl6, the seventh control terminal ctrl7, and the eighth control terminal ctrl8.

As shown in fig. 10, the control of the power supply circuit using the voltage adjusting circuit six 26 is similar to the control of the power supply circuit using the voltage adjusting circuit five 25 described above, and three different control modes are also possible.

For example, in some control modes, the control method of the first control mode (refer to the foregoing description), in this case, the structure of the sixth voltage adjusting circuit 26 is the same as that of the second voltage adjusting circuit 22 (refer to fig. 4a and 4 b), so that the same function as that of the second voltage adjusting circuit 22 in the first setting mode can be achieved, and detailed description thereof will be omitted herein.

For another example, in some control modes, the control method of the second control mode (refer to the foregoing description), in which case, the structure of the sixth voltage adjusting circuit 26 is the same as that of the fourth voltage adjusting circuit 24 (refer to fig. 9a and 9 b), so that the same function as that of the fourth voltage adjusting circuit 24 in the second setting mode can be achieved, and detailed description thereof will be omitted herein.

For another example, in some control modes, the control method of the control mode three may be adopted, and specific reference may be made to descriptions of each control stage (S1, S2, S3, S4) in the control mode three, where the two differences are only that: since the third terminal P3 of the voltage regulating circuit six 26 is connected to the ground terminal GND, the entire power of the inductor L is output to the dc power supply through the second terminal P2. In the present application, the specific configuration of the transformer circuit 01 is not limited, and may be selected and set as needed in practice.

For example, as shown in FIG. 14, in some possible implementations, the transformer circuit 01 mayTo include four transistors (M _a 、M _b 、M _c 、M _d ) Capacitance C _a Two inductors (L) _a 、L _b ) A transformer T10; the transformer T10 includes a primary winding S1 and two secondary windings (S2, S3).

Schematically, referring to fig. 14, in the voltage transformation circuit 01, a transistor M _a And transistor M _b Connected in series between two input terminals (a 1, a 2) of the transformation circuit 01, an inductance L _a Is connected to transistor M _a And transistor M _b A connecting node and an inductance L _a And the other end of (C) and the capacitor C _a Is connected to the first end of the capacitor C _a The second end of the primary winding S1 is connected with the homonymous end of the primary winding S1; inductance L _b Is the same-name end of the primary winding S1, inductance L _b The other end of the primary winding S1 is connected with a second input end a2 of the voltage transformation conversion circuit 01, and the non-homonymous end of the primary winding S1 is connected with the second input end a2; the homonymous terminal of the secondary winding S2 passes through a transistor M _c The non-homonymous end of the secondary winding S2 is connected to the first output end b1; the homonymous terminal of the secondary winding S3 is connected to the first output terminal b1, and the non-homonymous terminal of the secondary winding S3 is connected to the first output terminal b1 via a transistor M _d Connected to the second output terminal b2.

As another example, as shown in fig. 15, in some possible implementations, the transformation circuit 01 may include a plurality of capacitors (C1, C2 … … Cn), a plurality of first switches S1, and a plurality of second switches S2; the first switch S1 and the second switch S2 adopt complementary time sequences, that is, when the first switch S1 is turned on, the second switch S2 is turned off; when the first switch S1 is closed, the second switch S2 is opened; illustratively, the first switch S1 and the second switch S1 may be transistors, but are not limited thereto.

Schematically, as shown in reference numeral 15, in the transformer switching circuit 01, a first terminal of a capacitor C1 is connected to a first input terminal a1 of the transformer switching circuit 01 through a first switch S1, a second terminal of the capacitor C1 is connected to a second input terminal a2 of the transformer switching circuit 01 through a first switch S1, and a second terminal of the capacitor C1 is connected to a ground GND through a second switch S2; the first ends of the capacitors (C2, C3 … … Cn) are respectively connected with the first output end b1 through a first switch S1, and the second ends of the capacitors (C2, C3 … … Cn) are respectively connected with the second output end b2 through a first switch S1; the capacitors (C2, C3 … … Cn) are connected in series through a second switch S2; the first terminal of the capacitor C2 is further connected to the first terminal of the capacitor C1 via a second switch S2.

In addition, the specific structure of the controller 20 is not limited in the present application, and may be selected and set as needed in practice. The specific structure of the controller 20 is schematically described below with reference to the power supply circuit shown in fig. 3 b.

As shown in fig. 16 and 17, in some possible implementations, the controller 20 may include an operational amplifier A1, a comparator A2; the non-inverting input terminal (+) of the operational amplifier A1 is connected with the reference voltage terminal Ref (a reference setting voltage is input through the reference voltage terminal Ref, for example, 1V), the inverting input terminal (-) of the operational amplifier A1 is connected with the signal output terminal out, and the output terminal ea_o of the operational amplifier A1 is connected with the inverting input terminal (-) through a frequency compensation module, and the stability of the negative feedback loop is maintained through the frequency compensation module; in addition, the output terminal ea_o of the operational amplifier A1 is connected to the non-inverting input terminal (+) of the comparator A2, and the inverting input terminal (-) of the comparator A2 inputs the saw-tooth wave Sw; in addition, the output end of the comparator A2 is connected to the first control end ctrl1 in the voltage transformation circuit 01, and meanwhile, the output end of the comparator A2 is also connected to the second control end ctrl2 through an inverter. In this case, when the signal output terminal out of the power supply circuit is set to a voltage greater than the reference voltage input from the reference voltage terminal Ref, the voltage at the output terminal ea_o of the operational amplifier A1 increases, the comparator A2 increases the high pulse time to the second control terminal ctrl2 through the output terminal of the comparator A2 based on the voltage at the output terminal ea_o of the operational amplifier A1 and the sawtooth wave Sw, the high pulse time of the first control terminal ctrl1 decreases, the average current flowing through the inductor L increases, and the input terminal voltage of the voltage transformation circuit 01 increases, and the output voltage finally returns to the reference set voltage.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

The power supply circuit is characterized by comprising a direct current power supply, a transformation and conversion circuit, a voltage regulating circuit, a first capacitor, a second capacitor and a signal output end;

the voltage regulating circuit comprises an inductor, a first end, a second end and a third end;

the transformation conversion circuit comprises a first input end, a second input end, a first output end and a second output end;

the first input end of the transformation conversion circuit is electrically connected with the positive electrode of the direct current power supply, and the second input end of the transformation conversion circuit is electrically connected with the first end of the voltage regulating circuit; the first output end of the transformation conversion circuit is electrically connected with the signal output end, and the second output end of the transformation conversion circuit is connected to the grounding end;

the second end of the voltage regulating circuit is electrically connected with the positive electrode of the direct current power supply;

The third end of the voltage regulating circuit is electrically connected with the first output end or the second output end of the transformation and conversion circuit;

the negative electrode of the direct current power supply is connected to the grounding end;

the two ends of the first capacitor are electrically connected between the first input end and the second input end of the transformation and conversion circuit;

the two ends of the second capacitor are electrically connected between the first output end and the second output end of the transformation and conversion circuit;

the transformation conversion circuit is configured to: converting the voltages input by the first input end and the second input end and outputting the converted voltages through the first output end and the second output end;

the voltage regulation circuit is configured to: and controlling the inductor to adjust the current of the first end according to the voltage of the signal output end.
The power supply circuit of claim 1, wherein the power supply circuit comprises a power supply circuit,

the voltage regulating circuit further comprises a controller, and the controller controls the inductor to regulate the current of the first end according to the voltage of the signal output end.
A power supply circuit according to claim 1 or 2, characterized in that,

the voltage regulation circuit is configured to: alternately conducting a first passage and a second passage according to the voltage of the signal output end so as to control the inductor to adjust the current of the first end; wherein the first passageway is a passageway between the first end and the second end, and the second passageway is a passageway between the first end and the third end.
A power supply circuit according to any one of claims 1-3, wherein the voltage regulating circuit further comprises a first transistor, a second transistor, a first control terminal, a second control terminal;

the grid electrode of the first transistor is electrically connected with the first control end, the first electrode of the first transistor is electrically connected with the second end, and the second electrode of the first transistor is electrically connected with the first node;

the grid electrode of the second transistor is electrically connected with the second control end, and the first electrode of the second transistor is electrically connected with the first node; a second pole of the second transistor is electrically connected with the third terminal;

one end of the inductor is electrically connected with the first end, and the other end of the inductor is electrically connected with the first node.
The power supply circuit of claim 4, wherein the power supply circuit comprises a power supply circuit,

the voltage regulating circuit comprises the controller; the controller is electrically connected with the signal output end, the first control end and the second control end;

the controller is configured to: and according to the voltage of the signal output end, inputting a first control signal to the first control end, inputting a second control signal to the second control end, and adjusting the duty ratio of the first control signal and the second control end so as to control the duration of alternately starting the first transistor and the second transistor.
A power supply circuit according to claim 1 or 2, characterized in that,

the voltage regulation circuit is configured to: alternately conducting a second path and a third path according to the voltage of the signal output end so as to control the inductor to adjust the current of the first end; wherein the second passageway is a passageway between the third end and the first end, and the third passageway is a passageway between the third end and the second end.
The power supply circuit according to any one of claims 1, 2 or 6, wherein,

the voltage regulating circuit further comprises a third transistor, a fourth transistor, a third control end and a fourth control end;

a gate of the third transistor is electrically connected to the third control terminal, a first electrode of the third transistor is electrically connected to the second terminal, and a second electrode of the third transistor is electrically connected to a second node;

the grid electrode of the fourth transistor is electrically connected with the fourth control end, the first electrode of the fourth transistor is electrically connected with the first end, and the second electrode of the fourth transistor is electrically connected with the second node;

one end of the inductor is electrically connected with the second node, and the other end of the inductor is electrically connected with the third terminal.
The power circuit of claim 7, wherein the power circuit comprises a power supply circuit,

the voltage regulating circuit comprises the controller; the controller is electrically connected with the signal output end, the third control end and the fourth control end;

the controller is configured to: and according to the voltage of the signal output end, inputting a third control signal to the third control end, inputting a fourth control signal to the fourth control end, and adjusting the duty ratio of the third control signal and the fourth control signal to control the duration of alternately starting the third transistor and the fourth transistor.
A power supply circuit according to claim 1 or 2, characterized in that,

the voltage regulation circuit is configured to: alternately conducting a third path, a second path, a first path and connecting both ends of the inductor to the second end according to the voltage of the signal output end so as to control the inductor to adjust the current of the first end; wherein the third passageway is a passageway between the third end and the second end, the second passageway is a passageway between the third end and the first end, and the first passageway is a passageway between the first end and the second end.
The power supply circuit according to any one of claims 1, 2, 3, 6, 9, wherein,

the voltage regulating circuit further comprises a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a fifth control terminal, a sixth control terminal, a seventh control terminal and an eighth control terminal;

the grid electrode of the fifth transistor is electrically connected with the fifth control end, the first electrode of the fifth transistor is electrically connected with the second end, and the second electrode of the fifth transistor is electrically connected with the fourth node;

the grid electrode of the sixth transistor is electrically connected with the sixth control end, the first electrode of the sixth transistor is electrically connected with the second end, and the second electrode of the sixth transistor is electrically connected with a third node;

a gate of the seventh transistor is electrically connected to the seventh control terminal, a first pole of the seventh transistor is electrically connected to the first terminal, and a second pole of the seventh transistor is electrically connected to the third node;

a gate of the eighth transistor is electrically connected to the eighth control terminal, a first pole of the eighth transistor is electrically connected to the fourth node, and a second pole of the eighth transistor is electrically connected to the third terminal;

One end of the inductor is electrically connected with the third node, and the other end of the inductor is electrically connected with the fourth node.
The power circuit of claim 10, wherein the power circuit comprises a power supply circuit,

the voltage regulating circuit comprises the controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end;

the controller is configured to: inputting a sixth control signal to the sixth control terminal, inputting a seventh control signal to the seventh control terminal, turning off the sixth transistor, and turning on the seventh transistor; and according to the voltage of the signal output end, a fifth control signal is input to the fifth control end, an eighth control signal is input to the eighth control end, and the duty ratios of the fifth control signal and the eighth control signal are adjusted so as to control the duration of alternately starting the fifth transistor and the eighth transistor.
The power circuit of claim 10, wherein the power circuit comprises a power supply circuit,

the voltage regulating circuit comprises the controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end;

The controller is configured to: inputting a fifth control signal to the fifth control terminal, inputting an eighth control signal to the eighth control terminal, turning off the fifth transistor, and turning on the eighth transistor; and according to the voltage of the signal output end, a sixth control signal is input to the sixth control end, a seventh control signal is input to the seventh control end, and the duty ratio of the sixth control signal and the seventh control signal is adjusted so as to control the duration of alternately starting the sixth transistor and the seventh transistor.
The power circuit of claim 10, wherein the power circuit comprises a power supply circuit,

the voltage regulating circuit comprises the controller; the controller is electrically connected with the signal output end, the fifth control end, the sixth control end, the seventh control end and the eighth control end;

the controller is configured to: according to the voltage of the signal output end, a duty ratio of a fifth control signal is input to the fifth control end, a sixth control signal is input to the sixth control end, a seventh control signal is input to the seventh control end, an eighth control signal is input to the eighth control end, and the duty ratio of the fifth control signal, the sixth control signal, the seventh control signal and the eighth control signal is adjusted to periodically and sequentially perform a first control stage, a second control stage, a third control stage and a fourth control stage;

The first control phase comprises: turning off the fifth transistor and the seventh transistor, and controlling the duration of turning on the sixth transistor and the eighth transistor;

the second control phase comprises: turning off the fifth transistor and the sixth transistor, and controlling the duration of turning on the seventh transistor and the eighth transistor;

the third control phase comprises: turning off the sixth transistor and the eighth transistor, and controlling the duration of turning on the fifth transistor and the seventh transistor;

the fourth control phase comprises: and turning off the seventh transistor and the eighth transistor, and controlling the time period for turning on the fifth transistor and the sixth transistor.
A terminal device comprising a load module and a power supply circuit as claimed in any one of claims 1 to 13; the power supply circuit is connected with the load module through a signal output end.