CN116779634A - Ultraviolet LED chip with high-voltage inverted structure and manufacturing method thereof - Google Patents
Ultraviolet LED chip with high-voltage inverted structure and manufacturing method thereof Download PDFInfo
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Abstract
The invention belongs to the technical field of LED chips, and particularly relates to an ultraviolet LED chip with a high-voltage inverted structure, which comprises a substrate and an epitaxial structure, wherein the epitaxial structure sequentially comprises an ALN buffer layer, an N-type ALGaN layer, an active layer, a P-type ALGaN layer and a P-type GaN layer from bottom to top, and an isolation groove, an N table top, an N-type contact electrode, an insulating layer, an Ag reflecting electrode, a metal protective layer, a passivation layer and a bonding pad electrode are arranged on the epitaxial structure. The invention also provides a manufacturing method of the ultraviolet LED chip with the high-voltage flip-chip structure. According to the invention, through the Ag reflecting electrode and the annealing process, ohmic contact of the Ag reflecting electrode and the P-type GaN layer is realized, and the insulating layer is combined, so that large-area coverage of the Ag reflecting electrode on the surface of the chip is realized, reflection of ultraviolet rays is ensured, and the light extraction efficiency of the ultraviolet LED chip can be improved when the transparent conductive layer and the DBR are not prepared.
Description
Technical Field
The invention belongs to the technical field of LED chips, and particularly relates to an ultraviolet LED chip with a high-voltage inverted structure and a manufacturing method thereof.
Background
Ultraviolet LEDs refer to LEDs with luminescence center wavelength below 400nm, and deep ultraviolet LEDs based on AlGaN semiconductors have been widely focused and studied because of the advantages of small volume, low energy consumption, long service life, no toxicity, adjustable wavelength and the like.
The traditional ultraviolet LED chip generally adopts a forward-mounted structure and adopts ITO as a current expansion layer, but the ultraviolet LED chip with the structure has the advantages of smaller current injection, low luminous efficiency and relatively poor stability, so that the flip LED chip is more and more important. Compared with the same traditional LED, the flip LED chip has more excellent heat dissipation and luminous uniformity.
But flip-chip LED chips typically employ DBRs as the reflective layer, but DBRs typically employ SiO 2 With Ti 3 O 5 The ultraviolet LED chip is designed as a material with high and low refractive index, and has a thicker thickness, so that the ultraviolet LED chip has strong ultraviolet light absorption, and the luminous efficiency of the ultraviolet LED chip is lower.
In the patent number CN202023137227.0, a high-voltage flip-chip ultraviolet LED chip is proposed, which comprises a substrate and a plurality of light emitting units, wherein the light emitting units are arranged on the substrate, the light emitting units are mutually connected in series, and an antireflection film is arranged at the bottom of the substrate to improve the light extraction efficiency of the deep ultraviolet LED chip with a high-voltage flip-chip structure, so that the manufacture of the ultraviolet LED chip is more complex.
Disclosure of Invention
The invention aims to provide an ultraviolet LED chip with a high-voltage inverted structure and a manufacturing method thereof, so as to solve the technical problems in the background technology.
In order to achieve the technical purpose, the technical scheme of the invention comprises the following steps:
the ultraviolet LED chip with the high-voltage inverted structure comprises a substrate and an epitaxial structure, wherein the epitaxial structure is sequentially provided with an ALN buffer layer, an N-type ALGaN layer, an active layer, a P-type ALGaN layer and a P-type GaN layer from bottom to top, and the epitaxial structure is provided with an isolation groove, an N table top, an N-type contact electrode, an insulating layer, an Ag reflecting electrode, a metal protection layer, a passivation layer and a bonding pad electrode;
the isolation groove penetrates through the epitaxial structure, the isolation groove comprises a first isolation groove and at least one second isolation groove, and the second isolation groove divides the epitaxial structure into at least two light-emitting units;
the N table top penetrates through the P-type GaN layer, the P-type ALGaN layer and the active layer and extends to the middle of the N-type ALGaN layer, and the N table top comprises a first N table top, a second N table top and a third N table top;
the N-type contact electrode comprises a first N-type contact electrode and a second N-type contact electrode, the first N-type contact electrode is covered on the second N-type table top, the shape of the first N-type contact electrode is identical to that of the second N-type table top, the second N-type contact electrode is covered on the third N-type table top, and the shape of the second N-type contact electrode is identical to that of the third N-type table top;
the insulating layer comprises a first insulating layer, a current blocking layer, a second insulating layer, a bridging insulating layer and a third insulating layer, wherein the first insulating layer, the second insulating layer and the third insulating layer cover the edges of the N-type ALGaN layer and the P-type GaN layer exposed outside;
the Ag reflecting electrode comprises a first Ag reflecting electrode, a second Ag reflecting electrode and a bridging electrode, wherein the first Ag reflecting electrode is arranged on one light-emitting unit, the second Ag reflecting electrode is arranged on the other light-emitting unit, gaps are reserved between the first Ag reflecting electrode and the first N-type contact electrode and between the second Ag reflecting electrode and the second N-type contact electrode, the bridging electrode covers the upper portion of the bridging insulating layer, and two ends of the bridging electrode are respectively connected with the first N-type contact electrode and the second Ag reflecting electrode.
As an improvement, the included angle between the groove wall of the isolation groove and the top surface of the substrate is 35-50 degrees, the first isolation groove is distributed around the epitaxial structure, and two ends of the second isolation groove are respectively communicated with the first isolation groove.
As a further improvement, the first N mesa is distributed on the inner side of the first isolation groove, the second N mesa is distributed on one light emitting unit, the third N mesa is distributed on the other light emitting unit, and the second N mesa is communicated with the second isolation groove.
As a further improvement, the first N-type contact electrode and the second N-type contact electrode each include a main body portion and a finger portion, the finger portions are N-type, the main body portion is disposed at an N-type closed end of the finger portion, the main body portion of the first N-type contact electrode is disposed near the second N-type contact electrode, and the main body portion of the second N-type contact electrode is disposed near the first N-type contact electrode.
As a further improvement, the current blocking layer is circularly arranged and uniformly distributed on the P-type GaN layer, and the bridging insulating layer sequentially coats the second N mesa near the second isolation groove, the second isolation groove and the edge of the P-type GaN layer near the second isolation groove from the edge of the main body of the first N-type contact electrode.
As a further improvement, the shape of the metal protection layer is the same as that of the Ag reflective electrode, the metal protection layer coats the Ag reflective electrode, the metal protection layer comprises a first metal protection layer, a second metal protection layer and a bridging metal protection layer, the first metal protection layer coats the first Ag reflective electrode, the second metal protection layer coats the second Ag reflective electrode, and the bridging metal protection layer coats the bridging electrode.
As a further improvement, the passivation layer coats the top surface of the epitaxial structure, a plurality of first round holes are formed in one end, close to the first metal protection layer, of the passivation layer, the first metal protection layer is exposed in each of the first round holes, a second round hole is formed in one end, close to the second metal protection layer, of the passivation layer, and a second N-type contact electrode is exposed in each of the second round holes.
As a further improvement, the pad electrode includes a P pad electrode and an N pad electrode, the P pad electrode covers the first round hole and exposes the first metal protection layer therein to form a current input end, and the N pad electrode covers the second round hole and exposes the second N-type contact electrode therein to form a current output end.
The invention also provides a manufacturing method of the ultraviolet LED chip with the high-voltage flip-chip structure, which comprises the following steps:
s1: providing a substrate;
s2: sequentially growing an ALN buffer layer, an N-type ALGaN layer, an active layer, a P-type ALGaN layer and a P-type GaN layer on a substrate from bottom to top;
s3: etching to form isolation groove on chip surface
Forming an isolation groove photoresist mask pattern on the surface of a chip through photoetching, forming an isolation groove through ICP etching, and finally cleaning redundant photoresist to form a first isolation groove and a second isolation groove;
s4: etching the chip surface to form N table-board
Forming a photoresist mask pattern of an N table-board on the surface of a chip through photoetching, forming the N table-board through ICP etching, and finally cleaning to remove redundant photoresist to form a first N table-board, a second N table-board and a third N table-board;
s5: manufacturing N-type contact electrode
Firstly, manufacturing a photoresist mask pattern of an N-type contact electrode of a chip on the surface of the chip through photoetching, then depositing Ni/Al/Cr/Ni/Au on the surface of the chip through metal evaporation, and finally forming the first N-type contact electrode and the second N-type contact electrode through Lift-off;
s6: manufacture of insulating layers
Firstly depositing a photoresist mask pattern with the thickness of 500nm on the surface of a chip by PECVD, then manufacturing an insulating layer by photoetching, and then etching redundant SiO by utilizing a buffer oxide etching solution BOE 2 Finally, the first insulating layer, the current blocking layer, the second insulating layer, the bridging insulating layer and the third insulating layer are obtained through glue removing and cleaning;
s07: manufacture of Ag reflective electrode
Firstly depositing Ni/Ag/Ni with the thickness of 0.7nm/150nm/100nm on the surface of a chip through metal evaporation, then photoetching to manufacture a photoresist mask pattern of an Ag reflecting electrode, then corroding redundant Ni/Ag/Ni by utilizing a mixed solution of ammonia water and hydrogen peroxide, and finally obtaining the first Ag reflecting electrode, the second Ag reflecting electrode and a bridging electrode through photoresist stripping and cleaning;
s08: at N 2 Carrying out rapid high-temperature annealing on Ni/Ag/Ni in the environment to ensure that the Ni/Ag/Ni and the P-type GaN layer form good ohmic contact;
s09: manufacturing a metal protection layer
Firstly, manufacturing a photoresist mask pattern on a chip metal protection layer on the surface of the chip through photoetching, then depositing TiW/Pt/Au design on the surface of the chip through metal evaporation, wherein the thickness of the TiW/Pt/Au design is 100nm/100nm/1000nm respectively, and finally forming a first metal protection layer, a second metal protection layer and a bridging metal protection layer through Lift-off;
s10: making passivation layer
Firstly depositing a photoresist mask pattern with the thickness of 2000nm on the surface of a chip by PECVD, then manufacturing a passivation layer by photoetching, and then etching redundant SiO by utilizing ICP 2 Finally, the passivation layer is obtained through photoresist stripping and cleaning;
s11: manufacturing pad electrode
A photoresist mask pattern on a chip pad electrode is firstly manufactured on the surface of a chip by photoetching, then Cr/Pt/Au/AuSn is deposited on the surface of the chip by metal evaporation, the thickness of the photoresist mask pattern is respectively 1nm/100nm/500nm/1000nm, and finally a P pad electrode and an N pad electrode are formed by Lift-off.
By adopting the technical scheme, the invention has the beneficial effects that:
according to the ultraviolet LED chip with the high-voltage inverted structure, the ultraviolet LED chip is divided into the independent multiple light-emitting units through the isolation groove, the bridging insulating layer, the bridging electrode and the bridging metal protection layer are sequentially manufactured on the second isolation groove, the electrical interconnection of the first N-type contact electrode and the second Ag reflecting electrode is realized, namely the high-voltage design of the ultraviolet LED chip is realized, the ultraviolet LED chip can be driven by small current and large voltage, and the current expansion performance and the light-emitting efficiency of the ultraviolet LED chip are improved.
Through Ag reflecting electrode and annealing process, the ohmic contact of Ag reflecting electrode and P type GaN layer is realized, and the second insulating layer and the third insulating layer are combined to realize the large-area coverage of the Ag reflecting electrode on the surface of the chip, so that the reflection of Ag reflecting electrode on ultraviolet light is ensured, the emergent of ultraviolet light can be improved on the premise of not preparing a transparent conductive layer and a DBR, and the light extraction efficiency of the ultraviolet LED chip is further improved.
The metal protection layer can not only effectively protect the Ag reflecting layer from risks in the aspects of water vapor invasion, air oxidation and the like, but also improve the shock resistance and stability of the chip by being matched with the passivation layer.
The pad electrode can be matched with the passivation layer, the P pad electrode and the first light-emitting unit metal protection layer are electrically interconnected to form a current input end, the N-pad electrode and the second N-type contact electrode of the second light-emitting unit are electrically interconnected to form a current output end, and the mounting of a later chip and the heat dissipation of the chip are facilitated.
Drawings
FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view of an epitaxial structure;
FIG. 3 is a schematic top surface structure of an epitaxial structure;
FIG. 4 is a schematic top surface structure of an isolation trench;
FIG. 5 is a schematic top structure of an N mesa;
FIG. 6 is a schematic top structure of an N-type contact electrode;
FIG. 7 is a schematic top surface structure of an insulating layer;
FIG. 8 is a schematic diagram of the top surface structure of an Ag reflecting electrode;
FIG. 9 is a schematic top surface structure of a metal protection layer;
FIG. 10 is a schematic top surface structure of a passivation layer;
fig. 11 is a schematic diagram of a top surface structure of the pad electrode;
wherein: 1-a substrate; a 2-epitaxial structure; 201-ALN buffer layer; a 202-N type ALGaN layer; 203-an active layer; 204-P-type ALGaN layer; a 205-P type GaN layer; 301-a first isolation groove; 302-a second isolation trench; 401-a first N mesa; 402-a second N mesa; 403-a third N mesa; 501-a first N-type contact electrode; 502-a second N-type contact electrode; 601-a first insulating layer; 602-a current blocking layer; 603-a second insulating layer; 604-bridging the insulating layer; 605-a third insulating layer; 701-a first Ag reflective electrode; 702-bridging electrodes; 703-a second Ag reflective electrode; 801-a first metal protective layer; an 802-bridged metal capping layer; 803-a second metal protective layer; 901-a passivation layer; 1001-P pad electrode; 1002-N pad electrode.
Detailed Description
The invention will be further described with reference to the following detailed description and the accompanying drawings. Wherein the drawings are for illustrative purposes only and are shown in schematic, non-physical, and not intended to be limiting of the present patent; for the purpose of better illustrating embodiments of the invention, certain elements of the drawings may be omitted, enlarged or reduced and do not represent the size of the actual product; it will be appreciated by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numbers in the drawings of embodiments of the invention correspond to the same or similar components; in the description of the present invention, it should be understood that, if there is an azimuth or positional relationship indicated by terms such as "upper", "lower", "left", "right", etc., based on the azimuth or positional relationship shown in the drawings, it is only for convenience of describing the present invention and simplifying the description, but it is not indicated or implied that the apparatus or element referred to must have a specific azimuth, be constructed and operated in a specific azimuth, and thus terms describing the positional relationship in the drawings are merely illustrative and should not be construed as limitations of the present patent, and specific meanings of the terms described above may be understood by those skilled in the art according to specific circumstances.
As shown in fig. 1 to 11, an ultraviolet LED chip with a high-voltage inverted structure includes a substrate 1 and an epitaxial structure 2, wherein the substrate 1 is generally made of a heterogeneous substrate such as sapphire, silicon carbide, silicon and the like, and a homogeneous substrate of GaN and AlN, and the substrate 1 is made of sapphire in this embodiment.
The epitaxial structure 2 is sequentially provided with an ALN buffer layer 201, an N-type ALGaN layer 202, an active layer 203, a P-type ALGaN layer 204 and a P-type GaN layer 205 from bottom to top, wherein the active layer 203 is a luminescent ALGaN multi-quantum well layer, and the epitaxial structure 2 is provided with an isolation groove, an N table top, an N-type contact electrode, an insulating layer, an Ag reflecting electrode, a metal protection layer, a passivation layer 901 and a pad electrode.
The isolation groove penetrates through the epitaxial structure 2, the isolation groove comprises a first isolation groove 301 and at least one second isolation groove 302, the first isolation groove 301 is distributed around the epitaxial structure 2 to isolate the ultraviolet LED chip from other chips, two ends of the second isolation groove 302 are respectively communicated with the first isolation groove 301, the second isolation groove 302 divides the epitaxial structure 2 into at least two light emitting units, when one second isolation groove 302 is arranged, the second isolation groove 302 is positioned in the middle of the epitaxial structure to divide the epitaxial structure 2 into two light emitting units, when two second isolation grooves 302 are arranged, the second isolation groove 302 is positioned at one third of the epitaxial structure to divide the epitaxial structure 2 into three light emitting units, when n second isolation grooves 302 are arranged, the second isolation groove 302 is positioned at one n of the epitaxial structure to divide the epitaxial structure 2 into n+1 light emitting units, in the embodiment, one second isolation groove 302 is arranged to divide the epitaxial structure 2 into two light emitting units, and the two light emitting units are respectively the first light emitting unit and the second light emitting unit.
Further, the included angle between the groove wall of the isolation groove and the top surface of the substrate 1 is between 35 and 50 degrees, preferably, the included angle between the groove wall of the isolation groove and the top surface of the substrate 1 is 45 degrees, so that the insulating layer, the Ag reflective layer, the metal protective layer and the passivation layer 901 can cover the surface of the chip smoothly, and cracks can not occur at the step, thereby causing phenomena such as chip leakage.
The depth of the N mesa penetrates through the entire P-type GaN layer 205, the P-type ALGaN layer 204 and the active layer 203 and extends to the middle of the N-type ALGaN layer 202, so that the N-type contact electrode can be conveniently manufactured.
Further, the N mesas include a first N mesa 401, a second N mesa 402, and a third N mesa 403, where the first N mesa 401 is distributed inside the first isolation groove 301, so as to avoid damage to the ultraviolet LED chip caused by dicing and splitting after the ultraviolet LED chip is manufactured; the second N mesa 402 is distributed over the first light emitting unit, the second N mesa 402 is in communication with the second isolation trench 302, and the third N mesa 403 is distributed over the second light emitting unit.
The N-type contact electrode comprises a first N-type contact electrode 501 and a second N-type contact electrode 502, the first N-type contact electrode 501 is distributed on the second N-type mesa 402, the shape of the first N-type contact electrode 501 is the same as that of the second N-type mesa 402, the second N-type contact electrode 502 is distributed on the third N-type mesa 403, the shape of the second N-type contact electrode 502 is the same as that of the third N-type mesa 403, the first N-type contact electrode 501 and the second N-type contact electrode 502 both comprise a main body part and a finger part, the finger part is of an N-type, the main body part is arranged at an N-type closed end of the finger part, the main body part of the first N-type contact electrode 501 is arranged close to the second N-type contact electrode 502, and the main body part of the second N-type contact electrode 502 is arranged close to the first N-type contact electrode 501, can effectively form ohmic contact with the N-type ALGaN layer 202 and can provide partial reflection for flip-chip output of ultraviolet light.
Specifically, the N-type contact electrode can adopt a Ni/Al/Cr/Ni/Au structure, and the corresponding thickness is 0.7nm/150nm/100nm/100nm/2000nm respectively.
In this embodiment, the insulating layers include a first insulating layer 601, a current blocking layer 602, a second insulating layer 603, a bridge insulating layer 604, and a third insulating layer 605, and the Ag reflective electrodes include a first Ag reflective electrode 701, a second Ag reflective electrode 703, and a bridge electrode 702.
The current blocking layer 602 is circularly arranged and uniformly distributed on the P-type GaN layer 205 and below the Ag reflective electrode, so as to relieve the congestion phenomenon during current transmission between the Ag reflective electrode and the P-type GaN layer 205 and ensure that the current is uniformly distributed on the P-type GaN layer 205.
The bridge insulating layer 604 covers the second N mesa 402, the second isolation trench 302, and the edge of the P-type GaN layer 205 near the second isolation trench 302 in order from the edge of the main body of the first N-type contact electrode 501, to ensure that the bottom layer of the bridge electrode 702 is connected to the first N-type contact electrode 501 and the second Ag reflective electrode 703 only at both ends, respectively, and remains insulated from all other structures.
The edges of the exposed N-type ALGaN layer 202 and the exposed P-type GaN layer 205 are covered by the first insulating layer 601, the second insulating layer 603 and the third insulating layer 605 so as to ensure that the Ag reflecting electrode can be covered on the surface of the ultraviolet LED chip as much as possible, and the brightness of the chip is improved.
Further, the insulating layer adopts Si0 2 The thickness of the insulating layer is 300nm-500nm, preferably 500nm, which can ensure the insulating effect and reduce the absorption of ultraviolet light by the insulating layer.
The first Ag reflective electrode 701 is disposed on the first light emitting unit, the second Ag reflective electrode 703 is disposed on the second light emitting unit, and gaps are left between the first Ag reflective electrode 701 and the first N-type contact electrode 501 and between the second Ag reflective electrode 703 and the second N-type contact electrode 502, and the Ag reflective electrode is made of Ni/Ag/Ni metal so that ohmic contact is formed between the first Ag reflective electrode 701 and between the second Ag reflective electrode 703 and the P-type GaN layer 205, wherein the first layer Ni can form good ohmic contact with the P-type GaN layer 205 by rapid annealing, and the second layer Ni can protect the Ag reflective layer from being damaged during the rapid annealing.
Further, the first layer of Ni should have a thickness of 0.5-1nm, preferably 0.7nm, ag has a thickness of 100-200 nm, preferably 150nm, and the second layer of Ni has a thickness of 100-200 nm, preferably 100nm, to ensure the reflection of ultraviolet light while forming an ohmic contact.
The bridge electrode 702 is covered over the bridge insulating layer 604, and two ends of the bridge electrode 702 are respectively connected to the first N-type contact electrode 501 and the second Ag reflective electrode 703.
The shape of the metal protection layer is the same as that of the Ag reflecting electrode, the metal protection layer coats the Ag reflecting electrode, the metal protection layer comprises a first metal protection layer 801, a second metal protection layer 803 and a bridging metal protection layer 802, the first metal protection layer 801 coats the first Ag reflecting electrode 701, the second metal protection layer 803 coats the second Ag reflecting electrode 703, the bridging metal protection layer 802 coats the bridging electrode 702, that is to say, the coverage area of the metal protection layer is larger, the metal protection layer can protect the Ag reflecting electrode from corrosion and damage in the subsequent process and the external environment, and the metal protection layer can also improve the shock resistance and stability of the chip and reduce the risk of chip fracture.
Specifically, the metal protection layer is composed of TiW/Pt/Au metal, and the thickness of the metal protection layer is 100nm/100nm/1000nm respectively.
The passivation layer 901 is coated on the surface of the epitaxial structure 2, the pad electrode comprises a P pad electrode 1001 and an N pad electrode 1002, a plurality of first round holes are formed in one end, close to the first metal protection layer 801, of the passivation layer 901, the first metal protection layer 801 is exposed in the first round holes so as to be connected with the P-pad electrode, a second round hole is formed in one end, close to the second metal protection layer 803, of the passivation layer 901, and the second N-type contact electrode 502 is exposed in the second round hole so as to be connected with the N pad electrode 1002.
In particular, the passivation layer may be silicon nitride or Si0 2 In this embodiment, the passivation layer is Si0 2 The deposition process is simple, the insulativity is good, and Si0 2 The thickness of the passivation layer is 1500nm-3000nm, the preferable thickness is 2000nm, the passivation layer can effectively cover the surface of the whole ultraviolet LED chip, and good protection is formed for the ultraviolet LED chip, so that the stability and reliability of the ultraviolet LED chip in the subsequent processing, packaging and using processes are improved.
The pad electrodes are distributed at two ends of the passivation layer 901, wherein the P pad electrode 1001 covers the first round hole and exposes the first metal protection layer 801 to form a current input end, and the N pad electrode 1002 covers the second round hole and exposes the second N-type contact electrode 502 to form a current output end.
Specifically, the pad electrode adopts a Cr/Pt/Au/AuSn structure, and the corresponding thickness is 1nm/100nm/500nm/1000nm, respectively.
The manufacturing method of the ultraviolet LED chip with the high-voltage inverted structure comprises the following steps:
s1: providing a substrate 1 which is a base for the growth of a subsequent epitaxial structure 2;
s2: an ALN buffer layer 201, an N-type ALGaN layer 202, an active layer 203, a P-type ALGaN layer 204, and a P-type GaN layer 205 are sequentially grown on a substrate 1;
s3: forming isolation grooves on the surface of a chip by etching, specifically, forming an isolation groove photoresist mask pattern on the surface of the chip by photoetching, forming isolation grooves by ICP etching, and finally, cleaning off redundant photoresist to form a first isolation groove 301 and a second isolation groove 302;
s4: etching the surface of the chip to form an N table, specifically, forming a photoresist mask pattern of the N table on the surface of the chip through photoetching, forming the N table through ICP etching, and finally cleaning to remove redundant photoresist to form a first N table 401, a second N table 402 and a third N table 403;
s5: the N-type contact electrode is manufactured, specifically, a photoresist mask pattern of the N-type contact electrode of the chip is firstly manufactured on the surface of the chip through photoetching, then Ni/Al/Cr/Ni/Au is deposited on the surface of the chip through metal evaporation, and finally the first N-type contact electrode 501 and the second N-type contact electrode 502 are formed through Lift-off.
S6: manufacturing an insulating layer, specifically, depositing a photoresist mask pattern with the thickness of 500nm on the surface of a chip by PECVD, manufacturing the insulating layer by photoetching, and etching redundant SiO by using a buffer oxide etching solution BOE 2 Finally, the first insulating layer 601, the current blocking layer 602, the second insulating layer 603, the bridging insulating layer 604 and the third insulating layer 605 are obtained by photoresist stripping and cleaning, wherein the buffer oxide etching solution BOE is formed by mixing hydrofluoric acid and water or ammonium fluoride and water.
S07: making Ag reflecting electrode, specifically, depositing Ni/Ag/Ni with thickness of 0.7nm/150nm/100nm on the surface of the chip by metal evaporation, photoetching to make photoresist mask pattern of the Ag reflecting electrode, etching excessive Ni/Ag/Ni by using mixed solution of ammonia water and hydrogen peroxide, and finally washing by photoresist stripping to obtain a first Ag reflecting electrode 701, a second Ag reflecting electrode 703 and a bridging electrode 702.
S08: at N 2 And (3) carrying out rapid high-temperature annealing on the Ni/Ag/Ni in the environment so as to ensure that the Ni/Ag/Ni and the P-type GaN layer form good ohmic contact.
S09: the metal protection layer is manufactured, specifically, a photoresist mask pattern of the metal protection layer of the chip is firstly manufactured on the surface of the chip through photoetching, then TiW/Pt/Au is deposited on the surface of the chip through metal evaporation, the thickness of the TiW/Pt/Au is respectively 100nm/100nm/1000nm, and finally a first metal protection layer 801, a second metal protection layer 803 and a bridging metal protection layer 802 are formed through Lift-off.
S10: the passivation layer 901 is formed, specifically, firstly, a photoresist mask pattern with a thickness of 2000nm is deposited on the surface of the chip by PECVD, then the passivation layer is formed by photolithography, and then the redundant SiO is etched by ICP 2 Finally, the passivation layer 901 is obtained by photoresist stripping and cleaning.
S11: the pad electrode is fabricated, specifically, a photoresist mask pattern on the chip pad electrode is fabricated on the surface of the chip by photolithography, then Cr/Pt/Au/AuSn is deposited on the surface thereof by metal evaporation, the thickness is 1nm/100nm/500nm/1000nm, respectively, and finally P pad electrode 1001 and N pad electrode 1002 are formed by Lift-off.
According to the ultraviolet LED chip with the high-voltage inverted structure and the manufacturing method thereof, ohmic contact between the Ag reflecting electrode and the P-type GaN layer is realized through the Ag reflecting electrode and the annealing process, and the second insulating layer and the third insulating layer are combined to realize large-area coverage of the Ag reflecting electrode and the P-type GaN layer on the surface of the chip, so that reflection of ultraviolet rays is ensured, and the light extraction efficiency of the ultraviolet LED chip can be improved when the transparent conducting layer and the DBR are not prepared.
The above-described embodiments of the present invention do not limit the scope of the present invention. Any other corresponding changes and modifications made in accordance with the technical idea of the present invention shall be included in the scope of the claims of the present invention.
Claims (9)
1. The ultraviolet LED chip with the high-voltage inverted structure comprises a substrate and an epitaxial structure, wherein the epitaxial structure is sequentially provided with an ALN buffer layer, an N-type ALGaN layer, an active layer, a P-type ALGaN layer and a P-type GaN layer from bottom to top;
the isolation groove penetrates through the epitaxial structure, the isolation groove comprises a first isolation groove and at least one second isolation groove, and the second isolation groove divides the epitaxial structure into at least two light-emitting units;
the N table top penetrates through the P-type GaN layer, the P-type ALGaN layer and the active layer and extends to the middle of the N-type ALGaN layer, and the N table top comprises a first N table top, a second N table top and a third N table top;
the N-type contact electrode comprises a first N-type contact electrode and a second N-type contact electrode, the first N-type contact electrode is covered on the second N-type table top, the shape of the first N-type contact electrode is identical to that of the second N-type table top, the second N-type contact electrode is covered on the third N-type table top, and the shape of the second N-type contact electrode is identical to that of the third N-type table top;
the insulating layer comprises a first insulating layer, a current blocking layer, a second insulating layer, a bridging insulating layer and a third insulating layer, wherein the first insulating layer, the second insulating layer and the third insulating layer cover the edges of the N-type ALGaN layer and the P-type GaN layer exposed outside;
the Ag reflecting electrode comprises a first Ag reflecting electrode, a second Ag reflecting electrode and a bridging electrode, wherein the first Ag reflecting electrode is distributed on one light-emitting unit, the second Ag reflecting electrode is distributed on the other light-emitting unit, gaps are reserved between the second Ag reflecting electrode and the first N-type contact electrode and between the second Ag reflecting electrode and the first N-type contact electrode, the bridging electrode covers the bridging insulating layer, and two ends of the bridging electrode are respectively connected with the first N-type contact electrode and the second Ag reflecting electrode.
2. The ultraviolet LED chip of claim 1, wherein an included angle between a groove wall of the isolation groove and a top surface of the substrate is 35 ° -50 °, the first isolation groove is distributed around the epitaxial structure, and two ends of the second isolation groove are respectively communicated with the first isolation groove.
3. The high-voltage inverted-structure ultraviolet LED chip of claim 2, wherein said first N mesa is disposed inside said first isolation trench, said second N mesa is disposed on one of said light emitting units, said third N mesa is disposed on another of said light emitting units, and said second N mesa is in communication with said second isolation trench.
4. The ultraviolet LED chip of claim 1, wherein the first N-type contact electrode and the second N-type contact electrode each comprise a main body portion and a finger portion, the finger portions are N-type, the main body portion is disposed at an N-type closed end of the finger portion, the main body portion of the first N-type contact electrode is disposed near the second N-type contact electrode, and the main body portion of the second N-type contact electrode is disposed near the first N-type contact electrode.
5. The ultraviolet LED chip of claim 4, wherein the current blocking layer is circularly arranged and uniformly distributed on the P-type GaN layer, and the bridging insulating layer sequentially covers the second N mesa near the second isolation groove, the second isolation groove and the edge of the P-type GaN layer near the second isolation groove from the edge of the main body of the first N-type contact electrode.
6. The high voltage inverted structure ultraviolet LED chip of claim 1, wherein the shape of the metal protection layer is the same as the shape of the Ag reflective electrode, the metal protection layer covers the Ag reflective electrode, the metal protection layer comprises a first metal protection layer covering the first Ag reflective electrode, a second metal protection layer covering the second Ag reflective electrode, and a bridging metal protection layer covering the bridging electrode.
7. The ultraviolet LED chip of claim 6, wherein the passivation layer covers the top surface of the epitaxial structure, a plurality of first round holes are formed in the passivation layer at one end close to the first metal protection layer, the first metal protection layer is exposed in each of the first round holes, a second round hole is formed in the passivation layer at one end close to the second metal protection layer, and the second N-type contact electrode is exposed in each of the second round holes.
8. The ultraviolet LED chip of claim 7, wherein the pad electrode comprises a P pad electrode and an N pad electrode, the P pad electrode is covered with the first metal protection layer, the first metal protection layer is exposed in the first round hole, a current input end is formed, and the N pad electrode is covered with the second N type contact electrode, the second N type contact electrode is exposed in the second round hole, and a current output end is formed.
9. The method for manufacturing the ultraviolet LED chip with the high-voltage inverted structure is characterized by comprising the following steps of:
s1: providing a substrate;
s2: sequentially growing an ALN buffer layer, an N-type ALGaN layer, an active layer, a P-type ALGaN layer and a P-type GaN layer on a substrate from bottom to top;
s3: etching to form isolation groove on chip surface
Forming an isolation groove photoresist mask pattern on the surface of a chip through photoetching, forming an isolation groove through ICP etching, and finally cleaning redundant photoresist to form a first isolation groove and a second isolation groove;
s4: etching the chip surface to form N table-board
Forming a photoresist mask pattern of an N table-board on the surface of a chip through photoetching, forming the N table-board through ICP etching, and finally cleaning to remove redundant photoresist to form a first N table-board, a second N table-board and a third N table-board;
s5: manufacturing N-type contact electrode
Firstly, manufacturing a photoresist mask pattern of an N-type contact electrode of a chip on the surface of the chip through photoetching, then depositing Ni/Al/Cr/Ni/Au on the surface of the chip through metal evaporation, and finally forming the first N-type contact electrode and the second N-type contact electrode through Lift-off;
s6: manufacture of insulating layers
Firstly depositing a photoresist mask pattern with the thickness of 500nm on the surface of a chip by PECVD, then manufacturing an insulating layer by photoetching, and then etching redundant SiO by utilizing a buffer oxide etching solution BOE 2 Finally, the first insulating layer, the current blocking layer, the second insulating layer, the bridging insulating layer and the third insulating layer are obtained through glue removing and cleaning;
s07: manufacture of Ag reflective electrode
Firstly depositing Ni/Ag/Ni with the thickness of 0.7nm/150nm/100nm on the surface of a chip through metal evaporation, then photoetching to manufacture a photoresist mask pattern of an Ag reflecting electrode, then corroding redundant Ni/Ag/Ni by utilizing a mixed solution of ammonia water and hydrogen peroxide, and finally obtaining the first Ag reflecting electrode, the second Ag reflecting electrode and a bridging electrode through photoresist stripping and cleaning;
s08: at N 2 Carrying out rapid high-temperature annealing on Ni/Ag/Ni in the environment to ensure that the Ni/Ag/Ni and the P-type GaN layer form good ohmic contact;
s09: manufacturing a metal protection layer
Firstly, manufacturing a photoresist mask pattern on a chip metal protection layer on the surface of the chip through photoetching, then depositing TiW/Pt/Au design on the surface of the chip through metal evaporation, wherein the thickness of the TiW/Pt/Au design is 100nm/100nm/1000nm respectively, and finally forming a first metal protection layer, a second metal protection layer and a bridging metal protection layer through Lift-off;
s10: making passivation layer
Firstly depositing a photoresist mask pattern with the thickness of 2000nm on the surface of a chip by PECVD, then manufacturing a passivation layer by photoetching, and then etching redundant SiO by utilizing ICP 2 Finally, the passivation layer is obtained through photoresist stripping and cleaning;
s11: manufacturing pad electrode
A photoresist mask pattern on a chip pad electrode is firstly manufactured on the surface of a chip by photoetching, then Cr/Pt/Au/AuSn is deposited on the surface of the chip by metal evaporation, the thickness of the photoresist mask pattern is respectively 1nm/100nm/500nm/1000nm, and finally a P pad electrode and an N pad electrode are formed by Lift-off.
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