CN116749815A - Charging pile control pilot signal generation and detection circuit and data processing method - Google Patents

Charging pile control pilot signal generation and detection circuit and data processing method Download PDF

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Publication number
CN116749815A
CN116749815A CN202310987457.5A CN202310987457A CN116749815A CN 116749815 A CN116749815 A CN 116749815A CN 202310987457 A CN202310987457 A CN 202310987457A CN 116749815 A CN116749815 A CN 116749815A
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China
Prior art keywords
module
charging pile
control pilot
pilot signal
pile control
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CN202310987457.5A
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CN116749815B (en
Inventor
冯庆冬
董磊
付向楠
时昱
冯超
安鹏
周广阔
郭佳
王珺
张硕
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Shijiazhuang Kelin Electric Co Ltd
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Shijiazhuang Kelin Electric Co Ltd
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L53/00Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles
    • B60L53/60Monitoring or controlling charging stations
    • B60L53/66Data transfer between charging stations and vehicles
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L53/00Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles
    • B60L53/30Constructional details of charging stations
    • B60L53/31Charging columns specially adapted for electric vehicles
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2503Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques for measuring voltage only, e.g. digital volt meters (DVM's)
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/00032Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Transportation (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The application relates to the technical field of electric automobile charging, in particular to a charging pile control pilot signal generation and detection circuit and a data processing method. The charging pile control pilot signal generation circuit provided by the application has the advantages that the rising edge time is determined through the rising edge calculation formula, the elimination effect of common mode signals and differential mode signals is enhanced on the premise of ensuring the pulse width modulation waveform deformation rate, the elimination effect is good, and the waveform shape is ensured. According to the implementation mode of the charging pile control pilot signal data processing method, the rising edge and the falling edge of the sampling data and the data influenced by the carrier communication are removed through the singular point processing formula, so that the reliability, the freshness and the accuracy of the data are ensured.

Description

Charging pile control pilot signal generation and detection circuit and data processing method
Technical Field
The application relates to the technical field of electric automobile charging, in particular to a charging pile control guide signal generation and detection circuit and a data processing method.
Background
The dual pressures of energy and environmental protection make new energy vehicles become more and more the main stream of future automobiles, and the current new energy vehicles mainly use electric vehicles, which comprise hybrid electric vehicles, plug-in hybrid electric vehicles and pure electric vehicles. The hybrid electric vehicle does not need external charging equipment, the new energy provided by the hybrid electric vehicle is smaller, the plug-in hybrid electric vehicle and the pure electric vehicle both need external charging equipment, when the external charging equipment is used, the connection between the vehicle and the charging equipment generally needs a CP signal (Control Pilot function, control and guide function signal, the CP signal refers to a charging pile control and guide signal if no special description exists in the specification), and the signal is mainly used for monitoring the interaction function between the electric vehicle and the electric vehicle power supply equipment (a charging pile). CP signals applied in different regions worldwide are different.
Among these, the European standard charging pile adopts DIN70121 communication protocol standard and IEC61851 electric standard. The European standard Direct Current (CP) signal is divided into a DC (Direct Current) output and a PWM (Pulse Width Modulation ) output 2 states, wherein the CP signal is generated by a charging pile, is a PWM wave with a fixed duty ratio of 5%, and has a PWM period of 1kHz. The voltage level of the CP signal then corresponds to the connection status of the vehicle to the charging plug, including 12V,9V,6V (or 3V). The DC/PWM12V, the DC/PWM9V and the DC/PWM6V (or 3V) respectively represent that the charging plug is not inserted into the electric automobile socket, the charging plug is inserted into the electric automobile socket, and the electric automobile is ready to charge. The charging pile needs to recognize the voltage state of the CP signal to judge the state of the charging behavior, and in addition, according to the standard requirement, the charging pile should respond within tens of milliseconds when recognizing the state change. For example, according to section 66 of the IEC61851 standard, the PWM amplitude is changed from 6V to 9V, and the charging pile should respond with a maximum action time of 100 ms.
In addition, a communication method of modulating a high-frequency carrier signal of several tens MHz onto a CP signal line for communication with a car is also adopted between the euro standard charging pile and the car as a communication method of a power line carrier (PLC, power Line Carrier). The charging pile needs to sample the amplitude in real time and achieve quick response. Since the duty cycle is low and a fast response is required and a high frequency signal is modulated onto the CP line, there are many difficulties in accurately and rapidly sampling the CP voltage peak.
In the prior art, the identification of the CP signal is to reversely push the amplitude of PWM by using the DC voltage, the input PWM wave is processed into the DC signal after linear optocoupler isolation and active filtering, and then the DC signal is input into a processor for sampling, and then the amplitude voltage of PWM is reversely pushed according to the duty ratio. When the duty ratio of the PWM wave is larger, the method can approximately reversely push the peak value of the input PWM wave. However, there are two problems with achieving euro-standard charging pile cp voltage PWM peak sampling by this method:
first, if the PWM wave duty ratio is only 5%, the rectified dc voltage corresponding to the 12V gun pulling state is 12 x 5% =0.6v, the rectified dc voltage corresponding to the 9V gun inserting state is 9*5% =0.45V, the rectified dc voltage corresponding to the 6V (or 3V) charging state is 6*5% =0.3V (or 3 x 0.3 v=0.09V), and the three states have excessively small dc voltage difference, which results in excessively high accuracy requirement for adoption, and thus, the method is difficult to realize. It can be seen that after the PWM wave is filtered to dc, the accuracy of the input peak is reversed by the dc voltage, which decreases as the PWM duty cycle decreases.
Secondly, the circuit has poor real-time performance, the voltage output by PWM is obtained by adopting a filtering mode, hundreds of milliseconds are required for changing the voltage to the end of sampling, and the real-time performance requirement of the European standard direct current pile can not be met.
In another prior art, a PWM wave is used as an external trigger interrupt source of a processor, and when the interrupt is triggered, the interrupt is adopted, and the adopted point is considered to be PWM high-level voltage, and the circuit has the same problem:
first, the PWM interrupt period of 1kHz is 1 millisecond, the interrupt is too frequent, and the processor is overburdened.
Second, the interrupt trigger point is usually about 2.3V (for a processor with a supply voltage of 3.3V), delay sampling is required after the interrupt to ensure that the sampling point is at PWM high level, delay time is not well controlled, and the delay cannot be performed in the interrupt.
Thirdly, the duration of the high level of the PWM is only 50 microseconds, and the time is too short, so that the adoption time of the high level is not easy to control, the adoption point capture point is in a low level state, and the sampling value is easy to be in error.
Based on this, a charging pile control pilot signal generation and detection circuit and a data processing method need to be developed and designed.
Disclosure of Invention
The embodiment of the application provides a charging pile control guide signal generation and detection circuit and a data processing method, which are used for solving the problem that a charging pile is unreliable in response to a charging pile control guide signal in the prior art.
In a first aspect, an embodiment of the present application provides a charging pile control pilot signal generating circuit, including:
the device comprises an optocoupler, an output resistor, a common mode rejection module and a differential mode rejection module;
the output end of the optocoupler is electrically connected with the first end of the output resistor, the second end of the output resistor is electrically connected with the first end of the common mode rejection module, and the second end of the common mode rejection module is electrically connected with the first end of the differential mode rejection module;
the optical coupler couples the pulse width modulation signal of the input end to the output end, and outputs the pulse width modulation signal at the second end of the differential mode suppression module after the common mode suppression module and the differential mode suppression module respectively suppress the common mode signal and the differential mode signal.
In one possible implementation manner, the charging pile control pilot signal generating circuit further includes: a first input resistor, a second input resistor and a triode;
the first end of the first input resistor is electrically connected with the first end of the input end of the optocoupler, the collector electrode of the triode is electrically connected with the second end of the input end of the optocoupler, and the first end of the second input resistor is electrically connected with the base electrode of the triode;
when the second end of the second input resistor inputs a pulse width modulation signal, the triode works in a saturated conduction state or a cut-off state.
In one possible implementation manner, the common mode rejection module is a common mode choke, the differential mode rejection module is a magnetic bead, and the parameters of the common mode rejection module and the differential mode rejection module are determined based on a first formula, wherein the first formula is:
in the method, in the process of the application,for increasing the proportionality coefficient +.>A lower threshold value of 12V for the output of the generating circuit, < >>Impedance for common mode rejection module, +.>Is the impedance of the magnetic bead, < >>Is natural constant (18)>Is a time variable +.>For the resistance value of the voltage dividing resistor connected with the second end of the differential mode suppression module, +.>For the resistance of the output resistor +.>Is the lower threshold of the optocoupler 12V voltage,for peak voltage of power carrier loaded by the second end of the differential mode suppression module, +.>For the voltage threshold value of the power carrier reaching the second end of the output resistor after being restrained, +.>Is the time limit for the voltage rise at the second end of the output resistor.
In a second aspect, an embodiment of the present application provides a charging pile control pilot signal detection circuit, including:
the device comprises a rectifying module, a voltage dividing module and a driving module;
the first end of the rectifying module is electrically connected with the second end of the output resistor of the charging pile control pilot signal generating circuit as in the first aspect, the second end of the rectifying module is electrically connected with the first end of the voltage dividing module, and the second end of the voltage dividing module is electrically connected with the driving module;
the pulse alternating current generated by the signal of the output resistor after passing through the rectifying module is input to the voltage dividing module, and the pulse width modulation wave is output through the driving module after the voltage dividing module divides the voltage.
In one possible implementation, the driving module includes: and the output end of the operational amplifier is electrically connected with the reverse input end, and the forward input end of the operational amplifier is electrically connected with the second end of the voltage dividing module.
In a third aspect, an embodiment of the present application provides a method for processing data of a control pilot signal of a charging pile, which is applied to the detection circuit of the control pilot signal of the charging pile according to the second aspect, and the method for processing data of the control pilot signal of the charging pile includes:
acquiring a plurality of sampling values, wherein the duration of a sampling period corresponding to the sampling values is not less than the period duration of pulse width modulation;
selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values;
removing noise values in the target values;
and taking the average value of the target values as the amplitude value of the charging pile control pilot signal.
In one possible implementation, removing the noise value from the plurality of target values includes:
determining singular coefficients corresponding to the plurality of target values according to a second formula, wherein the second formula is:
in the method, in the process of the application,is->Singular coefficients of the individual target values,/>Is->Target value,/->Is a singular threshold value->Total number of target values;
and removing the target value with the singular coefficient not smaller than the singular threshold value as a noise value.
In a fourth aspect, an embodiment of the present application provides a charging pile control pilot signal data processing device, configured to implement the charging pile control pilot signal data processing method according to the third aspect or any one of the possible implementation manners of the third aspect, where the charging pile control pilot signal data processing device includes:
the sampling value acquisition module is used for acquiring a plurality of sampling values, wherein the duration of a sampling period corresponding to the plurality of sampling values is not less than the period duration of pulse width modulation;
the target value acquisition module is used for selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values;
a noise removing module, configured to remove noise values in the plurality of target values;
the method comprises the steps of,
and the charging pile control pilot signal amplitude determining module is used for taking the average value of the target values as the amplitude of the charging pile control pilot signal.
In a fifth aspect, an embodiment of the present application provides a terminal comprising a memory and a processor, the memory storing a computer program executable on the processor, the processor implementing the steps of the method according to the above third aspect or any one of the possible implementations of the third aspect when the computer program is executed.
In a sixth aspect, embodiments of the present application provide a computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of the method as described above in the third aspect or any one of the possible implementations of the third aspect.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
the generating circuit of the charging pile control pilot signal generating circuit can eliminate the influence of differential mode signals and common mode signals on the side of the charging pile control pilot signal generating circuit, and compared with a software filtering algorithm, the generating circuit of the charging pile control pilot signal generating circuit has lower requirement on the processing capacity of a processor due to the fact that a hardware circuit is adopted to realize signal processing. The charging pile control pilot signal generating circuit provided by the application has the advantages that the rising edge time is determined through the rising edge calculation formula, the elimination effect of common mode signals and differential mode signals is enhanced on the premise of ensuring the pulse width modulation waveform deformation rate, the elimination effect is good, and the waveform shape is ensured.
The application relates to an implementation method of a charging pile control pilot signal data processing method, which comprises the steps of firstly obtaining a plurality of sampling values, wherein the duration of a sampling period corresponding to the sampling values is not less than the period duration of pulse width modulation; then, selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values; then, removing noise values in the target values; and finally, taking the average value of the target values as the amplitude value of the charging pile control guide signal. According to the signal amplitude sampling method, the rising edge and the falling edge of the sampled data and the data influenced by the carrier communication are removed through the singular point processing formulas, so that the reliability, the freshness and the accuracy of the data are ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings used in the description of the embodiments or the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a charging pile control pilot signal generation circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of PWM waveforms provided by an embodiment of the present application;
fig. 3 is a schematic diagram of a charging pile control pilot signal detection circuit according to an embodiment of the present application;
fig. 4 is a flowchart of a method for processing data of a control pilot signal of a charging pile according to an embodiment of the present application;
fig. 5 is a functional block diagram of a charging pile control pilot signal data processing device according to an embodiment of the present application;
fig. 6 is a functional block diagram of a terminal according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the following description will be made with reference to the accompanying drawings.
The following describes in detail the embodiments of the present application, and the present embodiment is implemented on the premise of the technical solution of the present application, and a detailed implementation manner and a specific operation procedure are given, but the protection scope of the present application is not limited to the following embodiments.
Fig. 1 is a schematic diagram of a charging pile control pilot signal generation circuit according to an embodiment of the present application.
As shown in fig. 1, a schematic diagram of a charging pile control pilot signal generation circuit according to an embodiment of the present application is shown, and the details are as follows:
a charging pile control pilot signal generation circuit, comprising:
the device comprises an optocoupler, an output resistor, a common mode rejection module and a differential mode rejection module;
the output end of the optocoupler is electrically connected with the first end of the output resistor, the second end of the output resistor is electrically connected with the first end of the common mode rejection module, and the second end of the common mode rejection module is electrically connected with the first end of the differential mode rejection module;
the optical coupler couples the pulse width modulation signal of the input end to the output end, and outputs the pulse width modulation signal at the second end of the differential mode suppression module after the common mode suppression module and the differential mode suppression module respectively suppress the common mode signal and the differential mode signal.
In some embodiments, the charging pile control pilot signal generation circuit further includes: a first input resistor, a second input resistor and a triode;
the first end of the first input resistor is electrically connected with the first end of the input end of the optocoupler, the collector electrode of the triode is electrically connected with the second end of the input end of the optocoupler, and the first end of the second input resistor is electrically connected with the base electrode of the triode;
when the second end of the second input resistor inputs a pulse width modulation signal, the triode works in a saturated conduction state or a cut-off state.
For example, the charging pile controls the guiding signal waveform generating circuit principle, R3 and R111 are current limiting resistors, R130 is an output resistor, and OP13 is an optocoupler. The PWM1 pin is connected with the PWM controller output pin of the processor (STM 32F407ZET6 is applied in an application scene, the duty ratio is determined by the timer of the processor, the duty ratio and the period of PWM can be adjusted by changing the timing of the timer), when the PWM1 output is high, the 7 pin and the 8 pin in the optocoupler OP13 are conducted, the CP_PWM_OUT outputs +12V if suspended, when the PWM1 output is low, the 7 pin and the 5 pin in the optocoupler OP13 are conducted, and the CP_PWM_OUT outputs-12V if suspended, thereby realizing the output of PWM waves.
L3 is common mode inductance for filtering common mode interference on the CP line, and L2 is magnetic beads for filtering differential mode interference on the CP line.
Therefore, when the power line carrier signal PLC is injected on the CP line, the high frequency signal does not enter the PWM generation circuit, and thus does not enter the processor and the acquisition circuit described later.
For low frequency PWM signals, this circuit corresponds to outputting this signal through resistor R130. When the circuit is applied to a vehicle, the CP wire is connected with a resistor in the vehicle, and the vehicle controls the voltage amplitude of the CP_PWM_OUT terminal by controlling the magnitude of the internal series resistor.
In some embodiments, the common mode rejection module is a common mode choke, the differential mode rejection module is a magnetic bead, and the parameters of the common mode rejection module and the differential mode rejection module are determined based on a first formula, wherein the first formula is:
in the method, in the process of the application,for increasing the proportionality coefficient +.>A lower threshold value of 12V for the output of the generating circuit, < >>Impedance for common mode rejection module, +.>Is the impedance of the magnetic bead, < >>Is natural constant (18)>Is a time variable +.>For the resistance value of the voltage dividing resistor connected with the second end of the differential mode suppression module, +.>For the resistance of the output resistor +.>Is the lower threshold of the optocoupler 12V voltage,for peak voltage of power carrier loaded by the second end of the differential mode suppression module, +.>For the voltage threshold value of the power carrier reaching the second end of the output resistor after being restrained, +.>Is the time limit for the voltage rise at the second end of the output resistor.
As shown in fig. 2, a PWM waveform period including a high level and a low level, a rising time T1 occurs when the transition from the low level to the high level, and likewise, a falling time T2 occurs when the transition from the high level to the low level, the rising time and the falling time should be as small as possible, and if the time is too long, a deviation of an effective value of the waveform is caused in addition to overheat of the switching element, and such a deviation becomes more remarkable at a low duty ratio, and since the charging pile control pilot signal is 5% duty ratio, the rising time and the falling time should be emphasized.
Since the signal generating circuit of the present application is provided with the common mode choke coil and the magnetic beads, the two functions are used for eliminating the influence of the common mode signal and the differential mode signal on the PWM waveform as described above, however, when the parameter settings of the two are too large, the rise time and the fall time become long, and the effective output voltage of the PWM waveform is further affected.
Therefore, it is desirable to account for the effects of waveform distortion that may occur while reducing as much of the effects of common mode and differential mode signals in the system as possible.
According to the embodiment of the application, the influence of parameters of the industrial mode choke coil and the magnetic beads on waveforms is established through a first formula, wherein the first formula is as follows:
in the method, in the process of the application,for increasing the proportionality coefficient +.>A lower threshold value of 12V for the output of the generating circuit, < >>Impedance for common mode rejection module, +.>Is the impedance of the magnetic bead, < >>Is natural constant (18)>Is a time variable +.>For the resistance value of the voltage dividing resistor connected with the second end of the differential mode suppression module, +.>For the resistance of the output resistor +.>Is the lower threshold of the optocoupler 12V voltage,for peak voltage of power carrier loaded by the second end of the differential mode suppression module, +.>For the voltage threshold value of the power carrier reaching the second end of the output resistor after being restrained, +.>Is the time limit for the voltage rise at the second end of the output resistor.
In the above formula, K is usually 80%. In the selection of the common mode choke and the magnetic bead parameters by the above formula, the limit value of the rise time (the fall time and the rise time are the same in the signal generation circuit of the present application), and the parameters of the common mode choke and the magnetic bead are selected as much as possible to enhance the cancellation effect on the common mode signal and the differential mode signal on the premise of the limit value.
The above embodiments are merely examples provided for ease of understanding, and are not limited thereto. For example, the above signal generating circuit is applicable not only to the euro-standard dc pile having a PWM duty ratio of 5%, but also to the euro-standard ac charging pile and the chinese-standard ac charging pile (the duty ratio of the euro-standard ac charging pile and the chinese-standard ac charging pile is more than 5%).
Fig. 3 is a schematic diagram of a charging pile control pilot signal detection circuit according to an embodiment of the present application.
As shown in fig. 3, a schematic diagram of a charging pile control pilot signal detection circuit according to an embodiment of the present application is shown, and the details are as follows:
a charging pile control pilot signal detection circuit, comprising:
the device comprises a rectifying module, a voltage dividing module and a driving module;
the first end of the rectifying module is electrically connected with the second end of the output resistor of the charging pile control pilot signal generating circuit, the second end of the rectifying module is electrically connected with the first end of the voltage dividing module, and the second end of the voltage dividing module is electrically connected with the driving module;
the pulse alternating current generated by the signal of the output resistor after passing through the rectifying module is input to the voltage dividing module, and the pulse width modulation wave is output through the driving module after the voltage dividing module divides the voltage.
In some embodiments, the driving module includes: and the output end of the operational amplifier is electrically connected with the reverse input end, and the forward input end of the operational amplifier is electrically connected with the second end of the voltage dividing module.
Illustratively, D20 is a rectifier diode for filtering out the portion of the CP on-line PWM wave below 0V. R139 is a 30K resistor and R142 is a 10K resistor. U1A is an operational amplifier. And D3 and D17 are switching diodes used for limiting the voltages of 3 pins and 1 pin of the operational amplifier so as to realize a protection function. C1 and C3 are filter capacitors, which keep the operational discharge source stable and filter out ripple waves. And C6 is an operational amplifier output filter capacitor for filtering high-frequency interference.
The charging pile control guide signal is obtained from the inner side of the common mode inductor, and a PWM signal part lower than 0V is filtered after passing through a diode (D20), so that the right end of the D20 is a PWM signal with the amplitude of 12V, the duty ratio of 5 percent and the frequency of 1KHz, and after being divided by R139 and R142, the PWM signal is input into the forward input end of the operational amplifier U1A, the amplitude of the forward input end is 3V, the duty ratio of 5 percent, and the PWM signal is input into the AD sampling input end of the processor after passing through a voltage follower.
Fig. 4 is a flowchart of a method for processing data of a control pilot signal of a charging pile according to an embodiment of the present application.
As shown in fig. 4, a flowchart of an implementation of a method for processing data of control pilot signals of a charging pile according to an embodiment of the present application is shown, and is described in detail as follows:
in step 401, a plurality of sampling values are acquired, where a duration of a sampling period corresponding to the plurality of sampling values is not less than a period duration of pulse width modulation.
In step 402, a plurality of target values are selected from the plurality of sample values, wherein the target values are higher than an average value of the plurality of sample values.
In step 403, noise values among the plurality of target values are removed.
In some embodiments, the step 103 includes:
determining singular coefficients corresponding to the plurality of target values according to a second formula, wherein the second formula is:
in the method, in the process of the application,is->Singular coefficients of the individual target values,/>Is->Target value,/->Is a singular threshold value->Total number of target values;
and removing the target value with the singular coefficient not smaller than the singular threshold value as a noise value.
In step 404, an average value of the plurality of target values is used as an amplitude value of the charging pile control pilot signal.
The signal output by the signal sampling circuit is sent to an analog-to-digital converter (ADC, analog to Digital Converter) of the processor, and converted into a digital quantity, which is then sent to the core of the processor (the arithmetic unit and the control unit of the processor) to complete the data processing operation.
The processor used in the above-described embodiment of the present application is STM32F107VC, and in order to increase the use frequency as much as possible, the ADC sampling time is set to 7.5 cycles once, the conversion time is fixed to 12.5 cycles, and the ADC clock is set to 12MHz, so that the sampling frequency is 12M/(7.5+12.5) =600, i.e., 600 points will be used within 1 ms.
Because the sampling speed is high and data handling occurs in real time, the ADC results are mapped to the processor memory through DMA (direct memory access )), and the application task can process the sampling results of the mapped memory as required, and processing the process with DMA instead of the processor core will free the core to spend a lot of time handling the data.
The method comprises the steps of firstly finding out a plurality of data higher than an average value, obviously, data in a high-level interval is among the plurality of data, then, the data comprises data influenced by a power carrier signal and data influenced by other factors (such as data higher than the average value and during a rising edge and data of a falling edge), the frequency of the carrier signal is far higher than that of a pulse width modulation signal, therefore, the data influenced by the carrier signal shows an oddness compared with adjacent data, and the data points showing the oddness are determined through a second formula, and the data are removed as noise data, wherein the second formula is that:
in the method, in the process of the application,is->Singular coefficients of the individual target values,/>Is->Target value,/->Is a singular threshold value->Total number of target values;
by the formula, the data influenced by the carrier signal on the rising edge, the falling edge and the carrier signal can be found, and after the data are removed, the obtained data are the voltage data of the high-level section in the pulse width modulation waveform.
And calculating an average value of a plurality of data with noise data removed, wherein the average value is the amplitude value of the charging pile control pilot signal.
The charging pile control pilot signal generating circuit can eliminate the influence of differential mode signals and common mode signals on the side of the charging pile control pilot signal generating circuit, and compared with a software filtering algorithm, the charging pile control pilot signal generating circuit has lower requirement on the processing capacity of a processor due to the fact that a hardware circuit is adopted to realize signal processing. The charging pile control pilot signal generating circuit provided by the application has the advantages that the rising edge time is determined through the rising edge calculation formula, the elimination effect of common mode signals and differential mode signals is enhanced on the premise of ensuring the pulse width modulation waveform deformation rate, the elimination effect is good, and the waveform shape is ensured.
The application relates to an implementation method of a charging pile control pilot signal data processing method, which comprises the steps of firstly obtaining a plurality of sampling values, wherein the duration of a sampling period corresponding to the sampling values is not less than the period duration of pulse width modulation; then, selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values; then, removing noise values in the target values; and finally, taking the average value of the target values as the amplitude value of the charging pile control guide signal. According to the signal amplitude sampling method, the rising edge and the falling edge of the sampled data and the data influenced by the carrier communication are removed through the singular point processing formulas, so that the reliability, the freshness and the accuracy of the data are ensured.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.
The following are device embodiments of the application, for details not described in detail therein, reference may be made to the corresponding method embodiments described above.
Fig. 5 is a functional block diagram of a charging pile control pilot signal data processing device according to an embodiment of the present application, and referring to fig. 5, the charging pile control pilot signal data processing device 5 includes: the sampling value obtaining module 501, the target value obtaining module 502, the noise removing module 503 and the charging pile control pilot signal amplitude determining module 504, wherein:
a sampling value obtaining module 501, configured to obtain a plurality of sampling values, where a duration of a sampling period corresponding to the plurality of sampling values is not less than a period duration of pulse width modulation;
a target value obtaining module 502, configured to select a plurality of target values from the plurality of sampling values, where the target values are higher than an average value of the plurality of sampling values;
a noise removal module 503, configured to remove noise values from the plurality of target values;
and the charging pile control pilot signal amplitude determining module 504 is configured to take an average value of the plurality of target values as an amplitude of the charging pile control pilot signal.
Fig. 6 is a functional block diagram of a terminal according to an embodiment of the present application. As shown in fig. 6, the terminal 6 of this embodiment includes: a processor 600 and a memory 601, said memory 601 having stored therein a computer program 602 executable on said processor 600. The processor 600 executes the computer program 602 to implement the steps in the foregoing methods and embodiments for processing the control pilot signal data of each charging pile, for example, steps 401 to 404 shown in fig. 4.
Illustratively, the computer program 602 may be partitioned into one or more modules/units that are stored in the memory 601 and executed by the processor 600 to accomplish the present application.
The terminal 6 may be a computing device such as a desktop computer, a notebook computer, a palm computer, a cloud server, etc. The terminal 6 may include, but is not limited to, a processor 600, a memory 601. It will be appreciated by those skilled in the art that fig. 6 is merely an example of the terminal 6 and is not limiting of the terminal 6, and may include more or fewer components than shown, or may combine some components, or different components, e.g., the terminal 6 may also include input and output devices, network access devices, buses, etc.
The processor 600 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 601 may be an internal storage unit of the terminal 6, such as a hard disk or a memory of the terminal 6. The memory 601 may be an external storage device of the terminal 6, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card) or the like, which are provided on the terminal 6. Further, the memory 601 may also include both an internal storage unit and an external storage device of the terminal 6. The memory 601 is used for storing the computer program 602 and other programs and data required by the terminal 6. The memory 601 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, and will not be described herein again.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and the details or descriptions of other embodiments may be referred to for those parts of an embodiment that are not described in detail or are described in detail.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal and method may be implemented in other manners. For example, the apparatus/terminal embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated modules/units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on this understanding, the present application may also be implemented by implementing all or part of the procedures in the methods of the above embodiments, or by instructing the relevant hardware by a computer program, where the computer program may be stored in a computer readable storage medium, and the computer program may be implemented by implementing the steps of the embodiments of the methods and apparatuses described above when executed by a processor. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth.
The above embodiments are only for illustrating the technical solution of the present application, and are not limited thereto; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and they should be included in the protection scope of the present application.

Claims (10)

1. A charging pile control pilot signal generation circuit, characterized by comprising:
the device comprises an optocoupler, an output resistor, a common mode rejection module and a differential mode rejection module;
the output end of the optocoupler is electrically connected with the first end of the output resistor, the second end of the output resistor is electrically connected with the first end of the common mode rejection module, and the second end of the common mode rejection module is electrically connected with the first end of the differential mode rejection module;
the optical coupler couples the pulse width modulation signal of the input end to the output end, and outputs the pulse width modulation signal at the second end of the differential mode suppression module after the common mode suppression module and the differential mode suppression module respectively suppress the common mode signal and the differential mode signal.
2. The charging pile control pilot generation circuit of claim 1, further comprising: a first input resistor, a second input resistor and a triode;
the first end of the first input resistor is electrically connected with the first end of the input end of the optocoupler, the collector electrode of the triode is electrically connected with the second end of the input end of the optocoupler, and the first end of the second input resistor is electrically connected with the base electrode of the triode;
when the second end of the second input resistor inputs a pulse width modulation signal, the triode works in a saturated conduction state or a cut-off state.
3. The charging pile control pilot signal generation circuit according to any one of claims 1-2, wherein the common mode rejection module is a common mode choke, the differential mode rejection module is a magnetic bead, and parameters of the common mode rejection module and the differential mode rejection module are determined based on a first formula, wherein the first formula is:
in the method, in the process of the application,for increasing the proportionality coefficient +.>A lower threshold value of 12V for the output of the generating circuit, < >>Impedance for common mode rejection module, +.>Is the impedance of the magnetic bead, < >>Is natural constant (18)>Is a time variable +.>For the resistance value of the voltage dividing resistor connected with the second end of the differential mode suppression module, +.>For the resistance of the output resistor +.>Is the lower threshold of the optocoupler 12V voltage,for peak voltage of power carrier loaded by the second end of the differential mode suppression module, +.>For the voltage threshold value of the power carrier reaching the second end of the output resistor after being restrained, +.>Is the time limit for the voltage rise at the second end of the output resistor.
4. A charging pile control pilot signal detection circuit, characterized by comprising:
the device comprises a rectifying module, a voltage dividing module and a driving module;
a first end of the rectifying module is electrically connected with a second end of an output resistor of the charging pile control pilot signal generating circuit according to any one of claims 1-3, a second end of the rectifying module is electrically connected with a first end of the voltage dividing module, and a second end of the voltage dividing module is electrically connected with the driving module;
the pulse alternating current generated by the signal of the output resistor after passing through the rectifying module is input to the voltage dividing module, and the pulse width modulation wave is output through the driving module after the voltage dividing module divides the voltage.
5. The charging pile control pilot signal detection circuit of claim 4, wherein the drive module comprises: and the output end of the operational amplifier is electrically connected with the reverse input end, and the forward input end of the operational amplifier is electrically connected with the second end of the voltage dividing module.
6. A method for processing data of a control pilot signal of a charging pile, which is applied to the detection circuit of the control pilot signal of the charging pile according to any one of claims 4 to 5, and comprises the following steps:
acquiring a plurality of sampling values, wherein the duration of a sampling period corresponding to the sampling values is not less than the period duration of pulse width modulation;
selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values;
removing noise values in the target values;
and taking the average value of the target values as the amplitude value of the charging pile control pilot signal.
7. The method of claim 6, wherein removing noise values from the plurality of target values comprises:
determining singular coefficients corresponding to the plurality of target values according to a second formula, wherein the second formula is:
in the method, in the process of the application,is->Singular coefficients of the individual target values,/>Is->Target value,/->Is a singular threshold value that is set to be,total number of target values;
and removing the target value with the singular coefficient not smaller than the singular threshold value as a noise value.
8. A charging pile control pilot signal data processing device, characterized in that it is used for implementing a charging pile control pilot signal data processing method according to any one of claims 6 to 7, said charging pile control pilot signal data processing device comprising:
the sampling value acquisition module is used for acquiring a plurality of sampling values, wherein the duration of a sampling period corresponding to the plurality of sampling values is not less than the period duration of pulse width modulation;
the target value acquisition module is used for selecting a plurality of target values from the plurality of sampling values, wherein the target values are higher than the average value of the plurality of sampling values;
a noise removing module, configured to remove noise values in the plurality of target values;
the method comprises the steps of,
and the charging pile control pilot signal amplitude determining module is used for taking the average value of the target values as the amplitude of the charging pile control pilot signal.
9. A terminal comprising a memory and a processor, the memory having stored therein a computer program executable on the processor, characterized in that the processor implements the steps of the method according to any of the preceding claims 6 to 7 when the computer program is executed.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the method according to any of the preceding claims 6 to 7.
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