CN116737242A - Computer system and wake-up method - Google Patents

Computer system and wake-up method Download PDF

Info

Publication number
CN116737242A
CN116737242A CN202210207424.XA CN202210207424A CN116737242A CN 116737242 A CN116737242 A CN 116737242A CN 202210207424 A CN202210207424 A CN 202210207424A CN 116737242 A CN116737242 A CN 116737242A
Authority
CN
China
Prior art keywords
wake
control unit
single chip
key
chip system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210207424.XA
Other languages
Chinese (zh)
Inventor
陈威志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunda Computer Technology Kunshan Co Ltd
Mitac Computing Technology Corp
Original Assignee
Kunda Computer Technology Kunshan Co Ltd
Mitac Computing Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunda Computer Technology Kunshan Co Ltd, Mitac Computing Technology Corp filed Critical Kunda Computer Technology Kunshan Co Ltd
Priority to CN202210207424.XA priority Critical patent/CN116737242A/en
Publication of CN116737242A publication Critical patent/CN116737242A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4418Suspend and resume; Hibernate and awake
    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07GREGISTERING THE RECEIPT OF CASH, VALUABLES, OR TOKENS
    • G07G1/00Cash registers
    • G07G1/0009Details of the software in the checkout register, electronic cash register [ECR] or point of sale terminal [POS]
    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07GREGISTERING THE RECEIPT OF CASH, VALUABLES, OR TOKENS
    • G07G1/00Cash registers
    • G07G1/12Cash registers electronically operated

Abstract

A wake-up method is suitable for a computer system comprising a key unit, a single chip system and a first control unit, and comprises the following steps: when the single chip system operates in a normal mode, a set value is input by the key unit and stored in a register of the first control unit; when the single chip system operates in a sleep mode, the first control unit detects whether N keys of the key unit are pressed or not, and defines M of the N keys corresponding to the set value as a wake-up key according to the set value of the register; when the single chip system operates in the sleep mode and the first control unit judges that the wake-up key is pressed, a wake-up signal is generated, so that the single chip system is converted into the normal mode.

Description

Computer system and wake-up method
[ field of technology ]
The present invention relates to a computer system and a wake-up method, and more particularly, to a computer system and a wake-up method with a function of a user-defined wake-up key.
[ background Art ]
In existing computer systems, such as point of sale systems (POS), after entering Sleep mode (Sleep mode), a power key is pressed to wake up the system and then return to operating in normal mode. However, in addition to this existing approach, whether there are other more flexible approaches or systems to wake up the system operating in sleep mode to operate in normal mode becomes a problem to be solved.
[ invention ]
The invention aims to provide a computer system with a function of self-defining a wake-up key and a wake-up method.
In order to solve the above-mentioned technical problems, the present invention provides a computer system, which includes a key unit, a system-on-a-chip (SOC), and a first control unit. The key unit comprises N keys, wherein N is a positive integer. The system-on-a-chip (SOC) is electrically connected to the key unit and executes an operating system and operates between a normal mode and a Sleep mode. The first control unit is electrically connected with the single chip system and the key unit and comprises a buffer.
When the single chip system operates in the normal mode, a set value is input by the key unit and stored in the register of the first control unit. When the single chip system operates in the sleep mode, the first control unit detects whether the N keys of the key unit are pressed, and defines M of the N keys of the key unit corresponding to the set value according to the set value of the register, wherein M is a positive integer and less than or equal to N as a wake-up key.
When the single chip system operates in the sleep mode and the first control unit judges that the wake-up key is pressed, a wake-up signal is generated. The single chip system is switched to operate in the normal mode according to the wake-up signal.
Preferably, the computer system further comprises a Basic Input Output System (BIOS) and a display unit. When the single chip system is changed from the normal mode to the sleep mode, a sleep signal is generated and transmitted to the basic input/output system, so that the basic input/output system outputs a sleep trigger signal to the display unit and the first control unit.
Preferably, the sleep mode is an S0IX state or an S3 state of the advanced configuration and power interface (Advanced Configuration and Power Interface, ACPI).
Preferably, wherein the set value is equal to 0 xbK..bn-1..b1b0, and K is a positive integer and greater than or equal to (N-1). When the single chip system operates in the sleep mode, the first control unit determines whether the corresponding one of the N keys is the wake-up key according to the logical value of the bj, j=1, 2 …, N.
Preferably, the computer system further comprises a second control unit electrically connected to the first control unit and the single chip system. When the first control unit generates the wake-up signal, the second control unit receives the wake-up signal to control the plurality of voltage sources to be turned on according to a predetermined sequence and inform the single chip system to change from the sleep mode to the normal mode.
In order to solve the above-mentioned technical problems, the present invention provides a wake-up method for a computer system, which includes a key unit, a system-on-a-chip (SOC), and a first control unit. The key unit includes N keys. The wake-up method comprises steps (A) - (C).
In step (a), when the system-on-a-chip is operating in a normal mode, a set value is input by the key unit and stored in a register of the first control unit.
In step (B), when the single chip system is operating in a sleep mode, the first control unit detects whether the N keys of the key unit are pressed, and defines the M corresponding to the set value of the N keys of the key unit according to the set value of the register, as a wake-up key, M is a positive integer and less than or equal to N.
In step (C), when the single chip system is operated in the sleep mode and the first control unit determines that the wake-up key is pressed, a wake-up signal is generated, and the single chip system is turned to operate in the normal mode according to the wake-up signal.
Preferably, the computer system further comprises a Basic Input Output System (BIOS) and a display unit. The wake-up method further includes the step (D) of generating a sleep signal when the single chip system is changed from the normal mode to the sleep mode, and transmitting the sleep signal to the BIOS, so that the BIOS outputs a sleep trigger signal to the display unit and the first control unit.
Preferably, in step (B), the sleep mode is an S0IX state or an S3 state of the advanced configuration and power interface (Advanced Configuration and Power Interface, ACPI).
Preferably, in the step (B), the set value is equal to 0 xbK..bn-1..b1b0, K is a positive integer and is greater than or equal to (N-1), and when the single chip system is operated in the sleep mode, the first control unit determines whether a corresponding one of the N keys is the wake-up key according to the logical value of the bj, j=1, 2 …, N.
Preferably, the computer system further comprises a second control unit. In step (C), when the first control unit generates the wake-up signal, the second control unit receives the wake-up signal to control the plurality of voltage sources to be turned on according to a predetermined sequence, and notifies the single chip system to change from the sleep mode to the normal mode.
Compared with the prior art, the invention judges that the wake-up key is pressed to generate the wake-up signal according to the set value stored in the register when the first control unit is in the sleep mode, so that the single chip system is converted into the normal mode. In addition, the single chip system can input the set value by the key unit so as to realize the function of a custom wake-up key.
[ description of the drawings ]
Other features and advantages of the present invention will become apparent from the following description of the embodiments with reference to the drawings, in which:
FIG. 1 is a block diagram illustrating one embodiment of a computer system according to the present invention; a kind of electronic device with high-pressure air-conditioning system
FIG. 2 is a flow chart illustrating a wake-up method performed by the embodiment.
[ embodiment ]
Before the present invention is described in detail, it should be noted that in the following description, like components are denoted by the same reference numerals.
Referring to fig. 1, an embodiment of the computer system of the present invention includes a key unit 3, a system on a chip (SOC) 2, a first control unit 1, a second control unit 4, a Basic Input Output System (BIOS) 5, and a display unit 6. The computer system is, for example, a point of sale system (POS). The key unit 3 includes N keys, N being a positive integer. The display unit 6 is, for example, a liquid crystal display.
The single chip system 2 has a function corresponding to a Central Processing Unit (CPU), is electrically connected to the key unit 3, the second control unit 4, and the bios 5, and executes an operating system, and operates between a normal mode and a Sleep mode (Sleep mode). The operating system is, for example, a windowing operating system.
The first control unit 1 is electrically connected to the single chip system 2, the key unit 3, the second control unit 4, the bios 5, and the display unit 6, and includes a buffer 11. The register 11 stores a set value. The second control unit 4 is used for controlling a plurality of voltage sources to be started, and the voltage sources provide power required by the operation of the computer system. In this embodiment, the first control unit 1 and the second control unit 4 are, for example, the same microcontroller, but different firmware is stored respectively, so that they perform different functions, for example, the second control unit 4 is a microcontroller (Power sequenc MCU) controlled by a power supply sequence.
The wake-up method comprises steps S1 to S4.
In step S1, when the single chip system 2 is operating in the normal mode, the set value is input by the key unit 3 and stored in the register 11 of the first control unit 1. For example, the set value is transferred between the single chip system 2 and the first control unit 1 via an integrated circuit bus (I2C).
In step S2, when the user issues a sleep command by the os or the os determines that no command is received within a set time (e.g. the key unit 4 is not pressed), the single chip system 2 is changed from operating in the normal mode to operating in the sleep mode to generate a sleep signal, and the sleep signal is transmitted to the bios 5, so that the bios 5 outputs a sleep trigger signal to the display unit 6 and the first control unit 1, and further notifies the display unit 6 to also operate in a power saving state corresponding to the sleep mode (e.g. the screen is darkened or not displayed).
In step S3, when the first control unit 1 receives the sleep trigger signal, it is known that the single chip system 2 is operating in the sleep mode. At this time, the first control unit 1 continuously detects whether the N keys of the key unit 3 are pressed, and defines the M corresponding to the set value of the N keys of the key unit 3 according to the set value of the register 11, as a wake-up key, where M is a positive integer and less than or equal to N.
More specifically, the sleep mode is an S0IX state or an S3 state of an Advanced Configuration and Power Interface (ACPI). The set value is equal to 0 xbK..bn-1..b1b0, K is a positive integer and is greater than or equal to (N-1), the first control unit 1 determines whether a corresponding one of the N keys is the wake-up key according to the logical value of the bj, j=1, 2 …, N.
For example, n= 6,K =8, the key unit 3 includes 6 keys, such as "volume up", "volume down", "function left", "function right", "trigger left", and "trigger right", and the firmware of the first control unit 1 is defined as b0, b1, b2, b3, b4, b5 corresponding to "volume up", "volume down", "function left", "function right", "trigger left", and "trigger right", respectively, and the key corresponding to bj belongs to the wake-up key when the logic value of the defined bj is equal to logic 1. Therefore, the set value being equal to 0x00000000 indicates that none of the 6 keys belongs to the wake-up key; the set value being equal to 0x00111111 indicates that the 6 keys all belong to the wake-up key; the set value equal to 0x00001100 indicates "function left" and "function right" belong to the wake-up key. In addition, the following are to be specified: the aforementioned 6 keys are electrically connected to the 6 pins (Pin) of the first control unit 1, that is, when the first control unit 1 is a microcontroller, the 6 General Purpose Input Output (GPIO) pins of the microcontroller are defined as input pins to be electrically connected to the 6 keys respectively to receive corresponding signals.
In step S4, when the single chip system 2 is operated in the sleep mode and the first control unit 1 determines that the wake-up key is pressed, a wake-up signal is generated. The second control unit 4 receives the wake-up signal to control the voltage sources to be turned on according to a predetermined sequence and informs the single chip system 2 to change from the sleep mode to the normal mode. In other words, the buffer 11 can control to 8 buttons with only one byte (1 byte), i.e. 8 bits of 1byte correspond to 8 buttons respectively, and decides which buttons can wake up the single chip system 2 according to the self-defined wake-up button.
In summary, when the first control unit 1 is in the sleep mode, it is determined that the wake-up key is pressed to generate the wake-up signal according to the set value stored in the register 11, so that the single chip system 2 is turned to operate in the normal mode. In addition, the single chip system 2 can input the set value by the key unit 3 to realize a function of self-defining wake-up key, so that the purpose of the invention can be achieved.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims (10)

1. A computer system, comprising:
the key unit comprises N keys, wherein N is a positive integer;
the single chip system is electrically connected with the key unit, executes an operating system and operates between a normal mode and a dormant mode; a kind of electronic device with high-pressure air-conditioning system
The first control unit is electrically connected with the single chip system and the key unit and comprises a buffer;
when the single chip system operates in the normal mode, a set value is input by the key unit and stored in the register of the first control unit,
when the single chip system operates in the sleep mode, the first control unit detects whether the N keys of the key unit are pressed, and defines M of the N keys of the key unit corresponding to the set value according to the set value of the register, wherein M is a positive integer and less than or equal to N as a wake-up key,
when the single chip system operates in the sleep mode and the first control unit judges that the wake-up key is pressed, a wake-up signal is generated, and the single chip system is switched to operate in the normal mode according to the wake-up signal.
2. The computer system of claim 1, further comprising a bios and a display unit, wherein when the single chip system is changed from operating in the normal mode to operating in the sleep mode, a sleep signal is generated and transmitted to the bios, such that the bios outputs a sleep trigger signal to the display unit and the first control unit.
3. The computer system of claim 2, wherein the sleep mode is an advanced configuration and S0IX state or S3 state of the power interface.
4. The computer system of claim 3, wherein the set value is equal to 0 xbK..bn-1 … b1b0, K is a positive integer and greater than or equal to (N-1), and when the single chip system is operating in the sleep mode, the first control unit determines whether a corresponding one of the N keys is the wake-up key according to the logical value of bj, j = 1, 2 …, N.
5. The computer system of claim 4, further comprising a second control unit electrically connected to the first control unit and the single chip system, wherein when the first control unit generates the wake-up signal, the second control unit receives the wake-up signal to control the plurality of voltage sources to be turned on according to a predetermined sequence and notifies the single chip system to change from operating in the sleep mode to operating in the normal mode.
6. The wake-up method is suitable for a computer system, and is characterized in that the computer system comprises a key unit, a single chip system and a first control unit, the key unit comprises N keys, and the wake-up method comprises the following steps:
(A) When the single chip system operates in a normal mode, a set value is input by the key unit and stored in a register of the first control unit;
(B) When the single chip system operates in a sleep mode, the first control unit detects whether the N keys of the key unit are pressed, and defines M of the N keys of the key unit corresponding to the set value according to the set value of the register, wherein M is a positive integer and less than or equal to N as a wake-up key; a kind of electronic device with high-pressure air-conditioning system
(C) When the single chip system operates in the sleep mode and the first control unit judges that the wake-up key is pressed, a wake-up signal is generated, and the single chip system is switched to operate in the normal mode according to the wake-up signal.
7. The wake-up method of claim 6, wherein the computer system further comprises a BIOS and a display unit, and the wake-up method further comprises the step (D) of generating a sleep signal when the single chip system is changed from operating in the normal mode to operating in the sleep mode, and transmitting the sleep signal to the BIOS so that the BIOS outputs a sleep trigger signal to the display unit and the first control unit.
8. The wake-up method of claim 7 wherein in step (B), the sleep mode is an advanced configuration and power interface S0IX state or S3 state.
9. The wake-up method of claim 8, wherein in the step (B), the set value is equal to 0 xbK..bn-1 … B1B0, K is a positive integer and greater than or equal to (N-1), and when the single chip system is operating in the sleep mode, the first control unit determines whether a corresponding one of the N keys is the wake-up key according to the logical value of bj, j=1, 2 …, N.
10. The wake-up method of claim 9, wherein in step (C), when the first control unit generates the wake-up signal, the second control unit receives the wake-up signal to control a plurality of voltage sources to be turned on according to a predetermined sequence and notifies the single chip system to change from the sleep mode to the normal mode.
CN202210207424.XA 2022-03-03 2022-03-03 Computer system and wake-up method Pending CN116737242A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210207424.XA CN116737242A (en) 2022-03-03 2022-03-03 Computer system and wake-up method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210207424.XA CN116737242A (en) 2022-03-03 2022-03-03 Computer system and wake-up method

Publications (1)

Publication Number Publication Date
CN116737242A true CN116737242A (en) 2023-09-12

Family

ID=87908447

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210207424.XA Pending CN116737242A (en) 2022-03-03 2022-03-03 Computer system and wake-up method

Country Status (1)

Country Link
CN (1) CN116737242A (en)

Similar Documents

Publication Publication Date Title
AU2009291819B2 (en) Circuit having a low power mode
CA2187501C (en) Process and apparatus for generating power management events in a computer system
US20040210699A1 (en) Method of operating combination personal data assistant and personal computing device
US20050144492A1 (en) Processor system and method for reducing power consumption in idle mode
US20200183704A1 (en) Method and apparatus for waking up computer from sleep state
US20050215227A1 (en) Method and apparatus for entering a low power mode
KR101782409B1 (en) A method for controling a display having the most power saving function by video input signals
EP1586979A2 (en) Power reduction for unintentional activation of a wireless input device
US6272645B1 (en) Method and control circuit for waking up a computer system from standby mode
US8769326B2 (en) Computer system and operation method for changing operation state by capacitive button group
CN101145078A (en) Information processing apparatus and resume control method
JP3070527B2 (en) Wireless mobile terminal
EP3609046B1 (en) Motherboard with a charging function
CN116737242A (en) Computer system and wake-up method
TWI796143B (en) Computer system and wake-up method
US5467042A (en) Low power clocking apparatus and method
US20040078607A1 (en) Energy-saving electronic device and energy-saving method for use with the same
EP3609047B1 (en) Motherboard with a smart charging function
US20230098532A1 (en) Electronic device
US11741023B1 (en) Pointing device and method capable of correcting its USB state by monitoring voltage/state of USB communication interface
CN108733418A (en) Electronic system and control method
JP2000039983A (en) Computer system and display device switching control method
AU2013100559B4 (en) Circuit having a low power mode
CN114385026A (en) Control chip and touch detection method
CN112486782A (en) Chip with computer system environment information monitoring module and computer system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination