CN116719762A - Control method and storage medium of PXI/PXIe instrument - Google Patents
Control method and storage medium of PXI/PXIe instrument Download PDFInfo
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- 235000013421 Kaempferia galanga Nutrition 0.000 description 5
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention discloses a control method and a storage medium of a PXI/PXIe instrument, which are used for a Galaxy kylin operating system and comprise the following steps: acquiring a bus address of a target instrument, opening a resource file under a corresponding directory of the target instrument based on the bus address of the target instrument, storing a returned file handle, and acquiring the size of an address space; according to the size of the address space, mapping the address space to a memory, storing a memory base address, acquiring an access port of a control target instrument, and performing memory read-write to realize access operation of the corresponding configuration space of the target instrument and complete control of the target instrument. The invention sends and receives data to PCI/PCIe bus device through memory mapping, and is applicable to drive PXI/PXIe instrument under Galaxy kylin operating system.
Description
Technical Field
The invention relates to the technical field of test instruments, in particular to a control method and a storage medium of a PXI/PXIe instrument.
Background
The PXI/PXIe instrument is a modularized virtual instrument based on a PCI/PCIe bus, and realizes instrument functions through computer software control and display.
The Galaxy kylin operating system is a novel domestic operating system based on linux. The control of the PXI/PXIe instrument under the Galangal kylin operating system needs to support the drive program of the Galangal kylin, but the drive program provided by the PXI/PXIe instrument manufacturers at home and abroad and the bottom I/O library depending on the drive program are mainly Windows systems and cannot run under the Galangal kylin operating system. The above problems result in a large number of PXI/PXIe instruments on the market not being used under the Galaxy kylin operating system.
Disclosure of Invention
In order to solve the problems, the invention provides a control method and a storage medium of a PXI/PXIe instrument, which send and receive data to PCI/PCIe bus equipment through memory mapping to realize instrument driving, solve the problem that the existing driving program and a bottom I/O library do not support a domestic Galangal kylin operating system and the PXI/PXIe instrument cannot be used, and realize that the PXI/PXIe instrument is suitable for driving under the Galangal kylin operating system.
The invention provides a control method of a PXI/PXIe instrument, which is used for a Galaxy kylin operating system and has the following specific technical scheme:
s1: obtaining a bus address of a target instrument, wherein the target instrument is a PXI/PXIe instrument;
s2: based on the bus address of the target instrument, opening a resource file under the corresponding directory of the target instrument, and respectively storing returned file handles;
s3: under the Galaxy kylin terminal, acquiring the size of an address space according to the returned file handle information;
s4: mapping the address space to a memory according to the size of the address space, and storing a memory base address;
s5: the access port of the control target instrument is obtained according to the memory base address, memory read-write is carried out, access operation of the corresponding configuration space of the target instrument is realized, and control of the target instrument is completed;
s6: after the control of the target instrument is completed, releasing the memory mapped by the address space;
s7: and closing the resource file.
Further, the specific process of obtaining the bus address of the target instrument is as follows:
s101: under the condition that the target instrument module is not inserted into the case, starting the computer, running a lspci instruction under a Galaxy kylin system terminal, recording the address of a pci bus of current equipment in the system, and closing the computer;
s102: inserting the target instrument module into the case, restarting the computer, running the lspci instruction, and checking the added equipment bus address, namely the bus address of the target instrument module.
Further, the opening the resource file under the corresponding directory of the target instrument specifically includes: and opening a folder named by a bus address corresponding to the target instrument under the system directory of the Galois kylin operating system, and opening a base address register file in the folder through an open function.
Further, after S4, the method further includes: calculating an address offset according to the data width; and performing downward alignment processing on the address offset to make the address offset be an integral multiple of the corresponding offset stepping.
Further, the acquiring the access address of the manipulation target instrument according to the memory base address specifically includes: and adding the address offset to the base address of the configuration space memory to be accessed to obtain an address to be accessed, wherein the address to be accessed is an access port of the control instrument.
Further, when controlling the plurality of target instruments, before S1, the method further comprises constructing a structure array and storing target instrument information, wherein the target instrument information comprises a variable indicating the opening state of the target instrument, a variable recording the space mapping memory address and a variable recording the number of the target instruments.
Further, the variable of the number of the recording target instruments is set to 0 in initial value, the range is set to 0-256, and each time the address space mapping of one target instrument is completed, the instrument is considered to be opened, at this time, the variable of the number of the recording target instruments is added with 1, the variable indicating the opening state of the target instruments is set to 1, and the mapped address is assigned to the variable of the mapping memory address of the recording space.
Further, when the value of the variable for recording the number of the target instruments exceeds the set range value, the value is set to 0, the numbers with the value of 0 for indicating the open state of the target instruments are searched sequentially from small to large, and the found 1 st number is used as a new instrument handle.
Further, a thread lock is provided before opening, reading and writing, and closing operations of the target instrument are performed.
The invention also discloses a computer storage medium, wherein the storage medium is stored with a control program of the PXI/PXIe instrument, and the control program of the PXI/PXIe instrument realizes the steps of the control method of any one of the PXI/PXIe instruments when being executed by a processor.
The beneficial effects of the invention are as follows:
the invention transmits and receives data to PCI/PCIe bus device through memory mapping, can realize PXI/PXIe instrument control under Galaxy kylin operating system without driver, including instrument opening, I/O space access, memory space access and instrument closing, etc.
Drawings
FIG. 1 is a schematic control flow diagram of the method of the present invention.
Detailed Description
In the following description, the technical solutions of the embodiments of the present invention are clearly and completely described, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the embodiments of the present invention, it should be noted that, the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship conventionally put in use of the product of the present invention as understood by those skilled in the art, merely for convenience of describing the present invention and simplifying the description, and is not indicative or implying that the apparatus or element to be referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used merely for distinguishing between descriptions and not for understanding as indicating or implying a relative importance.
In the description of the embodiments of the present invention, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; may be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Example 1
The embodiment 1 of the invention discloses a control method of a PXI/PXIe instrument, which is used for a Galaxy kylin operating system, and as shown in figure 1, the specific steps are as follows:
s1: obtaining a bus address of a target instrument, wherein the target instrument is a PXI/PXIe instrument;
in this embodiment, the specific process is as follows:
s101: under the condition that the PXI/PXIe instrument module is not inserted into the case, starting the computer, running a lspci instruction under a Galaxy kylin system terminal, recording the address of a pci bus of current equipment in the system, and closing the computer;
s102: inserting the PXI/PXIe instrument module into the chassis, restarting the computer, running the lspci instruction, and looking up the added device bus address, such as: 03:0b:0, which is the bus address of the target instrument module.
S2: based on the bus address of the target instrument, opening a resource file under the corresponding directory of the target instrument, and respectively storing returned file handles;
specifically, a folder named corresponding to the bus address of the PXI/PXIe instrument is opened in the Galaxkylin operating system "/sys/bus/pc i/device/" directory, namely 6 base register (BAR-Base Address register) files such as resource0, 1, 2, 3, 4, 5 and the like under the "/sys/bus/pc i/device/03:0b:0/" directory are opened by using an open () function;
for example: f0=open ("/sys/bus/pci/devices/03:0b:0/resource 0", o_rdwr|o_sync), holds the returned file handles fd 0-5.
S3: under the Galaxy kylin terminal, operating a lspci-vv instruction, and recording the size of an address space respectively allocated by 6 BARs of the bus equipment according to returned file handle information;
in this embodiment, specifically, under the Galaxy kylin terminal, a "lspci-s03:0b:0-vv" command is run, the returned information is checked, and 6 configuration space size descriptions are found at Region, for example: "Region 0: size= [1024k ] "represents the size of the configuration space 0 as 1024k, and the configuration space sizes MmapSize0 to 5 are stored.
S4: the resource0, 1, 2, 3, 4, 5 file handles are mapped to memory using mmap () functions, respectively, according to the 6 BAR space size, such as: mmapAddr 0=mmap (0, mmapsize0, prot_read|prot_write, map_shared, fd0, 0), and memory base addresses MmapAddr0 to 5 are stored.
S5: calculating an address offset according to the data width;
performing downward alignment processing on the address offset to make the address offset be an integer multiple of the corresponding offset stepping;
calculating address offset according to the data width, wherein the step of the 32-bit data address offset is 4, and the step of the 64-bit data address offset is 8; and (3) performing downward alignment processing on the address Offset to make the address Offset be an integral multiple of the corresponding Offset stepping, so as to avoid addressing errors.
For example, a 32-bit data offset address should be: 0 to 3 are all aligned to 0, and 4 to 7 are all aligned to 4.
S6: adding the address offset to the memory base address of the configuration space to be accessed to obtain an address to be accessed, wherein the address to be accessed controls the access of the PXI/PXIe instrument;
reading and writing the address through read (), write () functions, realizing the access operation of the corresponding configuration space of the target instrument, and completing the control of the target instrument;
for example: readdw (mmapadd0+4), i.e. 32 data in the memory with offset address 4, is read from configuration space 0, writedw (mmapadd1+8, 0x 0000000F), i.e. 0x0000000F is written in the memory with offset address 8, in configuration space 1.
S7: after the control of the target instrument is completed, memories mapped to 6 BAR address spaces are respectively released by using the munmap () function.
S8: after releasing the mapped memory, 6 resource files are closed using a close () function.
Example 2
The embodiment 2 of the invention discloses a control method of a PXI/PXIe instrument, which is used for a Galaxy kylin operating system, and is shown by combining with a figure 1, and specifically comprises the following steps:
s1: constructing a structure array for storing target instrument information;
in this embodiment, when controlling a plurality of instruments, a structure array Device [ ] needs to be constructed to store target instrument information, where the structure array includes member variables such as Opened, mmapAddr, open is used to indicate whether the instrument is open, and MmapAddr is used to record the memory address of the BAR space map;
in this embodiment, the total number of instruments is 256, i.e., the variable DevNo (the range of values is 0-256) is set, the number of instruments is recorded, and the initial value is set to 0.
S2: obtaining a bus address of a target instrument, wherein the target instrument is a PXI/PXIe instrument;
in this embodiment, the specific process is as follows:
s101: under the condition that the PXI/PXIe instrument module is not inserted into the case, starting the computer, running a lspci instruction under a Galaxy kylin system terminal, recording the address of a pci bus of current equipment in the system, and closing the computer;
s102: inserting the PXI/PXIe instrument module into the chassis, restarting the computer, running the lspci instruction, and looking up the added device bus address, such as: 03:0b:0, which is the bus address of the target instrument module.
S2: based on the bus address of the target instrument, opening a resource file under the corresponding directory of the target instrument, and respectively storing returned file handles;
specifically, a folder named corresponding to the bus address of the PXI/PXIe instrument is opened in the Galaxkylin operating system "/sys/bus/pc i/device/" directory, namely 6 base register (BAR-Base Address register) files such as resource0, 1, 2, 3, 4, 5 and the like under the "/sys/bus/pc i/device/03:0b:0/" directory are opened by using an open () function;
for example: f0=open ("/sys/bus/pci/devices/03:0b:0/resource 0", o_rdwr|o_sync), holds the returned file handles fd 0-5.
S3: under the Galaxy kylin terminal, operating a lspci-vv instruction, and recording the size of an address space respectively allocated by 6 BARs of the bus equipment according to returned file handle information;
in this embodiment, specifically, under the Galaxy kylin terminal, a "lspci-s03:0b:0-vv" command is run, the returned information is checked, and 6 configuration space size descriptions are found at Region, for example: "Region 0: size= [1024k ] "represents the size of the configuration space 0 as 1024k, and the configuration space sizes MmapSize0 to 5 are stored.
S4: the resource0, 1, 2, 3, 4, 5 file handles are mapped to memory using mmap () functions, respectively, according to the 6 BAR space size, such as: mmapAddr 0=mmap (0, mmapsize0, prot_read|prot_write, map_shared, fd0, 0), and memory base addresses MmapAddr0 to 5 are stored.
S5: devNo is added with 1, and MmapAddr 0-5 is stored in the Device [ DevNo ] structure;
in this embodiment, the BAR address space mapping of each instrument is considered to be open, at this time, the variable DevNo is added with 1, and open is set to 1, and the mapped address is assigned to MmapAddr;
the DevNo is used as the only handle for the subsequent operation and closing of the instrument and as the subscript of the Device [ ] array to obtain the corresponding instrument information.
S6: calculating an address offset according to the data width;
performing downward alignment processing on the address offset to make the address offset be an integer multiple of the corresponding offset stepping;
in this embodiment, the address offset is calculated according to the data width, the 32-bit data address offset step is 4, and the 64-bit data address offset step is 8; and (3) performing downward alignment processing on the address Offset to make the address Offset be an integral multiple of the corresponding Offset stepping, so as to avoid addressing errors.
For example, a 32-bit data offset address should be: 0 to 3 are all aligned to 0, and 4 to 7 are all aligned to 4.
S7: the base addresses MmapAddr 0-5 are taken out from the Device [ DevNo ] structure body, the base address of the configuration space memory to be accessed is added with the address offset to obtain the address to be accessed, and the address to be accessed is used for controlling the access of the PXI/PXIe instrument;
reading and writing the address through read (), write () functions, realizing the access operation of the corresponding configuration space of the target instrument, and completing the control of the target instrument;
for example: readdw (mmapadd0+4), i.e. 32 data in the memory with offset address 4, is read from configuration space 0, writedw (mmapadd1+8, 0x 0000000F), i.e. 0x0000000F is written in the memory with offset address 8, in configuration space 1.
S8: after the control of the target instrument is completed, memories mapped to 6 BAR address spaces are respectively released by using the munmap () function.
S9: after releasing the mapped memory, 6 resource files are closed using a close () function.
When the instrument is closed, the open is set to 0, and the MmapAddr address is released;
when the DevNo count exceeds 256, the DevNo is set to 0, the numbers with open being 0 are searched in sequence from small to large, and the found 1 st number is used as a new instrument handle.
Example 3
The embodiment 3 of the invention discloses a control method of a PXI/PXIe instrument, which is used for a Galaxy kylin operating system, and is shown by combining with a figure 1, and comprises the following specific steps:
s1: constructing a structure array for storing target instrument information;
in this embodiment, when controlling a plurality of instruments, a structure array Device [ ] needs to be constructed to store target instrument information, where the structure array includes member variables such as Opened, mmapAddr, open is used to indicate whether the instrument is open, and MmapAddr is used to record the memory address of the BAR space map;
in this embodiment, the total number of instruments is 256, i.e., the variable DevNo (the range of values is 0-256) is set, the number of instruments is recorded, and the initial value is set to 0.
S2: obtaining a bus address of a target instrument, wherein the target instrument is a PXI/PXIe instrument;
in this embodiment, the specific process is as follows:
s101: under the condition that the PXI/PXIe instrument module is not inserted into the case, starting the computer, running a lspci instruction under a Galaxy kylin system terminal, recording the address of a pci bus of current equipment in the system, and closing the computer;
s102: inserting the PXI/PXIe instrument module into the chassis, restarting the computer, running the lspci instruction, and looking up the added device bus address, such as: 03:0b:0, which is the bus address of the target instrument module.
S3: opening a thread lock, and calling a pthread_mutex_lock () function;
and the thread lock is opened according to the needs of the user.
S4: based on the bus address of the target instrument, opening a resource file under the corresponding directory of the target instrument, and respectively storing returned file handles;
specifically, a folder named corresponding to the bus address of the PXI/PXIe instrument is opened in the Galaxkylin operating system "/sys/bus/pc i/device/" directory, namely 6 base register (BAR-Base Address register) files such as resource0, 1, 2, 3, 4, 5 and the like under the "/sys/bus/pc i/device/03:0b:0/" directory are opened by using an open () function;
for example: f0=open ("/sys/bus/pci/devices/03:0b:0/resource 0", o_rdwr|o_sync), holds the returned file handles fd 0-5.
S5: under the Galaxy kylin terminal, operating a lspci-vv instruction, and recording the size of an address space respectively allocated by 6 BARs of the bus equipment according to returned file handle information;
in this embodiment, specifically, under the Galaxy kylin terminal, a "lspci-s03:0b:0-vv" command is run, the returned information is checked, and 6 configuration space size descriptions are found at Region, for example: "Region 0: size= [1024k ] "represents the size of the configuration space 0 as 1024k, and the configuration space sizes MmapSize0 to 5 are stored.
S6: the resource0, 1, 2, 3, 4, 5 file handles are mapped to memory using mmap () functions, respectively, according to the 6 BAR space size, such as: mmapAddr 0=mmap (0, mmapsize0, prot_read|prot_write, map_shared, fd0, 0), and memory base addresses MmapAddr0 to 5 are stored.
S7: devNo is added with 1, and MmapAddr 0-5 is stored in the Device [ DevNo ] structure;
in this embodiment, the BAR address space mapping of each instrument is considered to be open, at this time, the variable DevNo is added with 1, and open is set to 1, and the mapped address is assigned to MmapAddr;
the DevNo is used as the only handle for the subsequent operation and closing of the instrument and as the subscript of the Device [ ] array to obtain the corresponding instrument information.
S8: invoking pthread_mutex_unlock () to close the thread lock;
when the thread lock is opened at step S3, then at the current step, pthread_mutex_unlock () is called to close the thread lock.
S9: calculating an address offset according to the data width;
performing downward alignment processing on the address offset to make the address offset be an integer multiple of the corresponding offset stepping;
in this embodiment, the address offset is calculated according to the data width, the 32-bit data address offset step is 4, and the 64-bit data address offset step is 8; and (3) performing downward alignment processing on the address Offset to make the address Offset be an integral multiple of the corresponding Offset stepping, so as to avoid addressing errors.
For example, a 32-bit data offset address should be: 0 to 3 are all aligned to 0, and 4 to 7 are all aligned to 4.
S10: opening a thread lock, and calling a pthread_mutex_lock () function;
and the thread lock is opened according to the needs of the user.
S11: the base addresses MmapAddr 0-5 are taken out from the Device [ DevNo ] structure body, the base address of the configuration space memory to be accessed is added with the address offset to obtain the address to be accessed, and the address to be accessed is used for controlling the access of the PXI/PXIe instrument;
reading and writing the address through read (), write () functions, realizing the access operation of the corresponding configuration space of the target instrument, and completing the control of the target instrument;
for example: readdw (mmapadd0+4), i.e. 32 data in the memory with offset address 4, is read from configuration space 0, writedw (mmapadd1+8, 0x 0000000F), i.e. 0x0000000F is written in the memory with offset address 8, in configuration space 1.
S12: invoking pthread_mutex_unlock () to close the thread lock;
when the thread lock is opened at step S10, then at the current step, pthread_mutex_unlock () is called to close the thread lock.
S13: after the control of the target instrument is completed, memories mapped to 6 BAR address spaces are respectively released by using the munmap () function.
S14: after releasing the mapped memory, 6 resource files are closed using a close () function.
When the instrument is closed, the open is set to 0, and the MmapAddr address is released;
when the DevNo count exceeds 256, the DevNo is set to 0, the numbers with open being 0 are searched in sequence from small to large, and the found 1 st number is used as a new instrument handle.
Example 4
Embodiment 4 of the present invention discloses a computer storage medium, on which a control program of a PXI/PXIe apparatus is stored, where the control program of the PXI/PXIe apparatus, when executed by a processor, implements the steps of the control method of the PXI/PXIe apparatus described in any of embodiments 1 to 3 above.
The invention is not limited to the specific embodiments described above. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification, as well as to any novel one, or any novel combination, of the steps of the method or process disclosed.
Claims (10)
1. A method for controlling a PXI/PXIe instrument, for use in a Galaxy kylin operating system, comprising:
s1: obtaining a bus address of a target instrument, wherein the target instrument is a PXI/PXIe instrument;
s2: based on the bus address of the target instrument, opening a resource file under the corresponding directory of the target instrument, and respectively storing returned file handles;
s3: under the Galaxy kylin terminal, acquiring the size of an address space according to the returned file handle information;
s4: mapping the address space to a memory according to the size of the address space, and storing a memory base address;
s5: the access port of the control target instrument is obtained according to the memory base address, memory read-write is carried out, access operation of the corresponding configuration space of the target instrument is realized, and control of the target instrument is completed;
s6: after the control of the target instrument is completed, releasing the memory mapped by the address space;
s7: and closing the resource file.
2. The method for controlling a PXI/PXIe device as defined in claim 1, wherein the step of obtaining the bus address of the target device comprises the following steps:
s101: under the condition that the target instrument module is not inserted into the case, starting the computer, running a lspci instruction under a Galaxy kylin system terminal, recording the address of a pci bus of current equipment in the system, and closing the computer;
s102: inserting the target instrument module into the case, restarting the computer, running the lspci instruction, and checking the added equipment bus address, namely the bus address of the target instrument module.
3. The method for controlling a PXI/PXIe device as set forth in claim 1, wherein the opening the resource file under the corresponding directory of the target device specifically includes: and opening a folder named by a bus address corresponding to the target instrument under the system directory of the Galois kylin operating system, and opening a base address register file in the folder through an open function.
4. The method for controlling a PXI/PXIe device as set forth in claim 1, further comprising, after S4: calculating an address offset according to the data width; and performing downward alignment processing on the address offset to make the address offset be an integral multiple of the corresponding offset stepping.
5. The method for controlling a PXI/PXIe device as set forth in claim 4, wherein the obtaining the access address of the manipulation target device according to the memory base address specifically includes: and adding the address offset to the base address of the configuration space memory to be accessed to obtain an address to be accessed, wherein the address to be accessed is an access port of the control instrument.
6. The method for controlling PXI/PXIe devices as defined in claim 1, further comprising, before S1, constructing a structure array to store target device information including a variable indicating an open state of the target device, a variable to record a space mapping memory address, and a variable to record the number of target devices, when controlling the plurality of target devices.
7. The method as set forth in claim 6, wherein the variable indicating the number of target instruments is set to 0, the range is set to 0-256, each time the address space mapping of each target instrument is completed, it is considered to open an instrument, at this time, the variable indicating the number of target instruments is added to 1, the variable indicating the open state of the target instrument is set to 1, and the mapped address is assigned to the variable of the address of the memory mapped in the recording space.
8. The method as set forth in claim 7, wherein when the value of the variable indicating the number of target instruments exceeds the set range value, the value is set to 0, the numbers indicating the value of the variable indicating the open state of the target instruments are sequentially searched from small to large, and the found 1 st number is used as the new instrument handle.
9. The method for controlling a PXI/PXIe device as defined in claim 1, wherein the thread lock is provided before the opening, reading and writing and closing operations of the target device are performed.
10. A computer storage medium, wherein a control program of a PXI/PXIe apparatus is stored on the storage medium, and the control program of the PXI/PXIe apparatus, when executed by a processor, implements the steps of the control method of the PXI/PXIe apparatus as set forth in any one of claims 1 to 9.
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| CN202310669713.6A CN116719762A (en) | 2023-06-07 | 2023-06-07 | Control method and storage medium of PXI/PXIe instrument |
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| CN202310669713.6A CN116719762A (en) | 2023-06-07 | 2023-06-07 | Control method and storage medium of PXI/PXIe instrument |
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